txrx.c 36 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537
  1. /*
  2. * Copyright (c) 2004-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "core.h"
  17. #include "debug.h"
  18. static u8 ath6kl_ibss_map_epid(struct sk_buff *skb, struct net_device *dev,
  19. u32 *map_no)
  20. {
  21. struct ath6kl *ar = ath6kl_priv(dev);
  22. struct ethhdr *eth_hdr;
  23. u32 i, ep_map = -1;
  24. u8 *datap;
  25. *map_no = 0;
  26. datap = skb->data;
  27. eth_hdr = (struct ethhdr *) (datap + sizeof(struct wmi_data_hdr));
  28. if (is_multicast_ether_addr(eth_hdr->h_dest))
  29. return ENDPOINT_2;
  30. for (i = 0; i < ar->node_num; i++) {
  31. if (memcmp(eth_hdr->h_dest, ar->node_map[i].mac_addr,
  32. ETH_ALEN) == 0) {
  33. *map_no = i + 1;
  34. ar->node_map[i].tx_pend++;
  35. return ar->node_map[i].ep_id;
  36. }
  37. if ((ep_map == -1) && !ar->node_map[i].tx_pend)
  38. ep_map = i;
  39. }
  40. if (ep_map == -1) {
  41. ep_map = ar->node_num;
  42. ar->node_num++;
  43. if (ar->node_num > MAX_NODE_NUM)
  44. return ENDPOINT_UNUSED;
  45. }
  46. memcpy(ar->node_map[ep_map].mac_addr, eth_hdr->h_dest, ETH_ALEN);
  47. for (i = ENDPOINT_2; i <= ENDPOINT_5; i++) {
  48. if (!ar->tx_pending[i]) {
  49. ar->node_map[ep_map].ep_id = i;
  50. break;
  51. }
  52. /*
  53. * No free endpoint is available, start redistribution on
  54. * the inuse endpoints.
  55. */
  56. if (i == ENDPOINT_5) {
  57. ar->node_map[ep_map].ep_id = ar->next_ep_id;
  58. ar->next_ep_id++;
  59. if (ar->next_ep_id > ENDPOINT_5)
  60. ar->next_ep_id = ENDPOINT_2;
  61. }
  62. }
  63. *map_no = ep_map + 1;
  64. ar->node_map[ep_map].tx_pend++;
  65. return ar->node_map[ep_map].ep_id;
  66. }
  67. static bool ath6kl_powersave_ap(struct ath6kl_vif *vif, struct sk_buff *skb,
  68. bool *more_data)
  69. {
  70. struct ethhdr *datap = (struct ethhdr *) skb->data;
  71. struct ath6kl_sta *conn = NULL;
  72. bool ps_queued = false, is_psq_empty = false;
  73. struct ath6kl *ar = vif->ar;
  74. if (is_multicast_ether_addr(datap->h_dest)) {
  75. u8 ctr = 0;
  76. bool q_mcast = false;
  77. for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) {
  78. if (ar->sta_list[ctr].sta_flags & STA_PS_SLEEP) {
  79. q_mcast = true;
  80. break;
  81. }
  82. }
  83. if (q_mcast) {
  84. /*
  85. * If this transmit is not because of a Dtim Expiry
  86. * q it.
  87. */
  88. if (!test_bit(DTIM_EXPIRED, &vif->flags)) {
  89. bool is_mcastq_empty = false;
  90. spin_lock_bh(&ar->mcastpsq_lock);
  91. is_mcastq_empty =
  92. skb_queue_empty(&ar->mcastpsq);
  93. skb_queue_tail(&ar->mcastpsq, skb);
  94. spin_unlock_bh(&ar->mcastpsq_lock);
  95. /*
  96. * If this is the first Mcast pkt getting
  97. * queued indicate to the target to set the
  98. * BitmapControl LSB of the TIM IE.
  99. */
  100. if (is_mcastq_empty)
  101. ath6kl_wmi_set_pvb_cmd(ar->wmi,
  102. vif->fw_vif_idx,
  103. MCAST_AID, 1);
  104. ps_queued = true;
  105. } else {
  106. /*
  107. * This transmit is because of Dtim expiry.
  108. * Determine if MoreData bit has to be set.
  109. */
  110. spin_lock_bh(&ar->mcastpsq_lock);
  111. if (!skb_queue_empty(&ar->mcastpsq))
  112. *more_data = true;
  113. spin_unlock_bh(&ar->mcastpsq_lock);
  114. }
  115. }
  116. } else {
  117. conn = ath6kl_find_sta(vif, datap->h_dest);
  118. if (!conn) {
  119. dev_kfree_skb(skb);
  120. /* Inform the caller that the skb is consumed */
  121. return true;
  122. }
  123. if (conn->sta_flags & STA_PS_SLEEP) {
  124. if (!(conn->sta_flags & STA_PS_POLLED)) {
  125. /* Queue the frames if the STA is sleeping */
  126. spin_lock_bh(&conn->psq_lock);
  127. is_psq_empty = skb_queue_empty(&conn->psq);
  128. skb_queue_tail(&conn->psq, skb);
  129. spin_unlock_bh(&conn->psq_lock);
  130. /*
  131. * If this is the first pkt getting queued
  132. * for this STA, update the PVB for this
  133. * STA.
  134. */
  135. if (is_psq_empty)
  136. ath6kl_wmi_set_pvb_cmd(ar->wmi,
  137. vif->fw_vif_idx,
  138. conn->aid, 1);
  139. ps_queued = true;
  140. } else {
  141. /*
  142. * This tx is because of a PsPoll.
  143. * Determine if MoreData bit has to be set.
  144. */
  145. spin_lock_bh(&conn->psq_lock);
  146. if (!skb_queue_empty(&conn->psq))
  147. *more_data = true;
  148. spin_unlock_bh(&conn->psq_lock);
  149. }
  150. }
  151. }
  152. return ps_queued;
  153. }
  154. /* Tx functions */
  155. int ath6kl_control_tx(void *devt, struct sk_buff *skb,
  156. enum htc_endpoint_id eid)
  157. {
  158. struct ath6kl *ar = devt;
  159. int status = 0;
  160. struct ath6kl_cookie *cookie = NULL;
  161. spin_lock_bh(&ar->lock);
  162. ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
  163. "%s: skb=0x%p, len=0x%x eid =%d\n", __func__,
  164. skb, skb->len, eid);
  165. if (test_bit(WMI_CTRL_EP_FULL, &ar->flag) && (eid == ar->ctrl_ep)) {
  166. /*
  167. * Control endpoint is full, don't allocate resources, we
  168. * are just going to drop this packet.
  169. */
  170. cookie = NULL;
  171. ath6kl_err("wmi ctrl ep full, dropping pkt : 0x%p, len:%d\n",
  172. skb, skb->len);
  173. } else
  174. cookie = ath6kl_alloc_cookie(ar);
  175. if (cookie == NULL) {
  176. spin_unlock_bh(&ar->lock);
  177. status = -ENOMEM;
  178. goto fail_ctrl_tx;
  179. }
  180. ar->tx_pending[eid]++;
  181. if (eid != ar->ctrl_ep)
  182. ar->total_tx_data_pend++;
  183. spin_unlock_bh(&ar->lock);
  184. cookie->skb = skb;
  185. cookie->map_no = 0;
  186. set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len,
  187. eid, ATH6KL_CONTROL_PKT_TAG);
  188. /*
  189. * This interface is asynchronous, if there is an error, cleanup
  190. * will happen in the TX completion callback.
  191. */
  192. ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt);
  193. return 0;
  194. fail_ctrl_tx:
  195. dev_kfree_skb(skb);
  196. return status;
  197. }
  198. int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev)
  199. {
  200. struct ath6kl *ar = ath6kl_priv(dev);
  201. struct ath6kl_cookie *cookie = NULL;
  202. enum htc_endpoint_id eid = ENDPOINT_UNUSED;
  203. struct ath6kl_vif *vif = netdev_priv(dev);
  204. u32 map_no = 0;
  205. u16 htc_tag = ATH6KL_DATA_PKT_TAG;
  206. u8 ac = 99 ; /* initialize to unmapped ac */
  207. bool chk_adhoc_ps_mapping = false, more_data = false;
  208. int ret;
  209. ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
  210. "%s: skb=0x%p, data=0x%p, len=0x%x\n", __func__,
  211. skb, skb->data, skb->len);
  212. /* If target is not associated */
  213. if (!test_bit(CONNECTED, &vif->flags)) {
  214. dev_kfree_skb(skb);
  215. return 0;
  216. }
  217. if (!test_bit(WMI_READY, &ar->flag))
  218. goto fail_tx;
  219. /* AP mode Power saving processing */
  220. if (vif->nw_type == AP_NETWORK) {
  221. if (ath6kl_powersave_ap(vif, skb, &more_data))
  222. return 0;
  223. }
  224. if (test_bit(WMI_ENABLED, &ar->flag)) {
  225. if (skb_headroom(skb) < dev->needed_headroom) {
  226. WARN_ON(1);
  227. goto fail_tx;
  228. }
  229. if (ath6kl_wmi_dix_2_dot3(ar->wmi, skb)) {
  230. ath6kl_err("ath6kl_wmi_dix_2_dot3 failed\n");
  231. goto fail_tx;
  232. }
  233. if (ath6kl_wmi_data_hdr_add(ar->wmi, skb, DATA_MSGTYPE,
  234. more_data, 0, 0, NULL,
  235. vif->fw_vif_idx)) {
  236. ath6kl_err("wmi_data_hdr_add failed\n");
  237. goto fail_tx;
  238. }
  239. if ((vif->nw_type == ADHOC_NETWORK) &&
  240. ar->ibss_ps_enable && test_bit(CONNECTED, &vif->flags))
  241. chk_adhoc_ps_mapping = true;
  242. else {
  243. /* get the stream mapping */
  244. ret = ath6kl_wmi_implicit_create_pstream(ar->wmi,
  245. vif->fw_vif_idx, skb,
  246. 0, test_bit(WMM_ENABLED, &vif->flags), &ac);
  247. if (ret)
  248. goto fail_tx;
  249. }
  250. } else
  251. goto fail_tx;
  252. spin_lock_bh(&ar->lock);
  253. if (chk_adhoc_ps_mapping)
  254. eid = ath6kl_ibss_map_epid(skb, dev, &map_no);
  255. else
  256. eid = ar->ac2ep_map[ac];
  257. if (eid == 0 || eid == ENDPOINT_UNUSED) {
  258. ath6kl_err("eid %d is not mapped!\n", eid);
  259. spin_unlock_bh(&ar->lock);
  260. goto fail_tx;
  261. }
  262. /* allocate resource for this packet */
  263. cookie = ath6kl_alloc_cookie(ar);
  264. if (!cookie) {
  265. spin_unlock_bh(&ar->lock);
  266. goto fail_tx;
  267. }
  268. /* update counts while the lock is held */
  269. ar->tx_pending[eid]++;
  270. ar->total_tx_data_pend++;
  271. spin_unlock_bh(&ar->lock);
  272. if (!IS_ALIGNED((unsigned long) skb->data - HTC_HDR_LENGTH, 4) &&
  273. skb_cloned(skb)) {
  274. /*
  275. * We will touch (move the buffer data to align it. Since the
  276. * skb buffer is cloned and not only the header is changed, we
  277. * have to copy it to allow the changes. Since we are copying
  278. * the data here, we may as well align it by reserving suitable
  279. * headroom to avoid the memmove in ath6kl_htc_tx_buf_align().
  280. */
  281. struct sk_buff *nskb;
  282. nskb = skb_copy_expand(skb, HTC_HDR_LENGTH, 0, GFP_ATOMIC);
  283. if (nskb == NULL)
  284. goto fail_tx;
  285. kfree_skb(skb);
  286. skb = nskb;
  287. }
  288. cookie->skb = skb;
  289. cookie->map_no = map_no;
  290. set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len,
  291. eid, htc_tag);
  292. ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "tx ",
  293. skb->data, skb->len);
  294. /*
  295. * HTC interface is asynchronous, if this fails, cleanup will
  296. * happen in the ath6kl_tx_complete callback.
  297. */
  298. ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt);
  299. return 0;
  300. fail_tx:
  301. dev_kfree_skb(skb);
  302. vif->net_stats.tx_dropped++;
  303. vif->net_stats.tx_aborted_errors++;
  304. return 0;
  305. }
  306. /* indicate tx activity or inactivity on a WMI stream */
  307. void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active)
  308. {
  309. struct ath6kl *ar = devt;
  310. enum htc_endpoint_id eid;
  311. int i;
  312. eid = ar->ac2ep_map[traffic_class];
  313. if (!test_bit(WMI_ENABLED, &ar->flag))
  314. goto notify_htc;
  315. spin_lock_bh(&ar->lock);
  316. ar->ac_stream_active[traffic_class] = active;
  317. if (active) {
  318. /*
  319. * Keep track of the active stream with the highest
  320. * priority.
  321. */
  322. if (ar->ac_stream_pri_map[traffic_class] >
  323. ar->hiac_stream_active_pri)
  324. /* set the new highest active priority */
  325. ar->hiac_stream_active_pri =
  326. ar->ac_stream_pri_map[traffic_class];
  327. } else {
  328. /*
  329. * We may have to search for the next active stream
  330. * that is the highest priority.
  331. */
  332. if (ar->hiac_stream_active_pri ==
  333. ar->ac_stream_pri_map[traffic_class]) {
  334. /*
  335. * The highest priority stream just went inactive
  336. * reset and search for the "next" highest "active"
  337. * priority stream.
  338. */
  339. ar->hiac_stream_active_pri = 0;
  340. for (i = 0; i < WMM_NUM_AC; i++) {
  341. if (ar->ac_stream_active[i] &&
  342. (ar->ac_stream_pri_map[i] >
  343. ar->hiac_stream_active_pri))
  344. /*
  345. * Set the new highest active
  346. * priority.
  347. */
  348. ar->hiac_stream_active_pri =
  349. ar->ac_stream_pri_map[i];
  350. }
  351. }
  352. }
  353. spin_unlock_bh(&ar->lock);
  354. notify_htc:
  355. /* notify HTC, this may cause credit distribution changes */
  356. ath6kl_htc_indicate_activity_change(ar->htc_target, eid, active);
  357. }
  358. enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
  359. struct htc_packet *packet)
  360. {
  361. struct ath6kl *ar = target->dev->ar;
  362. struct ath6kl_vif *vif;
  363. enum htc_endpoint_id endpoint = packet->endpoint;
  364. enum htc_send_full_action action = HTC_SEND_FULL_KEEP;
  365. if (endpoint == ar->ctrl_ep) {
  366. /*
  367. * Under normal WMI if this is getting full, then something
  368. * is running rampant the host should not be exhausting the
  369. * WMI queue with too many commands the only exception to
  370. * this is during testing using endpointping.
  371. */
  372. spin_lock_bh(&ar->lock);
  373. set_bit(WMI_CTRL_EP_FULL, &ar->flag);
  374. spin_unlock_bh(&ar->lock);
  375. ath6kl_err("wmi ctrl ep is full\n");
  376. goto stop_adhoc_netq;
  377. }
  378. if (packet->info.tx.tag == ATH6KL_CONTROL_PKT_TAG)
  379. goto stop_adhoc_netq;
  380. /*
  381. * The last MAX_HI_COOKIE_NUM "batch" of cookies are reserved for
  382. * the highest active stream.
  383. */
  384. if (ar->ac_stream_pri_map[ar->ep2ac_map[endpoint]] <
  385. ar->hiac_stream_active_pri &&
  386. ar->cookie_count <= MAX_HI_COOKIE_NUM) {
  387. /*
  388. * Give preference to the highest priority stream by
  389. * dropping the packets which overflowed.
  390. */
  391. action = HTC_SEND_FULL_DROP;
  392. goto stop_adhoc_netq;
  393. }
  394. stop_adhoc_netq:
  395. /* FIXME: Locking */
  396. spin_lock_bh(&ar->list_lock);
  397. list_for_each_entry(vif, &ar->vif_list, list) {
  398. if (vif->nw_type == ADHOC_NETWORK) {
  399. spin_unlock_bh(&ar->list_lock);
  400. spin_lock_bh(&vif->if_lock);
  401. set_bit(NETQ_STOPPED, &vif->flags);
  402. spin_unlock_bh(&vif->if_lock);
  403. netif_stop_queue(vif->ndev);
  404. return action;
  405. }
  406. }
  407. spin_unlock_bh(&ar->list_lock);
  408. return action;
  409. }
  410. /* TODO this needs to be looked at */
  411. static void ath6kl_tx_clear_node_map(struct ath6kl_vif *vif,
  412. enum htc_endpoint_id eid, u32 map_no)
  413. {
  414. struct ath6kl *ar = vif->ar;
  415. u32 i;
  416. if (vif->nw_type != ADHOC_NETWORK)
  417. return;
  418. if (!ar->ibss_ps_enable)
  419. return;
  420. if (eid == ar->ctrl_ep)
  421. return;
  422. if (map_no == 0)
  423. return;
  424. map_no--;
  425. ar->node_map[map_no].tx_pend--;
  426. if (ar->node_map[map_no].tx_pend)
  427. return;
  428. if (map_no != (ar->node_num - 1))
  429. return;
  430. for (i = ar->node_num; i > 0; i--) {
  431. if (ar->node_map[i - 1].tx_pend)
  432. break;
  433. memset(&ar->node_map[i - 1], 0,
  434. sizeof(struct ath6kl_node_mapping));
  435. ar->node_num--;
  436. }
  437. }
  438. void ath6kl_tx_complete(void *context, struct list_head *packet_queue)
  439. {
  440. struct ath6kl *ar = context;
  441. struct sk_buff_head skb_queue;
  442. struct htc_packet *packet;
  443. struct sk_buff *skb;
  444. struct ath6kl_cookie *ath6kl_cookie;
  445. u32 map_no = 0;
  446. int status;
  447. enum htc_endpoint_id eid;
  448. bool wake_event = false;
  449. bool flushing[MAX_NUM_VIF] = {false};
  450. u8 if_idx;
  451. struct ath6kl_vif *vif;
  452. skb_queue_head_init(&skb_queue);
  453. /* lock the driver as we update internal state */
  454. spin_lock_bh(&ar->lock);
  455. /* reap completed packets */
  456. while (!list_empty(packet_queue)) {
  457. packet = list_first_entry(packet_queue, struct htc_packet,
  458. list);
  459. list_del(&packet->list);
  460. ath6kl_cookie = (struct ath6kl_cookie *)packet->pkt_cntxt;
  461. if (!ath6kl_cookie)
  462. goto fatal;
  463. status = packet->status;
  464. skb = ath6kl_cookie->skb;
  465. eid = packet->endpoint;
  466. map_no = ath6kl_cookie->map_no;
  467. if (!skb || !skb->data)
  468. goto fatal;
  469. packet->buf = skb->data;
  470. __skb_queue_tail(&skb_queue, skb);
  471. if (!status && (packet->act_len != skb->len))
  472. goto fatal;
  473. ar->tx_pending[eid]--;
  474. if (eid != ar->ctrl_ep)
  475. ar->total_tx_data_pend--;
  476. if (eid == ar->ctrl_ep) {
  477. if (test_bit(WMI_CTRL_EP_FULL, &ar->flag))
  478. clear_bit(WMI_CTRL_EP_FULL, &ar->flag);
  479. if (ar->tx_pending[eid] == 0)
  480. wake_event = true;
  481. }
  482. if (eid == ar->ctrl_ep) {
  483. if_idx = wmi_cmd_hdr_get_if_idx(
  484. (struct wmi_cmd_hdr *) skb->data);
  485. } else {
  486. if_idx = wmi_data_hdr_get_if_idx(
  487. (struct wmi_data_hdr *) skb->data);
  488. }
  489. vif = ath6kl_get_vif_by_index(ar, if_idx);
  490. if (!vif) {
  491. ath6kl_free_cookie(ar, ath6kl_cookie);
  492. continue;
  493. }
  494. if (status) {
  495. if (status == -ECANCELED)
  496. /* a packet was flushed */
  497. flushing[if_idx] = true;
  498. vif->net_stats.tx_errors++;
  499. if (status != -ENOSPC && status != -ECANCELED)
  500. ath6kl_warn("tx complete error: %d\n", status);
  501. ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
  502. "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n",
  503. __func__, skb, packet->buf, packet->act_len,
  504. eid, "error!");
  505. } else {
  506. ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
  507. "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n",
  508. __func__, skb, packet->buf, packet->act_len,
  509. eid, "OK");
  510. flushing[if_idx] = false;
  511. vif->net_stats.tx_packets++;
  512. vif->net_stats.tx_bytes += skb->len;
  513. }
  514. ath6kl_tx_clear_node_map(vif, eid, map_no);
  515. ath6kl_free_cookie(ar, ath6kl_cookie);
  516. if (test_bit(NETQ_STOPPED, &vif->flags))
  517. clear_bit(NETQ_STOPPED, &vif->flags);
  518. }
  519. spin_unlock_bh(&ar->lock);
  520. __skb_queue_purge(&skb_queue);
  521. /* FIXME: Locking */
  522. spin_lock_bh(&ar->list_lock);
  523. list_for_each_entry(vif, &ar->vif_list, list) {
  524. if (test_bit(CONNECTED, &vif->flags) &&
  525. !flushing[vif->fw_vif_idx]) {
  526. spin_unlock_bh(&ar->list_lock);
  527. netif_wake_queue(vif->ndev);
  528. spin_lock_bh(&ar->list_lock);
  529. }
  530. }
  531. spin_unlock_bh(&ar->list_lock);
  532. if (wake_event)
  533. wake_up(&ar->event_wq);
  534. return;
  535. fatal:
  536. WARN_ON(1);
  537. spin_unlock_bh(&ar->lock);
  538. return;
  539. }
  540. void ath6kl_tx_data_cleanup(struct ath6kl *ar)
  541. {
  542. int i;
  543. /* flush all the data (non-control) streams */
  544. for (i = 0; i < WMM_NUM_AC; i++)
  545. ath6kl_htc_flush_txep(ar->htc_target, ar->ac2ep_map[i],
  546. ATH6KL_DATA_PKT_TAG);
  547. }
  548. /* Rx functions */
  549. static void ath6kl_deliver_frames_to_nw_stack(struct net_device *dev,
  550. struct sk_buff *skb)
  551. {
  552. if (!skb)
  553. return;
  554. skb->dev = dev;
  555. if (!(skb->dev->flags & IFF_UP)) {
  556. dev_kfree_skb(skb);
  557. return;
  558. }
  559. skb->protocol = eth_type_trans(skb, skb->dev);
  560. netif_rx_ni(skb);
  561. }
  562. static void ath6kl_alloc_netbufs(struct sk_buff_head *q, u16 num)
  563. {
  564. struct sk_buff *skb;
  565. while (num) {
  566. skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE);
  567. if (!skb) {
  568. ath6kl_err("netbuf allocation failed\n");
  569. return;
  570. }
  571. skb_queue_tail(q, skb);
  572. num--;
  573. }
  574. }
  575. static struct sk_buff *aggr_get_free_skb(struct aggr_info *p_aggr)
  576. {
  577. struct sk_buff *skb = NULL;
  578. if (skb_queue_len(&p_aggr->free_q) < (AGGR_NUM_OF_FREE_NETBUFS >> 2))
  579. ath6kl_alloc_netbufs(&p_aggr->free_q, AGGR_NUM_OF_FREE_NETBUFS);
  580. skb = skb_dequeue(&p_aggr->free_q);
  581. return skb;
  582. }
  583. void ath6kl_rx_refill(struct htc_target *target, enum htc_endpoint_id endpoint)
  584. {
  585. struct ath6kl *ar = target->dev->ar;
  586. struct sk_buff *skb;
  587. int rx_buf;
  588. int n_buf_refill;
  589. struct htc_packet *packet;
  590. struct list_head queue;
  591. n_buf_refill = ATH6KL_MAX_RX_BUFFERS -
  592. ath6kl_htc_get_rxbuf_num(ar->htc_target, endpoint);
  593. if (n_buf_refill <= 0)
  594. return;
  595. INIT_LIST_HEAD(&queue);
  596. ath6kl_dbg(ATH6KL_DBG_WLAN_RX,
  597. "%s: providing htc with %d buffers at eid=%d\n",
  598. __func__, n_buf_refill, endpoint);
  599. for (rx_buf = 0; rx_buf < n_buf_refill; rx_buf++) {
  600. skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE);
  601. if (!skb)
  602. break;
  603. packet = (struct htc_packet *) skb->head;
  604. if (!IS_ALIGNED((unsigned long) skb->data, 4))
  605. skb->data = PTR_ALIGN(skb->data - 4, 4);
  606. set_htc_rxpkt_info(packet, skb, skb->data,
  607. ATH6KL_BUFFER_SIZE, endpoint);
  608. list_add_tail(&packet->list, &queue);
  609. }
  610. if (!list_empty(&queue))
  611. ath6kl_htc_add_rxbuf_multiple(ar->htc_target, &queue);
  612. }
  613. void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count)
  614. {
  615. struct htc_packet *packet;
  616. struct sk_buff *skb;
  617. while (count) {
  618. skb = ath6kl_buf_alloc(ATH6KL_AMSDU_BUFFER_SIZE);
  619. if (!skb)
  620. return;
  621. packet = (struct htc_packet *) skb->head;
  622. if (!IS_ALIGNED((unsigned long) skb->data, 4))
  623. skb->data = PTR_ALIGN(skb->data - 4, 4);
  624. set_htc_rxpkt_info(packet, skb, skb->data,
  625. ATH6KL_AMSDU_BUFFER_SIZE, 0);
  626. spin_lock_bh(&ar->lock);
  627. list_add_tail(&packet->list, &ar->amsdu_rx_buffer_queue);
  628. spin_unlock_bh(&ar->lock);
  629. count--;
  630. }
  631. }
  632. /*
  633. * Callback to allocate a receive buffer for a pending packet. We use a
  634. * pre-allocated list of buffers of maximum AMSDU size (4K).
  635. */
  636. struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
  637. enum htc_endpoint_id endpoint,
  638. int len)
  639. {
  640. struct ath6kl *ar = target->dev->ar;
  641. struct htc_packet *packet = NULL;
  642. struct list_head *pkt_pos;
  643. int refill_cnt = 0, depth = 0;
  644. ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: eid=%d, len:%d\n",
  645. __func__, endpoint, len);
  646. if ((len <= ATH6KL_BUFFER_SIZE) ||
  647. (len > ATH6KL_AMSDU_BUFFER_SIZE))
  648. return NULL;
  649. spin_lock_bh(&ar->lock);
  650. if (list_empty(&ar->amsdu_rx_buffer_queue)) {
  651. spin_unlock_bh(&ar->lock);
  652. refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS;
  653. goto refill_buf;
  654. }
  655. packet = list_first_entry(&ar->amsdu_rx_buffer_queue,
  656. struct htc_packet, list);
  657. list_del(&packet->list);
  658. list_for_each(pkt_pos, &ar->amsdu_rx_buffer_queue)
  659. depth++;
  660. refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS - depth;
  661. spin_unlock_bh(&ar->lock);
  662. /* set actual endpoint ID */
  663. packet->endpoint = endpoint;
  664. refill_buf:
  665. if (refill_cnt >= ATH6KL_AMSDU_REFILL_THRESHOLD)
  666. ath6kl_refill_amsdu_rxbufs(ar, refill_cnt);
  667. return packet;
  668. }
  669. static void aggr_slice_amsdu(struct aggr_info *p_aggr,
  670. struct rxtid *rxtid, struct sk_buff *skb)
  671. {
  672. struct sk_buff *new_skb;
  673. struct ethhdr *hdr;
  674. u16 frame_8023_len, payload_8023_len, mac_hdr_len, amsdu_len;
  675. u8 *framep;
  676. mac_hdr_len = sizeof(struct ethhdr);
  677. framep = skb->data + mac_hdr_len;
  678. amsdu_len = skb->len - mac_hdr_len;
  679. while (amsdu_len > mac_hdr_len) {
  680. hdr = (struct ethhdr *) framep;
  681. payload_8023_len = ntohs(hdr->h_proto);
  682. if (payload_8023_len < MIN_MSDU_SUBFRAME_PAYLOAD_LEN ||
  683. payload_8023_len > MAX_MSDU_SUBFRAME_PAYLOAD_LEN) {
  684. ath6kl_err("802.3 AMSDU frame bound check failed. len %d\n",
  685. payload_8023_len);
  686. break;
  687. }
  688. frame_8023_len = payload_8023_len + mac_hdr_len;
  689. new_skb = aggr_get_free_skb(p_aggr);
  690. if (!new_skb) {
  691. ath6kl_err("no buffer available\n");
  692. break;
  693. }
  694. memcpy(new_skb->data, framep, frame_8023_len);
  695. skb_put(new_skb, frame_8023_len);
  696. if (ath6kl_wmi_dot3_2_dix(new_skb)) {
  697. ath6kl_err("dot3_2_dix error\n");
  698. dev_kfree_skb(new_skb);
  699. break;
  700. }
  701. skb_queue_tail(&rxtid->q, new_skb);
  702. /* Is this the last subframe within this aggregate ? */
  703. if ((amsdu_len - frame_8023_len) == 0)
  704. break;
  705. /* Add the length of A-MSDU subframe padding bytes -
  706. * Round to nearest word.
  707. */
  708. frame_8023_len = ALIGN(frame_8023_len, 4);
  709. framep += frame_8023_len;
  710. amsdu_len -= frame_8023_len;
  711. }
  712. dev_kfree_skb(skb);
  713. }
  714. static void aggr_deque_frms(struct aggr_info *p_aggr, u8 tid,
  715. u16 seq_no, u8 order)
  716. {
  717. struct sk_buff *skb;
  718. struct rxtid *rxtid;
  719. struct skb_hold_q *node;
  720. u16 idx, idx_end, seq_end;
  721. struct rxtid_stats *stats;
  722. if (!p_aggr)
  723. return;
  724. rxtid = &p_aggr->rx_tid[tid];
  725. stats = &p_aggr->stat[tid];
  726. idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz);
  727. /*
  728. * idx_end is typically the last possible frame in the window,
  729. * but changes to 'the' seq_no, when BAR comes. If seq_no
  730. * is non-zero, we will go up to that and stop.
  731. * Note: last seq no in current window will occupy the same
  732. * index position as index that is just previous to start.
  733. * An imp point : if win_sz is 7, for seq_no space of 4095,
  734. * then, there would be holes when sequence wrap around occurs.
  735. * Target should judiciously choose the win_sz, based on
  736. * this condition. For 4095, (TID_WINDOW_SZ = 2 x win_sz
  737. * 2, 4, 8, 16 win_sz works fine).
  738. * We must deque from "idx" to "idx_end", including both.
  739. */
  740. seq_end = seq_no ? seq_no : rxtid->seq_next;
  741. idx_end = AGGR_WIN_IDX(seq_end, rxtid->hold_q_sz);
  742. spin_lock_bh(&rxtid->lock);
  743. do {
  744. node = &rxtid->hold_q[idx];
  745. if ((order == 1) && (!node->skb))
  746. break;
  747. if (node->skb) {
  748. if (node->is_amsdu)
  749. aggr_slice_amsdu(p_aggr, rxtid, node->skb);
  750. else
  751. skb_queue_tail(&rxtid->q, node->skb);
  752. node->skb = NULL;
  753. } else
  754. stats->num_hole++;
  755. rxtid->seq_next = ATH6KL_NEXT_SEQ_NO(rxtid->seq_next);
  756. idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz);
  757. } while (idx != idx_end);
  758. spin_unlock_bh(&rxtid->lock);
  759. stats->num_delivered += skb_queue_len(&rxtid->q);
  760. while ((skb = skb_dequeue(&rxtid->q)))
  761. ath6kl_deliver_frames_to_nw_stack(p_aggr->dev, skb);
  762. }
  763. static bool aggr_process_recv_frm(struct aggr_info *agg_info, u8 tid,
  764. u16 seq_no,
  765. bool is_amsdu, struct sk_buff *frame)
  766. {
  767. struct rxtid *rxtid;
  768. struct rxtid_stats *stats;
  769. struct sk_buff *skb;
  770. struct skb_hold_q *node;
  771. u16 idx, st, cur, end;
  772. bool is_queued = false;
  773. u16 extended_end;
  774. rxtid = &agg_info->rx_tid[tid];
  775. stats = &agg_info->stat[tid];
  776. stats->num_into_aggr++;
  777. if (!rxtid->aggr) {
  778. if (is_amsdu) {
  779. aggr_slice_amsdu(agg_info, rxtid, frame);
  780. is_queued = true;
  781. stats->num_amsdu++;
  782. while ((skb = skb_dequeue(&rxtid->q)))
  783. ath6kl_deliver_frames_to_nw_stack(agg_info->dev,
  784. skb);
  785. }
  786. return is_queued;
  787. }
  788. /* Check the incoming sequence no, if it's in the window */
  789. st = rxtid->seq_next;
  790. cur = seq_no;
  791. end = (st + rxtid->hold_q_sz-1) & ATH6KL_MAX_SEQ_NO;
  792. if (((st < end) && (cur < st || cur > end)) ||
  793. ((st > end) && (cur > end) && (cur < st))) {
  794. extended_end = (end + rxtid->hold_q_sz - 1) &
  795. ATH6KL_MAX_SEQ_NO;
  796. if (((end < extended_end) &&
  797. (cur < end || cur > extended_end)) ||
  798. ((end > extended_end) && (cur > extended_end) &&
  799. (cur < end))) {
  800. aggr_deque_frms(agg_info, tid, 0, 0);
  801. if (cur >= rxtid->hold_q_sz - 1)
  802. rxtid->seq_next = cur - (rxtid->hold_q_sz - 1);
  803. else
  804. rxtid->seq_next = ATH6KL_MAX_SEQ_NO -
  805. (rxtid->hold_q_sz - 2 - cur);
  806. } else {
  807. /*
  808. * Dequeue only those frames that are outside the
  809. * new shifted window.
  810. */
  811. if (cur >= rxtid->hold_q_sz - 1)
  812. st = cur - (rxtid->hold_q_sz - 1);
  813. else
  814. st = ATH6KL_MAX_SEQ_NO -
  815. (rxtid->hold_q_sz - 2 - cur);
  816. aggr_deque_frms(agg_info, tid, st, 0);
  817. }
  818. stats->num_oow++;
  819. }
  820. idx = AGGR_WIN_IDX(seq_no, rxtid->hold_q_sz);
  821. node = &rxtid->hold_q[idx];
  822. spin_lock_bh(&rxtid->lock);
  823. /*
  824. * Is the cur frame duplicate or something beyond our window(hold_q
  825. * -> which is 2x, already)?
  826. *
  827. * 1. Duplicate is easy - drop incoming frame.
  828. * 2. Not falling in current sliding window.
  829. * 2a. is the frame_seq_no preceding current tid_seq_no?
  830. * -> drop the frame. perhaps sender did not get our ACK.
  831. * this is taken care of above.
  832. * 2b. is the frame_seq_no beyond window(st, TID_WINDOW_SZ);
  833. * -> Taken care of it above, by moving window forward.
  834. */
  835. dev_kfree_skb(node->skb);
  836. stats->num_dups++;
  837. node->skb = frame;
  838. is_queued = true;
  839. node->is_amsdu = is_amsdu;
  840. node->seq_no = seq_no;
  841. if (node->is_amsdu)
  842. stats->num_amsdu++;
  843. else
  844. stats->num_mpdu++;
  845. spin_unlock_bh(&rxtid->lock);
  846. aggr_deque_frms(agg_info, tid, 0, 1);
  847. if (agg_info->timer_scheduled)
  848. rxtid->progress = true;
  849. else
  850. for (idx = 0 ; idx < rxtid->hold_q_sz; idx++) {
  851. if (rxtid->hold_q[idx].skb) {
  852. /*
  853. * There is a frame in the queue and no
  854. * timer so start a timer to ensure that
  855. * the frame doesn't remain stuck
  856. * forever.
  857. */
  858. agg_info->timer_scheduled = true;
  859. mod_timer(&agg_info->timer,
  860. (jiffies +
  861. HZ * (AGGR_RX_TIMEOUT) / 1000));
  862. rxtid->progress = false;
  863. rxtid->timer_mon = true;
  864. break;
  865. }
  866. }
  867. return is_queued;
  868. }
  869. void ath6kl_rx(struct htc_target *target, struct htc_packet *packet)
  870. {
  871. struct ath6kl *ar = target->dev->ar;
  872. struct sk_buff *skb = packet->pkt_cntxt;
  873. struct wmi_rx_meta_v2 *meta;
  874. struct wmi_data_hdr *dhdr;
  875. int min_hdr_len;
  876. u8 meta_type, dot11_hdr = 0;
  877. int status = packet->status;
  878. enum htc_endpoint_id ept = packet->endpoint;
  879. bool is_amsdu, prev_ps, ps_state = false;
  880. struct ath6kl_sta *conn = NULL;
  881. struct sk_buff *skb1 = NULL;
  882. struct ethhdr *datap = NULL;
  883. struct ath6kl_vif *vif;
  884. u16 seq_no, offset;
  885. u8 tid, if_idx;
  886. ath6kl_dbg(ATH6KL_DBG_WLAN_RX,
  887. "%s: ar=0x%p eid=%d, skb=0x%p, data=0x%p, len=0x%x status:%d",
  888. __func__, ar, ept, skb, packet->buf,
  889. packet->act_len, status);
  890. if (status || !(skb->data + HTC_HDR_LENGTH)) {
  891. dev_kfree_skb(skb);
  892. return;
  893. }
  894. skb_put(skb, packet->act_len + HTC_HDR_LENGTH);
  895. skb_pull(skb, HTC_HDR_LENGTH);
  896. if (ept == ar->ctrl_ep) {
  897. if_idx =
  898. wmi_cmd_hdr_get_if_idx((struct wmi_cmd_hdr *) skb->data);
  899. } else {
  900. if_idx =
  901. wmi_data_hdr_get_if_idx((struct wmi_data_hdr *) skb->data);
  902. }
  903. vif = ath6kl_get_vif_by_index(ar, if_idx);
  904. if (!vif) {
  905. dev_kfree_skb(skb);
  906. return;
  907. }
  908. /*
  909. * Take lock to protect buffer counts and adaptive power throughput
  910. * state.
  911. */
  912. spin_lock_bh(&vif->if_lock);
  913. vif->net_stats.rx_packets++;
  914. vif->net_stats.rx_bytes += packet->act_len;
  915. spin_unlock_bh(&vif->if_lock);
  916. ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "rx ",
  917. skb->data, skb->len);
  918. skb->dev = vif->ndev;
  919. if (!test_bit(WMI_ENABLED, &ar->flag)) {
  920. if (EPPING_ALIGNMENT_PAD > 0)
  921. skb_pull(skb, EPPING_ALIGNMENT_PAD);
  922. ath6kl_deliver_frames_to_nw_stack(vif->ndev, skb);
  923. return;
  924. }
  925. if (ept == ar->ctrl_ep) {
  926. ath6kl_wmi_control_rx(ar->wmi, skb);
  927. return;
  928. }
  929. min_hdr_len = sizeof(struct ethhdr) + sizeof(struct wmi_data_hdr) +
  930. sizeof(struct ath6kl_llc_snap_hdr);
  931. dhdr = (struct wmi_data_hdr *) skb->data;
  932. /*
  933. * In the case of AP mode we may receive NULL data frames
  934. * that do not have LLC hdr. They are 16 bytes in size.
  935. * Allow these frames in the AP mode.
  936. */
  937. if (vif->nw_type != AP_NETWORK &&
  938. ((packet->act_len < min_hdr_len) ||
  939. (packet->act_len > WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH))) {
  940. ath6kl_info("frame len is too short or too long\n");
  941. vif->net_stats.rx_errors++;
  942. vif->net_stats.rx_length_errors++;
  943. dev_kfree_skb(skb);
  944. return;
  945. }
  946. /* Get the Power save state of the STA */
  947. if (vif->nw_type == AP_NETWORK) {
  948. meta_type = wmi_data_hdr_get_meta(dhdr);
  949. ps_state = !!((dhdr->info >> WMI_DATA_HDR_PS_SHIFT) &
  950. WMI_DATA_HDR_PS_MASK);
  951. offset = sizeof(struct wmi_data_hdr);
  952. switch (meta_type) {
  953. case 0:
  954. break;
  955. case WMI_META_VERSION_1:
  956. offset += sizeof(struct wmi_rx_meta_v1);
  957. break;
  958. case WMI_META_VERSION_2:
  959. offset += sizeof(struct wmi_rx_meta_v2);
  960. break;
  961. default:
  962. break;
  963. }
  964. datap = (struct ethhdr *) (skb->data + offset);
  965. conn = ath6kl_find_sta(vif, datap->h_source);
  966. if (!conn) {
  967. dev_kfree_skb(skb);
  968. return;
  969. }
  970. /*
  971. * If there is a change in PS state of the STA,
  972. * take appropriate steps:
  973. *
  974. * 1. If Sleep-->Awake, flush the psq for the STA
  975. * Clear the PVB for the STA.
  976. * 2. If Awake-->Sleep, Starting queueing frames
  977. * the STA.
  978. */
  979. prev_ps = !!(conn->sta_flags & STA_PS_SLEEP);
  980. if (ps_state)
  981. conn->sta_flags |= STA_PS_SLEEP;
  982. else
  983. conn->sta_flags &= ~STA_PS_SLEEP;
  984. if (prev_ps ^ !!(conn->sta_flags & STA_PS_SLEEP)) {
  985. if (!(conn->sta_flags & STA_PS_SLEEP)) {
  986. struct sk_buff *skbuff = NULL;
  987. spin_lock_bh(&conn->psq_lock);
  988. while ((skbuff = skb_dequeue(&conn->psq))
  989. != NULL) {
  990. spin_unlock_bh(&conn->psq_lock);
  991. ath6kl_data_tx(skbuff, vif->ndev);
  992. spin_lock_bh(&conn->psq_lock);
  993. }
  994. spin_unlock_bh(&conn->psq_lock);
  995. /* Clear the PVB for this STA */
  996. ath6kl_wmi_set_pvb_cmd(ar->wmi, vif->fw_vif_idx,
  997. conn->aid, 0);
  998. }
  999. }
  1000. /* drop NULL data frames here */
  1001. if ((packet->act_len < min_hdr_len) ||
  1002. (packet->act_len >
  1003. WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH)) {
  1004. dev_kfree_skb(skb);
  1005. return;
  1006. }
  1007. }
  1008. is_amsdu = wmi_data_hdr_is_amsdu(dhdr) ? true : false;
  1009. tid = wmi_data_hdr_get_up(dhdr);
  1010. seq_no = wmi_data_hdr_get_seqno(dhdr);
  1011. meta_type = wmi_data_hdr_get_meta(dhdr);
  1012. dot11_hdr = wmi_data_hdr_get_dot11(dhdr);
  1013. skb_pull(skb, sizeof(struct wmi_data_hdr));
  1014. switch (meta_type) {
  1015. case WMI_META_VERSION_1:
  1016. skb_pull(skb, sizeof(struct wmi_rx_meta_v1));
  1017. break;
  1018. case WMI_META_VERSION_2:
  1019. meta = (struct wmi_rx_meta_v2 *) skb->data;
  1020. if (meta->csum_flags & 0x1) {
  1021. skb->ip_summed = CHECKSUM_COMPLETE;
  1022. skb->csum = (__force __wsum) meta->csum;
  1023. }
  1024. skb_pull(skb, sizeof(struct wmi_rx_meta_v2));
  1025. break;
  1026. default:
  1027. break;
  1028. }
  1029. if (dot11_hdr)
  1030. status = ath6kl_wmi_dot11_hdr_remove(ar->wmi, skb);
  1031. else if (!is_amsdu)
  1032. status = ath6kl_wmi_dot3_2_dix(skb);
  1033. if (status) {
  1034. /*
  1035. * Drop frames that could not be processed (lack of
  1036. * memory, etc.)
  1037. */
  1038. dev_kfree_skb(skb);
  1039. return;
  1040. }
  1041. if (!(vif->ndev->flags & IFF_UP)) {
  1042. dev_kfree_skb(skb);
  1043. return;
  1044. }
  1045. if (vif->nw_type == AP_NETWORK) {
  1046. datap = (struct ethhdr *) skb->data;
  1047. if (is_multicast_ether_addr(datap->h_dest))
  1048. /*
  1049. * Bcast/Mcast frames should be sent to the
  1050. * OS stack as well as on the air.
  1051. */
  1052. skb1 = skb_copy(skb, GFP_ATOMIC);
  1053. else {
  1054. /*
  1055. * Search for a connected STA with dstMac
  1056. * as the Mac address. If found send the
  1057. * frame to it on the air else send the
  1058. * frame up the stack.
  1059. */
  1060. conn = ath6kl_find_sta(vif, datap->h_dest);
  1061. if (conn && ar->intra_bss) {
  1062. skb1 = skb;
  1063. skb = NULL;
  1064. } else if (conn && !ar->intra_bss) {
  1065. dev_kfree_skb(skb);
  1066. skb = NULL;
  1067. }
  1068. }
  1069. if (skb1)
  1070. ath6kl_data_tx(skb1, vif->ndev);
  1071. if (skb == NULL) {
  1072. /* nothing to deliver up the stack */
  1073. return;
  1074. }
  1075. }
  1076. datap = (struct ethhdr *) skb->data;
  1077. if (is_unicast_ether_addr(datap->h_dest) &&
  1078. aggr_process_recv_frm(vif->aggr_cntxt, tid, seq_no,
  1079. is_amsdu, skb))
  1080. /* aggregation code will handle the skb */
  1081. return;
  1082. ath6kl_deliver_frames_to_nw_stack(vif->ndev, skb);
  1083. }
  1084. static void aggr_timeout(unsigned long arg)
  1085. {
  1086. u8 i, j;
  1087. struct aggr_info *p_aggr = (struct aggr_info *) arg;
  1088. struct rxtid *rxtid;
  1089. struct rxtid_stats *stats;
  1090. for (i = 0; i < NUM_OF_TIDS; i++) {
  1091. rxtid = &p_aggr->rx_tid[i];
  1092. stats = &p_aggr->stat[i];
  1093. if (!rxtid->aggr || !rxtid->timer_mon || rxtid->progress)
  1094. continue;
  1095. stats->num_timeouts++;
  1096. ath6kl_dbg(ATH6KL_DBG_AGGR,
  1097. "aggr timeout (st %d end %d)\n",
  1098. rxtid->seq_next,
  1099. ((rxtid->seq_next + rxtid->hold_q_sz-1) &
  1100. ATH6KL_MAX_SEQ_NO));
  1101. aggr_deque_frms(p_aggr, i, 0, 0);
  1102. }
  1103. p_aggr->timer_scheduled = false;
  1104. for (i = 0; i < NUM_OF_TIDS; i++) {
  1105. rxtid = &p_aggr->rx_tid[i];
  1106. if (rxtid->aggr && rxtid->hold_q) {
  1107. for (j = 0; j < rxtid->hold_q_sz; j++) {
  1108. if (rxtid->hold_q[j].skb) {
  1109. p_aggr->timer_scheduled = true;
  1110. rxtid->timer_mon = true;
  1111. rxtid->progress = false;
  1112. break;
  1113. }
  1114. }
  1115. if (j >= rxtid->hold_q_sz)
  1116. rxtid->timer_mon = false;
  1117. }
  1118. }
  1119. if (p_aggr->timer_scheduled)
  1120. mod_timer(&p_aggr->timer,
  1121. jiffies + msecs_to_jiffies(AGGR_RX_TIMEOUT));
  1122. }
  1123. static void aggr_delete_tid_state(struct aggr_info *p_aggr, u8 tid)
  1124. {
  1125. struct rxtid *rxtid;
  1126. struct rxtid_stats *stats;
  1127. if (!p_aggr || tid >= NUM_OF_TIDS)
  1128. return;
  1129. rxtid = &p_aggr->rx_tid[tid];
  1130. stats = &p_aggr->stat[tid];
  1131. if (rxtid->aggr)
  1132. aggr_deque_frms(p_aggr, tid, 0, 0);
  1133. rxtid->aggr = false;
  1134. rxtid->progress = false;
  1135. rxtid->timer_mon = false;
  1136. rxtid->win_sz = 0;
  1137. rxtid->seq_next = 0;
  1138. rxtid->hold_q_sz = 0;
  1139. kfree(rxtid->hold_q);
  1140. rxtid->hold_q = NULL;
  1141. memset(stats, 0, sizeof(struct rxtid_stats));
  1142. }
  1143. void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no,
  1144. u8 win_sz)
  1145. {
  1146. struct aggr_info *p_aggr = vif->aggr_cntxt;
  1147. struct rxtid *rxtid;
  1148. struct rxtid_stats *stats;
  1149. u16 hold_q_size;
  1150. if (!p_aggr)
  1151. return;
  1152. rxtid = &p_aggr->rx_tid[tid];
  1153. stats = &p_aggr->stat[tid];
  1154. if (win_sz < AGGR_WIN_SZ_MIN || win_sz > AGGR_WIN_SZ_MAX)
  1155. ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: win_sz %d, tid %d\n",
  1156. __func__, win_sz, tid);
  1157. if (rxtid->aggr)
  1158. aggr_delete_tid_state(p_aggr, tid);
  1159. rxtid->seq_next = seq_no;
  1160. hold_q_size = TID_WINDOW_SZ(win_sz) * sizeof(struct skb_hold_q);
  1161. rxtid->hold_q = kzalloc(hold_q_size, GFP_KERNEL);
  1162. if (!rxtid->hold_q)
  1163. return;
  1164. rxtid->win_sz = win_sz;
  1165. rxtid->hold_q_sz = TID_WINDOW_SZ(win_sz);
  1166. if (!skb_queue_empty(&rxtid->q))
  1167. return;
  1168. rxtid->aggr = true;
  1169. }
  1170. struct aggr_info *aggr_init(struct net_device *dev)
  1171. {
  1172. struct aggr_info *p_aggr = NULL;
  1173. struct rxtid *rxtid;
  1174. u8 i;
  1175. p_aggr = kzalloc(sizeof(struct aggr_info), GFP_KERNEL);
  1176. if (!p_aggr) {
  1177. ath6kl_err("failed to alloc memory for aggr_node\n");
  1178. return NULL;
  1179. }
  1180. p_aggr->aggr_sz = AGGR_SZ_DEFAULT;
  1181. p_aggr->dev = dev;
  1182. init_timer(&p_aggr->timer);
  1183. p_aggr->timer.function = aggr_timeout;
  1184. p_aggr->timer.data = (unsigned long) p_aggr;
  1185. p_aggr->timer_scheduled = false;
  1186. skb_queue_head_init(&p_aggr->free_q);
  1187. ath6kl_alloc_netbufs(&p_aggr->free_q, AGGR_NUM_OF_FREE_NETBUFS);
  1188. for (i = 0; i < NUM_OF_TIDS; i++) {
  1189. rxtid = &p_aggr->rx_tid[i];
  1190. rxtid->aggr = false;
  1191. rxtid->progress = false;
  1192. rxtid->timer_mon = false;
  1193. skb_queue_head_init(&rxtid->q);
  1194. spin_lock_init(&rxtid->lock);
  1195. }
  1196. return p_aggr;
  1197. }
  1198. void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid)
  1199. {
  1200. struct aggr_info *p_aggr = vif->aggr_cntxt;
  1201. struct rxtid *rxtid;
  1202. if (!p_aggr)
  1203. return;
  1204. rxtid = &p_aggr->rx_tid[tid];
  1205. if (rxtid->aggr)
  1206. aggr_delete_tid_state(p_aggr, tid);
  1207. }
  1208. void aggr_reset_state(struct aggr_info *aggr_info)
  1209. {
  1210. u8 tid;
  1211. for (tid = 0; tid < NUM_OF_TIDS; tid++)
  1212. aggr_delete_tid_state(aggr_info, tid);
  1213. }
  1214. /* clean up our amsdu buffer list */
  1215. void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar)
  1216. {
  1217. struct htc_packet *packet, *tmp_pkt;
  1218. spin_lock_bh(&ar->lock);
  1219. if (list_empty(&ar->amsdu_rx_buffer_queue)) {
  1220. spin_unlock_bh(&ar->lock);
  1221. return;
  1222. }
  1223. list_for_each_entry_safe(packet, tmp_pkt, &ar->amsdu_rx_buffer_queue,
  1224. list) {
  1225. list_del(&packet->list);
  1226. spin_unlock_bh(&ar->lock);
  1227. dev_kfree_skb(packet->pkt_cntxt);
  1228. spin_lock_bh(&ar->lock);
  1229. }
  1230. spin_unlock_bh(&ar->lock);
  1231. }
  1232. void aggr_module_destroy(struct aggr_info *aggr_info)
  1233. {
  1234. struct rxtid *rxtid;
  1235. u8 i, k;
  1236. if (!aggr_info)
  1237. return;
  1238. if (aggr_info->timer_scheduled) {
  1239. del_timer(&aggr_info->timer);
  1240. aggr_info->timer_scheduled = false;
  1241. }
  1242. for (i = 0; i < NUM_OF_TIDS; i++) {
  1243. rxtid = &aggr_info->rx_tid[i];
  1244. if (rxtid->hold_q) {
  1245. for (k = 0; k < rxtid->hold_q_sz; k++)
  1246. dev_kfree_skb(rxtid->hold_q[k].skb);
  1247. kfree(rxtid->hold_q);
  1248. }
  1249. skb_queue_purge(&rxtid->q);
  1250. }
  1251. skb_queue_purge(&aggr_info->free_q);
  1252. kfree(aggr_info);
  1253. }