vmwgfx_drm.h 22 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #ifndef __VMWGFX_DRM_H__
  28. #define __VMWGFX_DRM_H__
  29. #define DRM_VMW_MAX_SURFACE_FACES 6
  30. #define DRM_VMW_MAX_MIP_LEVELS 24
  31. #define DRM_VMW_GET_PARAM 0
  32. #define DRM_VMW_ALLOC_DMABUF 1
  33. #define DRM_VMW_UNREF_DMABUF 2
  34. #define DRM_VMW_CURSOR_BYPASS 3
  35. /* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/
  36. #define DRM_VMW_CONTROL_STREAM 4
  37. #define DRM_VMW_CLAIM_STREAM 5
  38. #define DRM_VMW_UNREF_STREAM 6
  39. /* guarded by DRM_VMW_PARAM_3D == 1 */
  40. #define DRM_VMW_CREATE_CONTEXT 7
  41. #define DRM_VMW_UNREF_CONTEXT 8
  42. #define DRM_VMW_CREATE_SURFACE 9
  43. #define DRM_VMW_UNREF_SURFACE 10
  44. #define DRM_VMW_REF_SURFACE 11
  45. #define DRM_VMW_EXECBUF 12
  46. #define DRM_VMW_GET_3D_CAP 13
  47. #define DRM_VMW_FENCE_WAIT 14
  48. #define DRM_VMW_FENCE_SIGNALED 15
  49. #define DRM_VMW_FENCE_UNREF 16
  50. #define DRM_VMW_FENCE_EVENT 17
  51. #define DRM_VMW_PRESENT 18
  52. #define DRM_VMW_PRESENT_READBACK 19
  53. #define DRM_VMW_UPDATE_LAYOUT 20
  54. /*************************************************************************/
  55. /**
  56. * DRM_VMW_GET_PARAM - get device information.
  57. *
  58. * DRM_VMW_PARAM_FIFO_OFFSET:
  59. * Offset to use to map the first page of the FIFO read-only.
  60. * The fifo is mapped using the mmap() system call on the drm device.
  61. *
  62. * DRM_VMW_PARAM_OVERLAY_IOCTL:
  63. * Does the driver support the overlay ioctl.
  64. */
  65. #define DRM_VMW_PARAM_NUM_STREAMS 0
  66. #define DRM_VMW_PARAM_NUM_FREE_STREAMS 1
  67. #define DRM_VMW_PARAM_3D 2
  68. #define DRM_VMW_PARAM_HW_CAPS 3
  69. #define DRM_VMW_PARAM_FIFO_CAPS 4
  70. #define DRM_VMW_PARAM_MAX_FB_SIZE 5
  71. #define DRM_VMW_PARAM_FIFO_HW_VERSION 6
  72. #define DRM_VMW_PARAM_MAX_SURF_MEMORY 7
  73. /**
  74. * struct drm_vmw_getparam_arg
  75. *
  76. * @value: Returned value. //Out
  77. * @param: Parameter to query. //In.
  78. *
  79. * Argument to the DRM_VMW_GET_PARAM Ioctl.
  80. */
  81. struct drm_vmw_getparam_arg {
  82. uint64_t value;
  83. uint32_t param;
  84. uint32_t pad64;
  85. };
  86. /*************************************************************************/
  87. /**
  88. * DRM_VMW_CREATE_CONTEXT - Create a host context.
  89. *
  90. * Allocates a device unique context id, and queues a create context command
  91. * for the host. Does not wait for host completion.
  92. */
  93. /**
  94. * struct drm_vmw_context_arg
  95. *
  96. * @cid: Device unique context ID.
  97. *
  98. * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
  99. * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
  100. */
  101. struct drm_vmw_context_arg {
  102. int32_t cid;
  103. uint32_t pad64;
  104. };
  105. /*************************************************************************/
  106. /**
  107. * DRM_VMW_UNREF_CONTEXT - Create a host context.
  108. *
  109. * Frees a global context id, and queues a destroy host command for the host.
  110. * Does not wait for host completion. The context ID can be used directly
  111. * in the command stream and shows up as the same context ID on the host.
  112. */
  113. /*************************************************************************/
  114. /**
  115. * DRM_VMW_CREATE_SURFACE - Create a host suface.
  116. *
  117. * Allocates a device unique surface id, and queues a create surface command
  118. * for the host. Does not wait for host completion. The surface ID can be
  119. * used directly in the command stream and shows up as the same surface
  120. * ID on the host.
  121. */
  122. /**
  123. * struct drm_wmv_surface_create_req
  124. *
  125. * @flags: Surface flags as understood by the host.
  126. * @format: Surface format as understood by the host.
  127. * @mip_levels: Number of mip levels for each face.
  128. * An unused face should have 0 encoded.
  129. * @size_addr: Address of a user-space array of sruct drm_vmw_size
  130. * cast to an uint64_t for 32-64 bit compatibility.
  131. * The size of the array should equal the total number of mipmap levels.
  132. * @shareable: Boolean whether other clients (as identified by file descriptors)
  133. * may reference this surface.
  134. * @scanout: Boolean whether the surface is intended to be used as a
  135. * scanout.
  136. *
  137. * Input data to the DRM_VMW_CREATE_SURFACE Ioctl.
  138. * Output data from the DRM_VMW_REF_SURFACE Ioctl.
  139. */
  140. struct drm_vmw_surface_create_req {
  141. uint32_t flags;
  142. uint32_t format;
  143. uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
  144. uint64_t size_addr;
  145. int32_t shareable;
  146. int32_t scanout;
  147. };
  148. /**
  149. * struct drm_wmv_surface_arg
  150. *
  151. * @sid: Surface id of created surface or surface to destroy or reference.
  152. *
  153. * Output data from the DRM_VMW_CREATE_SURFACE Ioctl.
  154. * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl.
  155. * Input argument to the DRM_VMW_REF_SURFACE Ioctl.
  156. */
  157. struct drm_vmw_surface_arg {
  158. int32_t sid;
  159. uint32_t pad64;
  160. };
  161. /**
  162. * struct drm_vmw_size ioctl.
  163. *
  164. * @width - mip level width
  165. * @height - mip level height
  166. * @depth - mip level depth
  167. *
  168. * Description of a mip level.
  169. * Input data to the DRM_WMW_CREATE_SURFACE Ioctl.
  170. */
  171. struct drm_vmw_size {
  172. uint32_t width;
  173. uint32_t height;
  174. uint32_t depth;
  175. uint32_t pad64;
  176. };
  177. /**
  178. * union drm_vmw_surface_create_arg
  179. *
  180. * @rep: Output data as described above.
  181. * @req: Input data as described above.
  182. *
  183. * Argument to the DRM_VMW_CREATE_SURFACE Ioctl.
  184. */
  185. union drm_vmw_surface_create_arg {
  186. struct drm_vmw_surface_arg rep;
  187. struct drm_vmw_surface_create_req req;
  188. };
  189. /*************************************************************************/
  190. /**
  191. * DRM_VMW_REF_SURFACE - Reference a host surface.
  192. *
  193. * Puts a reference on a host surface with a give sid, as previously
  194. * returned by the DRM_VMW_CREATE_SURFACE ioctl.
  195. * A reference will make sure the surface isn't destroyed while we hold
  196. * it and will allow the calling client to use the surface ID in the command
  197. * stream.
  198. *
  199. * On successful return, the Ioctl returns the surface information given
  200. * in the DRM_VMW_CREATE_SURFACE ioctl.
  201. */
  202. /**
  203. * union drm_vmw_surface_reference_arg
  204. *
  205. * @rep: Output data as described above.
  206. * @req: Input data as described above.
  207. *
  208. * Argument to the DRM_VMW_REF_SURFACE Ioctl.
  209. */
  210. union drm_vmw_surface_reference_arg {
  211. struct drm_vmw_surface_create_req rep;
  212. struct drm_vmw_surface_arg req;
  213. };
  214. /*************************************************************************/
  215. /**
  216. * DRM_VMW_UNREF_SURFACE - Unreference a host surface.
  217. *
  218. * Clear a reference previously put on a host surface.
  219. * When all references are gone, including the one implicitly placed
  220. * on creation,
  221. * a destroy surface command will be queued for the host.
  222. * Does not wait for completion.
  223. */
  224. /*************************************************************************/
  225. /**
  226. * DRM_VMW_EXECBUF
  227. *
  228. * Submit a command buffer for execution on the host, and return a
  229. * fence seqno that when signaled, indicates that the command buffer has
  230. * executed.
  231. */
  232. /**
  233. * struct drm_vmw_execbuf_arg
  234. *
  235. * @commands: User-space address of a command buffer cast to an uint64_t.
  236. * @command-size: Size in bytes of the command buffer.
  237. * @throttle-us: Sleep until software is less than @throttle_us
  238. * microseconds ahead of hardware. The driver may round this value
  239. * to the nearest kernel tick.
  240. * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an
  241. * uint64_t.
  242. * @version: Allows expanding the execbuf ioctl parameters without breaking
  243. * backwards compatibility, since user-space will always tell the kernel
  244. * which version it uses.
  245. * @flags: Execbuf flags. None currently.
  246. *
  247. * Argument to the DRM_VMW_EXECBUF Ioctl.
  248. */
  249. #define DRM_VMW_EXECBUF_VERSION 1
  250. struct drm_vmw_execbuf_arg {
  251. uint64_t commands;
  252. uint32_t command_size;
  253. uint32_t throttle_us;
  254. uint64_t fence_rep;
  255. uint32_t version;
  256. uint32_t flags;
  257. };
  258. /**
  259. * struct drm_vmw_fence_rep
  260. *
  261. * @handle: Fence object handle for fence associated with a command submission.
  262. * @mask: Fence flags relevant for this fence object.
  263. * @seqno: Fence sequence number in fifo. A fence object with a lower
  264. * seqno will signal the EXEC flag before a fence object with a higher
  265. * seqno. This can be used by user-space to avoid kernel calls to determine
  266. * whether a fence has signaled the EXEC flag. Note that @seqno will
  267. * wrap at 32-bit.
  268. * @passed_seqno: The highest seqno number processed by the hardware
  269. * so far. This can be used to mark user-space fence objects as signaled, and
  270. * to determine whether a fence seqno might be stale.
  271. * @error: This member should've been set to -EFAULT on submission.
  272. * The following actions should be take on completion:
  273. * error == -EFAULT: Fence communication failed. The host is synchronized.
  274. * Use the last fence id read from the FIFO fence register.
  275. * error != 0 && error != -EFAULT:
  276. * Fence submission failed. The host is synchronized. Use the fence_seq member.
  277. * error == 0: All is OK, The host may not be synchronized.
  278. * Use the fence_seq member.
  279. *
  280. * Input / Output data to the DRM_VMW_EXECBUF Ioctl.
  281. */
  282. struct drm_vmw_fence_rep {
  283. uint32_t handle;
  284. uint32_t mask;
  285. uint32_t seqno;
  286. uint32_t passed_seqno;
  287. uint32_t pad64;
  288. int32_t error;
  289. };
  290. /*************************************************************************/
  291. /**
  292. * DRM_VMW_ALLOC_DMABUF
  293. *
  294. * Allocate a DMA buffer that is visible also to the host.
  295. * NOTE: The buffer is
  296. * identified by a handle and an offset, which are private to the guest, but
  297. * useable in the command stream. The guest kernel may translate these
  298. * and patch up the command stream accordingly. In the future, the offset may
  299. * be zero at all times, or it may disappear from the interface before it is
  300. * fixed.
  301. *
  302. * The DMA buffer may stay user-space mapped in the guest at all times,
  303. * and is thus suitable for sub-allocation.
  304. *
  305. * DMA buffers are mapped using the mmap() syscall on the drm device.
  306. */
  307. /**
  308. * struct drm_vmw_alloc_dmabuf_req
  309. *
  310. * @size: Required minimum size of the buffer.
  311. *
  312. * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl.
  313. */
  314. struct drm_vmw_alloc_dmabuf_req {
  315. uint32_t size;
  316. uint32_t pad64;
  317. };
  318. /**
  319. * struct drm_vmw_dmabuf_rep
  320. *
  321. * @map_handle: Offset to use in the mmap() call used to map the buffer.
  322. * @handle: Handle unique to this buffer. Used for unreferencing.
  323. * @cur_gmr_id: GMR id to use in the command stream when this buffer is
  324. * referenced. See not above.
  325. * @cur_gmr_offset: Offset to use in the command stream when this buffer is
  326. * referenced. See note above.
  327. *
  328. * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl.
  329. */
  330. struct drm_vmw_dmabuf_rep {
  331. uint64_t map_handle;
  332. uint32_t handle;
  333. uint32_t cur_gmr_id;
  334. uint32_t cur_gmr_offset;
  335. uint32_t pad64;
  336. };
  337. /**
  338. * union drm_vmw_dmabuf_arg
  339. *
  340. * @req: Input data as described above.
  341. * @rep: Output data as described above.
  342. *
  343. * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl.
  344. */
  345. union drm_vmw_alloc_dmabuf_arg {
  346. struct drm_vmw_alloc_dmabuf_req req;
  347. struct drm_vmw_dmabuf_rep rep;
  348. };
  349. /*************************************************************************/
  350. /**
  351. * DRM_VMW_UNREF_DMABUF - Free a DMA buffer.
  352. *
  353. */
  354. /**
  355. * struct drm_vmw_unref_dmabuf_arg
  356. *
  357. * @handle: Handle indicating what buffer to free. Obtained from the
  358. * DRM_VMW_ALLOC_DMABUF Ioctl.
  359. *
  360. * Argument to the DRM_VMW_UNREF_DMABUF Ioctl.
  361. */
  362. struct drm_vmw_unref_dmabuf_arg {
  363. uint32_t handle;
  364. uint32_t pad64;
  365. };
  366. /*************************************************************************/
  367. /**
  368. * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams.
  369. *
  370. * This IOCTL controls the overlay units of the svga device.
  371. * The SVGA overlay units does not work like regular hardware units in
  372. * that they do not automaticaly read back the contents of the given dma
  373. * buffer. But instead only read back for each call to this ioctl, and
  374. * at any point between this call being made and a following call that
  375. * either changes the buffer or disables the stream.
  376. */
  377. /**
  378. * struct drm_vmw_rect
  379. *
  380. * Defines a rectangle. Used in the overlay ioctl to define
  381. * source and destination rectangle.
  382. */
  383. struct drm_vmw_rect {
  384. int32_t x;
  385. int32_t y;
  386. uint32_t w;
  387. uint32_t h;
  388. };
  389. /**
  390. * struct drm_vmw_control_stream_arg
  391. *
  392. * @stream_id: Stearm to control
  393. * @enabled: If false all following arguments are ignored.
  394. * @handle: Handle to buffer for getting data from.
  395. * @format: Format of the overlay as understood by the host.
  396. * @width: Width of the overlay.
  397. * @height: Height of the overlay.
  398. * @size: Size of the overlay in bytes.
  399. * @pitch: Array of pitches, the two last are only used for YUV12 formats.
  400. * @offset: Offset from start of dma buffer to overlay.
  401. * @src: Source rect, must be within the defined area above.
  402. * @dst: Destination rect, x and y may be negative.
  403. *
  404. * Argument to the DRM_VMW_CONTROL_STREAM Ioctl.
  405. */
  406. struct drm_vmw_control_stream_arg {
  407. uint32_t stream_id;
  408. uint32_t enabled;
  409. uint32_t flags;
  410. uint32_t color_key;
  411. uint32_t handle;
  412. uint32_t offset;
  413. int32_t format;
  414. uint32_t size;
  415. uint32_t width;
  416. uint32_t height;
  417. uint32_t pitch[3];
  418. uint32_t pad64;
  419. struct drm_vmw_rect src;
  420. struct drm_vmw_rect dst;
  421. };
  422. /*************************************************************************/
  423. /**
  424. * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass.
  425. *
  426. */
  427. #define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0)
  428. #define DRM_VMW_CURSOR_BYPASS_FLAGS (1)
  429. /**
  430. * struct drm_vmw_cursor_bypass_arg
  431. *
  432. * @flags: Flags.
  433. * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed.
  434. * @xpos: X position of cursor.
  435. * @ypos: Y position of cursor.
  436. * @xhot: X hotspot.
  437. * @yhot: Y hotspot.
  438. *
  439. * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl.
  440. */
  441. struct drm_vmw_cursor_bypass_arg {
  442. uint32_t flags;
  443. uint32_t crtc_id;
  444. int32_t xpos;
  445. int32_t ypos;
  446. int32_t xhot;
  447. int32_t yhot;
  448. };
  449. /*************************************************************************/
  450. /**
  451. * DRM_VMW_CLAIM_STREAM - Claim a single stream.
  452. */
  453. /**
  454. * struct drm_vmw_context_arg
  455. *
  456. * @stream_id: Device unique context ID.
  457. *
  458. * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
  459. * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
  460. */
  461. struct drm_vmw_stream_arg {
  462. uint32_t stream_id;
  463. uint32_t pad64;
  464. };
  465. /*************************************************************************/
  466. /**
  467. * DRM_VMW_UNREF_STREAM - Unclaim a stream.
  468. *
  469. * Return a single stream that was claimed by this process. Also makes
  470. * sure that the stream has been stopped.
  471. */
  472. /*************************************************************************/
  473. /**
  474. * DRM_VMW_GET_3D_CAP
  475. *
  476. * Read 3D capabilities from the FIFO
  477. *
  478. */
  479. /**
  480. * struct drm_vmw_get_3d_cap_arg
  481. *
  482. * @buffer: Pointer to a buffer for capability data, cast to an uint64_t
  483. * @size: Max size to copy
  484. *
  485. * Input argument to the DRM_VMW_GET_3D_CAP_IOCTL
  486. * ioctls.
  487. */
  488. struct drm_vmw_get_3d_cap_arg {
  489. uint64_t buffer;
  490. uint32_t max_size;
  491. uint32_t pad64;
  492. };
  493. /*************************************************************************/
  494. /**
  495. * DRM_VMW_FENCE_WAIT
  496. *
  497. * Waits for a fence object to signal. The wait is interruptible, so that
  498. * signals may be delivered during the interrupt. The wait may timeout,
  499. * in which case the calls returns -EBUSY. If the wait is restarted,
  500. * that is restarting without resetting @cookie_valid to zero,
  501. * the timeout is computed from the first call.
  502. *
  503. * The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait
  504. * on:
  505. * DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command
  506. * stream
  507. * have executed.
  508. * DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish
  509. * commands
  510. * in the buffer given to the EXECBUF ioctl returning the fence object handle
  511. * are available to user-space.
  512. *
  513. * DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the
  514. * fenc wait ioctl returns 0, the fence object has been unreferenced after
  515. * the wait.
  516. */
  517. #define DRM_VMW_FENCE_FLAG_EXEC (1 << 0)
  518. #define DRM_VMW_FENCE_FLAG_QUERY (1 << 1)
  519. #define DRM_VMW_WAIT_OPTION_UNREF (1 << 0)
  520. /**
  521. * struct drm_vmw_fence_wait_arg
  522. *
  523. * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
  524. * @cookie_valid: Must be reset to 0 on first call. Left alone on restart.
  525. * @kernel_cookie: Set to 0 on first call. Left alone on restart.
  526. * @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout.
  527. * @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick
  528. * before returning.
  529. * @flags: Fence flags to wait on.
  530. * @wait_options: Options that control the behaviour of the wait ioctl.
  531. *
  532. * Input argument to the DRM_VMW_FENCE_WAIT ioctl.
  533. */
  534. struct drm_vmw_fence_wait_arg {
  535. uint32_t handle;
  536. int32_t cookie_valid;
  537. uint64_t kernel_cookie;
  538. uint64_t timeout_us;
  539. int32_t lazy;
  540. int32_t flags;
  541. int32_t wait_options;
  542. int32_t pad64;
  543. };
  544. /*************************************************************************/
  545. /**
  546. * DRM_VMW_FENCE_SIGNALED
  547. *
  548. * Checks if a fence object is signaled..
  549. */
  550. /**
  551. * struct drm_vmw_fence_signaled_arg
  552. *
  553. * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
  554. * @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl
  555. * @signaled: Out: Flags signaled.
  556. * @sequence: Out: Highest sequence passed so far. Can be used to signal the
  557. * EXEC flag of user-space fence objects.
  558. *
  559. * Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF
  560. * ioctls.
  561. */
  562. struct drm_vmw_fence_signaled_arg {
  563. uint32_t handle;
  564. uint32_t flags;
  565. int32_t signaled;
  566. uint32_t passed_seqno;
  567. uint32_t signaled_flags;
  568. uint32_t pad64;
  569. };
  570. /*************************************************************************/
  571. /**
  572. * DRM_VMW_FENCE_UNREF
  573. *
  574. * Unreferences a fence object, and causes it to be destroyed if there are no
  575. * other references to it.
  576. *
  577. */
  578. /**
  579. * struct drm_vmw_fence_arg
  580. *
  581. * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
  582. *
  583. * Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl..
  584. */
  585. struct drm_vmw_fence_arg {
  586. uint32_t handle;
  587. uint32_t pad64;
  588. };
  589. /*************************************************************************/
  590. /**
  591. * DRM_VMW_FENCE_EVENT
  592. *
  593. * Queues an event on a fence to be delivered on the drm character device
  594. * when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag.
  595. * Optionally the approximate time when the fence signaled is
  596. * given by the event.
  597. */
  598. /*
  599. * The event type
  600. */
  601. #define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000
  602. struct drm_vmw_event_fence {
  603. struct drm_event base;
  604. uint64_t user_data;
  605. uint32_t tv_sec;
  606. uint32_t tv_usec;
  607. };
  608. /*
  609. * Flags that may be given to the command.
  610. */
  611. /* Request fence signaled time on the event. */
  612. #define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0)
  613. /**
  614. * struct drm_vmw_fence_event_arg
  615. *
  616. * @fence_rep: Pointer to fence_rep structure cast to uint64_t or 0 if
  617. * the fence is not supposed to be referenced by user-space.
  618. * @user_info: Info to be delivered with the event.
  619. * @handle: Attach the event to this fence only.
  620. * @flags: A set of flags as defined above.
  621. */
  622. struct drm_vmw_fence_event_arg {
  623. uint64_t fence_rep;
  624. uint64_t user_data;
  625. uint32_t handle;
  626. uint32_t flags;
  627. };
  628. /*************************************************************************/
  629. /**
  630. * DRM_VMW_PRESENT
  631. *
  632. * Executes an SVGA present on a given fb for a given surface. The surface
  633. * is placed on the framebuffer. Cliprects are given relative to the given
  634. * point (the point disignated by dest_{x|y}).
  635. *
  636. */
  637. /**
  638. * struct drm_vmw_present_arg
  639. * @fb_id: framebuffer id to present / read back from.
  640. * @sid: Surface id to present from.
  641. * @dest_x: X placement coordinate for surface.
  642. * @dest_y: Y placement coordinate for surface.
  643. * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
  644. * @num_clips: Number of cliprects given relative to the framebuffer origin,
  645. * in the same coordinate space as the frame buffer.
  646. * @pad64: Unused 64-bit padding.
  647. *
  648. * Input argument to the DRM_VMW_PRESENT ioctl.
  649. */
  650. struct drm_vmw_present_arg {
  651. uint32_t fb_id;
  652. uint32_t sid;
  653. int32_t dest_x;
  654. int32_t dest_y;
  655. uint64_t clips_ptr;
  656. uint32_t num_clips;
  657. uint32_t pad64;
  658. };
  659. /*************************************************************************/
  660. /**
  661. * DRM_VMW_PRESENT_READBACK
  662. *
  663. * Executes an SVGA present readback from a given fb to the dma buffer
  664. * currently bound as the fb. If there is no dma buffer bound to the fb,
  665. * an error will be returned.
  666. *
  667. */
  668. /**
  669. * struct drm_vmw_present_arg
  670. * @fb_id: fb_id to present / read back from.
  671. * @num_clips: Number of cliprects.
  672. * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
  673. * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an uint64_t.
  674. * If this member is NULL, then the ioctl should not return a fence.
  675. */
  676. struct drm_vmw_present_readback_arg {
  677. uint32_t fb_id;
  678. uint32_t num_clips;
  679. uint64_t clips_ptr;
  680. uint64_t fence_rep;
  681. };
  682. /*************************************************************************/
  683. /**
  684. * DRM_VMW_UPDATE_LAYOUT - Update layout
  685. *
  686. * Updates the preferred modes and connection status for connectors. The
  687. * command consists of one drm_vmw_update_layout_arg pointing to an array
  688. * of num_outputs drm_vmw_rect's.
  689. */
  690. /**
  691. * struct drm_vmw_update_layout_arg
  692. *
  693. * @num_outputs: number of active connectors
  694. * @rects: pointer to array of drm_vmw_rect cast to an uint64_t
  695. *
  696. * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl.
  697. */
  698. struct drm_vmw_update_layout_arg {
  699. uint32_t num_outputs;
  700. uint32_t pad64;
  701. uint64_t rects;
  702. };
  703. #endif