mpt2sas_base.c 115 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088
  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2010 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/version.h>
  43. #include <linux/kernel.h>
  44. #include <linux/module.h>
  45. #include <linux/errno.h>
  46. #include <linux/init.h>
  47. #include <linux/slab.h>
  48. #include <linux/types.h>
  49. #include <linux/pci.h>
  50. #include <linux/kdev_t.h>
  51. #include <linux/blkdev.h>
  52. #include <linux/delay.h>
  53. #include <linux/interrupt.h>
  54. #include <linux/dma-mapping.h>
  55. #include <linux/sort.h>
  56. #include <linux/io.h>
  57. #include <linux/time.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. static int max_queue_depth = -1;
  63. module_param(max_queue_depth, int, 0);
  64. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  65. static int max_sgl_entries = -1;
  66. module_param(max_sgl_entries, int, 0);
  67. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  68. static int msix_disable = -1;
  69. module_param(msix_disable, int, 0);
  70. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  71. static int missing_delay[2] = {-1, -1};
  72. module_param_array(missing_delay, int, NULL, 0);
  73. MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
  74. /* diag_buffer_enable is bitwise
  75. * bit 0 set = TRACE
  76. * bit 1 set = SNAPSHOT
  77. * bit 2 set = EXTENDED
  78. *
  79. * Either bit can be set, or both
  80. */
  81. static int diag_buffer_enable;
  82. module_param(diag_buffer_enable, int, 0);
  83. MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
  84. "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
  85. int mpt2sas_fwfault_debug;
  86. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  87. "and halt firmware - (default=0)");
  88. static int disable_discovery = -1;
  89. module_param(disable_discovery, int, 0);
  90. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  91. /**
  92. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  93. *
  94. */
  95. static int
  96. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  97. {
  98. int ret = param_set_int(val, kp);
  99. struct MPT2SAS_ADAPTER *ioc;
  100. if (ret)
  101. return ret;
  102. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  103. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  104. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  105. return 0;
  106. }
  107. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  108. param_get_int, &mpt2sas_fwfault_debug, 0644);
  109. /**
  110. * _base_fault_reset_work - workq handling ioc fault conditions
  111. * @work: input argument, used to derive ioc
  112. * Context: sleep.
  113. *
  114. * Return nothing.
  115. */
  116. static void
  117. _base_fault_reset_work(struct work_struct *work)
  118. {
  119. struct MPT2SAS_ADAPTER *ioc =
  120. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  121. unsigned long flags;
  122. u32 doorbell;
  123. int rc;
  124. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  125. if (ioc->shost_recovery)
  126. goto rearm_timer;
  127. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  128. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  129. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  130. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  131. FORCE_BIG_HAMMER);
  132. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  133. __func__, (rc == 0) ? "success" : "failed");
  134. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  135. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  136. mpt2sas_base_fault_info(ioc, doorbell &
  137. MPI2_DOORBELL_DATA_MASK);
  138. }
  139. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  140. rearm_timer:
  141. if (ioc->fault_reset_work_q)
  142. queue_delayed_work(ioc->fault_reset_work_q,
  143. &ioc->fault_reset_work,
  144. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  145. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  146. }
  147. /**
  148. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  149. * @ioc: per adapter object
  150. * Context: sleep.
  151. *
  152. * Return nothing.
  153. */
  154. void
  155. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  156. {
  157. unsigned long flags;
  158. if (ioc->fault_reset_work_q)
  159. return;
  160. /* initialize fault polling */
  161. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  162. snprintf(ioc->fault_reset_work_q_name,
  163. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  164. ioc->fault_reset_work_q =
  165. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  166. if (!ioc->fault_reset_work_q) {
  167. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  168. ioc->name, __func__, __LINE__);
  169. return;
  170. }
  171. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  172. if (ioc->fault_reset_work_q)
  173. queue_delayed_work(ioc->fault_reset_work_q,
  174. &ioc->fault_reset_work,
  175. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  176. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  177. }
  178. /**
  179. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  180. * @ioc: per adapter object
  181. * Context: sleep.
  182. *
  183. * Return nothing.
  184. */
  185. void
  186. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  187. {
  188. unsigned long flags;
  189. struct workqueue_struct *wq;
  190. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  191. wq = ioc->fault_reset_work_q;
  192. ioc->fault_reset_work_q = NULL;
  193. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  194. if (wq) {
  195. if (!cancel_delayed_work(&ioc->fault_reset_work))
  196. flush_workqueue(wq);
  197. destroy_workqueue(wq);
  198. }
  199. }
  200. /**
  201. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  202. * @ioc: per adapter object
  203. * @fault_code: fault code
  204. *
  205. * Return nothing.
  206. */
  207. void
  208. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  209. {
  210. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  211. ioc->name, fault_code);
  212. }
  213. /**
  214. * mpt2sas_halt_firmware - halt's mpt controller firmware
  215. * @ioc: per adapter object
  216. *
  217. * For debugging timeout related issues. Writing 0xCOFFEE00
  218. * to the doorbell register will halt controller firmware. With
  219. * the purpose to stop both driver and firmware, the enduser can
  220. * obtain a ring buffer from controller UART.
  221. */
  222. void
  223. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  224. {
  225. u32 doorbell;
  226. if (!ioc->fwfault_debug)
  227. return;
  228. dump_stack();
  229. doorbell = readl(&ioc->chip->Doorbell);
  230. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  231. mpt2sas_base_fault_info(ioc , doorbell);
  232. else {
  233. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  234. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  235. "timeout\n", ioc->name);
  236. }
  237. panic("panic in %s\n", __func__);
  238. }
  239. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  240. /**
  241. * _base_sas_ioc_info - verbose translation of the ioc status
  242. * @ioc: per adapter object
  243. * @mpi_reply: reply mf payload returned from firmware
  244. * @request_hdr: request mf
  245. *
  246. * Return nothing.
  247. */
  248. static void
  249. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  250. MPI2RequestHeader_t *request_hdr)
  251. {
  252. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  253. MPI2_IOCSTATUS_MASK;
  254. char *desc = NULL;
  255. u16 frame_sz;
  256. char *func_str = NULL;
  257. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  258. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  259. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  260. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  261. return;
  262. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  263. return;
  264. switch (ioc_status) {
  265. /****************************************************************************
  266. * Common IOCStatus values for all replies
  267. ****************************************************************************/
  268. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  269. desc = "invalid function";
  270. break;
  271. case MPI2_IOCSTATUS_BUSY:
  272. desc = "busy";
  273. break;
  274. case MPI2_IOCSTATUS_INVALID_SGL:
  275. desc = "invalid sgl";
  276. break;
  277. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  278. desc = "internal error";
  279. break;
  280. case MPI2_IOCSTATUS_INVALID_VPID:
  281. desc = "invalid vpid";
  282. break;
  283. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  284. desc = "insufficient resources";
  285. break;
  286. case MPI2_IOCSTATUS_INVALID_FIELD:
  287. desc = "invalid field";
  288. break;
  289. case MPI2_IOCSTATUS_INVALID_STATE:
  290. desc = "invalid state";
  291. break;
  292. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  293. desc = "op state not supported";
  294. break;
  295. /****************************************************************************
  296. * Config IOCStatus values
  297. ****************************************************************************/
  298. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  299. desc = "config invalid action";
  300. break;
  301. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  302. desc = "config invalid type";
  303. break;
  304. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  305. desc = "config invalid page";
  306. break;
  307. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  308. desc = "config invalid data";
  309. break;
  310. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  311. desc = "config no defaults";
  312. break;
  313. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  314. desc = "config cant commit";
  315. break;
  316. /****************************************************************************
  317. * SCSI IO Reply
  318. ****************************************************************************/
  319. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  320. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  321. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  322. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  323. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  324. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  325. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  326. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  327. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  328. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  329. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  330. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  331. break;
  332. /****************************************************************************
  333. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  334. ****************************************************************************/
  335. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  336. desc = "eedp guard error";
  337. break;
  338. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  339. desc = "eedp ref tag error";
  340. break;
  341. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  342. desc = "eedp app tag error";
  343. break;
  344. /****************************************************************************
  345. * SCSI Target values
  346. ****************************************************************************/
  347. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  348. desc = "target invalid io index";
  349. break;
  350. case MPI2_IOCSTATUS_TARGET_ABORTED:
  351. desc = "target aborted";
  352. break;
  353. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  354. desc = "target no conn retryable";
  355. break;
  356. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  357. desc = "target no connection";
  358. break;
  359. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  360. desc = "target xfer count mismatch";
  361. break;
  362. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  363. desc = "target data offset error";
  364. break;
  365. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  366. desc = "target too much write data";
  367. break;
  368. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  369. desc = "target iu too short";
  370. break;
  371. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  372. desc = "target ack nak timeout";
  373. break;
  374. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  375. desc = "target nak received";
  376. break;
  377. /****************************************************************************
  378. * Serial Attached SCSI values
  379. ****************************************************************************/
  380. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  381. desc = "smp request failed";
  382. break;
  383. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  384. desc = "smp data overrun";
  385. break;
  386. /****************************************************************************
  387. * Diagnostic Buffer Post / Diagnostic Release values
  388. ****************************************************************************/
  389. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  390. desc = "diagnostic released";
  391. break;
  392. default:
  393. break;
  394. }
  395. if (!desc)
  396. return;
  397. switch (request_hdr->Function) {
  398. case MPI2_FUNCTION_CONFIG:
  399. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  400. func_str = "config_page";
  401. break;
  402. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  403. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  404. func_str = "task_mgmt";
  405. break;
  406. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  407. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  408. func_str = "sas_iounit_ctl";
  409. break;
  410. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  411. frame_sz = sizeof(Mpi2SepRequest_t);
  412. func_str = "enclosure";
  413. break;
  414. case MPI2_FUNCTION_IOC_INIT:
  415. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  416. func_str = "ioc_init";
  417. break;
  418. case MPI2_FUNCTION_PORT_ENABLE:
  419. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  420. func_str = "port_enable";
  421. break;
  422. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  423. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  424. func_str = "smp_passthru";
  425. break;
  426. default:
  427. frame_sz = 32;
  428. func_str = "unknown";
  429. break;
  430. }
  431. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  432. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  433. _debug_dump_mf(request_hdr, frame_sz/4);
  434. }
  435. /**
  436. * _base_display_event_data - verbose translation of firmware asyn events
  437. * @ioc: per adapter object
  438. * @mpi_reply: reply mf payload returned from firmware
  439. *
  440. * Return nothing.
  441. */
  442. static void
  443. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  444. Mpi2EventNotificationReply_t *mpi_reply)
  445. {
  446. char *desc = NULL;
  447. u16 event;
  448. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  449. return;
  450. event = le16_to_cpu(mpi_reply->Event);
  451. switch (event) {
  452. case MPI2_EVENT_LOG_DATA:
  453. desc = "Log Data";
  454. break;
  455. case MPI2_EVENT_STATE_CHANGE:
  456. desc = "Status Change";
  457. break;
  458. case MPI2_EVENT_HARD_RESET_RECEIVED:
  459. desc = "Hard Reset Received";
  460. break;
  461. case MPI2_EVENT_EVENT_CHANGE:
  462. desc = "Event Change";
  463. break;
  464. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  465. desc = "Device Status Change";
  466. break;
  467. case MPI2_EVENT_IR_OPERATION_STATUS:
  468. desc = "IR Operation Status";
  469. break;
  470. case MPI2_EVENT_SAS_DISCOVERY:
  471. {
  472. Mpi2EventDataSasDiscovery_t *event_data =
  473. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  474. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  475. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  476. "start" : "stop");
  477. if (event_data->DiscoveryStatus)
  478. printk("discovery_status(0x%08x)",
  479. le32_to_cpu(event_data->DiscoveryStatus));
  480. printk("\n");
  481. return;
  482. }
  483. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  484. desc = "SAS Broadcast Primitive";
  485. break;
  486. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  487. desc = "SAS Init Device Status Change";
  488. break;
  489. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  490. desc = "SAS Init Table Overflow";
  491. break;
  492. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  493. desc = "SAS Topology Change List";
  494. break;
  495. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  496. desc = "SAS Enclosure Device Status Change";
  497. break;
  498. case MPI2_EVENT_IR_VOLUME:
  499. desc = "IR Volume";
  500. break;
  501. case MPI2_EVENT_IR_PHYSICAL_DISK:
  502. desc = "IR Physical Disk";
  503. break;
  504. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  505. desc = "IR Configuration Change List";
  506. break;
  507. case MPI2_EVENT_LOG_ENTRY_ADDED:
  508. desc = "Log Entry Added";
  509. break;
  510. }
  511. if (!desc)
  512. return;
  513. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  514. }
  515. #endif
  516. /**
  517. * _base_sas_log_info - verbose translation of firmware log info
  518. * @ioc: per adapter object
  519. * @log_info: log info
  520. *
  521. * Return nothing.
  522. */
  523. static void
  524. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  525. {
  526. union loginfo_type {
  527. u32 loginfo;
  528. struct {
  529. u32 subcode:16;
  530. u32 code:8;
  531. u32 originator:4;
  532. u32 bus_type:4;
  533. } dw;
  534. };
  535. union loginfo_type sas_loginfo;
  536. char *originator_str = NULL;
  537. sas_loginfo.loginfo = log_info;
  538. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  539. return;
  540. /* each nexus loss loginfo */
  541. if (log_info == 0x31170000)
  542. return;
  543. /* eat the loginfos associated with task aborts */
  544. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  545. 0x31140000 || log_info == 0x31130000))
  546. return;
  547. switch (sas_loginfo.dw.originator) {
  548. case 0:
  549. originator_str = "IOP";
  550. break;
  551. case 1:
  552. originator_str = "PL";
  553. break;
  554. case 2:
  555. originator_str = "IR";
  556. break;
  557. }
  558. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  559. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  560. originator_str, sas_loginfo.dw.code,
  561. sas_loginfo.dw.subcode);
  562. }
  563. /**
  564. * _base_display_reply_info -
  565. * @ioc: per adapter object
  566. * @smid: system request message index
  567. * @msix_index: MSIX table index supplied by the OS
  568. * @reply: reply message frame(lower 32bit addr)
  569. *
  570. * Return nothing.
  571. */
  572. static void
  573. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  574. u32 reply)
  575. {
  576. MPI2DefaultReply_t *mpi_reply;
  577. u16 ioc_status;
  578. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  579. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  580. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  581. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  582. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  583. _base_sas_ioc_info(ioc , mpi_reply,
  584. mpt2sas_base_get_msg_frame(ioc, smid));
  585. }
  586. #endif
  587. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  588. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  589. }
  590. /**
  591. * mpt2sas_base_done - base internal command completion routine
  592. * @ioc: per adapter object
  593. * @smid: system request message index
  594. * @msix_index: MSIX table index supplied by the OS
  595. * @reply: reply message frame(lower 32bit addr)
  596. *
  597. * Return 1 meaning mf should be freed from _base_interrupt
  598. * 0 means the mf is freed from this function.
  599. */
  600. u8
  601. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  602. u32 reply)
  603. {
  604. MPI2DefaultReply_t *mpi_reply;
  605. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  606. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  607. return 1;
  608. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  609. return 1;
  610. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  611. if (mpi_reply) {
  612. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  613. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  614. }
  615. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  616. complete(&ioc->base_cmds.done);
  617. return 1;
  618. }
  619. /**
  620. * _base_async_event - main callback handler for firmware asyn events
  621. * @ioc: per adapter object
  622. * @msix_index: MSIX table index supplied by the OS
  623. * @reply: reply message frame(lower 32bit addr)
  624. *
  625. * Return 1 meaning mf should be freed from _base_interrupt
  626. * 0 means the mf is freed from this function.
  627. */
  628. static u8
  629. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  630. {
  631. Mpi2EventNotificationReply_t *mpi_reply;
  632. Mpi2EventAckRequest_t *ack_request;
  633. u16 smid;
  634. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  635. if (!mpi_reply)
  636. return 1;
  637. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  638. return 1;
  639. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  640. _base_display_event_data(ioc, mpi_reply);
  641. #endif
  642. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  643. goto out;
  644. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  645. if (!smid) {
  646. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  647. ioc->name, __func__);
  648. goto out;
  649. }
  650. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  651. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  652. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  653. ack_request->Event = mpi_reply->Event;
  654. ack_request->EventContext = mpi_reply->EventContext;
  655. ack_request->VF_ID = 0; /* TODO */
  656. ack_request->VP_ID = 0;
  657. mpt2sas_base_put_smid_default(ioc, smid);
  658. out:
  659. /* scsih callback handler */
  660. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  661. /* ctl callback handler */
  662. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  663. return 1;
  664. }
  665. /**
  666. * _base_get_cb_idx - obtain the callback index
  667. * @ioc: per adapter object
  668. * @smid: system request message index
  669. *
  670. * Return callback index.
  671. */
  672. static u8
  673. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  674. {
  675. int i;
  676. u8 cb_idx = 0xFF;
  677. if (smid >= ioc->hi_priority_smid) {
  678. if (smid < ioc->internal_smid) {
  679. i = smid - ioc->hi_priority_smid;
  680. cb_idx = ioc->hpr_lookup[i].cb_idx;
  681. } else if (smid <= ioc->hba_queue_depth) {
  682. i = smid - ioc->internal_smid;
  683. cb_idx = ioc->internal_lookup[i].cb_idx;
  684. }
  685. } else {
  686. i = smid - 1;
  687. cb_idx = ioc->scsi_lookup[i].cb_idx;
  688. }
  689. return cb_idx;
  690. }
  691. /**
  692. * _base_mask_interrupts - disable interrupts
  693. * @ioc: per adapter object
  694. *
  695. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  696. *
  697. * Return nothing.
  698. */
  699. static void
  700. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  701. {
  702. u32 him_register;
  703. ioc->mask_interrupts = 1;
  704. him_register = readl(&ioc->chip->HostInterruptMask);
  705. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  706. writel(him_register, &ioc->chip->HostInterruptMask);
  707. readl(&ioc->chip->HostInterruptMask);
  708. }
  709. /**
  710. * _base_unmask_interrupts - enable interrupts
  711. * @ioc: per adapter object
  712. *
  713. * Enabling only Reply Interrupts
  714. *
  715. * Return nothing.
  716. */
  717. static void
  718. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  719. {
  720. u32 him_register;
  721. him_register = readl(&ioc->chip->HostInterruptMask);
  722. him_register &= ~MPI2_HIM_RIM;
  723. writel(him_register, &ioc->chip->HostInterruptMask);
  724. ioc->mask_interrupts = 0;
  725. }
  726. union reply_descriptor {
  727. u64 word;
  728. struct {
  729. u32 low;
  730. u32 high;
  731. } u;
  732. };
  733. /**
  734. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  735. * @irq: irq number (not used)
  736. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  737. * @r: pt_regs pointer (not used)
  738. *
  739. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  740. */
  741. static irqreturn_t
  742. _base_interrupt(int irq, void *bus_id)
  743. {
  744. union reply_descriptor rd;
  745. u32 completed_cmds;
  746. u8 request_desript_type;
  747. u16 smid;
  748. u8 cb_idx;
  749. u32 reply;
  750. u8 msix_index;
  751. struct MPT2SAS_ADAPTER *ioc = bus_id;
  752. Mpi2ReplyDescriptorsUnion_t *rpf;
  753. u8 rc;
  754. if (ioc->mask_interrupts)
  755. return IRQ_NONE;
  756. rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
  757. request_desript_type = rpf->Default.ReplyFlags
  758. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  759. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  760. return IRQ_NONE;
  761. completed_cmds = 0;
  762. cb_idx = 0xFF;
  763. do {
  764. rd.word = rpf->Words;
  765. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  766. goto out;
  767. reply = 0;
  768. cb_idx = 0xFF;
  769. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  770. msix_index = rpf->Default.MSIxIndex;
  771. if (request_desript_type ==
  772. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  773. reply = le32_to_cpu
  774. (rpf->AddressReply.ReplyFrameAddress);
  775. if (reply > ioc->reply_dma_max_address ||
  776. reply < ioc->reply_dma_min_address)
  777. reply = 0;
  778. } else if (request_desript_type ==
  779. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  780. goto next;
  781. else if (request_desript_type ==
  782. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  783. goto next;
  784. if (smid)
  785. cb_idx = _base_get_cb_idx(ioc, smid);
  786. if (smid && cb_idx != 0xFF) {
  787. rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
  788. reply);
  789. if (reply)
  790. _base_display_reply_info(ioc, smid, msix_index,
  791. reply);
  792. if (rc)
  793. mpt2sas_base_free_smid(ioc, smid);
  794. }
  795. if (!smid)
  796. _base_async_event(ioc, msix_index, reply);
  797. /* reply free queue handling */
  798. if (reply) {
  799. ioc->reply_free_host_index =
  800. (ioc->reply_free_host_index ==
  801. (ioc->reply_free_queue_depth - 1)) ?
  802. 0 : ioc->reply_free_host_index + 1;
  803. ioc->reply_free[ioc->reply_free_host_index] =
  804. cpu_to_le32(reply);
  805. wmb();
  806. writel(ioc->reply_free_host_index,
  807. &ioc->chip->ReplyFreeHostIndex);
  808. }
  809. next:
  810. rpf->Words = ULLONG_MAX;
  811. ioc->reply_post_host_index = (ioc->reply_post_host_index ==
  812. (ioc->reply_post_queue_depth - 1)) ? 0 :
  813. ioc->reply_post_host_index + 1;
  814. request_desript_type =
  815. ioc->reply_post_free[ioc->reply_post_host_index].Default.
  816. ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  817. completed_cmds++;
  818. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  819. goto out;
  820. if (!ioc->reply_post_host_index)
  821. rpf = ioc->reply_post_free;
  822. else
  823. rpf++;
  824. } while (1);
  825. out:
  826. if (!completed_cmds)
  827. return IRQ_NONE;
  828. wmb();
  829. writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
  830. return IRQ_HANDLED;
  831. }
  832. /**
  833. * mpt2sas_base_release_callback_handler - clear interupt callback handler
  834. * @cb_idx: callback index
  835. *
  836. * Return nothing.
  837. */
  838. void
  839. mpt2sas_base_release_callback_handler(u8 cb_idx)
  840. {
  841. mpt_callbacks[cb_idx] = NULL;
  842. }
  843. /**
  844. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  845. * @cb_func: callback function
  846. *
  847. * Returns cb_func.
  848. */
  849. u8
  850. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  851. {
  852. u8 cb_idx;
  853. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  854. if (mpt_callbacks[cb_idx] == NULL)
  855. break;
  856. mpt_callbacks[cb_idx] = cb_func;
  857. return cb_idx;
  858. }
  859. /**
  860. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  861. *
  862. * Return nothing.
  863. */
  864. void
  865. mpt2sas_base_initialize_callback_handler(void)
  866. {
  867. u8 cb_idx;
  868. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  869. mpt2sas_base_release_callback_handler(cb_idx);
  870. }
  871. /**
  872. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  873. * @ioc: per adapter object
  874. * @paddr: virtual address for SGE
  875. *
  876. * Create a zero length scatter gather entry to insure the IOCs hardware has
  877. * something to use if the target device goes brain dead and tries
  878. * to send data even when none is asked for.
  879. *
  880. * Return nothing.
  881. */
  882. void
  883. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  884. {
  885. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  886. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  887. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  888. MPI2_SGE_FLAGS_SHIFT);
  889. ioc->base_add_sg_single(paddr, flags_length, -1);
  890. }
  891. /**
  892. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  893. * @paddr: virtual address for SGE
  894. * @flags_length: SGE flags and data transfer length
  895. * @dma_addr: Physical address
  896. *
  897. * Return nothing.
  898. */
  899. static void
  900. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  901. {
  902. Mpi2SGESimple32_t *sgel = paddr;
  903. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  904. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  905. sgel->FlagsLength = cpu_to_le32(flags_length);
  906. sgel->Address = cpu_to_le32(dma_addr);
  907. }
  908. /**
  909. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  910. * @paddr: virtual address for SGE
  911. * @flags_length: SGE flags and data transfer length
  912. * @dma_addr: Physical address
  913. *
  914. * Return nothing.
  915. */
  916. static void
  917. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  918. {
  919. Mpi2SGESimple64_t *sgel = paddr;
  920. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  921. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  922. sgel->FlagsLength = cpu_to_le32(flags_length);
  923. sgel->Address = cpu_to_le64(dma_addr);
  924. }
  925. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  926. /**
  927. * _base_config_dma_addressing - set dma addressing
  928. * @ioc: per adapter object
  929. * @pdev: PCI device struct
  930. *
  931. * Returns 0 for success, non-zero for failure.
  932. */
  933. static int
  934. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  935. {
  936. struct sysinfo s;
  937. char *desc = NULL;
  938. if (sizeof(dma_addr_t) > 4) {
  939. const uint64_t required_mask =
  940. dma_get_required_mask(&pdev->dev);
  941. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  942. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  943. DMA_BIT_MASK(64))) {
  944. ioc->base_add_sg_single = &_base_add_sg_single_64;
  945. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  946. desc = "64";
  947. goto out;
  948. }
  949. }
  950. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  951. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  952. ioc->base_add_sg_single = &_base_add_sg_single_32;
  953. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  954. desc = "32";
  955. } else
  956. return -ENODEV;
  957. out:
  958. si_meminfo(&s);
  959. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  960. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  961. return 0;
  962. }
  963. /**
  964. * _base_save_msix_table - backup msix vector table
  965. * @ioc: per adapter object
  966. *
  967. * This address an errata where diag reset clears out the table
  968. */
  969. static void
  970. _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
  971. {
  972. int i;
  973. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  974. return;
  975. for (i = 0; i < ioc->msix_vector_count; i++)
  976. ioc->msix_table_backup[i] = ioc->msix_table[i];
  977. }
  978. /**
  979. * _base_restore_msix_table - this restores the msix vector table
  980. * @ioc: per adapter object
  981. *
  982. */
  983. static void
  984. _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
  985. {
  986. int i;
  987. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  988. return;
  989. for (i = 0; i < ioc->msix_vector_count; i++)
  990. ioc->msix_table[i] = ioc->msix_table_backup[i];
  991. }
  992. /**
  993. * _base_check_enable_msix - checks MSIX capabable.
  994. * @ioc: per adapter object
  995. *
  996. * Check to see if card is capable of MSIX, and set number
  997. * of avaliable msix vectors
  998. */
  999. static int
  1000. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1001. {
  1002. int base;
  1003. u16 message_control;
  1004. u32 msix_table_offset;
  1005. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1006. if (!base) {
  1007. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1008. "supported\n", ioc->name));
  1009. return -EINVAL;
  1010. }
  1011. /* get msix vector count */
  1012. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1013. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1014. /* get msix table */
  1015. pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
  1016. msix_table_offset &= 0xFFFFFFF8;
  1017. ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
  1018. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1019. "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
  1020. ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
  1021. return 0;
  1022. }
  1023. /**
  1024. * _base_disable_msix - disables msix
  1025. * @ioc: per adapter object
  1026. *
  1027. */
  1028. static void
  1029. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1030. {
  1031. if (ioc->msix_enable) {
  1032. pci_disable_msix(ioc->pdev);
  1033. kfree(ioc->msix_table_backup);
  1034. ioc->msix_table_backup = NULL;
  1035. ioc->msix_enable = 0;
  1036. }
  1037. }
  1038. /**
  1039. * _base_enable_msix - enables msix, failback to io_apic
  1040. * @ioc: per adapter object
  1041. *
  1042. */
  1043. static int
  1044. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1045. {
  1046. struct msix_entry entries;
  1047. int r;
  1048. u8 try_msix = 0;
  1049. if (msix_disable == -1 || msix_disable == 0)
  1050. try_msix = 1;
  1051. if (!try_msix)
  1052. goto try_ioapic;
  1053. if (_base_check_enable_msix(ioc) != 0)
  1054. goto try_ioapic;
  1055. ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
  1056. sizeof(u32), GFP_KERNEL);
  1057. if (!ioc->msix_table_backup) {
  1058. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  1059. "msix_table_backup failed!!!\n", ioc->name));
  1060. goto try_ioapic;
  1061. }
  1062. memset(&entries, 0, sizeof(struct msix_entry));
  1063. r = pci_enable_msix(ioc->pdev, &entries, 1);
  1064. if (r) {
  1065. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1066. "failed (r=%d) !!!\n", ioc->name, r));
  1067. goto try_ioapic;
  1068. }
  1069. r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
  1070. ioc->name, ioc);
  1071. if (r) {
  1072. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
  1073. "interrupt %d !!!\n", ioc->name, entries.vector));
  1074. pci_disable_msix(ioc->pdev);
  1075. goto try_ioapic;
  1076. }
  1077. ioc->pci_irq = entries.vector;
  1078. ioc->msix_enable = 1;
  1079. return 0;
  1080. /* failback to io_apic interrupt routing */
  1081. try_ioapic:
  1082. r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
  1083. ioc->name, ioc);
  1084. if (r) {
  1085. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1086. ioc->name, ioc->pdev->irq);
  1087. r = -EBUSY;
  1088. goto out_fail;
  1089. }
  1090. ioc->pci_irq = ioc->pdev->irq;
  1091. return 0;
  1092. out_fail:
  1093. return r;
  1094. }
  1095. /**
  1096. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1097. * @ioc: per adapter object
  1098. *
  1099. * Returns 0 for success, non-zero for failure.
  1100. */
  1101. int
  1102. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1103. {
  1104. struct pci_dev *pdev = ioc->pdev;
  1105. u32 memap_sz;
  1106. u32 pio_sz;
  1107. int i, r = 0;
  1108. u64 pio_chip = 0;
  1109. u64 chip_phys = 0;
  1110. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1111. ioc->name, __func__));
  1112. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1113. if (pci_enable_device_mem(pdev)) {
  1114. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1115. "failed\n", ioc->name);
  1116. return -ENODEV;
  1117. }
  1118. if (pci_request_selected_regions(pdev, ioc->bars,
  1119. MPT2SAS_DRIVER_NAME)) {
  1120. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1121. "failed\n", ioc->name);
  1122. r = -ENODEV;
  1123. goto out_fail;
  1124. }
  1125. /* AER (Advanced Error Reporting) hooks */
  1126. pci_enable_pcie_error_reporting(pdev);
  1127. pci_set_master(pdev);
  1128. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1129. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1130. ioc->name, pci_name(pdev));
  1131. r = -ENODEV;
  1132. goto out_fail;
  1133. }
  1134. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1135. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1136. if (pio_sz)
  1137. continue;
  1138. pio_chip = (u64)pci_resource_start(pdev, i);
  1139. pio_sz = pci_resource_len(pdev, i);
  1140. } else {
  1141. if (memap_sz)
  1142. continue;
  1143. /* verify memory resource is valid before using */
  1144. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1145. ioc->chip_phys = pci_resource_start(pdev, i);
  1146. chip_phys = (u64)ioc->chip_phys;
  1147. memap_sz = pci_resource_len(pdev, i);
  1148. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1149. if (ioc->chip == NULL) {
  1150. printk(MPT2SAS_ERR_FMT "unable to map "
  1151. "adapter memory!\n", ioc->name);
  1152. r = -EINVAL;
  1153. goto out_fail;
  1154. }
  1155. }
  1156. }
  1157. }
  1158. _base_mask_interrupts(ioc);
  1159. r = _base_enable_msix(ioc);
  1160. if (r)
  1161. goto out_fail;
  1162. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1163. ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1164. "IO-APIC enabled"), ioc->pci_irq);
  1165. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1166. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1167. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1168. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1169. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1170. pci_save_state(pdev);
  1171. return 0;
  1172. out_fail:
  1173. if (ioc->chip_phys)
  1174. iounmap(ioc->chip);
  1175. ioc->chip_phys = 0;
  1176. ioc->pci_irq = -1;
  1177. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1178. pci_disable_pcie_error_reporting(pdev);
  1179. pci_disable_device(pdev);
  1180. return r;
  1181. }
  1182. /**
  1183. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1184. * @ioc: per adapter object
  1185. * @smid: system request message index(smid zero is invalid)
  1186. *
  1187. * Returns virt pointer to message frame.
  1188. */
  1189. void *
  1190. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1191. {
  1192. return (void *)(ioc->request + (smid * ioc->request_sz));
  1193. }
  1194. /**
  1195. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1196. * @ioc: per adapter object
  1197. * @smid: system request message index
  1198. *
  1199. * Returns virt pointer to sense buffer.
  1200. */
  1201. void *
  1202. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1203. {
  1204. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1205. }
  1206. /**
  1207. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1208. * @ioc: per adapter object
  1209. * @smid: system request message index
  1210. *
  1211. * Returns phys pointer to the low 32bit address of the sense buffer.
  1212. */
  1213. __le32
  1214. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1215. {
  1216. return cpu_to_le32(ioc->sense_dma +
  1217. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1218. }
  1219. /**
  1220. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1221. * @ioc: per adapter object
  1222. * @phys_addr: lower 32 physical addr of the reply
  1223. *
  1224. * Converts 32bit lower physical addr into a virt address.
  1225. */
  1226. void *
  1227. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1228. {
  1229. if (!phys_addr)
  1230. return NULL;
  1231. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1232. }
  1233. /**
  1234. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1235. * @ioc: per adapter object
  1236. * @cb_idx: callback index
  1237. *
  1238. * Returns smid (zero is invalid)
  1239. */
  1240. u16
  1241. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1242. {
  1243. unsigned long flags;
  1244. struct request_tracker *request;
  1245. u16 smid;
  1246. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1247. if (list_empty(&ioc->internal_free_list)) {
  1248. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1249. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1250. ioc->name, __func__);
  1251. return 0;
  1252. }
  1253. request = list_entry(ioc->internal_free_list.next,
  1254. struct request_tracker, tracker_list);
  1255. request->cb_idx = cb_idx;
  1256. smid = request->smid;
  1257. list_del(&request->tracker_list);
  1258. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1259. return smid;
  1260. }
  1261. /**
  1262. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1263. * @ioc: per adapter object
  1264. * @cb_idx: callback index
  1265. * @scmd: pointer to scsi command object
  1266. *
  1267. * Returns smid (zero is invalid)
  1268. */
  1269. u16
  1270. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1271. struct scsi_cmnd *scmd)
  1272. {
  1273. unsigned long flags;
  1274. struct request_tracker *request;
  1275. u16 smid;
  1276. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1277. if (list_empty(&ioc->free_list)) {
  1278. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1279. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1280. ioc->name, __func__);
  1281. return 0;
  1282. }
  1283. request = list_entry(ioc->free_list.next,
  1284. struct request_tracker, tracker_list);
  1285. request->scmd = scmd;
  1286. request->cb_idx = cb_idx;
  1287. smid = request->smid;
  1288. list_del(&request->tracker_list);
  1289. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1290. return smid;
  1291. }
  1292. /**
  1293. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1294. * @ioc: per adapter object
  1295. * @cb_idx: callback index
  1296. *
  1297. * Returns smid (zero is invalid)
  1298. */
  1299. u16
  1300. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1301. {
  1302. unsigned long flags;
  1303. struct request_tracker *request;
  1304. u16 smid;
  1305. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1306. if (list_empty(&ioc->hpr_free_list)) {
  1307. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1308. return 0;
  1309. }
  1310. request = list_entry(ioc->hpr_free_list.next,
  1311. struct request_tracker, tracker_list);
  1312. request->cb_idx = cb_idx;
  1313. smid = request->smid;
  1314. list_del(&request->tracker_list);
  1315. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1316. return smid;
  1317. }
  1318. /**
  1319. * mpt2sas_base_free_smid - put smid back on free_list
  1320. * @ioc: per adapter object
  1321. * @smid: system request message index
  1322. *
  1323. * Return nothing.
  1324. */
  1325. void
  1326. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1327. {
  1328. unsigned long flags;
  1329. int i;
  1330. struct chain_tracker *chain_req, *next;
  1331. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1332. if (smid >= ioc->hi_priority_smid) {
  1333. if (smid < ioc->internal_smid) {
  1334. /* hi-priority */
  1335. i = smid - ioc->hi_priority_smid;
  1336. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1337. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1338. &ioc->hpr_free_list);
  1339. } else {
  1340. /* internal queue */
  1341. i = smid - ioc->internal_smid;
  1342. ioc->internal_lookup[i].cb_idx = 0xFF;
  1343. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1344. &ioc->internal_free_list);
  1345. }
  1346. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1347. return;
  1348. }
  1349. /* scsiio queue */
  1350. i = smid - 1;
  1351. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1352. list_for_each_entry_safe(chain_req, next,
  1353. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1354. list_del_init(&chain_req->tracker_list);
  1355. list_add_tail(&chain_req->tracker_list,
  1356. &ioc->free_chain_list);
  1357. }
  1358. }
  1359. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1360. ioc->scsi_lookup[i].scmd = NULL;
  1361. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1362. &ioc->free_list);
  1363. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1364. /*
  1365. * See _wait_for_commands_to_complete() call with regards to this code.
  1366. */
  1367. if (ioc->shost_recovery && ioc->pending_io_count) {
  1368. if (ioc->pending_io_count == 1)
  1369. wake_up(&ioc->reset_wq);
  1370. ioc->pending_io_count--;
  1371. }
  1372. }
  1373. /**
  1374. * _base_writeq - 64 bit write to MMIO
  1375. * @ioc: per adapter object
  1376. * @b: data payload
  1377. * @addr: address in MMIO space
  1378. * @writeq_lock: spin lock
  1379. *
  1380. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1381. * care of 32 bit environment where its not quarenteed to send the entire word
  1382. * in one transfer.
  1383. */
  1384. #ifndef writeq
  1385. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1386. spinlock_t *writeq_lock)
  1387. {
  1388. unsigned long flags;
  1389. __u64 data_out = cpu_to_le64(b);
  1390. spin_lock_irqsave(writeq_lock, flags);
  1391. writel((u32)(data_out), addr);
  1392. writel((u32)(data_out >> 32), (addr + 4));
  1393. spin_unlock_irqrestore(writeq_lock, flags);
  1394. }
  1395. #else
  1396. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1397. spinlock_t *writeq_lock)
  1398. {
  1399. writeq(cpu_to_le64(b), addr);
  1400. }
  1401. #endif
  1402. /**
  1403. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1404. * @ioc: per adapter object
  1405. * @smid: system request message index
  1406. * @handle: device handle
  1407. *
  1408. * Return nothing.
  1409. */
  1410. void
  1411. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1412. {
  1413. Mpi2RequestDescriptorUnion_t descriptor;
  1414. u64 *request = (u64 *)&descriptor;
  1415. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1416. descriptor.SCSIIO.MSIxIndex = 0; /* TODO */
  1417. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1418. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1419. descriptor.SCSIIO.LMID = 0;
  1420. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1421. &ioc->scsi_lookup_lock);
  1422. }
  1423. /**
  1424. * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
  1425. * @ioc: per adapter object
  1426. * @smid: system request message index
  1427. *
  1428. * Return nothing.
  1429. */
  1430. void
  1431. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1432. {
  1433. Mpi2RequestDescriptorUnion_t descriptor;
  1434. u64 *request = (u64 *)&descriptor;
  1435. descriptor.HighPriority.RequestFlags =
  1436. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1437. descriptor.HighPriority.MSIxIndex = 0; /* TODO */
  1438. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1439. descriptor.HighPriority.LMID = 0;
  1440. descriptor.HighPriority.Reserved1 = 0;
  1441. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1442. &ioc->scsi_lookup_lock);
  1443. }
  1444. /**
  1445. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1446. * @ioc: per adapter object
  1447. * @smid: system request message index
  1448. *
  1449. * Return nothing.
  1450. */
  1451. void
  1452. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1453. {
  1454. Mpi2RequestDescriptorUnion_t descriptor;
  1455. u64 *request = (u64 *)&descriptor;
  1456. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1457. descriptor.Default.MSIxIndex = 0; /* TODO */
  1458. descriptor.Default.SMID = cpu_to_le16(smid);
  1459. descriptor.Default.LMID = 0;
  1460. descriptor.Default.DescriptorTypeDependent = 0;
  1461. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1462. &ioc->scsi_lookup_lock);
  1463. }
  1464. /**
  1465. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1466. * @ioc: per adapter object
  1467. * @smid: system request message index
  1468. * @io_index: value used to track the IO
  1469. *
  1470. * Return nothing.
  1471. */
  1472. void
  1473. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1474. u16 io_index)
  1475. {
  1476. Mpi2RequestDescriptorUnion_t descriptor;
  1477. u64 *request = (u64 *)&descriptor;
  1478. descriptor.SCSITarget.RequestFlags =
  1479. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1480. descriptor.SCSITarget.MSIxIndex = 0; /* TODO */
  1481. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1482. descriptor.SCSITarget.LMID = 0;
  1483. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1484. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1485. &ioc->scsi_lookup_lock);
  1486. }
  1487. /**
  1488. * _base_display_dell_branding - Disply branding string
  1489. * @ioc: per adapter object
  1490. *
  1491. * Return nothing.
  1492. */
  1493. static void
  1494. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1495. {
  1496. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1497. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1498. return;
  1499. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1500. switch (ioc->pdev->subsystem_device) {
  1501. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1502. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1503. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1504. break;
  1505. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1506. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1507. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1508. break;
  1509. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1510. strncpy(dell_branding,
  1511. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1512. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1513. break;
  1514. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1515. strncpy(dell_branding,
  1516. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1517. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1518. break;
  1519. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1520. strncpy(dell_branding,
  1521. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1522. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1523. break;
  1524. case MPT2SAS_DELL_PERC_H200_SSDID:
  1525. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1526. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1527. break;
  1528. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1529. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1530. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1531. break;
  1532. default:
  1533. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1534. break;
  1535. }
  1536. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1537. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1538. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1539. ioc->pdev->subsystem_device);
  1540. }
  1541. /**
  1542. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1543. * @ioc: per adapter object
  1544. *
  1545. * Return nothing.
  1546. */
  1547. static void
  1548. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1549. {
  1550. int i = 0;
  1551. char desc[16];
  1552. u8 revision;
  1553. u32 iounit_pg1_flags;
  1554. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1555. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1556. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1557. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1558. ioc->name, desc,
  1559. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1560. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1561. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1562. ioc->facts.FWVersion.Word & 0x000000FF,
  1563. revision,
  1564. (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
  1565. (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
  1566. (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
  1567. ioc->bios_pg3.BiosVersion & 0x000000FF);
  1568. _base_display_dell_branding(ioc);
  1569. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1570. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1571. printk("Initiator");
  1572. i++;
  1573. }
  1574. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1575. printk("%sTarget", i ? "," : "");
  1576. i++;
  1577. }
  1578. i = 0;
  1579. printk("), ");
  1580. printk("Capabilities=(");
  1581. if (ioc->facts.IOCCapabilities &
  1582. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1583. printk("Raid");
  1584. i++;
  1585. }
  1586. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1587. printk("%sTLR", i ? "," : "");
  1588. i++;
  1589. }
  1590. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1591. printk("%sMulticast", i ? "," : "");
  1592. i++;
  1593. }
  1594. if (ioc->facts.IOCCapabilities &
  1595. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1596. printk("%sBIDI Target", i ? "," : "");
  1597. i++;
  1598. }
  1599. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1600. printk("%sEEDP", i ? "," : "");
  1601. i++;
  1602. }
  1603. if (ioc->facts.IOCCapabilities &
  1604. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1605. printk("%sSnapshot Buffer", i ? "," : "");
  1606. i++;
  1607. }
  1608. if (ioc->facts.IOCCapabilities &
  1609. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1610. printk("%sDiag Trace Buffer", i ? "," : "");
  1611. i++;
  1612. }
  1613. if (ioc->facts.IOCCapabilities &
  1614. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1615. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1616. i++;
  1617. }
  1618. if (ioc->facts.IOCCapabilities &
  1619. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1620. printk("%sTask Set Full", i ? "," : "");
  1621. i++;
  1622. }
  1623. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1624. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1625. printk("%sNCQ", i ? "," : "");
  1626. i++;
  1627. }
  1628. printk(")\n");
  1629. }
  1630. /**
  1631. * _base_update_missing_delay - change the missing delay timers
  1632. * @ioc: per adapter object
  1633. * @device_missing_delay: amount of time till device is reported missing
  1634. * @io_missing_delay: interval IO is returned when there is a missing device
  1635. *
  1636. * Return nothing.
  1637. *
  1638. * Passed on the command line, this function will modify the device missing
  1639. * delay, as well as the io missing delay. This should be called at driver
  1640. * load time.
  1641. */
  1642. static void
  1643. _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1644. u16 device_missing_delay, u8 io_missing_delay)
  1645. {
  1646. u16 dmd, dmd_new, dmd_orignal;
  1647. u8 io_missing_delay_original;
  1648. u16 sz;
  1649. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  1650. Mpi2ConfigReply_t mpi_reply;
  1651. u8 num_phys = 0;
  1652. u16 ioc_status;
  1653. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  1654. if (!num_phys)
  1655. return;
  1656. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  1657. sizeof(Mpi2SasIOUnit1PhyData_t));
  1658. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  1659. if (!sas_iounit_pg1) {
  1660. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1661. ioc->name, __FILE__, __LINE__, __func__);
  1662. goto out;
  1663. }
  1664. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  1665. sas_iounit_pg1, sz))) {
  1666. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1667. ioc->name, __FILE__, __LINE__, __func__);
  1668. goto out;
  1669. }
  1670. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  1671. MPI2_IOCSTATUS_MASK;
  1672. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  1673. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1674. ioc->name, __FILE__, __LINE__, __func__);
  1675. goto out;
  1676. }
  1677. /* device missing delay */
  1678. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  1679. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1680. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1681. else
  1682. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  1683. dmd_orignal = dmd;
  1684. if (device_missing_delay > 0x7F) {
  1685. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  1686. device_missing_delay;
  1687. dmd = dmd / 16;
  1688. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  1689. } else
  1690. dmd = device_missing_delay;
  1691. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  1692. /* io missing delay */
  1693. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  1694. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  1695. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  1696. sz)) {
  1697. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1698. dmd_new = (dmd &
  1699. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1700. else
  1701. dmd_new =
  1702. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  1703. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  1704. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  1705. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  1706. "new(%d)\n", ioc->name, io_missing_delay_original,
  1707. io_missing_delay);
  1708. ioc->device_missing_delay = dmd_new;
  1709. ioc->io_missing_delay = io_missing_delay;
  1710. }
  1711. out:
  1712. kfree(sas_iounit_pg1);
  1713. }
  1714. /**
  1715. * _base_static_config_pages - static start of day config pages
  1716. * @ioc: per adapter object
  1717. *
  1718. * Return nothing.
  1719. */
  1720. static void
  1721. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  1722. {
  1723. Mpi2ConfigReply_t mpi_reply;
  1724. u32 iounit_pg1_flags;
  1725. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  1726. if (ioc->ir_firmware)
  1727. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  1728. &ioc->manu_pg10);
  1729. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  1730. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  1731. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  1732. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  1733. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1734. _base_display_ioc_capabilities(ioc);
  1735. /*
  1736. * Enable task_set_full handling in iounit_pg1 when the
  1737. * facts capabilities indicate that its supported.
  1738. */
  1739. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1740. if ((ioc->facts.IOCCapabilities &
  1741. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  1742. iounit_pg1_flags &=
  1743. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1744. else
  1745. iounit_pg1_flags |=
  1746. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1747. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  1748. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1749. }
  1750. /**
  1751. * _base_release_memory_pools - release memory
  1752. * @ioc: per adapter object
  1753. *
  1754. * Free memory allocated from _base_allocate_memory_pools.
  1755. *
  1756. * Return nothing.
  1757. */
  1758. static void
  1759. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  1760. {
  1761. int i;
  1762. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1763. __func__));
  1764. if (ioc->request) {
  1765. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  1766. ioc->request, ioc->request_dma);
  1767. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  1768. ": free\n", ioc->name, ioc->request));
  1769. ioc->request = NULL;
  1770. }
  1771. if (ioc->sense) {
  1772. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  1773. if (ioc->sense_dma_pool)
  1774. pci_pool_destroy(ioc->sense_dma_pool);
  1775. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  1776. ": free\n", ioc->name, ioc->sense));
  1777. ioc->sense = NULL;
  1778. }
  1779. if (ioc->reply) {
  1780. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  1781. if (ioc->reply_dma_pool)
  1782. pci_pool_destroy(ioc->reply_dma_pool);
  1783. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  1784. ": free\n", ioc->name, ioc->reply));
  1785. ioc->reply = NULL;
  1786. }
  1787. if (ioc->reply_free) {
  1788. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  1789. ioc->reply_free_dma);
  1790. if (ioc->reply_free_dma_pool)
  1791. pci_pool_destroy(ioc->reply_free_dma_pool);
  1792. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  1793. "(0x%p): free\n", ioc->name, ioc->reply_free));
  1794. ioc->reply_free = NULL;
  1795. }
  1796. if (ioc->reply_post_free) {
  1797. pci_pool_free(ioc->reply_post_free_dma_pool,
  1798. ioc->reply_post_free, ioc->reply_post_free_dma);
  1799. if (ioc->reply_post_free_dma_pool)
  1800. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  1801. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1802. "reply_post_free_pool(0x%p): free\n", ioc->name,
  1803. ioc->reply_post_free));
  1804. ioc->reply_post_free = NULL;
  1805. }
  1806. if (ioc->config_page) {
  1807. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1808. "config_page(0x%p): free\n", ioc->name,
  1809. ioc->config_page));
  1810. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  1811. ioc->config_page, ioc->config_page_dma);
  1812. }
  1813. if (ioc->scsi_lookup) {
  1814. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  1815. ioc->scsi_lookup = NULL;
  1816. }
  1817. kfree(ioc->hpr_lookup);
  1818. kfree(ioc->internal_lookup);
  1819. if (ioc->chain_lookup) {
  1820. for (i = 0; i < ioc->chain_depth; i++) {
  1821. if (ioc->chain_lookup[i].chain_buffer)
  1822. pci_pool_free(ioc->chain_dma_pool,
  1823. ioc->chain_lookup[i].chain_buffer,
  1824. ioc->chain_lookup[i].chain_buffer_dma);
  1825. }
  1826. if (ioc->chain_dma_pool)
  1827. pci_pool_destroy(ioc->chain_dma_pool);
  1828. }
  1829. if (ioc->chain_lookup) {
  1830. free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
  1831. ioc->chain_lookup = NULL;
  1832. }
  1833. }
  1834. /**
  1835. * _base_allocate_memory_pools - allocate start of day memory pools
  1836. * @ioc: per adapter object
  1837. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1838. *
  1839. * Returns 0 success, anything else error
  1840. */
  1841. static int
  1842. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  1843. {
  1844. Mpi2IOCFactsReply_t *facts;
  1845. u32 queue_size, queue_diff;
  1846. u16 max_sge_elements;
  1847. u16 num_of_reply_frames;
  1848. u16 chains_needed_per_io;
  1849. u32 sz, total_sz;
  1850. u32 retry_sz;
  1851. u16 max_request_credit;
  1852. int i;
  1853. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1854. __func__));
  1855. retry_sz = 0;
  1856. facts = &ioc->facts;
  1857. /* command line tunables for max sgl entries */
  1858. if (max_sgl_entries != -1) {
  1859. ioc->shost->sg_tablesize = (max_sgl_entries <
  1860. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  1861. MPT2SAS_SG_DEPTH;
  1862. } else {
  1863. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  1864. }
  1865. /* command line tunables for max controller queue depth */
  1866. if (max_queue_depth != -1)
  1867. max_request_credit = (max_queue_depth < facts->RequestCredit)
  1868. ? max_queue_depth : facts->RequestCredit;
  1869. else
  1870. max_request_credit = facts->RequestCredit;
  1871. ioc->hba_queue_depth = max_request_credit;
  1872. ioc->hi_priority_depth = facts->HighPriorityCredit;
  1873. ioc->internal_depth = ioc->hi_priority_depth + 5;
  1874. /* request frame size */
  1875. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  1876. /* reply frame size */
  1877. ioc->reply_sz = facts->ReplyFrameSize * 4;
  1878. retry_allocation:
  1879. total_sz = 0;
  1880. /* calculate number of sg elements left over in the 1st frame */
  1881. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  1882. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  1883. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  1884. /* now do the same for a chain buffer */
  1885. max_sge_elements = ioc->request_sz - ioc->sge_size;
  1886. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  1887. ioc->chain_offset_value_for_main_message =
  1888. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  1889. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  1890. /*
  1891. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  1892. */
  1893. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  1894. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  1895. + 1;
  1896. if (chains_needed_per_io > facts->MaxChainDepth) {
  1897. chains_needed_per_io = facts->MaxChainDepth;
  1898. ioc->shost->sg_tablesize = min_t(u16,
  1899. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  1900. * chains_needed_per_io), ioc->shost->sg_tablesize);
  1901. }
  1902. ioc->chains_needed_per_io = chains_needed_per_io;
  1903. /* reply free queue sizing - taking into account for events */
  1904. num_of_reply_frames = ioc->hba_queue_depth + 32;
  1905. /* number of replies frames can't be a multiple of 16 */
  1906. /* decrease number of reply frames by 1 */
  1907. if (!(num_of_reply_frames % 16))
  1908. num_of_reply_frames--;
  1909. /* calculate number of reply free queue entries
  1910. * (must be multiple of 16)
  1911. */
  1912. /* (we know reply_free_queue_depth is not a multiple of 16) */
  1913. queue_size = num_of_reply_frames;
  1914. queue_size += 16 - (queue_size % 16);
  1915. ioc->reply_free_queue_depth = queue_size;
  1916. /* reply descriptor post queue sizing */
  1917. /* this size should be the number of request frames + number of reply
  1918. * frames
  1919. */
  1920. queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
  1921. /* round up to 16 byte boundary */
  1922. if (queue_size % 16)
  1923. queue_size += 16 - (queue_size % 16);
  1924. /* check against IOC maximum reply post queue depth */
  1925. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  1926. queue_diff = queue_size -
  1927. facts->MaxReplyDescriptorPostQueueDepth;
  1928. /* round queue_diff up to multiple of 16 */
  1929. if (queue_diff % 16)
  1930. queue_diff += 16 - (queue_diff % 16);
  1931. /* adjust hba_queue_depth, reply_free_queue_depth,
  1932. * and queue_size
  1933. */
  1934. ioc->hba_queue_depth -= (queue_diff / 2);
  1935. ioc->reply_free_queue_depth -= (queue_diff / 2);
  1936. queue_size = facts->MaxReplyDescriptorPostQueueDepth;
  1937. }
  1938. ioc->reply_post_queue_depth = queue_size;
  1939. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  1940. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  1941. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  1942. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  1943. ioc->chains_needed_per_io));
  1944. ioc->scsiio_depth = ioc->hba_queue_depth -
  1945. ioc->hi_priority_depth - ioc->internal_depth;
  1946. /* set the scsi host can_queue depth
  1947. * with some internal commands that could be outstanding
  1948. */
  1949. ioc->shost->can_queue = ioc->scsiio_depth - (2);
  1950. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  1951. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  1952. /* contiguous pool for request and chains, 16 byte align, one extra "
  1953. * "frame for smid=0
  1954. */
  1955. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  1956. sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
  1957. /* hi-priority queue */
  1958. sz += (ioc->hi_priority_depth * ioc->request_sz);
  1959. /* internal queue */
  1960. sz += (ioc->internal_depth * ioc->request_sz);
  1961. ioc->request_dma_sz = sz;
  1962. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  1963. if (!ioc->request) {
  1964. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1965. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1966. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  1967. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1968. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  1969. goto out;
  1970. retry_sz += 64;
  1971. ioc->hba_queue_depth = max_request_credit - retry_sz;
  1972. goto retry_allocation;
  1973. }
  1974. if (retry_sz)
  1975. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1976. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1977. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  1978. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1979. /* hi-priority queue */
  1980. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  1981. ioc->request_sz);
  1982. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  1983. ioc->request_sz);
  1984. /* internal queue */
  1985. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  1986. ioc->request_sz);
  1987. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  1988. ioc->request_sz);
  1989. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  1990. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  1991. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  1992. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  1993. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  1994. ioc->name, (unsigned long long) ioc->request_dma));
  1995. total_sz += sz;
  1996. sz = ioc->scsiio_depth * sizeof(struct request_tracker);
  1997. ioc->scsi_lookup_pages = get_order(sz);
  1998. ioc->scsi_lookup = (struct request_tracker *)__get_free_pages(
  1999. GFP_KERNEL, ioc->scsi_lookup_pages);
  2000. if (!ioc->scsi_lookup) {
  2001. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  2002. "sz(%d)\n", ioc->name, (int)sz);
  2003. goto out;
  2004. }
  2005. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  2006. "depth(%d)\n", ioc->name, ioc->request,
  2007. ioc->scsiio_depth));
  2008. /* loop till the allocation succeeds */
  2009. do {
  2010. sz = ioc->chain_depth * sizeof(struct chain_tracker);
  2011. ioc->chain_pages = get_order(sz);
  2012. ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
  2013. GFP_KERNEL, ioc->chain_pages);
  2014. if (ioc->chain_lookup == NULL)
  2015. ioc->chain_depth -= 100;
  2016. } while (ioc->chain_lookup == NULL);
  2017. ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
  2018. ioc->request_sz, 16, 0);
  2019. if (!ioc->chain_dma_pool) {
  2020. printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
  2021. "failed\n", ioc->name);
  2022. goto out;
  2023. }
  2024. for (i = 0; i < ioc->chain_depth; i++) {
  2025. ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
  2026. ioc->chain_dma_pool , GFP_KERNEL,
  2027. &ioc->chain_lookup[i].chain_buffer_dma);
  2028. if (!ioc->chain_lookup[i].chain_buffer) {
  2029. ioc->chain_depth = i;
  2030. goto chain_done;
  2031. }
  2032. total_sz += ioc->request_sz;
  2033. }
  2034. chain_done:
  2035. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
  2036. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2037. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  2038. ioc->request_sz))/1024));
  2039. /* initialize hi-priority queue smid's */
  2040. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2041. sizeof(struct request_tracker), GFP_KERNEL);
  2042. if (!ioc->hpr_lookup) {
  2043. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2044. ioc->name);
  2045. goto out;
  2046. }
  2047. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2048. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2049. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2050. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2051. /* initialize internal queue smid's */
  2052. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2053. sizeof(struct request_tracker), GFP_KERNEL);
  2054. if (!ioc->internal_lookup) {
  2055. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2056. ioc->name);
  2057. goto out;
  2058. }
  2059. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2060. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2061. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2062. ioc->internal_depth, ioc->internal_smid));
  2063. /* sense buffers, 4 byte align */
  2064. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2065. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2066. 0);
  2067. if (!ioc->sense_dma_pool) {
  2068. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2069. ioc->name);
  2070. goto out;
  2071. }
  2072. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2073. &ioc->sense_dma);
  2074. if (!ioc->sense) {
  2075. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2076. ioc->name);
  2077. goto out;
  2078. }
  2079. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2080. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2081. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2082. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2083. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2084. ioc->name, (unsigned long long)ioc->sense_dma));
  2085. total_sz += sz;
  2086. /* reply pool, 4 byte align */
  2087. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2088. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2089. 0);
  2090. if (!ioc->reply_dma_pool) {
  2091. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2092. ioc->name);
  2093. goto out;
  2094. }
  2095. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2096. &ioc->reply_dma);
  2097. if (!ioc->reply) {
  2098. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2099. ioc->name);
  2100. goto out;
  2101. }
  2102. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2103. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2104. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2105. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2106. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2107. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2108. ioc->name, (unsigned long long)ioc->reply_dma));
  2109. total_sz += sz;
  2110. /* reply free queue, 16 byte align */
  2111. sz = ioc->reply_free_queue_depth * 4;
  2112. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2113. ioc->pdev, sz, 16, 0);
  2114. if (!ioc->reply_free_dma_pool) {
  2115. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2116. "failed\n", ioc->name);
  2117. goto out;
  2118. }
  2119. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2120. &ioc->reply_free_dma);
  2121. if (!ioc->reply_free) {
  2122. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2123. "failed\n", ioc->name);
  2124. goto out;
  2125. }
  2126. memset(ioc->reply_free, 0, sz);
  2127. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2128. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2129. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2130. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2131. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2132. total_sz += sz;
  2133. /* reply post queue, 16 byte align */
  2134. sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
  2135. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2136. ioc->pdev, sz, 16, 0);
  2137. if (!ioc->reply_post_free_dma_pool) {
  2138. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2139. "failed\n", ioc->name);
  2140. goto out;
  2141. }
  2142. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2143. GFP_KERNEL, &ioc->reply_post_free_dma);
  2144. if (!ioc->reply_post_free) {
  2145. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2146. "failed\n", ioc->name);
  2147. goto out;
  2148. }
  2149. memset(ioc->reply_post_free, 0, sz);
  2150. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2151. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2152. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2153. sz/1024));
  2154. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2155. "(0x%llx)\n", ioc->name, (unsigned long long)
  2156. ioc->reply_post_free_dma));
  2157. total_sz += sz;
  2158. ioc->config_page_sz = 512;
  2159. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2160. ioc->config_page_sz, &ioc->config_page_dma);
  2161. if (!ioc->config_page) {
  2162. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2163. "failed\n", ioc->name);
  2164. goto out;
  2165. }
  2166. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2167. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2168. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2169. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2170. total_sz += ioc->config_page_sz;
  2171. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2172. ioc->name, total_sz/1024);
  2173. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2174. "Max Controller Queue Depth(%d)\n",
  2175. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2176. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2177. ioc->name, ioc->shost->sg_tablesize);
  2178. return 0;
  2179. out:
  2180. return -ENOMEM;
  2181. }
  2182. /**
  2183. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2184. * @ioc: Pointer to MPT_ADAPTER structure
  2185. * @cooked: Request raw or cooked IOC state
  2186. *
  2187. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2188. * Doorbell bits in MPI_IOC_STATE_MASK.
  2189. */
  2190. u32
  2191. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2192. {
  2193. u32 s, sc;
  2194. s = readl(&ioc->chip->Doorbell);
  2195. sc = s & MPI2_IOC_STATE_MASK;
  2196. return cooked ? sc : s;
  2197. }
  2198. /**
  2199. * _base_wait_on_iocstate - waiting on a particular ioc state
  2200. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2201. * @timeout: timeout in second
  2202. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2203. *
  2204. * Returns 0 for success, non-zero for failure.
  2205. */
  2206. static int
  2207. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2208. int sleep_flag)
  2209. {
  2210. u32 count, cntdn;
  2211. u32 current_state;
  2212. count = 0;
  2213. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2214. do {
  2215. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2216. if (current_state == ioc_state)
  2217. return 0;
  2218. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2219. break;
  2220. if (sleep_flag == CAN_SLEEP)
  2221. msleep(1);
  2222. else
  2223. udelay(500);
  2224. count++;
  2225. } while (--cntdn);
  2226. return current_state;
  2227. }
  2228. /**
  2229. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2230. * a write to the doorbell)
  2231. * @ioc: per adapter object
  2232. * @timeout: timeout in second
  2233. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2234. *
  2235. * Returns 0 for success, non-zero for failure.
  2236. *
  2237. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2238. */
  2239. static int
  2240. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2241. int sleep_flag)
  2242. {
  2243. u32 cntdn, count;
  2244. u32 int_status;
  2245. count = 0;
  2246. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2247. do {
  2248. int_status = readl(&ioc->chip->HostInterruptStatus);
  2249. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2250. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2251. "successfull count(%d), timeout(%d)\n", ioc->name,
  2252. __func__, count, timeout));
  2253. return 0;
  2254. }
  2255. if (sleep_flag == CAN_SLEEP)
  2256. msleep(1);
  2257. else
  2258. udelay(500);
  2259. count++;
  2260. } while (--cntdn);
  2261. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2262. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2263. return -EFAULT;
  2264. }
  2265. /**
  2266. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2267. * @ioc: per adapter object
  2268. * @timeout: timeout in second
  2269. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2270. *
  2271. * Returns 0 for success, non-zero for failure.
  2272. *
  2273. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2274. * doorbell.
  2275. */
  2276. static int
  2277. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2278. int sleep_flag)
  2279. {
  2280. u32 cntdn, count;
  2281. u32 int_status;
  2282. u32 doorbell;
  2283. count = 0;
  2284. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2285. do {
  2286. int_status = readl(&ioc->chip->HostInterruptStatus);
  2287. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2288. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2289. "successfull count(%d), timeout(%d)\n", ioc->name,
  2290. __func__, count, timeout));
  2291. return 0;
  2292. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2293. doorbell = readl(&ioc->chip->Doorbell);
  2294. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2295. MPI2_IOC_STATE_FAULT) {
  2296. mpt2sas_base_fault_info(ioc , doorbell);
  2297. return -EFAULT;
  2298. }
  2299. } else if (int_status == 0xFFFFFFFF)
  2300. goto out;
  2301. if (sleep_flag == CAN_SLEEP)
  2302. msleep(1);
  2303. else
  2304. udelay(500);
  2305. count++;
  2306. } while (--cntdn);
  2307. out:
  2308. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2309. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2310. return -EFAULT;
  2311. }
  2312. /**
  2313. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2314. * @ioc: per adapter object
  2315. * @timeout: timeout in second
  2316. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2317. *
  2318. * Returns 0 for success, non-zero for failure.
  2319. *
  2320. */
  2321. static int
  2322. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2323. int sleep_flag)
  2324. {
  2325. u32 cntdn, count;
  2326. u32 doorbell_reg;
  2327. count = 0;
  2328. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2329. do {
  2330. doorbell_reg = readl(&ioc->chip->Doorbell);
  2331. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2332. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2333. "successfull count(%d), timeout(%d)\n", ioc->name,
  2334. __func__, count, timeout));
  2335. return 0;
  2336. }
  2337. if (sleep_flag == CAN_SLEEP)
  2338. msleep(1);
  2339. else
  2340. udelay(500);
  2341. count++;
  2342. } while (--cntdn);
  2343. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2344. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2345. return -EFAULT;
  2346. }
  2347. /**
  2348. * _base_send_ioc_reset - send doorbell reset
  2349. * @ioc: per adapter object
  2350. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2351. * @timeout: timeout in second
  2352. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2353. *
  2354. * Returns 0 for success, non-zero for failure.
  2355. */
  2356. static int
  2357. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2358. int sleep_flag)
  2359. {
  2360. u32 ioc_state;
  2361. int r = 0;
  2362. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2363. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2364. ioc->name, __func__);
  2365. return -EFAULT;
  2366. }
  2367. if (!(ioc->facts.IOCCapabilities &
  2368. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2369. return -EFAULT;
  2370. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2371. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2372. &ioc->chip->Doorbell);
  2373. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2374. r = -EFAULT;
  2375. goto out;
  2376. }
  2377. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2378. timeout, sleep_flag);
  2379. if (ioc_state) {
  2380. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2381. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2382. r = -EFAULT;
  2383. goto out;
  2384. }
  2385. out:
  2386. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2387. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2388. return r;
  2389. }
  2390. /**
  2391. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2392. * @ioc: per adapter object
  2393. * @request_bytes: request length
  2394. * @request: pointer having request payload
  2395. * @reply_bytes: reply length
  2396. * @reply: pointer to reply payload
  2397. * @timeout: timeout in second
  2398. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2399. *
  2400. * Returns 0 for success, non-zero for failure.
  2401. */
  2402. static int
  2403. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2404. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2405. {
  2406. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2407. int i;
  2408. u8 failed;
  2409. u16 dummy;
  2410. u32 *mfp;
  2411. /* make sure doorbell is not in use */
  2412. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2413. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2414. " (line=%d)\n", ioc->name, __LINE__);
  2415. return -EFAULT;
  2416. }
  2417. /* clear pending doorbell interrupts from previous state changes */
  2418. if (readl(&ioc->chip->HostInterruptStatus) &
  2419. MPI2_HIS_IOC2SYS_DB_STATUS)
  2420. writel(0, &ioc->chip->HostInterruptStatus);
  2421. /* send message to ioc */
  2422. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2423. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2424. &ioc->chip->Doorbell);
  2425. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2426. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2427. "int failed (line=%d)\n", ioc->name, __LINE__);
  2428. return -EFAULT;
  2429. }
  2430. writel(0, &ioc->chip->HostInterruptStatus);
  2431. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2432. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2433. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2434. return -EFAULT;
  2435. }
  2436. /* send message 32-bits at a time */
  2437. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2438. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2439. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2440. failed = 1;
  2441. }
  2442. if (failed) {
  2443. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2444. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2445. return -EFAULT;
  2446. }
  2447. /* now wait for the reply */
  2448. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2449. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2450. "int failed (line=%d)\n", ioc->name, __LINE__);
  2451. return -EFAULT;
  2452. }
  2453. /* read the first two 16-bits, it gives the total length of the reply */
  2454. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2455. & MPI2_DOORBELL_DATA_MASK);
  2456. writel(0, &ioc->chip->HostInterruptStatus);
  2457. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2458. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2459. "int failed (line=%d)\n", ioc->name, __LINE__);
  2460. return -EFAULT;
  2461. }
  2462. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2463. & MPI2_DOORBELL_DATA_MASK);
  2464. writel(0, &ioc->chip->HostInterruptStatus);
  2465. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2466. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2467. printk(MPT2SAS_ERR_FMT "doorbell "
  2468. "handshake int failed (line=%d)\n", ioc->name,
  2469. __LINE__);
  2470. return -EFAULT;
  2471. }
  2472. if (i >= reply_bytes/2) /* overflow case */
  2473. dummy = readl(&ioc->chip->Doorbell);
  2474. else
  2475. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2476. & MPI2_DOORBELL_DATA_MASK);
  2477. writel(0, &ioc->chip->HostInterruptStatus);
  2478. }
  2479. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2480. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2481. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2482. " (line=%d)\n", ioc->name, __LINE__));
  2483. }
  2484. writel(0, &ioc->chip->HostInterruptStatus);
  2485. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2486. mfp = (u32 *)reply;
  2487. printk(KERN_INFO "\toffset:data\n");
  2488. for (i = 0; i < reply_bytes/4; i++)
  2489. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2490. le32_to_cpu(mfp[i]));
  2491. }
  2492. return 0;
  2493. }
  2494. /**
  2495. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2496. * @ioc: per adapter object
  2497. * @mpi_reply: the reply payload from FW
  2498. * @mpi_request: the request payload sent to FW
  2499. *
  2500. * The SAS IO Unit Control Request message allows the host to perform low-level
  2501. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2502. * to obtain the IOC assigned device handles for a device if it has other
  2503. * identifying information about the device, in addition allows the host to
  2504. * remove IOC resources associated with the device.
  2505. *
  2506. * Returns 0 for success, non-zero for failure.
  2507. */
  2508. int
  2509. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2510. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2511. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2512. {
  2513. u16 smid;
  2514. u32 ioc_state;
  2515. unsigned long timeleft;
  2516. u8 issue_reset;
  2517. int rc;
  2518. void *request;
  2519. u16 wait_state_count;
  2520. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2521. __func__));
  2522. mutex_lock(&ioc->base_cmds.mutex);
  2523. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2524. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2525. ioc->name, __func__);
  2526. rc = -EAGAIN;
  2527. goto out;
  2528. }
  2529. wait_state_count = 0;
  2530. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2531. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2532. if (wait_state_count++ == 10) {
  2533. printk(MPT2SAS_ERR_FMT
  2534. "%s: failed due to ioc not operational\n",
  2535. ioc->name, __func__);
  2536. rc = -EFAULT;
  2537. goto out;
  2538. }
  2539. ssleep(1);
  2540. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2541. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2542. "operational state(count=%d)\n", ioc->name,
  2543. __func__, wait_state_count);
  2544. }
  2545. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2546. if (!smid) {
  2547. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2548. ioc->name, __func__);
  2549. rc = -EAGAIN;
  2550. goto out;
  2551. }
  2552. rc = 0;
  2553. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2554. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2555. ioc->base_cmds.smid = smid;
  2556. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2557. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2558. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2559. ioc->ioc_link_reset_in_progress = 1;
  2560. mpt2sas_base_put_smid_default(ioc, smid);
  2561. init_completion(&ioc->base_cmds.done);
  2562. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2563. msecs_to_jiffies(10000));
  2564. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2565. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2566. ioc->ioc_link_reset_in_progress)
  2567. ioc->ioc_link_reset_in_progress = 0;
  2568. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2569. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2570. ioc->name, __func__);
  2571. _debug_dump_mf(mpi_request,
  2572. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2573. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2574. issue_reset = 1;
  2575. goto issue_host_reset;
  2576. }
  2577. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2578. memcpy(mpi_reply, ioc->base_cmds.reply,
  2579. sizeof(Mpi2SasIoUnitControlReply_t));
  2580. else
  2581. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2582. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2583. goto out;
  2584. issue_host_reset:
  2585. if (issue_reset)
  2586. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2587. FORCE_BIG_HAMMER);
  2588. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2589. rc = -EFAULT;
  2590. out:
  2591. mutex_unlock(&ioc->base_cmds.mutex);
  2592. return rc;
  2593. }
  2594. /**
  2595. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2596. * @ioc: per adapter object
  2597. * @mpi_reply: the reply payload from FW
  2598. * @mpi_request: the request payload sent to FW
  2599. *
  2600. * The SCSI Enclosure Processor request message causes the IOC to
  2601. * communicate with SES devices to control LED status signals.
  2602. *
  2603. * Returns 0 for success, non-zero for failure.
  2604. */
  2605. int
  2606. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2607. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2608. {
  2609. u16 smid;
  2610. u32 ioc_state;
  2611. unsigned long timeleft;
  2612. u8 issue_reset;
  2613. int rc;
  2614. void *request;
  2615. u16 wait_state_count;
  2616. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2617. __func__));
  2618. mutex_lock(&ioc->base_cmds.mutex);
  2619. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2620. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2621. ioc->name, __func__);
  2622. rc = -EAGAIN;
  2623. goto out;
  2624. }
  2625. wait_state_count = 0;
  2626. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2627. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2628. if (wait_state_count++ == 10) {
  2629. printk(MPT2SAS_ERR_FMT
  2630. "%s: failed due to ioc not operational\n",
  2631. ioc->name, __func__);
  2632. rc = -EFAULT;
  2633. goto out;
  2634. }
  2635. ssleep(1);
  2636. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2637. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2638. "operational state(count=%d)\n", ioc->name,
  2639. __func__, wait_state_count);
  2640. }
  2641. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2642. if (!smid) {
  2643. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2644. ioc->name, __func__);
  2645. rc = -EAGAIN;
  2646. goto out;
  2647. }
  2648. rc = 0;
  2649. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2650. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2651. ioc->base_cmds.smid = smid;
  2652. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2653. mpt2sas_base_put_smid_default(ioc, smid);
  2654. init_completion(&ioc->base_cmds.done);
  2655. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2656. msecs_to_jiffies(10000));
  2657. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2658. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2659. ioc->name, __func__);
  2660. _debug_dump_mf(mpi_request,
  2661. sizeof(Mpi2SepRequest_t)/4);
  2662. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2663. issue_reset = 1;
  2664. goto issue_host_reset;
  2665. }
  2666. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2667. memcpy(mpi_reply, ioc->base_cmds.reply,
  2668. sizeof(Mpi2SepReply_t));
  2669. else
  2670. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2671. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2672. goto out;
  2673. issue_host_reset:
  2674. if (issue_reset)
  2675. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2676. FORCE_BIG_HAMMER);
  2677. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2678. rc = -EFAULT;
  2679. out:
  2680. mutex_unlock(&ioc->base_cmds.mutex);
  2681. return rc;
  2682. }
  2683. /**
  2684. * _base_get_port_facts - obtain port facts reply and save in ioc
  2685. * @ioc: per adapter object
  2686. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2687. *
  2688. * Returns 0 for success, non-zero for failure.
  2689. */
  2690. static int
  2691. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2692. {
  2693. Mpi2PortFactsRequest_t mpi_request;
  2694. Mpi2PortFactsReply_t mpi_reply, *pfacts;
  2695. int mpi_reply_sz, mpi_request_sz, r;
  2696. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2697. __func__));
  2698. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2699. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2700. memset(&mpi_request, 0, mpi_request_sz);
  2701. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2702. mpi_request.PortNumber = port;
  2703. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2704. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2705. if (r != 0) {
  2706. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2707. ioc->name, __func__, r);
  2708. return r;
  2709. }
  2710. pfacts = &ioc->pfacts[port];
  2711. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  2712. pfacts->PortNumber = mpi_reply.PortNumber;
  2713. pfacts->VP_ID = mpi_reply.VP_ID;
  2714. pfacts->VF_ID = mpi_reply.VF_ID;
  2715. pfacts->MaxPostedCmdBuffers =
  2716. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  2717. return 0;
  2718. }
  2719. /**
  2720. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  2721. * @ioc: per adapter object
  2722. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2723. *
  2724. * Returns 0 for success, non-zero for failure.
  2725. */
  2726. static int
  2727. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2728. {
  2729. Mpi2IOCFactsRequest_t mpi_request;
  2730. Mpi2IOCFactsReply_t mpi_reply, *facts;
  2731. int mpi_reply_sz, mpi_request_sz, r;
  2732. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2733. __func__));
  2734. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  2735. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  2736. memset(&mpi_request, 0, mpi_request_sz);
  2737. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  2738. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2739. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2740. if (r != 0) {
  2741. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2742. ioc->name, __func__, r);
  2743. return r;
  2744. }
  2745. facts = &ioc->facts;
  2746. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  2747. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  2748. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  2749. facts->VP_ID = mpi_reply.VP_ID;
  2750. facts->VF_ID = mpi_reply.VF_ID;
  2751. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  2752. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  2753. facts->WhoInit = mpi_reply.WhoInit;
  2754. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  2755. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  2756. facts->MaxReplyDescriptorPostQueueDepth =
  2757. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  2758. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  2759. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  2760. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  2761. ioc->ir_firmware = 1;
  2762. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  2763. facts->IOCRequestFrameSize =
  2764. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  2765. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  2766. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  2767. ioc->shost->max_id = -1;
  2768. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  2769. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  2770. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  2771. facts->HighPriorityCredit =
  2772. le16_to_cpu(mpi_reply.HighPriorityCredit);
  2773. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  2774. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  2775. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  2776. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  2777. facts->MaxChainDepth));
  2778. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  2779. "reply frame size(%d)\n", ioc->name,
  2780. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  2781. return 0;
  2782. }
  2783. /**
  2784. * _base_send_ioc_init - send ioc_init to firmware
  2785. * @ioc: per adapter object
  2786. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2787. *
  2788. * Returns 0 for success, non-zero for failure.
  2789. */
  2790. static int
  2791. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2792. {
  2793. Mpi2IOCInitRequest_t mpi_request;
  2794. Mpi2IOCInitReply_t mpi_reply;
  2795. int r;
  2796. struct timeval current_time;
  2797. u16 ioc_status;
  2798. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2799. __func__));
  2800. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  2801. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  2802. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  2803. mpi_request.VF_ID = 0; /* TODO */
  2804. mpi_request.VP_ID = 0;
  2805. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  2806. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  2807. /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
  2808. * removed and made reserved. For those with older firmware will need
  2809. * this fix. It was decided that the Reply and Request frame sizes are
  2810. * the same.
  2811. */
  2812. if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
  2813. mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
  2814. /* mpi_request.SystemReplyFrameSize =
  2815. * cpu_to_le16(ioc->reply_sz);
  2816. */
  2817. }
  2818. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  2819. mpi_request.ReplyDescriptorPostQueueDepth =
  2820. cpu_to_le16(ioc->reply_post_queue_depth);
  2821. mpi_request.ReplyFreeQueueDepth =
  2822. cpu_to_le16(ioc->reply_free_queue_depth);
  2823. #if BITS_PER_LONG > 32
  2824. mpi_request.SenseBufferAddressHigh =
  2825. cpu_to_le32(ioc->sense_dma >> 32);
  2826. mpi_request.SystemReplyAddressHigh =
  2827. cpu_to_le32(ioc->reply_dma >> 32);
  2828. mpi_request.SystemRequestFrameBaseAddress =
  2829. cpu_to_le64(ioc->request_dma);
  2830. mpi_request.ReplyFreeQueueAddress =
  2831. cpu_to_le64(ioc->reply_free_dma);
  2832. mpi_request.ReplyDescriptorPostQueueAddress =
  2833. cpu_to_le64(ioc->reply_post_free_dma);
  2834. #else
  2835. mpi_request.SystemRequestFrameBaseAddress =
  2836. cpu_to_le32(ioc->request_dma);
  2837. mpi_request.ReplyFreeQueueAddress =
  2838. cpu_to_le32(ioc->reply_free_dma);
  2839. mpi_request.ReplyDescriptorPostQueueAddress =
  2840. cpu_to_le32(ioc->reply_post_free_dma);
  2841. #endif
  2842. /* This time stamp specifies number of milliseconds
  2843. * since epoch ~ midnight January 1, 1970.
  2844. */
  2845. do_gettimeofday(&current_time);
  2846. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  2847. (current_time.tv_usec / 1000));
  2848. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2849. u32 *mfp;
  2850. int i;
  2851. mfp = (u32 *)&mpi_request;
  2852. printk(KERN_INFO "\toffset:data\n");
  2853. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  2854. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2855. le32_to_cpu(mfp[i]));
  2856. }
  2857. r = _base_handshake_req_reply_wait(ioc,
  2858. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  2859. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  2860. sleep_flag);
  2861. if (r != 0) {
  2862. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2863. ioc->name, __func__, r);
  2864. return r;
  2865. }
  2866. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  2867. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  2868. mpi_reply.IOCLogInfo) {
  2869. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  2870. r = -EIO;
  2871. }
  2872. return 0;
  2873. }
  2874. /**
  2875. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  2876. * @ioc: per adapter object
  2877. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2878. *
  2879. * Returns 0 for success, non-zero for failure.
  2880. */
  2881. static int
  2882. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2883. {
  2884. Mpi2PortEnableRequest_t *mpi_request;
  2885. u32 ioc_state;
  2886. unsigned long timeleft;
  2887. int r = 0;
  2888. u16 smid;
  2889. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  2890. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2891. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2892. ioc->name, __func__);
  2893. return -EAGAIN;
  2894. }
  2895. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2896. if (!smid) {
  2897. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2898. ioc->name, __func__);
  2899. return -EAGAIN;
  2900. }
  2901. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2902. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2903. ioc->base_cmds.smid = smid;
  2904. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  2905. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  2906. mpi_request->VF_ID = 0; /* TODO */
  2907. mpi_request->VP_ID = 0;
  2908. mpt2sas_base_put_smid_default(ioc, smid);
  2909. init_completion(&ioc->base_cmds.done);
  2910. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2911. 300*HZ);
  2912. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2913. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2914. ioc->name, __func__);
  2915. _debug_dump_mf(mpi_request,
  2916. sizeof(Mpi2PortEnableRequest_t)/4);
  2917. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2918. r = -EFAULT;
  2919. else
  2920. r = -ETIME;
  2921. goto out;
  2922. } else
  2923. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  2924. ioc->name, __func__));
  2925. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
  2926. 60, sleep_flag);
  2927. if (ioc_state) {
  2928. printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
  2929. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2930. r = -EFAULT;
  2931. }
  2932. out:
  2933. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2934. printk(MPT2SAS_INFO_FMT "port enable: %s\n",
  2935. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2936. return r;
  2937. }
  2938. /**
  2939. * _base_unmask_events - turn on notification for this event
  2940. * @ioc: per adapter object
  2941. * @event: firmware event
  2942. *
  2943. * The mask is stored in ioc->event_masks.
  2944. */
  2945. static void
  2946. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  2947. {
  2948. u32 desired_event;
  2949. if (event >= 128)
  2950. return;
  2951. desired_event = (1 << (event % 32));
  2952. if (event < 32)
  2953. ioc->event_masks[0] &= ~desired_event;
  2954. else if (event < 64)
  2955. ioc->event_masks[1] &= ~desired_event;
  2956. else if (event < 96)
  2957. ioc->event_masks[2] &= ~desired_event;
  2958. else if (event < 128)
  2959. ioc->event_masks[3] &= ~desired_event;
  2960. }
  2961. /**
  2962. * _base_event_notification - send event notification
  2963. * @ioc: per adapter object
  2964. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2965. *
  2966. * Returns 0 for success, non-zero for failure.
  2967. */
  2968. static int
  2969. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2970. {
  2971. Mpi2EventNotificationRequest_t *mpi_request;
  2972. unsigned long timeleft;
  2973. u16 smid;
  2974. int r = 0;
  2975. int i;
  2976. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2977. __func__));
  2978. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2979. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2980. ioc->name, __func__);
  2981. return -EAGAIN;
  2982. }
  2983. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2984. if (!smid) {
  2985. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2986. ioc->name, __func__);
  2987. return -EAGAIN;
  2988. }
  2989. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2990. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2991. ioc->base_cmds.smid = smid;
  2992. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  2993. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  2994. mpi_request->VF_ID = 0; /* TODO */
  2995. mpi_request->VP_ID = 0;
  2996. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2997. mpi_request->EventMasks[i] =
  2998. cpu_to_le32(ioc->event_masks[i]);
  2999. mpt2sas_base_put_smid_default(ioc, smid);
  3000. init_completion(&ioc->base_cmds.done);
  3001. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  3002. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3003. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3004. ioc->name, __func__);
  3005. _debug_dump_mf(mpi_request,
  3006. sizeof(Mpi2EventNotificationRequest_t)/4);
  3007. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  3008. r = -EFAULT;
  3009. else
  3010. r = -ETIME;
  3011. } else
  3012. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3013. ioc->name, __func__));
  3014. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3015. return r;
  3016. }
  3017. /**
  3018. * mpt2sas_base_validate_event_type - validating event types
  3019. * @ioc: per adapter object
  3020. * @event: firmware event
  3021. *
  3022. * This will turn on firmware event notification when application
  3023. * ask for that event. We don't mask events that are already enabled.
  3024. */
  3025. void
  3026. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  3027. {
  3028. int i, j;
  3029. u32 event_mask, desired_event;
  3030. u8 send_update_to_fw;
  3031. for (i = 0, send_update_to_fw = 0; i <
  3032. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  3033. event_mask = ~event_type[i];
  3034. desired_event = 1;
  3035. for (j = 0; j < 32; j++) {
  3036. if (!(event_mask & desired_event) &&
  3037. (ioc->event_masks[i] & desired_event)) {
  3038. ioc->event_masks[i] &= ~desired_event;
  3039. send_update_to_fw = 1;
  3040. }
  3041. desired_event = (desired_event << 1);
  3042. }
  3043. }
  3044. if (!send_update_to_fw)
  3045. return;
  3046. mutex_lock(&ioc->base_cmds.mutex);
  3047. _base_event_notification(ioc, CAN_SLEEP);
  3048. mutex_unlock(&ioc->base_cmds.mutex);
  3049. }
  3050. /**
  3051. * _base_diag_reset - the "big hammer" start of day reset
  3052. * @ioc: per adapter object
  3053. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3054. *
  3055. * Returns 0 for success, non-zero for failure.
  3056. */
  3057. static int
  3058. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3059. {
  3060. u32 host_diagnostic;
  3061. u32 ioc_state;
  3062. u32 count;
  3063. u32 hcb_size;
  3064. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3065. _base_save_msix_table(ioc);
  3066. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3067. ioc->name));
  3068. count = 0;
  3069. do {
  3070. /* Write magic sequence to WriteSequence register
  3071. * Loop until in diagnostic mode
  3072. */
  3073. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3074. "sequence\n", ioc->name));
  3075. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3076. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3077. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3078. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3079. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3080. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3081. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3082. /* wait 100 msec */
  3083. if (sleep_flag == CAN_SLEEP)
  3084. msleep(100);
  3085. else
  3086. mdelay(100);
  3087. if (count++ > 20)
  3088. goto out;
  3089. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3090. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3091. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3092. ioc->name, count, host_diagnostic));
  3093. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3094. hcb_size = readl(&ioc->chip->HCBSize);
  3095. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3096. ioc->name));
  3097. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3098. &ioc->chip->HostDiagnostic);
  3099. /* don't access any registers for 50 milliseconds */
  3100. msleep(50);
  3101. /* 300 second max wait */
  3102. for (count = 0; count < 3000000 ; count++) {
  3103. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3104. if (host_diagnostic == 0xFFFFFFFF)
  3105. goto out;
  3106. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3107. break;
  3108. /* wait 100 msec */
  3109. if (sleep_flag == CAN_SLEEP)
  3110. msleep(1);
  3111. else
  3112. mdelay(1);
  3113. }
  3114. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3115. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3116. "assuming the HCB Address points to good F/W\n",
  3117. ioc->name));
  3118. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3119. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3120. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3121. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3122. "re-enable the HCDW\n", ioc->name));
  3123. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3124. &ioc->chip->HCBSize);
  3125. }
  3126. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3127. ioc->name));
  3128. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3129. &ioc->chip->HostDiagnostic);
  3130. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3131. "diagnostic register\n", ioc->name));
  3132. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3133. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3134. "READY state\n", ioc->name));
  3135. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3136. sleep_flag);
  3137. if (ioc_state) {
  3138. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3139. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3140. goto out;
  3141. }
  3142. _base_restore_msix_table(ioc);
  3143. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3144. return 0;
  3145. out:
  3146. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3147. return -EFAULT;
  3148. }
  3149. /**
  3150. * _base_make_ioc_ready - put controller in READY state
  3151. * @ioc: per adapter object
  3152. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3153. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3154. *
  3155. * Returns 0 for success, non-zero for failure.
  3156. */
  3157. static int
  3158. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3159. enum reset_type type)
  3160. {
  3161. u32 ioc_state;
  3162. int rc;
  3163. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3164. __func__));
  3165. if (ioc->pci_error_recovery)
  3166. return 0;
  3167. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3168. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3169. ioc->name, __func__, ioc_state));
  3170. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3171. return 0;
  3172. if (ioc_state & MPI2_DOORBELL_USED) {
  3173. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3174. "active!\n", ioc->name));
  3175. goto issue_diag_reset;
  3176. }
  3177. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3178. mpt2sas_base_fault_info(ioc, ioc_state &
  3179. MPI2_DOORBELL_DATA_MASK);
  3180. goto issue_diag_reset;
  3181. }
  3182. if (type == FORCE_BIG_HAMMER)
  3183. goto issue_diag_reset;
  3184. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3185. if (!(_base_send_ioc_reset(ioc,
  3186. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3187. ioc->ioc_reset_count++;
  3188. return 0;
  3189. }
  3190. issue_diag_reset:
  3191. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3192. ioc->ioc_reset_count++;
  3193. return rc;
  3194. }
  3195. /**
  3196. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3197. * @ioc: per adapter object
  3198. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3199. *
  3200. * Returns 0 for success, non-zero for failure.
  3201. */
  3202. static int
  3203. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3204. {
  3205. int r, i;
  3206. unsigned long flags;
  3207. u32 reply_address;
  3208. u16 smid;
  3209. struct _tr_list *delayed_tr, *delayed_tr_next;
  3210. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3211. __func__));
  3212. /* clean the delayed target reset list */
  3213. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3214. &ioc->delayed_tr_list, list) {
  3215. list_del(&delayed_tr->list);
  3216. kfree(delayed_tr);
  3217. }
  3218. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3219. &ioc->delayed_tr_volume_list, list) {
  3220. list_del(&delayed_tr->list);
  3221. kfree(delayed_tr);
  3222. }
  3223. /* initialize the scsi lookup free list */
  3224. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3225. INIT_LIST_HEAD(&ioc->free_list);
  3226. smid = 1;
  3227. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3228. INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
  3229. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3230. ioc->scsi_lookup[i].smid = smid;
  3231. ioc->scsi_lookup[i].scmd = NULL;
  3232. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3233. &ioc->free_list);
  3234. }
  3235. /* hi-priority queue */
  3236. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3237. smid = ioc->hi_priority_smid;
  3238. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3239. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3240. ioc->hpr_lookup[i].smid = smid;
  3241. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3242. &ioc->hpr_free_list);
  3243. }
  3244. /* internal queue */
  3245. INIT_LIST_HEAD(&ioc->internal_free_list);
  3246. smid = ioc->internal_smid;
  3247. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3248. ioc->internal_lookup[i].cb_idx = 0xFF;
  3249. ioc->internal_lookup[i].smid = smid;
  3250. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3251. &ioc->internal_free_list);
  3252. }
  3253. /* chain pool */
  3254. INIT_LIST_HEAD(&ioc->free_chain_list);
  3255. for (i = 0; i < ioc->chain_depth; i++)
  3256. list_add_tail(&ioc->chain_lookup[i].tracker_list,
  3257. &ioc->free_chain_list);
  3258. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3259. /* initialize Reply Free Queue */
  3260. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3261. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3262. ioc->reply_sz)
  3263. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3264. /* initialize Reply Post Free Queue */
  3265. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3266. ioc->reply_post_free[i].Words = ULLONG_MAX;
  3267. r = _base_send_ioc_init(ioc, sleep_flag);
  3268. if (r)
  3269. return r;
  3270. /* initialize the index's */
  3271. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3272. ioc->reply_post_host_index = 0;
  3273. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3274. writel(0, &ioc->chip->ReplyPostHostIndex);
  3275. _base_unmask_interrupts(ioc);
  3276. r = _base_event_notification(ioc, sleep_flag);
  3277. if (r)
  3278. return r;
  3279. if (sleep_flag == CAN_SLEEP)
  3280. _base_static_config_pages(ioc);
  3281. if (ioc->wait_for_port_enable_to_complete) {
  3282. if (diag_buffer_enable != 0)
  3283. mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable);
  3284. if (disable_discovery > 0)
  3285. return r;
  3286. }
  3287. r = _base_send_port_enable(ioc, sleep_flag);
  3288. if (r)
  3289. return r;
  3290. return r;
  3291. }
  3292. /**
  3293. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3294. * @ioc: per adapter object
  3295. *
  3296. * Return nothing.
  3297. */
  3298. void
  3299. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3300. {
  3301. struct pci_dev *pdev = ioc->pdev;
  3302. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3303. __func__));
  3304. _base_mask_interrupts(ioc);
  3305. ioc->shost_recovery = 1;
  3306. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3307. ioc->shost_recovery = 0;
  3308. if (ioc->pci_irq) {
  3309. synchronize_irq(pdev->irq);
  3310. free_irq(ioc->pci_irq, ioc);
  3311. }
  3312. _base_disable_msix(ioc);
  3313. if (ioc->chip_phys)
  3314. iounmap(ioc->chip);
  3315. ioc->pci_irq = -1;
  3316. ioc->chip_phys = 0;
  3317. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3318. pci_disable_pcie_error_reporting(pdev);
  3319. pci_disable_device(pdev);
  3320. return;
  3321. }
  3322. /**
  3323. * mpt2sas_base_attach - attach controller instance
  3324. * @ioc: per adapter object
  3325. *
  3326. * Returns 0 for success, non-zero for failure.
  3327. */
  3328. int
  3329. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3330. {
  3331. int r, i;
  3332. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3333. __func__));
  3334. r = mpt2sas_base_map_resources(ioc);
  3335. if (r)
  3336. return r;
  3337. pci_set_drvdata(ioc->pdev, ioc->shost);
  3338. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3339. if (r)
  3340. goto out_free_resources;
  3341. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3342. if (r)
  3343. goto out_free_resources;
  3344. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3345. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  3346. if (!ioc->pfacts) {
  3347. r = -ENOMEM;
  3348. goto out_free_resources;
  3349. }
  3350. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3351. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3352. if (r)
  3353. goto out_free_resources;
  3354. }
  3355. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3356. if (r)
  3357. goto out_free_resources;
  3358. init_waitqueue_head(&ioc->reset_wq);
  3359. /* allocate memory pd handle bitmask list */
  3360. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3361. if (ioc->facts.MaxDevHandle % 8)
  3362. ioc->pd_handles_sz++;
  3363. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3364. GFP_KERNEL);
  3365. if (!ioc->pd_handles) {
  3366. r = -ENOMEM;
  3367. goto out_free_resources;
  3368. }
  3369. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3370. /* base internal command bits */
  3371. mutex_init(&ioc->base_cmds.mutex);
  3372. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3373. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3374. /* transport internal command bits */
  3375. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3376. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3377. mutex_init(&ioc->transport_cmds.mutex);
  3378. /* scsih internal command bits */
  3379. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3380. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3381. mutex_init(&ioc->scsih_cmds.mutex);
  3382. /* task management internal command bits */
  3383. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3384. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3385. mutex_init(&ioc->tm_cmds.mutex);
  3386. /* config page internal command bits */
  3387. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3388. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3389. mutex_init(&ioc->config_cmds.mutex);
  3390. /* ctl module internal command bits */
  3391. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3392. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3393. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3394. mutex_init(&ioc->ctl_cmds.mutex);
  3395. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3396. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3397. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3398. !ioc->ctl_cmds.sense) {
  3399. r = -ENOMEM;
  3400. goto out_free_resources;
  3401. }
  3402. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3403. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3404. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3405. r = -ENOMEM;
  3406. goto out_free_resources;
  3407. }
  3408. init_completion(&ioc->shost_recovery_done);
  3409. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3410. ioc->event_masks[i] = -1;
  3411. /* here we enable the events we care about */
  3412. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3413. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3414. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3415. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3416. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3417. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3418. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3419. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3420. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3421. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3422. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3423. if (r)
  3424. goto out_free_resources;
  3425. if (missing_delay[0] != -1 && missing_delay[1] != -1)
  3426. _base_update_missing_delay(ioc, missing_delay[0],
  3427. missing_delay[1]);
  3428. mpt2sas_base_start_watchdog(ioc);
  3429. return 0;
  3430. out_free_resources:
  3431. ioc->remove_host = 1;
  3432. mpt2sas_base_free_resources(ioc);
  3433. _base_release_memory_pools(ioc);
  3434. pci_set_drvdata(ioc->pdev, NULL);
  3435. kfree(ioc->pd_handles);
  3436. kfree(ioc->tm_cmds.reply);
  3437. kfree(ioc->transport_cmds.reply);
  3438. kfree(ioc->scsih_cmds.reply);
  3439. kfree(ioc->config_cmds.reply);
  3440. kfree(ioc->base_cmds.reply);
  3441. kfree(ioc->ctl_cmds.reply);
  3442. kfree(ioc->ctl_cmds.sense);
  3443. kfree(ioc->pfacts);
  3444. ioc->ctl_cmds.reply = NULL;
  3445. ioc->base_cmds.reply = NULL;
  3446. ioc->tm_cmds.reply = NULL;
  3447. ioc->scsih_cmds.reply = NULL;
  3448. ioc->transport_cmds.reply = NULL;
  3449. ioc->config_cmds.reply = NULL;
  3450. ioc->pfacts = NULL;
  3451. return r;
  3452. }
  3453. /**
  3454. * mpt2sas_base_detach - remove controller instance
  3455. * @ioc: per adapter object
  3456. *
  3457. * Return nothing.
  3458. */
  3459. void
  3460. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3461. {
  3462. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3463. __func__));
  3464. mpt2sas_base_stop_watchdog(ioc);
  3465. mpt2sas_base_free_resources(ioc);
  3466. _base_release_memory_pools(ioc);
  3467. pci_set_drvdata(ioc->pdev, NULL);
  3468. kfree(ioc->pd_handles);
  3469. kfree(ioc->pfacts);
  3470. kfree(ioc->ctl_cmds.reply);
  3471. kfree(ioc->ctl_cmds.sense);
  3472. kfree(ioc->base_cmds.reply);
  3473. kfree(ioc->tm_cmds.reply);
  3474. kfree(ioc->transport_cmds.reply);
  3475. kfree(ioc->scsih_cmds.reply);
  3476. kfree(ioc->config_cmds.reply);
  3477. }
  3478. /**
  3479. * _base_reset_handler - reset callback handler (for base)
  3480. * @ioc: per adapter object
  3481. * @reset_phase: phase
  3482. *
  3483. * The handler for doing any required cleanup or initialization.
  3484. *
  3485. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3486. * MPT2_IOC_DONE_RESET
  3487. *
  3488. * Return nothing.
  3489. */
  3490. static void
  3491. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3492. {
  3493. switch (reset_phase) {
  3494. case MPT2_IOC_PRE_RESET:
  3495. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3496. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3497. break;
  3498. case MPT2_IOC_AFTER_RESET:
  3499. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3500. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3501. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3502. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3503. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3504. complete(&ioc->transport_cmds.done);
  3505. }
  3506. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3507. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3508. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3509. complete(&ioc->base_cmds.done);
  3510. }
  3511. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3512. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3513. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3514. ioc->config_cmds.smid = USHRT_MAX;
  3515. complete(&ioc->config_cmds.done);
  3516. }
  3517. break;
  3518. case MPT2_IOC_DONE_RESET:
  3519. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3520. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3521. break;
  3522. }
  3523. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3524. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3525. }
  3526. /**
  3527. * _wait_for_commands_to_complete - reset controller
  3528. * @ioc: Pointer to MPT_ADAPTER structure
  3529. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3530. *
  3531. * This function waiting(3s) for all pending commands to complete
  3532. * prior to putting controller in reset.
  3533. */
  3534. static void
  3535. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3536. {
  3537. u32 ioc_state;
  3538. unsigned long flags;
  3539. u16 i;
  3540. ioc->pending_io_count = 0;
  3541. if (sleep_flag != CAN_SLEEP)
  3542. return;
  3543. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3544. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  3545. return;
  3546. /* pending command count */
  3547. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3548. for (i = 0; i < ioc->scsiio_depth; i++)
  3549. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  3550. ioc->pending_io_count++;
  3551. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3552. if (!ioc->pending_io_count)
  3553. return;
  3554. /* wait for pending commands to complete */
  3555. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  3556. }
  3557. /**
  3558. * mpt2sas_base_hard_reset_handler - reset controller
  3559. * @ioc: Pointer to MPT_ADAPTER structure
  3560. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3561. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3562. *
  3563. * Returns 0 for success, non-zero for failure.
  3564. */
  3565. int
  3566. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3567. enum reset_type type)
  3568. {
  3569. int r;
  3570. unsigned long flags;
  3571. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  3572. __func__));
  3573. if (ioc->pci_error_recovery) {
  3574. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  3575. ioc->name, __func__);
  3576. r = 0;
  3577. goto out;
  3578. }
  3579. if (mpt2sas_fwfault_debug)
  3580. mpt2sas_halt_firmware(ioc);
  3581. /* TODO - What we really should be doing is pulling
  3582. * out all the code associated with NO_SLEEP; its never used.
  3583. * That is legacy code from mpt fusion driver, ported over.
  3584. * I will leave this BUG_ON here for now till its been resolved.
  3585. */
  3586. BUG_ON(sleep_flag == NO_SLEEP);
  3587. /* wait for an active reset in progress to complete */
  3588. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  3589. do {
  3590. ssleep(1);
  3591. } while (ioc->shost_recovery == 1);
  3592. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  3593. __func__));
  3594. return ioc->ioc_reset_in_progress_status;
  3595. }
  3596. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3597. ioc->shost_recovery = 1;
  3598. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3599. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  3600. _wait_for_commands_to_complete(ioc, sleep_flag);
  3601. _base_mask_interrupts(ioc);
  3602. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  3603. if (r)
  3604. goto out;
  3605. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  3606. r = _base_make_ioc_operational(ioc, sleep_flag);
  3607. if (!r)
  3608. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  3609. out:
  3610. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  3611. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  3612. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3613. ioc->ioc_reset_in_progress_status = r;
  3614. ioc->shost_recovery = 0;
  3615. complete(&ioc->shost_recovery_done);
  3616. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3617. mutex_unlock(&ioc->reset_in_progress_mutex);
  3618. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  3619. __func__));
  3620. return r;
  3621. }