ad1889.c 27 KB

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  1. /* Analog Devices 1889 audio driver
  2. *
  3. * This is a driver for the AD1889 PCI audio chipset found
  4. * on the HP PA-RISC [BCJ]-xxx0 workstations.
  5. *
  6. * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org>
  7. * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org>
  8. * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License, version 2, as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. *
  23. * TODO:
  24. * Do we need to take care of CCS register?
  25. * Maybe we could use finer grained locking (separate locks for pb/cap)?
  26. * Wishlist:
  27. * Control Interface (mixer) support
  28. * Better AC97 support (VSR...)?
  29. * PM support
  30. * MIDI support
  31. * Game Port support
  32. * SG DMA support (this will need *alot* of work)
  33. */
  34. #include <linux/init.h>
  35. #include <linux/pci.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/slab.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/compiler.h>
  40. #include <linux/delay.h>
  41. #include <linux/dma-mapping.h>
  42. #include <sound/driver.h>
  43. #include <sound/core.h>
  44. #include <sound/pcm.h>
  45. #include <sound/initval.h>
  46. #include <sound/ac97_codec.h>
  47. #include <asm/io.h>
  48. #include "ad1889.h"
  49. #include "ac97/ac97_id.h"
  50. #define AD1889_DRVVER "Version: 1.7"
  51. MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>");
  52. MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
  53. MODULE_LICENSE("GPL");
  54. MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}");
  55. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  56. module_param_array(index, int, NULL, 0444);
  57. MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard.");
  58. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  59. module_param_array(id, charp, NULL, 0444);
  60. MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard.");
  61. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  62. module_param_array(enable, bool, NULL, 0444);
  63. MODULE_PARM_DESC(enable, "Enable AD1889 soundcard.");
  64. static char *ac97_quirk[SNDRV_CARDS];
  65. module_param_array(ac97_quirk, charp, NULL, 0444);
  66. MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
  67. #define DEVNAME "ad1889"
  68. #define PFX DEVNAME ": "
  69. /* let's use the global sound debug interfaces */
  70. #define ad1889_debug(fmt, arg...) snd_printd(KERN_DEBUG fmt, ## arg)
  71. /* keep track of some hw registers */
  72. struct ad1889_register_state {
  73. u16 reg; /* reg setup */
  74. u32 addr; /* dma base address */
  75. unsigned long size; /* DMA buffer size */
  76. };
  77. struct snd_ad1889 {
  78. struct snd_card *card;
  79. struct pci_dev *pci;
  80. int irq;
  81. unsigned long bar;
  82. void __iomem *iobase;
  83. struct snd_ac97 *ac97;
  84. struct snd_ac97_bus *ac97_bus;
  85. struct snd_pcm *pcm;
  86. struct snd_info_entry *proc;
  87. struct snd_pcm_substream *psubs;
  88. struct snd_pcm_substream *csubs;
  89. /* playback register state */
  90. struct ad1889_register_state wave;
  91. struct ad1889_register_state ramc;
  92. spinlock_t lock;
  93. };
  94. static inline u16
  95. ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
  96. {
  97. return readw(chip->iobase + reg);
  98. }
  99. static inline void
  100. ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
  101. {
  102. writew(val, chip->iobase + reg);
  103. }
  104. static inline u32
  105. ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
  106. {
  107. return readl(chip->iobase + reg);
  108. }
  109. static inline void
  110. ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
  111. {
  112. writel(val, chip->iobase + reg);
  113. }
  114. static inline void
  115. ad1889_unmute(struct snd_ad1889 *chip)
  116. {
  117. u16 st;
  118. st = ad1889_readw(chip, AD_DS_WADA) &
  119. ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM);
  120. ad1889_writew(chip, AD_DS_WADA, st);
  121. ad1889_readw(chip, AD_DS_WADA);
  122. }
  123. static inline void
  124. ad1889_mute(struct snd_ad1889 *chip)
  125. {
  126. u16 st;
  127. st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM;
  128. ad1889_writew(chip, AD_DS_WADA, st);
  129. ad1889_readw(chip, AD_DS_WADA);
  130. }
  131. static inline void
  132. ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address)
  133. {
  134. ad1889_writel(chip, AD_DMA_ADCBA, address);
  135. ad1889_writel(chip, AD_DMA_ADCCA, address);
  136. }
  137. static inline void
  138. ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count)
  139. {
  140. ad1889_writel(chip, AD_DMA_ADCBC, count);
  141. ad1889_writel(chip, AD_DMA_ADCCC, count);
  142. }
  143. static inline void
  144. ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count)
  145. {
  146. ad1889_writel(chip, AD_DMA_ADCIB, count);
  147. ad1889_writel(chip, AD_DMA_ADCIC, count);
  148. }
  149. static inline void
  150. ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address)
  151. {
  152. ad1889_writel(chip, AD_DMA_WAVBA, address);
  153. ad1889_writel(chip, AD_DMA_WAVCA, address);
  154. }
  155. static inline void
  156. ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count)
  157. {
  158. ad1889_writel(chip, AD_DMA_WAVBC, count);
  159. ad1889_writel(chip, AD_DMA_WAVCC, count);
  160. }
  161. static inline void
  162. ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count)
  163. {
  164. ad1889_writel(chip, AD_DMA_WAVIB, count);
  165. ad1889_writel(chip, AD_DMA_WAVIC, count);
  166. }
  167. static void
  168. ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel)
  169. {
  170. u16 reg;
  171. if (channel & AD_CHAN_WAV) {
  172. /* Disable wave channel */
  173. reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN;
  174. ad1889_writew(chip, AD_DS_WSMC, reg);
  175. chip->wave.reg = reg;
  176. /* disable IRQs */
  177. reg = ad1889_readw(chip, AD_DMA_WAV);
  178. reg &= AD_DMA_IM_DIS;
  179. reg &= ~AD_DMA_LOOP;
  180. ad1889_writew(chip, AD_DMA_WAV, reg);
  181. /* clear IRQ and address counters and pointers */
  182. ad1889_load_wave_buffer_address(chip, 0x0);
  183. ad1889_load_wave_buffer_count(chip, 0x0);
  184. ad1889_load_wave_interrupt_count(chip, 0x0);
  185. /* flush */
  186. ad1889_readw(chip, AD_DMA_WAV);
  187. }
  188. if (channel & AD_CHAN_ADC) {
  189. /* Disable ADC channel */
  190. reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN;
  191. ad1889_writew(chip, AD_DS_RAMC, reg);
  192. chip->ramc.reg = reg;
  193. reg = ad1889_readw(chip, AD_DMA_ADC);
  194. reg &= AD_DMA_IM_DIS;
  195. reg &= ~AD_DMA_LOOP;
  196. ad1889_writew(chip, AD_DMA_ADC, reg);
  197. ad1889_load_adc_buffer_address(chip, 0x0);
  198. ad1889_load_adc_buffer_count(chip, 0x0);
  199. ad1889_load_adc_interrupt_count(chip, 0x0);
  200. /* flush */
  201. ad1889_readw(chip, AD_DMA_ADC);
  202. }
  203. }
  204. static inline u16
  205. snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  206. {
  207. struct snd_ad1889 *chip = ac97->private_data;
  208. return ad1889_readw(chip, AD_AC97_BASE + reg);
  209. }
  210. static inline void
  211. snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
  212. {
  213. struct snd_ad1889 *chip = ac97->private_data;
  214. ad1889_writew(chip, AD_AC97_BASE + reg, val);
  215. }
  216. static int
  217. snd_ad1889_ac97_ready(struct snd_ad1889 *chip)
  218. {
  219. int retry = 400; /* average needs 352 msec */
  220. while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY)
  221. && --retry)
  222. mdelay(1);
  223. if (!retry) {
  224. snd_printk(KERN_ERR PFX "[%s] Link is not ready.\n",
  225. __FUNCTION__);
  226. return -EIO;
  227. }
  228. ad1889_debug("[%s] ready after %d ms\n", __FUNCTION__, 400 - retry);
  229. return 0;
  230. }
  231. static int
  232. snd_ad1889_hw_params(struct snd_pcm_substream *substream,
  233. struct snd_pcm_hw_params *hw_params)
  234. {
  235. return snd_pcm_lib_malloc_pages(substream,
  236. params_buffer_bytes(hw_params));
  237. }
  238. static int
  239. snd_ad1889_hw_free(struct snd_pcm_substream *substream)
  240. {
  241. return snd_pcm_lib_free_pages(substream);
  242. }
  243. static struct snd_pcm_hardware snd_ad1889_playback_hw = {
  244. .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  245. SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
  246. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  247. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  248. .rate_min = 8000, /* docs say 7000, but we're lazy */
  249. .rate_max = 48000,
  250. .channels_min = 1,
  251. .channels_max = 2,
  252. .buffer_bytes_max = BUFFER_BYTES_MAX,
  253. .period_bytes_min = PERIOD_BYTES_MIN,
  254. .period_bytes_max = PERIOD_BYTES_MAX,
  255. .periods_min = PERIODS_MIN,
  256. .periods_max = PERIODS_MAX,
  257. /*.fifo_size = 0,*/
  258. };
  259. static struct snd_pcm_hardware snd_ad1889_capture_hw = {
  260. .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  261. SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
  262. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  263. .rates = SNDRV_PCM_RATE_48000,
  264. .rate_min = 48000, /* docs say we could to VSR, but we're lazy */
  265. .rate_max = 48000,
  266. .channels_min = 1,
  267. .channels_max = 2,
  268. .buffer_bytes_max = BUFFER_BYTES_MAX,
  269. .period_bytes_min = PERIOD_BYTES_MIN,
  270. .period_bytes_max = PERIOD_BYTES_MAX,
  271. .periods_min = PERIODS_MIN,
  272. .periods_max = PERIODS_MAX,
  273. /*.fifo_size = 0,*/
  274. };
  275. static int
  276. snd_ad1889_playback_open(struct snd_pcm_substream *ss)
  277. {
  278. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  279. struct snd_pcm_runtime *rt = ss->runtime;
  280. chip->psubs = ss;
  281. rt->hw = snd_ad1889_playback_hw;
  282. return 0;
  283. }
  284. static int
  285. snd_ad1889_capture_open(struct snd_pcm_substream *ss)
  286. {
  287. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  288. struct snd_pcm_runtime *rt = ss->runtime;
  289. chip->csubs = ss;
  290. rt->hw = snd_ad1889_capture_hw;
  291. return 0;
  292. }
  293. static int
  294. snd_ad1889_playback_close(struct snd_pcm_substream *ss)
  295. {
  296. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  297. chip->psubs = NULL;
  298. return 0;
  299. }
  300. static int
  301. snd_ad1889_capture_close(struct snd_pcm_substream *ss)
  302. {
  303. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  304. chip->csubs = NULL;
  305. return 0;
  306. }
  307. static int
  308. snd_ad1889_playback_prepare(struct snd_pcm_substream *ss)
  309. {
  310. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  311. struct snd_pcm_runtime *rt = ss->runtime;
  312. unsigned int size = snd_pcm_lib_buffer_bytes(ss);
  313. unsigned int count = snd_pcm_lib_period_bytes(ss);
  314. u16 reg;
  315. ad1889_channel_reset(chip, AD_CHAN_WAV);
  316. reg = ad1889_readw(chip, AD_DS_WSMC);
  317. /* Mask out 16-bit / Stereo */
  318. reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST);
  319. if (snd_pcm_format_width(rt->format) == 16)
  320. reg |= AD_DS_WSMC_WA16;
  321. if (rt->channels > 1)
  322. reg |= AD_DS_WSMC_WAST;
  323. /* let's make sure we don't clobber ourselves */
  324. spin_lock_irq(&chip->lock);
  325. chip->wave.size = size;
  326. chip->wave.reg = reg;
  327. chip->wave.addr = rt->dma_addr;
  328. ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg);
  329. /* Set sample rates on the codec */
  330. ad1889_writew(chip, AD_DS_WAS, rt->rate);
  331. /* Set up DMA */
  332. ad1889_load_wave_buffer_address(chip, chip->wave.addr);
  333. ad1889_load_wave_buffer_count(chip, size);
  334. ad1889_load_wave_interrupt_count(chip, count);
  335. /* writes flush */
  336. ad1889_readw(chip, AD_DS_WSMC);
  337. spin_unlock_irq(&chip->lock);
  338. ad1889_debug("prepare playback: addr = 0x%x, count = %u, "
  339. "size = %u, reg = 0x%x, rate = %u\n", chip->wave.addr,
  340. count, size, reg, rt->rate);
  341. return 0;
  342. }
  343. static int
  344. snd_ad1889_capture_prepare(struct snd_pcm_substream *ss)
  345. {
  346. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  347. struct snd_pcm_runtime *rt = ss->runtime;
  348. unsigned int size = snd_pcm_lib_buffer_bytes(ss);
  349. unsigned int count = snd_pcm_lib_period_bytes(ss);
  350. u16 reg;
  351. ad1889_channel_reset(chip, AD_CHAN_ADC);
  352. reg = ad1889_readw(chip, AD_DS_RAMC);
  353. /* Mask out 16-bit / Stereo */
  354. reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST);
  355. if (snd_pcm_format_width(rt->format) == 16)
  356. reg |= AD_DS_RAMC_AD16;
  357. if (rt->channels > 1)
  358. reg |= AD_DS_RAMC_ADST;
  359. /* let's make sure we don't clobber ourselves */
  360. spin_lock_irq(&chip->lock);
  361. chip->ramc.size = size;
  362. chip->ramc.reg = reg;
  363. chip->ramc.addr = rt->dma_addr;
  364. ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg);
  365. /* Set up DMA */
  366. ad1889_load_adc_buffer_address(chip, chip->ramc.addr);
  367. ad1889_load_adc_buffer_count(chip, size);
  368. ad1889_load_adc_interrupt_count(chip, count);
  369. /* writes flush */
  370. ad1889_readw(chip, AD_DS_RAMC);
  371. spin_unlock_irq(&chip->lock);
  372. ad1889_debug("prepare capture: addr = 0x%x, count = %u, "
  373. "size = %u, reg = 0x%x, rate = %u\n", chip->ramc.addr,
  374. count, size, reg, rt->rate);
  375. return 0;
  376. }
  377. /* this is called in atomic context with IRQ disabled.
  378. Must be as fast as possible and not sleep.
  379. DMA should be *triggered* by this call.
  380. The WSMC "WAEN" bit triggers DMA Wave On/Off */
  381. static int
  382. snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd)
  383. {
  384. u16 wsmc;
  385. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  386. wsmc = ad1889_readw(chip, AD_DS_WSMC);
  387. switch (cmd) {
  388. case SNDRV_PCM_TRIGGER_START:
  389. /* enable DMA loop & interrupts */
  390. ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT);
  391. wsmc |= AD_DS_WSMC_WAEN;
  392. /* 1 to clear CHSS bit */
  393. ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS);
  394. ad1889_unmute(chip);
  395. break;
  396. case SNDRV_PCM_TRIGGER_STOP:
  397. ad1889_mute(chip);
  398. wsmc &= ~AD_DS_WSMC_WAEN;
  399. break;
  400. default:
  401. snd_BUG();
  402. return -EINVAL;
  403. }
  404. chip->wave.reg = wsmc;
  405. ad1889_writew(chip, AD_DS_WSMC, wsmc);
  406. ad1889_readw(chip, AD_DS_WSMC); /* flush */
  407. /* reset the chip when STOP - will disable IRQs */
  408. if (cmd == SNDRV_PCM_TRIGGER_STOP)
  409. ad1889_channel_reset(chip, AD_CHAN_WAV);
  410. return 0;
  411. }
  412. /* this is called in atomic context with IRQ disabled.
  413. Must be as fast as possible and not sleep.
  414. DMA should be *triggered* by this call.
  415. The RAMC "ADEN" bit triggers DMA ADC On/Off */
  416. static int
  417. snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd)
  418. {
  419. u16 ramc;
  420. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  421. ramc = ad1889_readw(chip, AD_DS_RAMC);
  422. switch (cmd) {
  423. case SNDRV_PCM_TRIGGER_START:
  424. /* enable DMA loop & interrupts */
  425. ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT);
  426. ramc |= AD_DS_RAMC_ADEN;
  427. /* 1 to clear CHSS bit */
  428. ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS);
  429. break;
  430. case SNDRV_PCM_TRIGGER_STOP:
  431. ramc &= ~AD_DS_RAMC_ADEN;
  432. break;
  433. default:
  434. return -EINVAL;
  435. }
  436. chip->ramc.reg = ramc;
  437. ad1889_writew(chip, AD_DS_RAMC, ramc);
  438. ad1889_readw(chip, AD_DS_RAMC); /* flush */
  439. /* reset the chip when STOP - will disable IRQs */
  440. if (cmd == SNDRV_PCM_TRIGGER_STOP)
  441. ad1889_channel_reset(chip, AD_CHAN_ADC);
  442. return 0;
  443. }
  444. /* Called in atomic context with IRQ disabled */
  445. static snd_pcm_uframes_t
  446. snd_ad1889_playback_pointer(struct snd_pcm_substream *ss)
  447. {
  448. size_t ptr = 0;
  449. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  450. if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN)))
  451. return 0;
  452. ptr = ad1889_readl(chip, AD_DMA_WAVCA);
  453. ptr -= chip->wave.addr;
  454. snd_assert((ptr >= 0) && (ptr < chip->wave.size), return 0);
  455. return bytes_to_frames(ss->runtime, ptr);
  456. }
  457. /* Called in atomic context with IRQ disabled */
  458. static snd_pcm_uframes_t
  459. snd_ad1889_capture_pointer(struct snd_pcm_substream *ss)
  460. {
  461. size_t ptr = 0;
  462. struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
  463. if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN)))
  464. return 0;
  465. ptr = ad1889_readl(chip, AD_DMA_ADCCA);
  466. ptr -= chip->ramc.addr;
  467. snd_assert((ptr >= 0) && (ptr < chip->ramc.size), return 0);
  468. return bytes_to_frames(ss->runtime, ptr);
  469. }
  470. static struct snd_pcm_ops snd_ad1889_playback_ops = {
  471. .open = snd_ad1889_playback_open,
  472. .close = snd_ad1889_playback_close,
  473. .ioctl = snd_pcm_lib_ioctl,
  474. .hw_params = snd_ad1889_hw_params,
  475. .hw_free = snd_ad1889_hw_free,
  476. .prepare = snd_ad1889_playback_prepare,
  477. .trigger = snd_ad1889_playback_trigger,
  478. .pointer = snd_ad1889_playback_pointer,
  479. };
  480. static struct snd_pcm_ops snd_ad1889_capture_ops = {
  481. .open = snd_ad1889_capture_open,
  482. .close = snd_ad1889_capture_close,
  483. .ioctl = snd_pcm_lib_ioctl,
  484. .hw_params = snd_ad1889_hw_params,
  485. .hw_free = snd_ad1889_hw_free,
  486. .prepare = snd_ad1889_capture_prepare,
  487. .trigger = snd_ad1889_capture_trigger,
  488. .pointer = snd_ad1889_capture_pointer,
  489. };
  490. static irqreturn_t
  491. snd_ad1889_interrupt(int irq,
  492. void *dev_id,
  493. struct pt_regs *regs)
  494. {
  495. unsigned long st;
  496. struct snd_ad1889 *chip = dev_id;
  497. st = ad1889_readl(chip, AD_DMA_DISR);
  498. /* clear ISR */
  499. ad1889_writel(chip, AD_DMA_DISR, st);
  500. st &= AD_INTR_MASK;
  501. if (unlikely(!st))
  502. return IRQ_NONE;
  503. if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI))
  504. ad1889_debug("Unexpected master or target abort interrupt!\n");
  505. if ((st & AD_DMA_DISR_WAVI) && chip->psubs)
  506. snd_pcm_period_elapsed(chip->psubs);
  507. if ((st & AD_DMA_DISR_ADCI) && chip->csubs)
  508. snd_pcm_period_elapsed(chip->csubs);
  509. return IRQ_HANDLED;
  510. }
  511. static int __devinit
  512. snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device, struct snd_pcm **rpcm)
  513. {
  514. int err;
  515. struct snd_pcm *pcm;
  516. if (rpcm)
  517. *rpcm = NULL;
  518. err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm);
  519. if (err < 0)
  520. return err;
  521. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  522. &snd_ad1889_playback_ops);
  523. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  524. &snd_ad1889_capture_ops);
  525. pcm->private_data = chip;
  526. pcm->info_flags = 0;
  527. strcpy(pcm->name, chip->card->shortname);
  528. chip->pcm = pcm;
  529. chip->psubs = NULL;
  530. chip->csubs = NULL;
  531. err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  532. snd_dma_pci_data(chip->pci),
  533. BUFFER_BYTES_MAX / 2,
  534. BUFFER_BYTES_MAX);
  535. if (err < 0) {
  536. snd_printk(KERN_ERR PFX "buffer allocation error: %d\n", err);
  537. return err;
  538. }
  539. if (rpcm)
  540. *rpcm = pcm;
  541. return 0;
  542. }
  543. static void
  544. snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  545. {
  546. struct snd_ad1889 *chip = entry->private_data;
  547. u16 reg;
  548. int tmp;
  549. reg = ad1889_readw(chip, AD_DS_WSMC);
  550. snd_iprintf(buffer, "Wave output: %s\n",
  551. (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled");
  552. snd_iprintf(buffer, "Wave Channels: %s\n",
  553. (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
  554. snd_iprintf(buffer, "Wave Quality: %d-bit linear\n",
  555. (reg & AD_DS_WSMC_WA16) ? 16 : 8);
  556. /* WARQ is at offset 12 */
  557. tmp = (reg & AD_DS_WSMC_WARQ) ?
  558. (((reg & AD_DS_WSMC_WARQ >> 12) & 0x01) ? 12 : 18) : 4;
  559. tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
  560. snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp,
  561. (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
  562. snd_iprintf(buffer, "Synthesis output: %s\n",
  563. reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled");
  564. /* SYRQ is at offset 4 */
  565. tmp = (reg & AD_DS_WSMC_SYRQ) ?
  566. (((reg & AD_DS_WSMC_SYRQ >> 4) & 0x01) ? 12 : 18) : 4;
  567. tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
  568. snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp,
  569. (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
  570. reg = ad1889_readw(chip, AD_DS_RAMC);
  571. snd_iprintf(buffer, "ADC input: %s\n",
  572. (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled");
  573. snd_iprintf(buffer, "ADC Channels: %s\n",
  574. (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
  575. snd_iprintf(buffer, "ADC Quality: %d-bit linear\n",
  576. (reg & AD_DS_RAMC_AD16) ? 16 : 8);
  577. /* ACRQ is at offset 4 */
  578. tmp = (reg & AD_DS_RAMC_ACRQ) ?
  579. (((reg & AD_DS_RAMC_ACRQ >> 4) & 0x01) ? 12 : 18) : 4;
  580. tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
  581. snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp,
  582. (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
  583. snd_iprintf(buffer, "Resampler input: %s\n",
  584. reg & AD_DS_RAMC_REEN ? "enabled" : "disabled");
  585. /* RERQ is at offset 12 */
  586. tmp = (reg & AD_DS_RAMC_RERQ) ?
  587. (((reg & AD_DS_RAMC_RERQ >> 12) & 0x01) ? 12 : 18) : 4;
  588. tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
  589. snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp,
  590. (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
  591. /* doc says LSB represents -1.5dB, but the max value (-94.5dB)
  592. suggests that LSB is -3dB, which is more coherent with the logarithmic
  593. nature of the dB scale */
  594. reg = ad1889_readw(chip, AD_DS_WADA);
  595. snd_iprintf(buffer, "Left: %s, -%d dB\n",
  596. (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute",
  597. ((reg & AD_DS_WADA_LWAA) >> 8) * 3);
  598. reg = ad1889_readw(chip, AD_DS_WADA);
  599. snd_iprintf(buffer, "Right: %s, -%d dB\n",
  600. (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute",
  601. ((reg & AD_DS_WADA_RWAA) >> 8) * 3);
  602. reg = ad1889_readw(chip, AD_DS_WAS);
  603. snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg);
  604. reg = ad1889_readw(chip, AD_DS_RES);
  605. snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg);
  606. }
  607. static void __devinit
  608. snd_ad1889_proc_init(struct snd_ad1889 *chip)
  609. {
  610. struct snd_info_entry *entry;
  611. if (!snd_card_proc_new(chip->card, chip->card->driver, &entry))
  612. snd_info_set_text_ops(entry, chip, 1024, snd_ad1889_proc_read);
  613. }
  614. static struct ac97_quirk ac97_quirks[] = {
  615. {
  616. .subvendor = 0x11d4, /* AD */
  617. .subdevice = 0x1889, /* AD1889 */
  618. .codec_id = AC97_ID_AD1819,
  619. .name = "AD1889",
  620. .type = AC97_TUNE_HP_ONLY
  621. },
  622. { } /* terminator */
  623. };
  624. static void __devinit
  625. snd_ad1889_ac97_xinit(struct snd_ad1889 *chip)
  626. {
  627. u16 reg;
  628. reg = ad1889_readw(chip, AD_AC97_ACIC);
  629. reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */
  630. ad1889_writew(chip, AD_AC97_ACIC, reg);
  631. ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
  632. udelay(10);
  633. /* Interface Enable */
  634. reg |= AD_AC97_ACIC_ACIE;
  635. ad1889_writew(chip, AD_AC97_ACIC, reg);
  636. snd_ad1889_ac97_ready(chip);
  637. /* Audio Stream Output | Variable Sample Rate Mode */
  638. reg = ad1889_readw(chip, AD_AC97_ACIC);
  639. reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM;
  640. ad1889_writew(chip, AD_AC97_ACIC, reg);
  641. ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
  642. }
  643. static void
  644. snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus)
  645. {
  646. struct snd_ad1889 *chip = bus->private_data;
  647. chip->ac97_bus = NULL;
  648. }
  649. static void
  650. snd_ad1889_ac97_free(struct snd_ac97 *ac97)
  651. {
  652. struct snd_ad1889 *chip = ac97->private_data;
  653. chip->ac97 = NULL;
  654. }
  655. static int __devinit
  656. snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override)
  657. {
  658. int err;
  659. struct snd_ac97_template ac97;
  660. static struct snd_ac97_bus_ops ops = {
  661. .write = snd_ad1889_ac97_write,
  662. .read = snd_ad1889_ac97_read,
  663. };
  664. /* doing that here, it works. */
  665. snd_ad1889_ac97_xinit(chip);
  666. err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
  667. if (err < 0)
  668. return err;
  669. chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free;
  670. memset(&ac97, 0, sizeof(ac97));
  671. ac97.private_data = chip;
  672. ac97.private_free = snd_ad1889_ac97_free;
  673. ac97.pci = chip->pci;
  674. err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
  675. if (err < 0)
  676. return err;
  677. snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
  678. return 0;
  679. }
  680. static int
  681. snd_ad1889_free(struct snd_ad1889 *chip)
  682. {
  683. if (chip->irq < 0)
  684. goto skip_hw;
  685. spin_lock_irq(&chip->lock);
  686. ad1889_mute(chip);
  687. /* Turn off interrupt on count and zero DMA registers */
  688. ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC);
  689. /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */
  690. ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI);
  691. ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */
  692. spin_unlock_irq(&chip->lock);
  693. synchronize_irq(chip->irq);
  694. if (chip->irq >= 0)
  695. free_irq(chip->irq, (void*)chip);
  696. skip_hw:
  697. if (chip->iobase)
  698. iounmap(chip->iobase);
  699. pci_release_regions(chip->pci);
  700. pci_disable_device(chip->pci);
  701. kfree(chip);
  702. return 0;
  703. }
  704. static inline int
  705. snd_ad1889_dev_free(struct snd_device *device)
  706. {
  707. struct snd_ad1889 *chip = device->device_data;
  708. return snd_ad1889_free(chip);
  709. }
  710. static int __devinit
  711. snd_ad1889_init(struct snd_ad1889 *chip)
  712. {
  713. ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */
  714. ad1889_readw(chip, AD_DS_CCS); /* flush posted write */
  715. mdelay(10);
  716. /* enable Master and Target abort interrupts */
  717. ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE);
  718. return 0;
  719. }
  720. static int __devinit
  721. snd_ad1889_create(struct snd_card *card,
  722. struct pci_dev *pci,
  723. struct snd_ad1889 **rchip)
  724. {
  725. int err;
  726. struct snd_ad1889 *chip;
  727. static struct snd_device_ops ops = {
  728. .dev_free = snd_ad1889_dev_free,
  729. };
  730. *rchip = NULL;
  731. if ((err = pci_enable_device(pci)) < 0)
  732. return err;
  733. /* check PCI availability (32bit DMA) */
  734. if (pci_set_dma_mask(pci, DMA_32BIT_MASK) < 0 ||
  735. pci_set_consistent_dma_mask(pci, DMA_32BIT_MASK) < 0) {
  736. printk(KERN_ERR PFX "error setting 32-bit DMA mask.\n");
  737. pci_disable_device(pci);
  738. return -ENXIO;
  739. }
  740. /* allocate chip specific data with zero-filled memory */
  741. if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
  742. pci_disable_device(pci);
  743. return -ENOMEM;
  744. }
  745. chip->card = card;
  746. card->private_data = chip;
  747. chip->pci = pci;
  748. chip->irq = -1;
  749. /* (1) PCI resource allocation */
  750. if ((err = pci_request_regions(pci, card->driver)) < 0)
  751. goto free_and_ret;
  752. chip->bar = pci_resource_start(pci, 0);
  753. chip->iobase = ioremap_nocache(chip->bar, pci_resource_len(pci, 0));
  754. if (chip->iobase == NULL) {
  755. printk(KERN_ERR PFX "unable to reserve region.\n");
  756. err = -EBUSY;
  757. goto free_and_ret;
  758. }
  759. pci_set_master(pci);
  760. spin_lock_init(&chip->lock); /* only now can we call ad1889_free */
  761. if (request_irq(pci->irq, snd_ad1889_interrupt,
  762. SA_INTERRUPT|SA_SHIRQ, card->driver, (void*)chip)) {
  763. printk(KERN_ERR PFX "cannot obtain IRQ %d\n", pci->irq);
  764. snd_ad1889_free(chip);
  765. return -EBUSY;
  766. }
  767. chip->irq = pci->irq;
  768. synchronize_irq(chip->irq);
  769. /* (2) initialization of the chip hardware */
  770. if ((err = snd_ad1889_init(chip)) < 0) {
  771. snd_ad1889_free(chip);
  772. return err;
  773. }
  774. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  775. snd_ad1889_free(chip);
  776. return err;
  777. }
  778. snd_card_set_dev(card, &pci->dev);
  779. *rchip = chip;
  780. return 0;
  781. free_and_ret:
  782. kfree(chip);
  783. pci_disable_device(pci);
  784. return err;
  785. }
  786. static int __devinit
  787. snd_ad1889_probe(struct pci_dev *pci,
  788. const struct pci_device_id *pci_id)
  789. {
  790. int err;
  791. static int devno;
  792. struct snd_card *card;
  793. struct snd_ad1889 *chip;
  794. /* (1) */
  795. if (devno >= SNDRV_CARDS)
  796. return -ENODEV;
  797. if (!enable[devno]) {
  798. devno++;
  799. return -ENOENT;
  800. }
  801. /* (2) */
  802. card = snd_card_new(index[devno], id[devno], THIS_MODULE, 0);
  803. /* XXX REVISIT: we can probably allocate chip in this call */
  804. if (card == NULL)
  805. return -ENOMEM;
  806. strcpy(card->driver, "AD1889");
  807. strcpy(card->shortname, "Analog Devices AD1889");
  808. /* (3) */
  809. err = snd_ad1889_create(card, pci, &chip);
  810. if (err < 0)
  811. goto free_and_ret;
  812. /* (4) */
  813. sprintf(card->longname, "%s at 0x%lx irq %i",
  814. card->shortname, chip->bar, chip->irq);
  815. /* (5) */
  816. /* register AC97 mixer */
  817. err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]);
  818. if (err < 0)
  819. goto free_and_ret;
  820. err = snd_ad1889_pcm_init(chip, 0, NULL);
  821. if (err < 0)
  822. goto free_and_ret;
  823. /* register proc interface */
  824. snd_ad1889_proc_init(chip);
  825. /* (6) */
  826. err = snd_card_register(card);
  827. if (err < 0)
  828. goto free_and_ret;
  829. /* (7) */
  830. pci_set_drvdata(pci, card);
  831. devno++;
  832. return 0;
  833. free_and_ret:
  834. snd_card_free(card);
  835. return err;
  836. }
  837. static void __devexit
  838. snd_ad1889_remove(struct pci_dev *pci)
  839. {
  840. snd_card_free(pci_get_drvdata(pci));
  841. pci_set_drvdata(pci, NULL);
  842. }
  843. static struct pci_device_id snd_ad1889_ids[] = {
  844. { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) },
  845. { 0, },
  846. };
  847. MODULE_DEVICE_TABLE(pci, snd_ad1889_ids);
  848. static struct pci_driver ad1889_pci = {
  849. .name = "AD1889 Audio",
  850. .id_table = snd_ad1889_ids,
  851. .probe = snd_ad1889_probe,
  852. .remove = __devexit_p(snd_ad1889_remove),
  853. };
  854. static int __init
  855. alsa_ad1889_init(void)
  856. {
  857. return pci_register_driver(&ad1889_pci);
  858. }
  859. static void __exit
  860. alsa_ad1889_fini(void)
  861. {
  862. pci_unregister_driver(&ad1889_pci);
  863. }
  864. module_init(alsa_ad1889_init);
  865. module_exit(alsa_ad1889_fini);