patch_sigmatel.c 90 KB

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  1. /*
  2. * Universal Interface for Intel High Definition Audio Codec
  3. *
  4. * HD audio interface patch for SigmaTel STAC92xx
  5. *
  6. * Copyright (c) 2005 Embedded Alley Solutions, Inc.
  7. * Matt Porter <mporter@embeddedalley.com>
  8. *
  9. * Based on patch_cmedia.c and patch_realtek.c
  10. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  11. *
  12. * This driver is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This driver is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <sound/driver.h>
  27. #include <linux/init.h>
  28. #include <linux/delay.h>
  29. #include <linux/slab.h>
  30. #include <linux/pci.h>
  31. #include <sound/core.h>
  32. #include <sound/asoundef.h>
  33. #include "hda_codec.h"
  34. #include "hda_local.h"
  35. #define NUM_CONTROL_ALLOC 32
  36. #define STAC_HP_EVENT 0x37
  37. enum {
  38. STAC_REF,
  39. STAC_9200_DELL_D21,
  40. STAC_9200_DELL_D22,
  41. STAC_9200_DELL_D23,
  42. STAC_9200_DELL_M21,
  43. STAC_9200_DELL_M22,
  44. STAC_9200_DELL_M23,
  45. STAC_9200_DELL_M24,
  46. STAC_9200_DELL_M25,
  47. STAC_9200_DELL_M26,
  48. STAC_9200_DELL_M27,
  49. STAC_9200_GATEWAY,
  50. STAC_9200_MODELS
  51. };
  52. enum {
  53. STAC_9205_REF,
  54. STAC_9205_DELL_M42,
  55. STAC_9205_DELL_M43,
  56. STAC_9205_DELL_M44,
  57. STAC_9205_MODELS
  58. };
  59. enum {
  60. STAC_925x_REF,
  61. STAC_M2_2,
  62. STAC_MA6,
  63. STAC_PA6,
  64. STAC_925x_MODELS
  65. };
  66. enum {
  67. STAC_D945_REF,
  68. STAC_D945GTP3,
  69. STAC_D945GTP5,
  70. STAC_INTEL_MAC_V1,
  71. STAC_INTEL_MAC_V2,
  72. STAC_INTEL_MAC_V3,
  73. STAC_INTEL_MAC_V4,
  74. STAC_INTEL_MAC_V5,
  75. /* for backward compatibility */
  76. STAC_MACMINI,
  77. STAC_MACBOOK,
  78. STAC_MACBOOK_PRO_V1,
  79. STAC_MACBOOK_PRO_V2,
  80. STAC_IMAC_INTEL,
  81. STAC_IMAC_INTEL_20,
  82. STAC_922X_DELL_D81,
  83. STAC_922X_DELL_D82,
  84. STAC_922X_DELL_M81,
  85. STAC_922X_DELL_M82,
  86. STAC_922X_MODELS
  87. };
  88. enum {
  89. STAC_D965_REF,
  90. STAC_D965_3ST,
  91. STAC_D965_5ST,
  92. STAC_DELL_3ST,
  93. STAC_927X_MODELS
  94. };
  95. struct sigmatel_spec {
  96. struct snd_kcontrol_new *mixers[4];
  97. unsigned int num_mixers;
  98. int board_config;
  99. unsigned int surr_switch: 1;
  100. unsigned int line_switch: 1;
  101. unsigned int mic_switch: 1;
  102. unsigned int alt_switch: 1;
  103. unsigned int hp_detect: 1;
  104. unsigned int gpio_mute: 1;
  105. unsigned int gpio_mask, gpio_data;
  106. /* playback */
  107. struct hda_multi_out multiout;
  108. hda_nid_t dac_nids[5];
  109. /* capture */
  110. hda_nid_t *adc_nids;
  111. unsigned int num_adcs;
  112. hda_nid_t *mux_nids;
  113. unsigned int num_muxes;
  114. hda_nid_t *dmic_nids;
  115. unsigned int num_dmics;
  116. hda_nid_t dmux_nid;
  117. hda_nid_t dig_in_nid;
  118. /* pin widgets */
  119. hda_nid_t *pin_nids;
  120. unsigned int num_pins;
  121. unsigned int *pin_configs;
  122. unsigned int *bios_pin_configs;
  123. /* codec specific stuff */
  124. struct hda_verb *init;
  125. struct snd_kcontrol_new *mixer;
  126. /* capture source */
  127. struct hda_input_mux *dinput_mux;
  128. unsigned int cur_dmux;
  129. struct hda_input_mux *input_mux;
  130. unsigned int cur_mux[3];
  131. /* i/o switches */
  132. unsigned int io_switch[2];
  133. unsigned int clfe_swap;
  134. unsigned int aloopback;
  135. struct hda_pcm pcm_rec[2]; /* PCM information */
  136. /* dynamic controls and input_mux */
  137. struct auto_pin_cfg autocfg;
  138. unsigned int num_kctl_alloc, num_kctl_used;
  139. struct snd_kcontrol_new *kctl_alloc;
  140. struct hda_input_mux private_dimux;
  141. struct hda_input_mux private_imux;
  142. };
  143. static hda_nid_t stac9200_adc_nids[1] = {
  144. 0x03,
  145. };
  146. static hda_nid_t stac9200_mux_nids[1] = {
  147. 0x0c,
  148. };
  149. static hda_nid_t stac9200_dac_nids[1] = {
  150. 0x02,
  151. };
  152. static hda_nid_t stac925x_adc_nids[1] = {
  153. 0x03,
  154. };
  155. static hda_nid_t stac925x_mux_nids[1] = {
  156. 0x0f,
  157. };
  158. static hda_nid_t stac925x_dac_nids[1] = {
  159. 0x02,
  160. };
  161. static hda_nid_t stac925x_dmic_nids[1] = {
  162. 0x15,
  163. };
  164. static hda_nid_t stac922x_adc_nids[2] = {
  165. 0x06, 0x07,
  166. };
  167. static hda_nid_t stac922x_mux_nids[2] = {
  168. 0x12, 0x13,
  169. };
  170. static hda_nid_t stac927x_adc_nids[3] = {
  171. 0x07, 0x08, 0x09
  172. };
  173. static hda_nid_t stac927x_mux_nids[3] = {
  174. 0x15, 0x16, 0x17
  175. };
  176. static hda_nid_t stac9205_adc_nids[2] = {
  177. 0x12, 0x13
  178. };
  179. static hda_nid_t stac9205_mux_nids[2] = {
  180. 0x19, 0x1a
  181. };
  182. static hda_nid_t stac9205_dmic_nids[2] = {
  183. 0x17, 0x18,
  184. };
  185. static hda_nid_t stac9200_pin_nids[8] = {
  186. 0x08, 0x09, 0x0d, 0x0e,
  187. 0x0f, 0x10, 0x11, 0x12,
  188. };
  189. static hda_nid_t stac925x_pin_nids[8] = {
  190. 0x07, 0x08, 0x0a, 0x0b,
  191. 0x0c, 0x0d, 0x10, 0x11,
  192. };
  193. static hda_nid_t stac922x_pin_nids[10] = {
  194. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  195. 0x0f, 0x10, 0x11, 0x15, 0x1b,
  196. };
  197. static hda_nid_t stac927x_pin_nids[14] = {
  198. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  199. 0x0f, 0x10, 0x11, 0x12, 0x13,
  200. 0x14, 0x21, 0x22, 0x23,
  201. };
  202. static hda_nid_t stac9205_pin_nids[12] = {
  203. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  204. 0x0f, 0x14, 0x16, 0x17, 0x18,
  205. 0x21, 0x22,
  206. };
  207. static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
  208. struct snd_ctl_elem_info *uinfo)
  209. {
  210. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  211. struct sigmatel_spec *spec = codec->spec;
  212. return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
  213. }
  214. static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
  215. struct snd_ctl_elem_value *ucontrol)
  216. {
  217. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  218. struct sigmatel_spec *spec = codec->spec;
  219. ucontrol->value.enumerated.item[0] = spec->cur_dmux;
  220. return 0;
  221. }
  222. static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
  223. struct snd_ctl_elem_value *ucontrol)
  224. {
  225. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  226. struct sigmatel_spec *spec = codec->spec;
  227. return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
  228. spec->dmux_nid, &spec->cur_dmux);
  229. }
  230. static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  231. {
  232. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  233. struct sigmatel_spec *spec = codec->spec;
  234. return snd_hda_input_mux_info(spec->input_mux, uinfo);
  235. }
  236. static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  237. {
  238. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  239. struct sigmatel_spec *spec = codec->spec;
  240. unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  241. ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
  242. return 0;
  243. }
  244. static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  245. {
  246. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  247. struct sigmatel_spec *spec = codec->spec;
  248. unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  249. return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
  250. spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
  251. }
  252. #define stac92xx_aloopback_info snd_ctl_boolean_mono_info
  253. static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
  254. struct snd_ctl_elem_value *ucontrol)
  255. {
  256. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  257. struct sigmatel_spec *spec = codec->spec;
  258. ucontrol->value.integer.value[0] = spec->aloopback;
  259. return 0;
  260. }
  261. static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
  262. struct snd_ctl_elem_value *ucontrol)
  263. {
  264. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  265. struct sigmatel_spec *spec = codec->spec;
  266. unsigned int dac_mode;
  267. if (spec->aloopback == ucontrol->value.integer.value[0])
  268. return 0;
  269. spec->aloopback = ucontrol->value.integer.value[0];
  270. dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
  271. kcontrol->private_value & 0xFFFF, 0x0);
  272. if (spec->aloopback) {
  273. snd_hda_power_up(codec);
  274. dac_mode |= 0x40;
  275. } else {
  276. snd_hda_power_down(codec);
  277. dac_mode &= ~0x40;
  278. }
  279. snd_hda_codec_write_cache(codec, codec->afg, 0,
  280. kcontrol->private_value >> 16, dac_mode);
  281. return 1;
  282. }
  283. static int stac92xx_volknob_info(struct snd_kcontrol *kcontrol,
  284. struct snd_ctl_elem_info *uinfo)
  285. {
  286. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  287. uinfo->count = 1;
  288. uinfo->value.integer.min = 0;
  289. uinfo->value.integer.max = 127;
  290. return 0;
  291. }
  292. static int stac92xx_volknob_get(struct snd_kcontrol *kcontrol,
  293. struct snd_ctl_elem_value *ucontrol)
  294. {
  295. ucontrol->value.integer.value[0] = kcontrol->private_value;
  296. return 0;
  297. }
  298. static int stac92xx_volknob_put(struct snd_kcontrol *kcontrol,
  299. struct snd_ctl_elem_value *ucontrol)
  300. {
  301. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  302. if (kcontrol->private_value == ucontrol->value.integer.value[0])
  303. return 0;
  304. kcontrol->private_value = ucontrol->value.integer.value[0];
  305. snd_hda_codec_write_cache(codec, 0x24, 0,
  306. AC_VERB_SET_VOLUME_KNOB_CONTROL,
  307. kcontrol->private_value | 0x80);
  308. return 1;
  309. }
  310. static struct hda_verb stac9200_core_init[] = {
  311. /* set dac0mux for dac converter */
  312. { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  313. {}
  314. };
  315. static struct hda_verb stac9200_eapd_init[] = {
  316. /* set dac0mux for dac converter */
  317. {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  318. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  319. {}
  320. };
  321. static struct hda_verb stac925x_core_init[] = {
  322. /* set dac0mux for dac converter */
  323. { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
  324. {}
  325. };
  326. static struct hda_verb stac922x_core_init[] = {
  327. /* set master volume and direct control */
  328. { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  329. {}
  330. };
  331. static struct hda_verb d965_core_init[] = {
  332. /* set master volume and direct control */
  333. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  334. /* unmute node 0x1b */
  335. { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  336. /* select node 0x03 as DAC */
  337. { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  338. {}
  339. };
  340. static struct hda_verb stac927x_core_init[] = {
  341. /* set master volume and direct control */
  342. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  343. {}
  344. };
  345. static struct hda_verb stac9205_core_init[] = {
  346. /* set master volume and direct control */
  347. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  348. {}
  349. };
  350. #define STAC_INPUT_SOURCE(cnt) \
  351. { \
  352. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  353. .name = "Input Source", \
  354. .count = cnt, \
  355. .info = stac92xx_mux_enum_info, \
  356. .get = stac92xx_mux_enum_get, \
  357. .put = stac92xx_mux_enum_put, \
  358. }
  359. #define STAC_ANALOG_LOOPBACK(verb_read,verb_write) \
  360. { \
  361. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  362. .name = "Analog Loopback", \
  363. .count = 1, \
  364. .info = stac92xx_aloopback_info, \
  365. .get = stac92xx_aloopback_get, \
  366. .put = stac92xx_aloopback_put, \
  367. .private_value = verb_read | (verb_write << 16), \
  368. }
  369. #define STAC_VOLKNOB \
  370. { \
  371. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  372. .name = "Master Playback Volume", \
  373. .count = 1, \
  374. .info = stac92xx_volknob_info, \
  375. .get = stac92xx_volknob_get, \
  376. .put = stac92xx_volknob_put, \
  377. .private_value = 127, \
  378. }
  379. static struct snd_kcontrol_new stac9200_mixer[] = {
  380. HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
  381. HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
  382. STAC_INPUT_SOURCE(1),
  383. HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
  384. HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
  385. HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
  386. { } /* end */
  387. };
  388. static struct snd_kcontrol_new stac925x_mixer[] = {
  389. STAC_INPUT_SOURCE(1),
  390. HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
  391. HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
  392. HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
  393. { } /* end */
  394. };
  395. static struct snd_kcontrol_new stac9205_mixer[] = {
  396. {
  397. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  398. .name = "Digital Input Source",
  399. .count = 1,
  400. .info = stac92xx_dmux_enum_info,
  401. .get = stac92xx_dmux_enum_get,
  402. .put = stac92xx_dmux_enum_put,
  403. },
  404. STAC_INPUT_SOURCE(2),
  405. STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0),
  406. STAC_VOLKNOB,
  407. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
  408. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
  409. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
  410. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
  411. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
  412. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
  413. { } /* end */
  414. };
  415. /* This needs to be generated dynamically based on sequence */
  416. static struct snd_kcontrol_new stac922x_mixer[] = {
  417. STAC_INPUT_SOURCE(2),
  418. STAC_VOLKNOB,
  419. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
  420. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
  421. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
  422. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
  423. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
  424. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
  425. { } /* end */
  426. };
  427. static struct snd_kcontrol_new stac927x_mixer[] = {
  428. STAC_INPUT_SOURCE(3),
  429. STAC_VOLKNOB,
  430. STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB),
  431. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
  432. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
  433. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
  434. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
  435. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
  436. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
  437. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
  438. HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
  439. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
  440. { } /* end */
  441. };
  442. static int stac92xx_build_controls(struct hda_codec *codec)
  443. {
  444. struct sigmatel_spec *spec = codec->spec;
  445. int err;
  446. int i;
  447. err = snd_hda_add_new_ctls(codec, spec->mixer);
  448. if (err < 0)
  449. return err;
  450. for (i = 0; i < spec->num_mixers; i++) {
  451. err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
  452. if (err < 0)
  453. return err;
  454. }
  455. if (spec->multiout.dig_out_nid) {
  456. err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
  457. if (err < 0)
  458. return err;
  459. }
  460. if (spec->dig_in_nid) {
  461. err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
  462. if (err < 0)
  463. return err;
  464. }
  465. return 0;
  466. }
  467. static unsigned int ref9200_pin_configs[8] = {
  468. 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
  469. 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
  470. };
  471. /*
  472. STAC 9200 pin configs for
  473. 102801A8
  474. 102801DE
  475. 102801E8
  476. */
  477. static unsigned int dell9200_d21_pin_configs[8] = {
  478. 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
  479. 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
  480. };
  481. /*
  482. STAC 9200 pin configs for
  483. 102801C0
  484. 102801C1
  485. */
  486. static unsigned int dell9200_d22_pin_configs[8] = {
  487. 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
  488. 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
  489. };
  490. /*
  491. STAC 9200 pin configs for
  492. 102801C4 (Dell Dimension E310)
  493. 102801C5
  494. 102801C7
  495. 102801D9
  496. 102801DA
  497. 102801E3
  498. */
  499. static unsigned int dell9200_d23_pin_configs[8] = {
  500. 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
  501. 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
  502. };
  503. /*
  504. STAC 9200-32 pin configs for
  505. 102801B5 (Dell Inspiron 630m)
  506. 102801D8 (Dell Inspiron 640m)
  507. */
  508. static unsigned int dell9200_m21_pin_configs[8] = {
  509. 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
  510. 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
  511. };
  512. /*
  513. STAC 9200-32 pin configs for
  514. 102801C2 (Dell Latitude D620)
  515. 102801C8
  516. 102801CC (Dell Latitude D820)
  517. 102801D4
  518. 102801D6
  519. */
  520. static unsigned int dell9200_m22_pin_configs[8] = {
  521. 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
  522. 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
  523. };
  524. /*
  525. STAC 9200-32 pin configs for
  526. 102801CE (Dell XPS M1710)
  527. 102801CF (Dell Precision M90)
  528. */
  529. static unsigned int dell9200_m23_pin_configs[8] = {
  530. 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
  531. 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
  532. };
  533. /*
  534. STAC 9200-32 pin configs for
  535. 102801C9
  536. 102801CA
  537. 102801CB (Dell Latitude 120L)
  538. 102801D3
  539. */
  540. static unsigned int dell9200_m24_pin_configs[8] = {
  541. 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
  542. 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
  543. };
  544. /*
  545. STAC 9200-32 pin configs for
  546. 102801BD (Dell Inspiron E1505n)
  547. 102801EE
  548. 102801EF
  549. */
  550. static unsigned int dell9200_m25_pin_configs[8] = {
  551. 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
  552. 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
  553. };
  554. /*
  555. STAC 9200-32 pin configs for
  556. 102801F5 (Dell Inspiron 1501)
  557. 102801F6
  558. */
  559. static unsigned int dell9200_m26_pin_configs[8] = {
  560. 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
  561. 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
  562. };
  563. /*
  564. STAC 9200-32
  565. 102801CD (Dell Inspiron E1705/9400)
  566. */
  567. static unsigned int dell9200_m27_pin_configs[8] = {
  568. 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
  569. 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
  570. };
  571. static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
  572. [STAC_REF] = ref9200_pin_configs,
  573. [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
  574. [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
  575. [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
  576. [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
  577. [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
  578. [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
  579. [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
  580. [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
  581. [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
  582. [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
  583. };
  584. static const char *stac9200_models[STAC_9200_MODELS] = {
  585. [STAC_REF] = "ref",
  586. [STAC_9200_DELL_D21] = "dell-d21",
  587. [STAC_9200_DELL_D22] = "dell-d22",
  588. [STAC_9200_DELL_D23] = "dell-d23",
  589. [STAC_9200_DELL_M21] = "dell-m21",
  590. [STAC_9200_DELL_M22] = "dell-m22",
  591. [STAC_9200_DELL_M23] = "dell-m23",
  592. [STAC_9200_DELL_M24] = "dell-m24",
  593. [STAC_9200_DELL_M25] = "dell-m25",
  594. [STAC_9200_DELL_M26] = "dell-m26",
  595. [STAC_9200_DELL_M27] = "dell-m27",
  596. [STAC_9200_GATEWAY] = "gateway",
  597. };
  598. static struct snd_pci_quirk stac9200_cfg_tbl[] = {
  599. /* SigmaTel reference board */
  600. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  601. "DFI LanParty", STAC_REF),
  602. /* Dell laptops have BIOS problem */
  603. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
  604. "unknown Dell", STAC_9200_DELL_D21),
  605. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
  606. "Dell Inspiron 630m", STAC_9200_DELL_M21),
  607. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
  608. "Dell Inspiron E1505n", STAC_9200_DELL_M25),
  609. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
  610. "unknown Dell", STAC_9200_DELL_D22),
  611. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
  612. "unknown Dell", STAC_9200_DELL_D22),
  613. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
  614. "Dell Latitude D620", STAC_9200_DELL_M22),
  615. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
  616. "unknown Dell", STAC_9200_DELL_D23),
  617. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
  618. "unknown Dell", STAC_9200_DELL_D23),
  619. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
  620. "unknown Dell", STAC_9200_DELL_M22),
  621. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
  622. "unknown Dell", STAC_9200_DELL_M24),
  623. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
  624. "unknown Dell", STAC_9200_DELL_M24),
  625. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
  626. "Dell Latitude 120L", STAC_9200_DELL_M24),
  627. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
  628. "Dell Latitude D820", STAC_9200_DELL_M22),
  629. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
  630. "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
  631. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
  632. "Dell XPS M1710", STAC_9200_DELL_M23),
  633. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
  634. "Dell Precision M90", STAC_9200_DELL_M23),
  635. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
  636. "unknown Dell", STAC_9200_DELL_M22),
  637. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
  638. "unknown Dell", STAC_9200_DELL_M22),
  639. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
  640. "unknown Dell", STAC_9200_DELL_M22),
  641. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
  642. "Dell Inspiron 640m", STAC_9200_DELL_M21),
  643. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
  644. "unknown Dell", STAC_9200_DELL_D23),
  645. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
  646. "unknown Dell", STAC_9200_DELL_D23),
  647. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
  648. "unknown Dell", STAC_9200_DELL_D21),
  649. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
  650. "unknown Dell", STAC_9200_DELL_D23),
  651. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
  652. "unknown Dell", STAC_9200_DELL_D21),
  653. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
  654. "unknown Dell", STAC_9200_DELL_M25),
  655. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
  656. "unknown Dell", STAC_9200_DELL_M25),
  657. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
  658. "Dell Inspiron 1501", STAC_9200_DELL_M26),
  659. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
  660. "unknown Dell", STAC_9200_DELL_M26),
  661. /* Panasonic */
  662. SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
  663. /* Gateway machines needs EAPD to be set on resume */
  664. SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
  665. SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
  666. STAC_9200_GATEWAY),
  667. SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
  668. STAC_9200_GATEWAY),
  669. {} /* terminator */
  670. };
  671. static unsigned int ref925x_pin_configs[8] = {
  672. 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
  673. 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
  674. };
  675. static unsigned int stac925x_MA6_pin_configs[8] = {
  676. 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
  677. 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
  678. };
  679. static unsigned int stac925x_PA6_pin_configs[8] = {
  680. 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
  681. 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
  682. };
  683. static unsigned int stac925xM2_2_pin_configs[8] = {
  684. 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
  685. 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
  686. };
  687. static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
  688. [STAC_REF] = ref925x_pin_configs,
  689. [STAC_M2_2] = stac925xM2_2_pin_configs,
  690. [STAC_MA6] = stac925x_MA6_pin_configs,
  691. [STAC_PA6] = stac925x_PA6_pin_configs,
  692. };
  693. static const char *stac925x_models[STAC_925x_MODELS] = {
  694. [STAC_REF] = "ref",
  695. [STAC_M2_2] = "m2-2",
  696. [STAC_MA6] = "m6",
  697. [STAC_PA6] = "pa6",
  698. };
  699. static struct snd_pci_quirk stac925x_cfg_tbl[] = {
  700. /* SigmaTel reference board */
  701. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
  702. SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
  703. SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
  704. SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
  705. SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
  706. SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
  707. SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
  708. {} /* terminator */
  709. };
  710. static unsigned int ref922x_pin_configs[10] = {
  711. 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
  712. 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
  713. 0x40000100, 0x40000100,
  714. };
  715. /*
  716. STAC 922X pin configs for
  717. 102801A7
  718. 102801AB
  719. 102801A9
  720. 102801D1
  721. 102801D2
  722. */
  723. static unsigned int dell_922x_d81_pin_configs[10] = {
  724. 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
  725. 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
  726. 0x01813122, 0x400001f2,
  727. };
  728. /*
  729. STAC 922X pin configs for
  730. 102801AC
  731. 102801D0
  732. */
  733. static unsigned int dell_922x_d82_pin_configs[10] = {
  734. 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
  735. 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
  736. 0x01813122, 0x400001f1,
  737. };
  738. /*
  739. STAC 922X pin configs for
  740. 102801BF
  741. */
  742. static unsigned int dell_922x_m81_pin_configs[10] = {
  743. 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
  744. 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
  745. 0x40C003f1, 0x405003f0,
  746. };
  747. /*
  748. STAC 9221 A1 pin configs for
  749. 102801D7 (Dell XPS M1210)
  750. */
  751. static unsigned int dell_922x_m82_pin_configs[10] = {
  752. 0x0221121f, 0x408103ff, 0x02111212, 0x90100310,
  753. 0x408003f1, 0x02111211, 0x03451340, 0x40c003f2,
  754. 0x508003f3, 0x405003f4,
  755. };
  756. static unsigned int d945gtp3_pin_configs[10] = {
  757. 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
  758. 0x40000100, 0x40000100, 0x40000100, 0x40000100,
  759. 0x02a19120, 0x40000100,
  760. };
  761. static unsigned int d945gtp5_pin_configs[10] = {
  762. 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
  763. 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
  764. 0x02a19320, 0x40000100,
  765. };
  766. static unsigned int intel_mac_v1_pin_configs[10] = {
  767. 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
  768. 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
  769. 0x400000fc, 0x400000fb,
  770. };
  771. static unsigned int intel_mac_v2_pin_configs[10] = {
  772. 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
  773. 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
  774. 0x400000fc, 0x400000fb,
  775. };
  776. static unsigned int intel_mac_v3_pin_configs[10] = {
  777. 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
  778. 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
  779. 0x400000fc, 0x400000fb,
  780. };
  781. static unsigned int intel_mac_v4_pin_configs[10] = {
  782. 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
  783. 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
  784. 0x400000fc, 0x400000fb,
  785. };
  786. static unsigned int intel_mac_v5_pin_configs[10] = {
  787. 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
  788. 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
  789. 0x400000fc, 0x400000fb,
  790. };
  791. static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
  792. [STAC_D945_REF] = ref922x_pin_configs,
  793. [STAC_D945GTP3] = d945gtp3_pin_configs,
  794. [STAC_D945GTP5] = d945gtp5_pin_configs,
  795. [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
  796. [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
  797. [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
  798. [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
  799. [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
  800. /* for backward compatibility */
  801. [STAC_MACMINI] = intel_mac_v3_pin_configs,
  802. [STAC_MACBOOK] = intel_mac_v5_pin_configs,
  803. [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
  804. [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
  805. [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
  806. [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
  807. [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
  808. [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
  809. [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
  810. [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
  811. };
  812. static const char *stac922x_models[STAC_922X_MODELS] = {
  813. [STAC_D945_REF] = "ref",
  814. [STAC_D945GTP5] = "5stack",
  815. [STAC_D945GTP3] = "3stack",
  816. [STAC_INTEL_MAC_V1] = "intel-mac-v1",
  817. [STAC_INTEL_MAC_V2] = "intel-mac-v2",
  818. [STAC_INTEL_MAC_V3] = "intel-mac-v3",
  819. [STAC_INTEL_MAC_V4] = "intel-mac-v4",
  820. [STAC_INTEL_MAC_V5] = "intel-mac-v5",
  821. /* for backward compatibility */
  822. [STAC_MACMINI] = "macmini",
  823. [STAC_MACBOOK] = "macbook",
  824. [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
  825. [STAC_MACBOOK_PRO_V2] = "macbook-pro",
  826. [STAC_IMAC_INTEL] = "imac-intel",
  827. [STAC_IMAC_INTEL_20] = "imac-intel-20",
  828. [STAC_922X_DELL_D81] = "dell-d81",
  829. [STAC_922X_DELL_D82] = "dell-d82",
  830. [STAC_922X_DELL_M81] = "dell-m81",
  831. [STAC_922X_DELL_M82] = "dell-m82",
  832. };
  833. static struct snd_pci_quirk stac922x_cfg_tbl[] = {
  834. /* SigmaTel reference board */
  835. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  836. "DFI LanParty", STAC_D945_REF),
  837. /* Intel 945G based systems */
  838. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
  839. "Intel D945G", STAC_D945GTP3),
  840. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
  841. "Intel D945G", STAC_D945GTP3),
  842. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
  843. "Intel D945G", STAC_D945GTP3),
  844. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
  845. "Intel D945G", STAC_D945GTP3),
  846. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
  847. "Intel D945G", STAC_D945GTP3),
  848. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
  849. "Intel D945G", STAC_D945GTP3),
  850. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
  851. "Intel D945G", STAC_D945GTP3),
  852. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
  853. "Intel D945G", STAC_D945GTP3),
  854. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
  855. "Intel D945G", STAC_D945GTP3),
  856. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
  857. "Intel D945G", STAC_D945GTP3),
  858. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
  859. "Intel D945G", STAC_D945GTP3),
  860. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
  861. "Intel D945G", STAC_D945GTP3),
  862. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
  863. "Intel D945G", STAC_D945GTP3),
  864. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
  865. "Intel D945G", STAC_D945GTP3),
  866. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
  867. "Intel D945G", STAC_D945GTP3),
  868. /* Intel D945G 5-stack systems */
  869. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
  870. "Intel D945G", STAC_D945GTP5),
  871. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
  872. "Intel D945G", STAC_D945GTP5),
  873. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
  874. "Intel D945G", STAC_D945GTP5),
  875. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
  876. "Intel D945G", STAC_D945GTP5),
  877. /* Intel 945P based systems */
  878. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
  879. "Intel D945P", STAC_D945GTP3),
  880. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
  881. "Intel D945P", STAC_D945GTP3),
  882. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
  883. "Intel D945P", STAC_D945GTP3),
  884. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
  885. "Intel D945P", STAC_D945GTP3),
  886. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
  887. "Intel D945P", STAC_D945GTP3),
  888. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
  889. "Intel D945P", STAC_D945GTP5),
  890. /* other systems */
  891. /* Apple Mac Mini (early 2006) */
  892. SND_PCI_QUIRK(0x8384, 0x7680,
  893. "Mac Mini", STAC_INTEL_MAC_V3),
  894. /* Dell systems */
  895. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
  896. "unknown Dell", STAC_922X_DELL_D81),
  897. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
  898. "unknown Dell", STAC_922X_DELL_D81),
  899. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
  900. "unknown Dell", STAC_922X_DELL_D81),
  901. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
  902. "unknown Dell", STAC_922X_DELL_D82),
  903. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
  904. "unknown Dell", STAC_922X_DELL_M81),
  905. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
  906. "unknown Dell", STAC_922X_DELL_D82),
  907. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
  908. "unknown Dell", STAC_922X_DELL_D81),
  909. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
  910. "unknown Dell", STAC_922X_DELL_D81),
  911. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
  912. "Dell XPS M1210", STAC_922X_DELL_M82),
  913. {} /* terminator */
  914. };
  915. static unsigned int ref927x_pin_configs[14] = {
  916. 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
  917. 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
  918. 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
  919. 0x01c42190, 0x40000100,
  920. };
  921. static unsigned int d965_3st_pin_configs[14] = {
  922. 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
  923. 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
  924. 0x40000100, 0x40000100, 0x40000100, 0x40000100,
  925. 0x40000100, 0x40000100
  926. };
  927. static unsigned int d965_5st_pin_configs[14] = {
  928. 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
  929. 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
  930. 0x40000100, 0x40000100, 0x40000100, 0x01442070,
  931. 0x40000100, 0x40000100
  932. };
  933. static unsigned int dell_3st_pin_configs[14] = {
  934. 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
  935. 0x01111212, 0x01116211, 0x01813050, 0x01112214,
  936. 0x403003fa, 0x40000100, 0x40000100, 0x404003fb,
  937. 0x40c003fc, 0x40000100
  938. };
  939. static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
  940. [STAC_D965_REF] = ref927x_pin_configs,
  941. [STAC_D965_3ST] = d965_3st_pin_configs,
  942. [STAC_D965_5ST] = d965_5st_pin_configs,
  943. [STAC_DELL_3ST] = dell_3st_pin_configs,
  944. };
  945. static const char *stac927x_models[STAC_927X_MODELS] = {
  946. [STAC_D965_REF] = "ref",
  947. [STAC_D965_3ST] = "3stack",
  948. [STAC_D965_5ST] = "5stack",
  949. [STAC_DELL_3ST] = "dell-3stack",
  950. };
  951. static struct snd_pci_quirk stac927x_cfg_tbl[] = {
  952. /* SigmaTel reference board */
  953. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  954. "DFI LanParty", STAC_D965_REF),
  955. /* Intel 946 based systems */
  956. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
  957. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
  958. /* 965 based 3 stack systems */
  959. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
  960. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
  961. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
  962. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
  963. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
  964. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
  965. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
  966. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
  967. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
  968. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
  969. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
  970. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
  971. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
  972. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
  973. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
  974. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
  975. /* Dell 3 stack systems */
  976. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
  977. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
  978. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
  979. /* 965 based 5 stack systems */
  980. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
  981. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
  982. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
  983. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
  984. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
  985. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
  986. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
  987. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
  988. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
  989. {} /* terminator */
  990. };
  991. static unsigned int ref9205_pin_configs[12] = {
  992. 0x40000100, 0x40000100, 0x01016011, 0x01014010,
  993. 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
  994. 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
  995. };
  996. /*
  997. STAC 9205 pin configs for
  998. 102801F1
  999. 102801F2
  1000. 102801FC
  1001. 102801FD
  1002. 10280204
  1003. 1028021F
  1004. */
  1005. static unsigned int dell_9205_m42_pin_configs[12] = {
  1006. 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
  1007. 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
  1008. 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
  1009. };
  1010. /*
  1011. STAC 9205 pin configs for
  1012. 102801F9
  1013. 102801FA
  1014. 102801FE
  1015. 102801FF (Dell Precision M4300)
  1016. 10280206
  1017. 10280200
  1018. 10280201
  1019. */
  1020. static unsigned int dell_9205_m43_pin_configs[12] = {
  1021. 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
  1022. 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
  1023. 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
  1024. };
  1025. static unsigned int dell_9205_m44_pin_configs[12] = {
  1026. 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
  1027. 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
  1028. 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
  1029. };
  1030. static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
  1031. [STAC_9205_REF] = ref9205_pin_configs,
  1032. [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
  1033. [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
  1034. [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
  1035. };
  1036. static const char *stac9205_models[STAC_9205_MODELS] = {
  1037. [STAC_9205_REF] = "ref",
  1038. [STAC_9205_DELL_M42] = "dell-m42",
  1039. [STAC_9205_DELL_M43] = "dell-m43",
  1040. [STAC_9205_DELL_M44] = "dell-m44",
  1041. };
  1042. static struct snd_pci_quirk stac9205_cfg_tbl[] = {
  1043. /* SigmaTel reference board */
  1044. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1045. "DFI LanParty", STAC_9205_REF),
  1046. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
  1047. "unknown Dell", STAC_9205_DELL_M42),
  1048. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
  1049. "unknown Dell", STAC_9205_DELL_M42),
  1050. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
  1051. "Dell Precision", STAC_9205_DELL_M43),
  1052. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
  1053. "Dell Precision", STAC_9205_DELL_M43),
  1054. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
  1055. "Dell Precision", STAC_9205_DELL_M43),
  1056. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
  1057. "Dell Precision", STAC_9205_DELL_M43),
  1058. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
  1059. "Dell Precision", STAC_9205_DELL_M43),
  1060. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
  1061. "unknown Dell", STAC_9205_DELL_M42),
  1062. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
  1063. "unknown Dell", STAC_9205_DELL_M42),
  1064. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
  1065. "Dell Precision", STAC_9205_DELL_M43),
  1066. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
  1067. "Dell Precision M4300", STAC_9205_DELL_M43),
  1068. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
  1069. "Dell Precision", STAC_9205_DELL_M43),
  1070. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
  1071. "Dell Inspiron", STAC_9205_DELL_M44),
  1072. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
  1073. "Dell Inspiron", STAC_9205_DELL_M44),
  1074. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
  1075. "Dell Inspiron", STAC_9205_DELL_M44),
  1076. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
  1077. "Dell Inspiron", STAC_9205_DELL_M44),
  1078. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
  1079. "unknown Dell", STAC_9205_DELL_M42),
  1080. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
  1081. "Dell Inspiron", STAC_9205_DELL_M44),
  1082. {} /* terminator */
  1083. };
  1084. static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
  1085. {
  1086. int i;
  1087. struct sigmatel_spec *spec = codec->spec;
  1088. if (! spec->bios_pin_configs) {
  1089. spec->bios_pin_configs = kcalloc(spec->num_pins,
  1090. sizeof(*spec->bios_pin_configs), GFP_KERNEL);
  1091. if (! spec->bios_pin_configs)
  1092. return -ENOMEM;
  1093. }
  1094. for (i = 0; i < spec->num_pins; i++) {
  1095. hda_nid_t nid = spec->pin_nids[i];
  1096. unsigned int pin_cfg;
  1097. pin_cfg = snd_hda_codec_read(codec, nid, 0,
  1098. AC_VERB_GET_CONFIG_DEFAULT, 0x00);
  1099. snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
  1100. nid, pin_cfg);
  1101. spec->bios_pin_configs[i] = pin_cfg;
  1102. }
  1103. return 0;
  1104. }
  1105. static void stac92xx_set_config_reg(struct hda_codec *codec,
  1106. hda_nid_t pin_nid, unsigned int pin_config)
  1107. {
  1108. int i;
  1109. snd_hda_codec_write(codec, pin_nid, 0,
  1110. AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
  1111. pin_config & 0x000000ff);
  1112. snd_hda_codec_write(codec, pin_nid, 0,
  1113. AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
  1114. (pin_config & 0x0000ff00) >> 8);
  1115. snd_hda_codec_write(codec, pin_nid, 0,
  1116. AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
  1117. (pin_config & 0x00ff0000) >> 16);
  1118. snd_hda_codec_write(codec, pin_nid, 0,
  1119. AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
  1120. pin_config >> 24);
  1121. i = snd_hda_codec_read(codec, pin_nid, 0,
  1122. AC_VERB_GET_CONFIG_DEFAULT,
  1123. 0x00);
  1124. snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
  1125. pin_nid, i);
  1126. }
  1127. static void stac92xx_set_config_regs(struct hda_codec *codec)
  1128. {
  1129. int i;
  1130. struct sigmatel_spec *spec = codec->spec;
  1131. if (!spec->pin_configs)
  1132. return;
  1133. for (i = 0; i < spec->num_pins; i++)
  1134. stac92xx_set_config_reg(codec, spec->pin_nids[i],
  1135. spec->pin_configs[i]);
  1136. }
  1137. static void stac92xx_enable_gpio_mask(struct hda_codec *codec)
  1138. {
  1139. struct sigmatel_spec *spec = codec->spec;
  1140. /* Configure GPIOx as output */
  1141. snd_hda_codec_write_cache(codec, codec->afg, 0,
  1142. AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask);
  1143. /* Configure GPIOx as CMOS */
  1144. snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000);
  1145. /* Assert GPIOx */
  1146. snd_hda_codec_write_cache(codec, codec->afg, 0,
  1147. AC_VERB_SET_GPIO_DATA, spec->gpio_data);
  1148. /* Enable GPIOx */
  1149. snd_hda_codec_write_cache(codec, codec->afg, 0,
  1150. AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
  1151. }
  1152. /*
  1153. * Analog playback callbacks
  1154. */
  1155. static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1156. struct hda_codec *codec,
  1157. struct snd_pcm_substream *substream)
  1158. {
  1159. struct sigmatel_spec *spec = codec->spec;
  1160. return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
  1161. }
  1162. static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1163. struct hda_codec *codec,
  1164. unsigned int stream_tag,
  1165. unsigned int format,
  1166. struct snd_pcm_substream *substream)
  1167. {
  1168. struct sigmatel_spec *spec = codec->spec;
  1169. return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
  1170. }
  1171. static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1172. struct hda_codec *codec,
  1173. struct snd_pcm_substream *substream)
  1174. {
  1175. struct sigmatel_spec *spec = codec->spec;
  1176. return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
  1177. }
  1178. /*
  1179. * Digital playback callbacks
  1180. */
  1181. static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1182. struct hda_codec *codec,
  1183. struct snd_pcm_substream *substream)
  1184. {
  1185. struct sigmatel_spec *spec = codec->spec;
  1186. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  1187. }
  1188. static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
  1189. struct hda_codec *codec,
  1190. struct snd_pcm_substream *substream)
  1191. {
  1192. struct sigmatel_spec *spec = codec->spec;
  1193. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1194. }
  1195. static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1196. struct hda_codec *codec,
  1197. unsigned int stream_tag,
  1198. unsigned int format,
  1199. struct snd_pcm_substream *substream)
  1200. {
  1201. struct sigmatel_spec *spec = codec->spec;
  1202. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  1203. stream_tag, format, substream);
  1204. }
  1205. /*
  1206. * Analog capture callbacks
  1207. */
  1208. static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
  1209. struct hda_codec *codec,
  1210. unsigned int stream_tag,
  1211. unsigned int format,
  1212. struct snd_pcm_substream *substream)
  1213. {
  1214. struct sigmatel_spec *spec = codec->spec;
  1215. snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
  1216. stream_tag, 0, format);
  1217. return 0;
  1218. }
  1219. static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1220. struct hda_codec *codec,
  1221. struct snd_pcm_substream *substream)
  1222. {
  1223. struct sigmatel_spec *spec = codec->spec;
  1224. snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
  1225. return 0;
  1226. }
  1227. static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
  1228. .substreams = 1,
  1229. .channels_min = 2,
  1230. .channels_max = 2,
  1231. /* NID is set in stac92xx_build_pcms */
  1232. .ops = {
  1233. .open = stac92xx_dig_playback_pcm_open,
  1234. .close = stac92xx_dig_playback_pcm_close,
  1235. .prepare = stac92xx_dig_playback_pcm_prepare
  1236. },
  1237. };
  1238. static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
  1239. .substreams = 1,
  1240. .channels_min = 2,
  1241. .channels_max = 2,
  1242. /* NID is set in stac92xx_build_pcms */
  1243. };
  1244. static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
  1245. .substreams = 1,
  1246. .channels_min = 2,
  1247. .channels_max = 8,
  1248. .nid = 0x02, /* NID to query formats and rates */
  1249. .ops = {
  1250. .open = stac92xx_playback_pcm_open,
  1251. .prepare = stac92xx_playback_pcm_prepare,
  1252. .cleanup = stac92xx_playback_pcm_cleanup
  1253. },
  1254. };
  1255. static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
  1256. .substreams = 1,
  1257. .channels_min = 2,
  1258. .channels_max = 2,
  1259. .nid = 0x06, /* NID to query formats and rates */
  1260. .ops = {
  1261. .open = stac92xx_playback_pcm_open,
  1262. .prepare = stac92xx_playback_pcm_prepare,
  1263. .cleanup = stac92xx_playback_pcm_cleanup
  1264. },
  1265. };
  1266. static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
  1267. .channels_min = 2,
  1268. .channels_max = 2,
  1269. /* NID + .substreams is set in stac92xx_build_pcms */
  1270. .ops = {
  1271. .prepare = stac92xx_capture_pcm_prepare,
  1272. .cleanup = stac92xx_capture_pcm_cleanup
  1273. },
  1274. };
  1275. static int stac92xx_build_pcms(struct hda_codec *codec)
  1276. {
  1277. struct sigmatel_spec *spec = codec->spec;
  1278. struct hda_pcm *info = spec->pcm_rec;
  1279. codec->num_pcms = 1;
  1280. codec->pcm_info = info;
  1281. info->name = "STAC92xx Analog";
  1282. info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
  1283. info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
  1284. info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
  1285. info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
  1286. if (spec->alt_switch) {
  1287. codec->num_pcms++;
  1288. info++;
  1289. info->name = "STAC92xx Analog Alt";
  1290. info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
  1291. }
  1292. if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
  1293. codec->num_pcms++;
  1294. info++;
  1295. info->name = "STAC92xx Digital";
  1296. if (spec->multiout.dig_out_nid) {
  1297. info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
  1298. info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
  1299. }
  1300. if (spec->dig_in_nid) {
  1301. info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
  1302. info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
  1303. }
  1304. }
  1305. return 0;
  1306. }
  1307. static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
  1308. {
  1309. unsigned int pincap = snd_hda_param_read(codec, nid,
  1310. AC_PAR_PIN_CAP);
  1311. pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
  1312. if (pincap & AC_PINCAP_VREF_100)
  1313. return AC_PINCTL_VREF_100;
  1314. if (pincap & AC_PINCAP_VREF_80)
  1315. return AC_PINCTL_VREF_80;
  1316. if (pincap & AC_PINCAP_VREF_50)
  1317. return AC_PINCTL_VREF_50;
  1318. if (pincap & AC_PINCAP_VREF_GRD)
  1319. return AC_PINCTL_VREF_GRD;
  1320. return 0;
  1321. }
  1322. static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
  1323. {
  1324. snd_hda_codec_write_cache(codec, nid, 0,
  1325. AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
  1326. }
  1327. #define stac92xx_io_switch_info snd_ctl_boolean_mono_info
  1328. static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1329. {
  1330. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1331. struct sigmatel_spec *spec = codec->spec;
  1332. int io_idx = kcontrol-> private_value & 0xff;
  1333. ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
  1334. return 0;
  1335. }
  1336. static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1337. {
  1338. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1339. struct sigmatel_spec *spec = codec->spec;
  1340. hda_nid_t nid = kcontrol->private_value >> 8;
  1341. int io_idx = kcontrol-> private_value & 0xff;
  1342. unsigned short val = ucontrol->value.integer.value[0];
  1343. spec->io_switch[io_idx] = val;
  1344. if (val)
  1345. stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
  1346. else {
  1347. unsigned int pinctl = AC_PINCTL_IN_EN;
  1348. if (io_idx) /* set VREF for mic */
  1349. pinctl |= stac92xx_get_vref(codec, nid);
  1350. stac92xx_auto_set_pinctl(codec, nid, pinctl);
  1351. }
  1352. return 1;
  1353. }
  1354. #define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
  1355. static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
  1356. struct snd_ctl_elem_value *ucontrol)
  1357. {
  1358. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1359. struct sigmatel_spec *spec = codec->spec;
  1360. ucontrol->value.integer.value[0] = spec->clfe_swap;
  1361. return 0;
  1362. }
  1363. static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
  1364. struct snd_ctl_elem_value *ucontrol)
  1365. {
  1366. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1367. struct sigmatel_spec *spec = codec->spec;
  1368. hda_nid_t nid = kcontrol->private_value & 0xff;
  1369. if (spec->clfe_swap == ucontrol->value.integer.value[0])
  1370. return 0;
  1371. spec->clfe_swap = ucontrol->value.integer.value[0];
  1372. snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
  1373. spec->clfe_swap ? 0x4 : 0x0);
  1374. return 1;
  1375. }
  1376. #define STAC_CODEC_IO_SWITCH(xname, xpval) \
  1377. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  1378. .name = xname, \
  1379. .index = 0, \
  1380. .info = stac92xx_io_switch_info, \
  1381. .get = stac92xx_io_switch_get, \
  1382. .put = stac92xx_io_switch_put, \
  1383. .private_value = xpval, \
  1384. }
  1385. #define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
  1386. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  1387. .name = xname, \
  1388. .index = 0, \
  1389. .info = stac92xx_clfe_switch_info, \
  1390. .get = stac92xx_clfe_switch_get, \
  1391. .put = stac92xx_clfe_switch_put, \
  1392. .private_value = xpval, \
  1393. }
  1394. enum {
  1395. STAC_CTL_WIDGET_VOL,
  1396. STAC_CTL_WIDGET_MUTE,
  1397. STAC_CTL_WIDGET_IO_SWITCH,
  1398. STAC_CTL_WIDGET_CLFE_SWITCH
  1399. };
  1400. static struct snd_kcontrol_new stac92xx_control_templates[] = {
  1401. HDA_CODEC_VOLUME(NULL, 0, 0, 0),
  1402. HDA_CODEC_MUTE(NULL, 0, 0, 0),
  1403. STAC_CODEC_IO_SWITCH(NULL, 0),
  1404. STAC_CODEC_CLFE_SWITCH(NULL, 0),
  1405. };
  1406. /* add dynamic controls */
  1407. static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
  1408. {
  1409. struct snd_kcontrol_new *knew;
  1410. if (spec->num_kctl_used >= spec->num_kctl_alloc) {
  1411. int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
  1412. knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
  1413. if (! knew)
  1414. return -ENOMEM;
  1415. if (spec->kctl_alloc) {
  1416. memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
  1417. kfree(spec->kctl_alloc);
  1418. }
  1419. spec->kctl_alloc = knew;
  1420. spec->num_kctl_alloc = num;
  1421. }
  1422. knew = &spec->kctl_alloc[spec->num_kctl_used];
  1423. *knew = stac92xx_control_templates[type];
  1424. knew->name = kstrdup(name, GFP_KERNEL);
  1425. if (! knew->name)
  1426. return -ENOMEM;
  1427. knew->private_value = val;
  1428. spec->num_kctl_used++;
  1429. return 0;
  1430. }
  1431. /* flag inputs as additional dynamic lineouts */
  1432. static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
  1433. {
  1434. struct sigmatel_spec *spec = codec->spec;
  1435. unsigned int wcaps, wtype;
  1436. int i, num_dacs = 0;
  1437. /* use the wcaps cache to count all DACs available for line-outs */
  1438. for (i = 0; i < codec->num_nodes; i++) {
  1439. wcaps = codec->wcaps[i];
  1440. wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
  1441. if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
  1442. num_dacs++;
  1443. }
  1444. snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
  1445. switch (cfg->line_outs) {
  1446. case 3:
  1447. /* add line-in as side */
  1448. if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
  1449. cfg->line_out_pins[cfg->line_outs] =
  1450. cfg->input_pins[AUTO_PIN_LINE];
  1451. spec->line_switch = 1;
  1452. cfg->line_outs++;
  1453. }
  1454. break;
  1455. case 2:
  1456. /* add line-in as clfe and mic as side */
  1457. if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
  1458. cfg->line_out_pins[cfg->line_outs] =
  1459. cfg->input_pins[AUTO_PIN_LINE];
  1460. spec->line_switch = 1;
  1461. cfg->line_outs++;
  1462. }
  1463. if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
  1464. cfg->line_out_pins[cfg->line_outs] =
  1465. cfg->input_pins[AUTO_PIN_MIC];
  1466. spec->mic_switch = 1;
  1467. cfg->line_outs++;
  1468. }
  1469. break;
  1470. case 1:
  1471. /* add line-in as surr and mic as clfe */
  1472. if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
  1473. cfg->line_out_pins[cfg->line_outs] =
  1474. cfg->input_pins[AUTO_PIN_LINE];
  1475. spec->line_switch = 1;
  1476. cfg->line_outs++;
  1477. }
  1478. if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
  1479. cfg->line_out_pins[cfg->line_outs] =
  1480. cfg->input_pins[AUTO_PIN_MIC];
  1481. spec->mic_switch = 1;
  1482. cfg->line_outs++;
  1483. }
  1484. break;
  1485. }
  1486. return 0;
  1487. }
  1488. static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
  1489. {
  1490. int i;
  1491. for (i = 0; i < spec->multiout.num_dacs; i++) {
  1492. if (spec->multiout.dac_nids[i] == nid)
  1493. return 1;
  1494. }
  1495. return 0;
  1496. }
  1497. /*
  1498. * Fill in the dac_nids table from the parsed pin configuration
  1499. * This function only works when every pin in line_out_pins[]
  1500. * contains atleast one DAC in its connection list. Some 92xx
  1501. * codecs are not connected directly to a DAC, such as the 9200
  1502. * and 9202/925x. For those, dac_nids[] must be hard-coded.
  1503. */
  1504. static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
  1505. struct auto_pin_cfg *cfg)
  1506. {
  1507. struct sigmatel_spec *spec = codec->spec;
  1508. int i, j, conn_len = 0;
  1509. hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
  1510. unsigned int wcaps, wtype;
  1511. for (i = 0; i < cfg->line_outs; i++) {
  1512. nid = cfg->line_out_pins[i];
  1513. conn_len = snd_hda_get_connections(codec, nid, conn,
  1514. HDA_MAX_CONNECTIONS);
  1515. for (j = 0; j < conn_len; j++) {
  1516. wcaps = snd_hda_param_read(codec, conn[j],
  1517. AC_PAR_AUDIO_WIDGET_CAP);
  1518. wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
  1519. if (wtype != AC_WID_AUD_OUT ||
  1520. (wcaps & AC_WCAP_DIGITAL))
  1521. continue;
  1522. /* conn[j] is a DAC routed to this line-out */
  1523. if (!is_in_dac_nids(spec, conn[j]))
  1524. break;
  1525. }
  1526. if (j == conn_len) {
  1527. if (spec->multiout.num_dacs > 0) {
  1528. /* we have already working output pins,
  1529. * so let's drop the broken ones again
  1530. */
  1531. cfg->line_outs = spec->multiout.num_dacs;
  1532. break;
  1533. }
  1534. /* error out, no available DAC found */
  1535. snd_printk(KERN_ERR
  1536. "%s: No available DAC for pin 0x%x\n",
  1537. __func__, nid);
  1538. return -ENODEV;
  1539. }
  1540. spec->multiout.dac_nids[i] = conn[j];
  1541. spec->multiout.num_dacs++;
  1542. if (conn_len > 1) {
  1543. /* select this DAC in the pin's input mux */
  1544. snd_hda_codec_write_cache(codec, nid, 0,
  1545. AC_VERB_SET_CONNECT_SEL, j);
  1546. }
  1547. }
  1548. snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
  1549. spec->multiout.num_dacs,
  1550. spec->multiout.dac_nids[0],
  1551. spec->multiout.dac_nids[1],
  1552. spec->multiout.dac_nids[2],
  1553. spec->multiout.dac_nids[3],
  1554. spec->multiout.dac_nids[4]);
  1555. return 0;
  1556. }
  1557. /* create volume control/switch for the given prefx type */
  1558. static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
  1559. {
  1560. char name[32];
  1561. int err;
  1562. sprintf(name, "%s Playback Volume", pfx);
  1563. err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
  1564. HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
  1565. if (err < 0)
  1566. return err;
  1567. sprintf(name, "%s Playback Switch", pfx);
  1568. err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
  1569. HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
  1570. if (err < 0)
  1571. return err;
  1572. return 0;
  1573. }
  1574. /* add playback controls from the parsed DAC table */
  1575. static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
  1576. const struct auto_pin_cfg *cfg)
  1577. {
  1578. static const char *chname[4] = {
  1579. "Front", "Surround", NULL /*CLFE*/, "Side"
  1580. };
  1581. hda_nid_t nid;
  1582. int i, err;
  1583. struct sigmatel_spec *spec = codec->spec;
  1584. unsigned int wid_caps;
  1585. for (i = 0; i < cfg->line_outs; i++) {
  1586. if (!spec->multiout.dac_nids[i])
  1587. continue;
  1588. nid = spec->multiout.dac_nids[i];
  1589. if (i == 2) {
  1590. /* Center/LFE */
  1591. err = create_controls(spec, "Center", nid, 1);
  1592. if (err < 0)
  1593. return err;
  1594. err = create_controls(spec, "LFE", nid, 2);
  1595. if (err < 0)
  1596. return err;
  1597. wid_caps = get_wcaps(codec, nid);
  1598. if (wid_caps & AC_WCAP_LR_SWAP) {
  1599. err = stac92xx_add_control(spec,
  1600. STAC_CTL_WIDGET_CLFE_SWITCH,
  1601. "Swap Center/LFE Playback Switch", nid);
  1602. if (err < 0)
  1603. return err;
  1604. }
  1605. } else {
  1606. err = create_controls(spec, chname[i], nid, 3);
  1607. if (err < 0)
  1608. return err;
  1609. }
  1610. }
  1611. if (spec->line_switch)
  1612. if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
  1613. return err;
  1614. if (spec->mic_switch)
  1615. if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
  1616. return err;
  1617. return 0;
  1618. }
  1619. static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
  1620. {
  1621. if (is_in_dac_nids(spec, nid))
  1622. return 1;
  1623. if (spec->multiout.hp_nid == nid)
  1624. return 1;
  1625. return 0;
  1626. }
  1627. static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
  1628. {
  1629. if (!spec->multiout.hp_nid)
  1630. spec->multiout.hp_nid = nid;
  1631. else if (spec->multiout.num_dacs > 4) {
  1632. printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
  1633. return 1;
  1634. } else {
  1635. spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
  1636. spec->multiout.num_dacs++;
  1637. }
  1638. return 0;
  1639. }
  1640. /* add playback controls for Speaker and HP outputs */
  1641. static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
  1642. struct auto_pin_cfg *cfg)
  1643. {
  1644. struct sigmatel_spec *spec = codec->spec;
  1645. hda_nid_t nid;
  1646. int i, old_num_dacs, err;
  1647. old_num_dacs = spec->multiout.num_dacs;
  1648. for (i = 0; i < cfg->hp_outs; i++) {
  1649. unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
  1650. if (wid_caps & AC_WCAP_UNSOL_CAP)
  1651. spec->hp_detect = 1;
  1652. nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
  1653. AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
  1654. if (check_in_dac_nids(spec, nid))
  1655. nid = 0;
  1656. if (! nid)
  1657. continue;
  1658. add_spec_dacs(spec, nid);
  1659. }
  1660. for (i = 0; i < cfg->speaker_outs; i++) {
  1661. nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
  1662. AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
  1663. if (check_in_dac_nids(spec, nid))
  1664. nid = 0;
  1665. if (! nid)
  1666. continue;
  1667. add_spec_dacs(spec, nid);
  1668. }
  1669. for (i = 0; i < cfg->line_outs; i++) {
  1670. nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
  1671. AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
  1672. if (check_in_dac_nids(spec, nid))
  1673. nid = 0;
  1674. if (! nid)
  1675. continue;
  1676. add_spec_dacs(spec, nid);
  1677. }
  1678. for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
  1679. static const char *pfxs[] = {
  1680. "Speaker", "External Speaker", "Speaker2",
  1681. };
  1682. err = create_controls(spec, pfxs[i - old_num_dacs],
  1683. spec->multiout.dac_nids[i], 3);
  1684. if (err < 0)
  1685. return err;
  1686. }
  1687. if (spec->multiout.hp_nid) {
  1688. const char *pfx;
  1689. if (old_num_dacs == spec->multiout.num_dacs)
  1690. pfx = "Master";
  1691. else
  1692. pfx = "Headphone";
  1693. err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
  1694. if (err < 0)
  1695. return err;
  1696. }
  1697. return 0;
  1698. }
  1699. /* labels for dmic mux inputs */
  1700. static const char *stac92xx_dmic_labels[5] = {
  1701. "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
  1702. "Digital Mic 3", "Digital Mic 4"
  1703. };
  1704. /* create playback/capture controls for input pins on dmic capable codecs */
  1705. static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
  1706. const struct auto_pin_cfg *cfg)
  1707. {
  1708. struct sigmatel_spec *spec = codec->spec;
  1709. struct hda_input_mux *dimux = &spec->private_dimux;
  1710. hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
  1711. int i, j;
  1712. dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
  1713. dimux->items[dimux->num_items].index = 0;
  1714. dimux->num_items++;
  1715. for (i = 0; i < spec->num_dmics; i++) {
  1716. int index;
  1717. int num_cons;
  1718. unsigned int def_conf;
  1719. def_conf = snd_hda_codec_read(codec,
  1720. spec->dmic_nids[i],
  1721. 0,
  1722. AC_VERB_GET_CONFIG_DEFAULT,
  1723. 0);
  1724. if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
  1725. continue;
  1726. num_cons = snd_hda_get_connections(codec,
  1727. spec->dmux_nid,
  1728. con_lst,
  1729. HDA_MAX_NUM_INPUTS);
  1730. for (j = 0; j < num_cons; j++)
  1731. if (con_lst[j] == spec->dmic_nids[i]) {
  1732. index = j;
  1733. goto found;
  1734. }
  1735. continue;
  1736. found:
  1737. dimux->items[dimux->num_items].label =
  1738. stac92xx_dmic_labels[dimux->num_items];
  1739. dimux->items[dimux->num_items].index = index;
  1740. dimux->num_items++;
  1741. }
  1742. return 0;
  1743. }
  1744. /* create playback/capture controls for input pins */
  1745. static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
  1746. {
  1747. struct sigmatel_spec *spec = codec->spec;
  1748. struct hda_input_mux *imux = &spec->private_imux;
  1749. hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
  1750. int i, j, k;
  1751. for (i = 0; i < AUTO_PIN_LAST; i++) {
  1752. int index;
  1753. if (!cfg->input_pins[i])
  1754. continue;
  1755. index = -1;
  1756. for (j = 0; j < spec->num_muxes; j++) {
  1757. int num_cons;
  1758. num_cons = snd_hda_get_connections(codec,
  1759. spec->mux_nids[j],
  1760. con_lst,
  1761. HDA_MAX_NUM_INPUTS);
  1762. for (k = 0; k < num_cons; k++)
  1763. if (con_lst[k] == cfg->input_pins[i]) {
  1764. index = k;
  1765. goto found;
  1766. }
  1767. }
  1768. continue;
  1769. found:
  1770. imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
  1771. imux->items[imux->num_items].index = index;
  1772. imux->num_items++;
  1773. }
  1774. if (imux->num_items) {
  1775. /*
  1776. * Set the current input for the muxes.
  1777. * The STAC9221 has two input muxes with identical source
  1778. * NID lists. Hopefully this won't get confused.
  1779. */
  1780. for (i = 0; i < spec->num_muxes; i++) {
  1781. snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
  1782. AC_VERB_SET_CONNECT_SEL,
  1783. imux->items[0].index);
  1784. }
  1785. }
  1786. return 0;
  1787. }
  1788. static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
  1789. {
  1790. struct sigmatel_spec *spec = codec->spec;
  1791. int i;
  1792. for (i = 0; i < spec->autocfg.line_outs; i++) {
  1793. hda_nid_t nid = spec->autocfg.line_out_pins[i];
  1794. stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
  1795. }
  1796. }
  1797. static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
  1798. {
  1799. struct sigmatel_spec *spec = codec->spec;
  1800. int i;
  1801. for (i = 0; i < spec->autocfg.hp_outs; i++) {
  1802. hda_nid_t pin;
  1803. pin = spec->autocfg.hp_pins[i];
  1804. if (pin) /* connect to front */
  1805. stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
  1806. }
  1807. for (i = 0; i < spec->autocfg.speaker_outs; i++) {
  1808. hda_nid_t pin;
  1809. pin = spec->autocfg.speaker_pins[i];
  1810. if (pin) /* connect to front */
  1811. stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
  1812. }
  1813. }
  1814. static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
  1815. {
  1816. struct sigmatel_spec *spec = codec->spec;
  1817. int err;
  1818. if ((err = snd_hda_parse_pin_def_config(codec,
  1819. &spec->autocfg,
  1820. spec->dmic_nids)) < 0)
  1821. return err;
  1822. if (! spec->autocfg.line_outs)
  1823. return 0; /* can't find valid pin config */
  1824. if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
  1825. return err;
  1826. if (spec->multiout.num_dacs == 0)
  1827. if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
  1828. return err;
  1829. err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
  1830. if (err < 0)
  1831. return err;
  1832. err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
  1833. if (err < 0)
  1834. return err;
  1835. err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
  1836. if (err < 0)
  1837. return err;
  1838. if (spec->num_dmics > 0)
  1839. if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
  1840. &spec->autocfg)) < 0)
  1841. return err;
  1842. spec->multiout.max_channels = spec->multiout.num_dacs * 2;
  1843. if (spec->multiout.max_channels > 2)
  1844. spec->surr_switch = 1;
  1845. if (spec->autocfg.dig_out_pin)
  1846. spec->multiout.dig_out_nid = dig_out;
  1847. if (spec->autocfg.dig_in_pin)
  1848. spec->dig_in_nid = dig_in;
  1849. if (spec->kctl_alloc)
  1850. spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
  1851. spec->input_mux = &spec->private_imux;
  1852. spec->dinput_mux = &spec->private_dimux;
  1853. return 1;
  1854. }
  1855. /* add playback controls for HP output */
  1856. static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
  1857. struct auto_pin_cfg *cfg)
  1858. {
  1859. struct sigmatel_spec *spec = codec->spec;
  1860. hda_nid_t pin = cfg->hp_pins[0];
  1861. unsigned int wid_caps;
  1862. if (! pin)
  1863. return 0;
  1864. wid_caps = get_wcaps(codec, pin);
  1865. if (wid_caps & AC_WCAP_UNSOL_CAP)
  1866. spec->hp_detect = 1;
  1867. return 0;
  1868. }
  1869. /* add playback controls for LFE output */
  1870. static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
  1871. struct auto_pin_cfg *cfg)
  1872. {
  1873. struct sigmatel_spec *spec = codec->spec;
  1874. int err;
  1875. hda_nid_t lfe_pin = 0x0;
  1876. int i;
  1877. /*
  1878. * search speaker outs and line outs for a mono speaker pin
  1879. * with an amp. If one is found, add LFE controls
  1880. * for it.
  1881. */
  1882. for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
  1883. hda_nid_t pin = spec->autocfg.speaker_pins[i];
  1884. unsigned long wcaps = get_wcaps(codec, pin);
  1885. wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
  1886. if (wcaps == AC_WCAP_OUT_AMP)
  1887. /* found a mono speaker with an amp, must be lfe */
  1888. lfe_pin = pin;
  1889. }
  1890. /* if speaker_outs is 0, then speakers may be in line_outs */
  1891. if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
  1892. for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
  1893. hda_nid_t pin = spec->autocfg.line_out_pins[i];
  1894. unsigned long cfg;
  1895. cfg = snd_hda_codec_read(codec, pin, 0,
  1896. AC_VERB_GET_CONFIG_DEFAULT,
  1897. 0x00);
  1898. if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
  1899. unsigned long wcaps = get_wcaps(codec, pin);
  1900. wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
  1901. if (wcaps == AC_WCAP_OUT_AMP)
  1902. /* found a mono speaker with an amp,
  1903. must be lfe */
  1904. lfe_pin = pin;
  1905. }
  1906. }
  1907. }
  1908. if (lfe_pin) {
  1909. err = create_controls(spec, "LFE", lfe_pin, 1);
  1910. if (err < 0)
  1911. return err;
  1912. }
  1913. return 0;
  1914. }
  1915. static int stac9200_parse_auto_config(struct hda_codec *codec)
  1916. {
  1917. struct sigmatel_spec *spec = codec->spec;
  1918. int err;
  1919. if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
  1920. return err;
  1921. if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
  1922. return err;
  1923. if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
  1924. return err;
  1925. if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
  1926. return err;
  1927. if (spec->autocfg.dig_out_pin)
  1928. spec->multiout.dig_out_nid = 0x05;
  1929. if (spec->autocfg.dig_in_pin)
  1930. spec->dig_in_nid = 0x04;
  1931. if (spec->kctl_alloc)
  1932. spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
  1933. spec->input_mux = &spec->private_imux;
  1934. spec->dinput_mux = &spec->private_dimux;
  1935. return 1;
  1936. }
  1937. /*
  1938. * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
  1939. * funky external mute control using GPIO pins.
  1940. */
  1941. static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
  1942. {
  1943. unsigned int gpiostate, gpiomask, gpiodir;
  1944. gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
  1945. AC_VERB_GET_GPIO_DATA, 0);
  1946. if (!muted)
  1947. gpiostate |= (1 << pin);
  1948. else
  1949. gpiostate &= ~(1 << pin);
  1950. gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
  1951. AC_VERB_GET_GPIO_MASK, 0);
  1952. gpiomask |= (1 << pin);
  1953. gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
  1954. AC_VERB_GET_GPIO_DIRECTION, 0);
  1955. gpiodir |= (1 << pin);
  1956. /* AppleHDA seems to do this -- WTF is this verb?? */
  1957. snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
  1958. snd_hda_codec_write(codec, codec->afg, 0,
  1959. AC_VERB_SET_GPIO_MASK, gpiomask);
  1960. snd_hda_codec_write(codec, codec->afg, 0,
  1961. AC_VERB_SET_GPIO_DIRECTION, gpiodir);
  1962. msleep(1);
  1963. snd_hda_codec_write(codec, codec->afg, 0,
  1964. AC_VERB_SET_GPIO_DATA, gpiostate);
  1965. }
  1966. static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
  1967. unsigned int event)
  1968. {
  1969. if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
  1970. snd_hda_codec_write_cache(codec, nid, 0,
  1971. AC_VERB_SET_UNSOLICITED_ENABLE,
  1972. (AC_USRSP_EN | event));
  1973. }
  1974. static int stac92xx_init(struct hda_codec *codec)
  1975. {
  1976. struct sigmatel_spec *spec = codec->spec;
  1977. struct auto_pin_cfg *cfg = &spec->autocfg;
  1978. int i;
  1979. snd_hda_sequence_write(codec, spec->init);
  1980. /* set up pins */
  1981. if (spec->hp_detect) {
  1982. /* Enable unsolicited responses on the HP widget */
  1983. for (i = 0; i < cfg->hp_outs; i++)
  1984. enable_pin_detect(codec, cfg->hp_pins[i],
  1985. STAC_HP_EVENT);
  1986. /* force to enable the first line-out; the others are set up
  1987. * in unsol_event
  1988. */
  1989. stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
  1990. AC_PINCTL_OUT_EN);
  1991. stac92xx_auto_init_hp_out(codec);
  1992. /* fake event to set up pins */
  1993. codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
  1994. } else {
  1995. stac92xx_auto_init_multi_out(codec);
  1996. stac92xx_auto_init_hp_out(codec);
  1997. }
  1998. for (i = 0; i < AUTO_PIN_LAST; i++) {
  1999. hda_nid_t nid = cfg->input_pins[i];
  2000. if (nid) {
  2001. unsigned int pinctl = AC_PINCTL_IN_EN;
  2002. if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
  2003. pinctl |= stac92xx_get_vref(codec, nid);
  2004. stac92xx_auto_set_pinctl(codec, nid, pinctl);
  2005. }
  2006. }
  2007. if (spec->num_dmics > 0)
  2008. for (i = 0; i < spec->num_dmics; i++)
  2009. stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
  2010. AC_PINCTL_IN_EN);
  2011. if (cfg->dig_out_pin)
  2012. stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
  2013. AC_PINCTL_OUT_EN);
  2014. if (cfg->dig_in_pin)
  2015. stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
  2016. AC_PINCTL_IN_EN);
  2017. if (spec->gpio_mute) {
  2018. stac922x_gpio_mute(codec, 0, 0);
  2019. stac922x_gpio_mute(codec, 1, 0);
  2020. }
  2021. return 0;
  2022. }
  2023. static void stac92xx_free(struct hda_codec *codec)
  2024. {
  2025. struct sigmatel_spec *spec = codec->spec;
  2026. int i;
  2027. if (! spec)
  2028. return;
  2029. if (spec->kctl_alloc) {
  2030. for (i = 0; i < spec->num_kctl_used; i++)
  2031. kfree(spec->kctl_alloc[i].name);
  2032. kfree(spec->kctl_alloc);
  2033. }
  2034. if (spec->bios_pin_configs)
  2035. kfree(spec->bios_pin_configs);
  2036. kfree(spec);
  2037. }
  2038. static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
  2039. unsigned int flag)
  2040. {
  2041. unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
  2042. 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
  2043. if (pin_ctl & AC_PINCTL_IN_EN) {
  2044. /*
  2045. * we need to check the current set-up direction of
  2046. * shared input pins since they can be switched via
  2047. * "xxx as Output" mixer switch
  2048. */
  2049. struct sigmatel_spec *spec = codec->spec;
  2050. struct auto_pin_cfg *cfg = &spec->autocfg;
  2051. if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
  2052. spec->line_switch) ||
  2053. (nid == cfg->input_pins[AUTO_PIN_MIC] &&
  2054. spec->mic_switch))
  2055. return;
  2056. }
  2057. /* if setting pin direction bits, clear the current
  2058. direction bits first */
  2059. if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
  2060. pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
  2061. snd_hda_codec_write_cache(codec, nid, 0,
  2062. AC_VERB_SET_PIN_WIDGET_CONTROL,
  2063. pin_ctl | flag);
  2064. }
  2065. static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
  2066. unsigned int flag)
  2067. {
  2068. unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
  2069. 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
  2070. snd_hda_codec_write_cache(codec, nid, 0,
  2071. AC_VERB_SET_PIN_WIDGET_CONTROL,
  2072. pin_ctl & ~flag);
  2073. }
  2074. static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
  2075. {
  2076. if (!nid)
  2077. return 0;
  2078. if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
  2079. & (1 << 31))
  2080. return 1;
  2081. return 0;
  2082. }
  2083. static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
  2084. {
  2085. struct sigmatel_spec *spec = codec->spec;
  2086. struct auto_pin_cfg *cfg = &spec->autocfg;
  2087. int i, presence;
  2088. presence = 0;
  2089. for (i = 0; i < cfg->hp_outs; i++) {
  2090. presence = get_pin_presence(codec, cfg->hp_pins[i]);
  2091. if (presence)
  2092. break;
  2093. }
  2094. if (presence) {
  2095. /* disable lineouts, enable hp */
  2096. for (i = 0; i < cfg->line_outs; i++)
  2097. stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
  2098. AC_PINCTL_OUT_EN);
  2099. for (i = 0; i < cfg->speaker_outs; i++)
  2100. stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
  2101. AC_PINCTL_OUT_EN);
  2102. } else {
  2103. /* enable lineouts, disable hp */
  2104. for (i = 0; i < cfg->line_outs; i++)
  2105. stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
  2106. AC_PINCTL_OUT_EN);
  2107. for (i = 0; i < cfg->speaker_outs; i++)
  2108. stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
  2109. AC_PINCTL_OUT_EN);
  2110. }
  2111. }
  2112. static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
  2113. {
  2114. switch (res >> 26) {
  2115. case STAC_HP_EVENT:
  2116. stac92xx_hp_detect(codec, res);
  2117. break;
  2118. }
  2119. }
  2120. #ifdef SND_HDA_NEEDS_RESUME
  2121. static int stac92xx_resume(struct hda_codec *codec)
  2122. {
  2123. struct sigmatel_spec *spec = codec->spec;
  2124. stac92xx_set_config_regs(codec);
  2125. snd_hda_sequence_write(codec, spec->init);
  2126. if (spec->gpio_mute) {
  2127. stac922x_gpio_mute(codec, 0, 0);
  2128. stac922x_gpio_mute(codec, 1, 0);
  2129. }
  2130. snd_hda_codec_resume_amp(codec);
  2131. snd_hda_codec_resume_cache(codec);
  2132. /* invoke unsolicited event to reset the HP state */
  2133. if (spec->hp_detect)
  2134. codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
  2135. return 0;
  2136. }
  2137. #endif
  2138. static struct hda_codec_ops stac92xx_patch_ops = {
  2139. .build_controls = stac92xx_build_controls,
  2140. .build_pcms = stac92xx_build_pcms,
  2141. .init = stac92xx_init,
  2142. .free = stac92xx_free,
  2143. .unsol_event = stac92xx_unsol_event,
  2144. #ifdef SND_HDA_NEEDS_RESUME
  2145. .resume = stac92xx_resume,
  2146. #endif
  2147. };
  2148. static int patch_stac9200(struct hda_codec *codec)
  2149. {
  2150. struct sigmatel_spec *spec;
  2151. int err;
  2152. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2153. if (spec == NULL)
  2154. return -ENOMEM;
  2155. codec->spec = spec;
  2156. spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
  2157. spec->pin_nids = stac9200_pin_nids;
  2158. spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
  2159. stac9200_models,
  2160. stac9200_cfg_tbl);
  2161. if (spec->board_config < 0) {
  2162. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
  2163. err = stac92xx_save_bios_config_regs(codec);
  2164. if (err < 0) {
  2165. stac92xx_free(codec);
  2166. return err;
  2167. }
  2168. spec->pin_configs = spec->bios_pin_configs;
  2169. } else {
  2170. spec->pin_configs = stac9200_brd_tbl[spec->board_config];
  2171. stac92xx_set_config_regs(codec);
  2172. }
  2173. spec->multiout.max_channels = 2;
  2174. spec->multiout.num_dacs = 1;
  2175. spec->multiout.dac_nids = stac9200_dac_nids;
  2176. spec->adc_nids = stac9200_adc_nids;
  2177. spec->mux_nids = stac9200_mux_nids;
  2178. spec->num_muxes = 1;
  2179. spec->num_dmics = 0;
  2180. spec->num_adcs = 1;
  2181. if (spec->board_config == STAC_9200_GATEWAY)
  2182. spec->init = stac9200_eapd_init;
  2183. else
  2184. spec->init = stac9200_core_init;
  2185. spec->mixer = stac9200_mixer;
  2186. err = stac9200_parse_auto_config(codec);
  2187. if (err < 0) {
  2188. stac92xx_free(codec);
  2189. return err;
  2190. }
  2191. codec->patch_ops = stac92xx_patch_ops;
  2192. return 0;
  2193. }
  2194. static int patch_stac925x(struct hda_codec *codec)
  2195. {
  2196. struct sigmatel_spec *spec;
  2197. int err;
  2198. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2199. if (spec == NULL)
  2200. return -ENOMEM;
  2201. codec->spec = spec;
  2202. spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
  2203. spec->pin_nids = stac925x_pin_nids;
  2204. spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
  2205. stac925x_models,
  2206. stac925x_cfg_tbl);
  2207. again:
  2208. if (spec->board_config < 0) {
  2209. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
  2210. "using BIOS defaults\n");
  2211. err = stac92xx_save_bios_config_regs(codec);
  2212. if (err < 0) {
  2213. stac92xx_free(codec);
  2214. return err;
  2215. }
  2216. spec->pin_configs = spec->bios_pin_configs;
  2217. } else if (stac925x_brd_tbl[spec->board_config] != NULL){
  2218. spec->pin_configs = stac925x_brd_tbl[spec->board_config];
  2219. stac92xx_set_config_regs(codec);
  2220. }
  2221. spec->multiout.max_channels = 2;
  2222. spec->multiout.num_dacs = 1;
  2223. spec->multiout.dac_nids = stac925x_dac_nids;
  2224. spec->adc_nids = stac925x_adc_nids;
  2225. spec->mux_nids = stac925x_mux_nids;
  2226. spec->num_muxes = 1;
  2227. spec->num_adcs = 1;
  2228. switch (codec->vendor_id) {
  2229. case 0x83847632: /* STAC9202 */
  2230. case 0x83847633: /* STAC9202D */
  2231. case 0x83847636: /* STAC9251 */
  2232. case 0x83847637: /* STAC9251D */
  2233. spec->num_dmics = 1;
  2234. spec->dmic_nids = stac925x_dmic_nids;
  2235. break;
  2236. default:
  2237. spec->num_dmics = 0;
  2238. break;
  2239. }
  2240. spec->init = stac925x_core_init;
  2241. spec->mixer = stac925x_mixer;
  2242. err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
  2243. if (!err) {
  2244. if (spec->board_config < 0) {
  2245. printk(KERN_WARNING "hda_codec: No auto-config is "
  2246. "available, default to model=ref\n");
  2247. spec->board_config = STAC_925x_REF;
  2248. goto again;
  2249. }
  2250. err = -EINVAL;
  2251. }
  2252. if (err < 0) {
  2253. stac92xx_free(codec);
  2254. return err;
  2255. }
  2256. codec->patch_ops = stac92xx_patch_ops;
  2257. return 0;
  2258. }
  2259. static int patch_stac922x(struct hda_codec *codec)
  2260. {
  2261. struct sigmatel_spec *spec;
  2262. int err;
  2263. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2264. if (spec == NULL)
  2265. return -ENOMEM;
  2266. codec->spec = spec;
  2267. spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
  2268. spec->pin_nids = stac922x_pin_nids;
  2269. spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
  2270. stac922x_models,
  2271. stac922x_cfg_tbl);
  2272. if (spec->board_config == STAC_INTEL_MAC_V3) {
  2273. spec->gpio_mute = 1;
  2274. /* Intel Macs have all same PCI SSID, so we need to check
  2275. * codec SSID to distinguish the exact models
  2276. */
  2277. printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
  2278. switch (codec->subsystem_id) {
  2279. case 0x106b0800:
  2280. spec->board_config = STAC_INTEL_MAC_V1;
  2281. break;
  2282. case 0x106b0600:
  2283. case 0x106b0700:
  2284. spec->board_config = STAC_INTEL_MAC_V2;
  2285. break;
  2286. case 0x106b0e00:
  2287. case 0x106b0f00:
  2288. case 0x106b1600:
  2289. case 0x106b1700:
  2290. case 0x106b0200:
  2291. case 0x106b1e00:
  2292. spec->board_config = STAC_INTEL_MAC_V3;
  2293. break;
  2294. case 0x106b1a00:
  2295. case 0x00000100:
  2296. spec->board_config = STAC_INTEL_MAC_V4;
  2297. break;
  2298. case 0x106b0a00:
  2299. case 0x106b2200:
  2300. spec->board_config = STAC_INTEL_MAC_V5;
  2301. break;
  2302. }
  2303. }
  2304. again:
  2305. if (spec->board_config < 0) {
  2306. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
  2307. "using BIOS defaults\n");
  2308. err = stac92xx_save_bios_config_regs(codec);
  2309. if (err < 0) {
  2310. stac92xx_free(codec);
  2311. return err;
  2312. }
  2313. spec->pin_configs = spec->bios_pin_configs;
  2314. } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
  2315. spec->pin_configs = stac922x_brd_tbl[spec->board_config];
  2316. stac92xx_set_config_regs(codec);
  2317. }
  2318. spec->adc_nids = stac922x_adc_nids;
  2319. spec->mux_nids = stac922x_mux_nids;
  2320. spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
  2321. spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
  2322. spec->num_dmics = 0;
  2323. spec->init = stac922x_core_init;
  2324. spec->mixer = stac922x_mixer;
  2325. spec->multiout.dac_nids = spec->dac_nids;
  2326. err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
  2327. if (!err) {
  2328. if (spec->board_config < 0) {
  2329. printk(KERN_WARNING "hda_codec: No auto-config is "
  2330. "available, default to model=ref\n");
  2331. spec->board_config = STAC_D945_REF;
  2332. goto again;
  2333. }
  2334. err = -EINVAL;
  2335. }
  2336. if (err < 0) {
  2337. stac92xx_free(codec);
  2338. return err;
  2339. }
  2340. codec->patch_ops = stac92xx_patch_ops;
  2341. /* Fix Mux capture level; max to 2 */
  2342. snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
  2343. (0 << AC_AMPCAP_OFFSET_SHIFT) |
  2344. (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
  2345. (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
  2346. (0 << AC_AMPCAP_MUTE_SHIFT));
  2347. return 0;
  2348. }
  2349. static int patch_stac927x(struct hda_codec *codec)
  2350. {
  2351. struct sigmatel_spec *spec;
  2352. int err;
  2353. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2354. if (spec == NULL)
  2355. return -ENOMEM;
  2356. codec->spec = spec;
  2357. spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
  2358. spec->pin_nids = stac927x_pin_nids;
  2359. spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
  2360. stac927x_models,
  2361. stac927x_cfg_tbl);
  2362. again:
  2363. if (spec->board_config < 0) {
  2364. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC927x, using BIOS defaults\n");
  2365. err = stac92xx_save_bios_config_regs(codec);
  2366. if (err < 0) {
  2367. stac92xx_free(codec);
  2368. return err;
  2369. }
  2370. spec->pin_configs = spec->bios_pin_configs;
  2371. } else if (stac927x_brd_tbl[spec->board_config] != NULL) {
  2372. spec->pin_configs = stac927x_brd_tbl[spec->board_config];
  2373. stac92xx_set_config_regs(codec);
  2374. }
  2375. switch (spec->board_config) {
  2376. case STAC_D965_3ST:
  2377. spec->adc_nids = stac927x_adc_nids;
  2378. spec->mux_nids = stac927x_mux_nids;
  2379. spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
  2380. spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
  2381. spec->num_dmics = 0;
  2382. spec->init = d965_core_init;
  2383. spec->mixer = stac927x_mixer;
  2384. break;
  2385. case STAC_D965_5ST:
  2386. spec->adc_nids = stac927x_adc_nids;
  2387. spec->mux_nids = stac927x_mux_nids;
  2388. spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
  2389. spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
  2390. spec->num_dmics = 0;
  2391. spec->init = d965_core_init;
  2392. spec->mixer = stac927x_mixer;
  2393. break;
  2394. default:
  2395. spec->adc_nids = stac927x_adc_nids;
  2396. spec->mux_nids = stac927x_mux_nids;
  2397. spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
  2398. spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
  2399. spec->num_dmics = 0;
  2400. spec->init = stac927x_core_init;
  2401. spec->mixer = stac927x_mixer;
  2402. }
  2403. spec->multiout.dac_nids = spec->dac_nids;
  2404. /* GPIO0 High = Enable EAPD */
  2405. spec->gpio_mask = spec->gpio_data = 0x00000001;
  2406. stac92xx_enable_gpio_mask(codec);
  2407. err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
  2408. if (!err) {
  2409. if (spec->board_config < 0) {
  2410. printk(KERN_WARNING "hda_codec: No auto-config is "
  2411. "available, default to model=ref\n");
  2412. spec->board_config = STAC_D965_REF;
  2413. goto again;
  2414. }
  2415. err = -EINVAL;
  2416. }
  2417. if (err < 0) {
  2418. stac92xx_free(codec);
  2419. return err;
  2420. }
  2421. codec->patch_ops = stac92xx_patch_ops;
  2422. return 0;
  2423. }
  2424. static int patch_stac9205(struct hda_codec *codec)
  2425. {
  2426. struct sigmatel_spec *spec;
  2427. int err;
  2428. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2429. if (spec == NULL)
  2430. return -ENOMEM;
  2431. codec->spec = spec;
  2432. spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
  2433. spec->pin_nids = stac9205_pin_nids;
  2434. spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
  2435. stac9205_models,
  2436. stac9205_cfg_tbl);
  2437. again:
  2438. if (spec->board_config < 0) {
  2439. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
  2440. err = stac92xx_save_bios_config_regs(codec);
  2441. if (err < 0) {
  2442. stac92xx_free(codec);
  2443. return err;
  2444. }
  2445. spec->pin_configs = spec->bios_pin_configs;
  2446. } else {
  2447. spec->pin_configs = stac9205_brd_tbl[spec->board_config];
  2448. stac92xx_set_config_regs(codec);
  2449. }
  2450. spec->adc_nids = stac9205_adc_nids;
  2451. spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
  2452. spec->mux_nids = stac9205_mux_nids;
  2453. spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
  2454. spec->dmic_nids = stac9205_dmic_nids;
  2455. spec->num_dmics = ARRAY_SIZE(stac9205_dmic_nids);
  2456. spec->dmux_nid = 0x1d;
  2457. spec->init = stac9205_core_init;
  2458. spec->mixer = stac9205_mixer;
  2459. spec->multiout.dac_nids = spec->dac_nids;
  2460. switch (spec->board_config){
  2461. case STAC_9205_DELL_M43:
  2462. /* Enable SPDIF in/out */
  2463. stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
  2464. stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
  2465. spec->gpio_mask = 0x00000007; /* GPIO0-2 */
  2466. /* GPIO0 High = EAPD, GPIO1 Low = DRM,
  2467. * GPIO2 High = Headphone Mute
  2468. */
  2469. spec->gpio_data = 0x00000005;
  2470. break;
  2471. default:
  2472. /* GPIO0 High = EAPD */
  2473. spec->gpio_mask = spec->gpio_data = 0x00000001;
  2474. break;
  2475. }
  2476. stac92xx_enable_gpio_mask(codec);
  2477. err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
  2478. if (!err) {
  2479. if (spec->board_config < 0) {
  2480. printk(KERN_WARNING "hda_codec: No auto-config is "
  2481. "available, default to model=ref\n");
  2482. spec->board_config = STAC_9205_REF;
  2483. goto again;
  2484. }
  2485. err = -EINVAL;
  2486. }
  2487. if (err < 0) {
  2488. stac92xx_free(codec);
  2489. return err;
  2490. }
  2491. codec->patch_ops = stac92xx_patch_ops;
  2492. return 0;
  2493. }
  2494. /*
  2495. * STAC9872 hack
  2496. */
  2497. /* static config for Sony VAIO FE550G and Sony VAIO AR */
  2498. static hda_nid_t vaio_dacs[] = { 0x2 };
  2499. #define VAIO_HP_DAC 0x5
  2500. static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
  2501. static hda_nid_t vaio_mux_nids[] = { 0x15 };
  2502. static struct hda_input_mux vaio_mux = {
  2503. .num_items = 2,
  2504. .items = {
  2505. /* { "HP", 0x0 }, */
  2506. { "Mic Jack", 0x1 },
  2507. { "Internal Mic", 0x2 },
  2508. { "PCM", 0x3 },
  2509. }
  2510. };
  2511. static struct hda_verb vaio_init[] = {
  2512. {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
  2513. {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
  2514. {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
  2515. {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
  2516. {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
  2517. {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
  2518. {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
  2519. {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
  2520. {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
  2521. {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
  2522. {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
  2523. {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
  2524. {}
  2525. };
  2526. static struct hda_verb vaio_ar_init[] = {
  2527. {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
  2528. {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
  2529. {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
  2530. {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
  2531. /* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
  2532. {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
  2533. {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
  2534. {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
  2535. {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
  2536. /* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
  2537. {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
  2538. {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
  2539. {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
  2540. {}
  2541. };
  2542. /* bind volumes of both NID 0x02 and 0x05 */
  2543. static struct hda_bind_ctls vaio_bind_master_vol = {
  2544. .ops = &snd_hda_bind_vol,
  2545. .values = {
  2546. HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
  2547. HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
  2548. 0
  2549. },
  2550. };
  2551. /* bind volumes of both NID 0x02 and 0x05 */
  2552. static struct hda_bind_ctls vaio_bind_master_sw = {
  2553. .ops = &snd_hda_bind_sw,
  2554. .values = {
  2555. HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
  2556. HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
  2557. 0,
  2558. },
  2559. };
  2560. static struct snd_kcontrol_new vaio_mixer[] = {
  2561. HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
  2562. HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
  2563. /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
  2564. HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
  2565. HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
  2566. {
  2567. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2568. .name = "Capture Source",
  2569. .count = 1,
  2570. .info = stac92xx_mux_enum_info,
  2571. .get = stac92xx_mux_enum_get,
  2572. .put = stac92xx_mux_enum_put,
  2573. },
  2574. {}
  2575. };
  2576. static struct snd_kcontrol_new vaio_ar_mixer[] = {
  2577. HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
  2578. HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
  2579. /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
  2580. HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
  2581. HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
  2582. /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
  2583. HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
  2584. {
  2585. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2586. .name = "Capture Source",
  2587. .count = 1,
  2588. .info = stac92xx_mux_enum_info,
  2589. .get = stac92xx_mux_enum_get,
  2590. .put = stac92xx_mux_enum_put,
  2591. },
  2592. {}
  2593. };
  2594. static struct hda_codec_ops stac9872_patch_ops = {
  2595. .build_controls = stac92xx_build_controls,
  2596. .build_pcms = stac92xx_build_pcms,
  2597. .init = stac92xx_init,
  2598. .free = stac92xx_free,
  2599. #ifdef SND_HDA_NEEDS_RESUME
  2600. .resume = stac92xx_resume,
  2601. #endif
  2602. };
  2603. static int stac9872_vaio_init(struct hda_codec *codec)
  2604. {
  2605. int err;
  2606. err = stac92xx_init(codec);
  2607. if (err < 0)
  2608. return err;
  2609. if (codec->patch_ops.unsol_event)
  2610. codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
  2611. return 0;
  2612. }
  2613. static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
  2614. {
  2615. if (get_pin_presence(codec, 0x0a)) {
  2616. stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
  2617. stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
  2618. } else {
  2619. stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
  2620. stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
  2621. }
  2622. }
  2623. static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
  2624. {
  2625. switch (res >> 26) {
  2626. case STAC_HP_EVENT:
  2627. stac9872_vaio_hp_detect(codec, res);
  2628. break;
  2629. }
  2630. }
  2631. static struct hda_codec_ops stac9872_vaio_patch_ops = {
  2632. .build_controls = stac92xx_build_controls,
  2633. .build_pcms = stac92xx_build_pcms,
  2634. .init = stac9872_vaio_init,
  2635. .free = stac92xx_free,
  2636. .unsol_event = stac9872_vaio_unsol_event,
  2637. #ifdef CONFIG_PM
  2638. .resume = stac92xx_resume,
  2639. #endif
  2640. };
  2641. enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
  2642. CXD9872RD_VAIO,
  2643. /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
  2644. STAC9872AK_VAIO,
  2645. /* Unknown. id=0x83847661 and subsys=0x104D1200. */
  2646. STAC9872K_VAIO,
  2647. /* AR Series. id=0x83847664 and subsys=104D1300 */
  2648. CXD9872AKD_VAIO,
  2649. STAC_9872_MODELS,
  2650. };
  2651. static const char *stac9872_models[STAC_9872_MODELS] = {
  2652. [CXD9872RD_VAIO] = "vaio",
  2653. [CXD9872AKD_VAIO] = "vaio-ar",
  2654. };
  2655. static struct snd_pci_quirk stac9872_cfg_tbl[] = {
  2656. SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
  2657. SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
  2658. SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
  2659. SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
  2660. {}
  2661. };
  2662. static int patch_stac9872(struct hda_codec *codec)
  2663. {
  2664. struct sigmatel_spec *spec;
  2665. int board_config;
  2666. board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
  2667. stac9872_models,
  2668. stac9872_cfg_tbl);
  2669. if (board_config < 0)
  2670. /* unknown config, let generic-parser do its job... */
  2671. return snd_hda_parse_generic_codec(codec);
  2672. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2673. if (spec == NULL)
  2674. return -ENOMEM;
  2675. codec->spec = spec;
  2676. switch (board_config) {
  2677. case CXD9872RD_VAIO:
  2678. case STAC9872AK_VAIO:
  2679. case STAC9872K_VAIO:
  2680. spec->mixer = vaio_mixer;
  2681. spec->init = vaio_init;
  2682. spec->multiout.max_channels = 2;
  2683. spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
  2684. spec->multiout.dac_nids = vaio_dacs;
  2685. spec->multiout.hp_nid = VAIO_HP_DAC;
  2686. spec->num_adcs = ARRAY_SIZE(vaio_adcs);
  2687. spec->adc_nids = vaio_adcs;
  2688. spec->input_mux = &vaio_mux;
  2689. spec->mux_nids = vaio_mux_nids;
  2690. codec->patch_ops = stac9872_vaio_patch_ops;
  2691. break;
  2692. case CXD9872AKD_VAIO:
  2693. spec->mixer = vaio_ar_mixer;
  2694. spec->init = vaio_ar_init;
  2695. spec->multiout.max_channels = 2;
  2696. spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
  2697. spec->multiout.dac_nids = vaio_dacs;
  2698. spec->multiout.hp_nid = VAIO_HP_DAC;
  2699. spec->num_adcs = ARRAY_SIZE(vaio_adcs);
  2700. spec->adc_nids = vaio_adcs;
  2701. spec->input_mux = &vaio_mux;
  2702. spec->mux_nids = vaio_mux_nids;
  2703. codec->patch_ops = stac9872_patch_ops;
  2704. break;
  2705. }
  2706. return 0;
  2707. }
  2708. /*
  2709. * patch entries
  2710. */
  2711. struct hda_codec_preset snd_hda_preset_sigmatel[] = {
  2712. { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
  2713. { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
  2714. { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
  2715. { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
  2716. { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
  2717. { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
  2718. { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
  2719. { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
  2720. { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
  2721. { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
  2722. { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
  2723. { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
  2724. { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
  2725. { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
  2726. { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
  2727. { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
  2728. { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
  2729. { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
  2730. { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
  2731. { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
  2732. { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
  2733. { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
  2734. { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
  2735. { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
  2736. { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
  2737. { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
  2738. { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
  2739. { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
  2740. { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
  2741. /* The following does not take into account .id=0x83847661 when subsys =
  2742. * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
  2743. * currently not fully supported.
  2744. */
  2745. { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
  2746. { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
  2747. { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
  2748. { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
  2749. { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
  2750. { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
  2751. { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
  2752. { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
  2753. { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
  2754. { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
  2755. { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
  2756. {} /* terminator */
  2757. };