iwl-5000.c 11 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007-2008 Intel Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  23. *
  24. *****************************************************************************/
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/version.h>
  28. #include <linux/init.h>
  29. #include <linux/pci.h>
  30. #include <linux/dma-mapping.h>
  31. #include <linux/delay.h>
  32. #include <linux/skbuff.h>
  33. #include <linux/netdevice.h>
  34. #include <linux/wireless.h>
  35. #include <net/mac80211.h>
  36. #include <linux/etherdevice.h>
  37. #include <asm/unaligned.h>
  38. #include "iwl-eeprom.h"
  39. #include "iwl-4965.h"
  40. #include "iwl-core.h"
  41. #include "iwl-io.h"
  42. #include "iwl-helpers.h"
  43. #include "iwl-5000-hw.h"
  44. #define IWL5000_UCODE_API "-1"
  45. static int iwl5000_apm_init(struct iwl_priv *priv)
  46. {
  47. int ret = 0;
  48. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  49. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  50. iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL);
  51. /* set "initialization complete" bit to move adapter
  52. * D0U* --> D0A* state */
  53. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  54. /* wait for clock stabilization */
  55. ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
  56. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  57. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  58. if (ret < 0) {
  59. IWL_DEBUG_INFO("Failed to init the card\n");
  60. return ret;
  61. }
  62. ret = iwl_grab_nic_access(priv);
  63. if (ret)
  64. return ret;
  65. /* enable DMA */
  66. iwl_write_prph(priv, APMG_CLK_EN_REG,
  67. APMG_CLK_VAL_DMA_CLK_RQT);
  68. udelay(20);
  69. iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  70. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  71. iwl_release_nic_access(priv);
  72. return ret;
  73. }
  74. /*
  75. * EEPROM
  76. */
  77. static u32 eeprom_indirect_address(const struct iwl_priv *priv, u32 address)
  78. {
  79. u16 offset = 0;
  80. if ((address & INDIRECT_ADDRESS) == 0)
  81. return address;
  82. switch (address & INDIRECT_TYPE_MSK) {
  83. case INDIRECT_HOST:
  84. offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_HOST);
  85. break;
  86. case INDIRECT_GENERAL:
  87. offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_GENERAL);
  88. break;
  89. case INDIRECT_REGULATORY:
  90. offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_REGULATORY);
  91. break;
  92. case INDIRECT_CALIBRATION:
  93. offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_CALIBRATION);
  94. break;
  95. case INDIRECT_PROCESS_ADJST:
  96. offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_PROCESS_ADJST);
  97. break;
  98. case INDIRECT_OTHERS:
  99. offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_OTHERS);
  100. break;
  101. default:
  102. IWL_ERROR("illegal indirect type: 0x%X\n",
  103. address & INDIRECT_TYPE_MSK);
  104. break;
  105. }
  106. /* translate the offset from words to byte */
  107. return (address & ADDRESS_MSK) + (offset << 1);
  108. }
  109. #ifdef CONFIG_IWL5000_RUN_TIME_CALIB
  110. static void iwl5000_gain_computation(struct iwl_priv *priv,
  111. u32 average_noise[NUM_RX_CHAINS],
  112. u16 min_average_noise_antenna_i,
  113. u32 min_average_noise)
  114. {
  115. int i;
  116. s32 delta_g;
  117. struct iwl_chain_noise_data *data = &priv->chain_noise_data;
  118. /* Find Gain Code for the antennas B and C */
  119. for (i = 1; i < NUM_RX_CHAINS; i++) {
  120. if ((data->disconn_array[i])) {
  121. data->delta_gain_code[i] = 0;
  122. continue;
  123. }
  124. delta_g = (1000 * ((s32)average_noise[0] -
  125. (s32)average_noise[i])) / 1500;
  126. /* bound gain by 2 bits value max, 3rd bit is sign */
  127. data->delta_gain_code[i] =
  128. min(abs(delta_g), CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
  129. if (delta_g < 0)
  130. /* set negative sign */
  131. data->delta_gain_code[i] |= (1 << 2);
  132. }
  133. IWL_DEBUG_CALIB("Delta gains: ANT_B = %d ANT_C = %d\n",
  134. data->delta_gain_code[1], data->delta_gain_code[2]);
  135. if (!data->radio_write) {
  136. struct iwl5000_calibration_chain_noise_gain_cmd cmd;
  137. memset(&cmd, 0, sizeof(cmd));
  138. cmd.op_code = IWL5000_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD;
  139. cmd.delta_gain_1 = data->delta_gain_code[1];
  140. cmd.delta_gain_2 = data->delta_gain_code[2];
  141. iwl_send_cmd_pdu_async(priv, REPLY_PHY_CALIBRATION_CMD,
  142. sizeof(cmd), &cmd, NULL);
  143. data->radio_write = 1;
  144. data->state = IWL_CHAIN_NOISE_CALIBRATED;
  145. }
  146. data->chain_noise_a = 0;
  147. data->chain_noise_b = 0;
  148. data->chain_noise_c = 0;
  149. data->chain_signal_a = 0;
  150. data->chain_signal_b = 0;
  151. data->chain_signal_c = 0;
  152. data->beacon_count = 0;
  153. }
  154. static void iwl5000_chain_noise_reset(struct iwl_priv *priv)
  155. {
  156. struct iwl_chain_noise_data *data = &priv->chain_noise_data;
  157. if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
  158. struct iwl5000_calibration_chain_noise_reset_cmd cmd;
  159. memset(&cmd, 0, sizeof(cmd));
  160. cmd.op_code = IWL5000_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD;
  161. if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
  162. sizeof(cmd), &cmd))
  163. IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
  164. data->state = IWL_CHAIN_NOISE_ACCUMULATE;
  165. IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
  166. }
  167. }
  168. static struct iwl_sensitivity_ranges iwl5000_sensitivity = {
  169. .min_nrg_cck = 95,
  170. .max_nrg_cck = 0,
  171. .auto_corr_min_ofdm = 90,
  172. .auto_corr_min_ofdm_mrc = 170,
  173. .auto_corr_min_ofdm_x1 = 120,
  174. .auto_corr_min_ofdm_mrc_x1 = 240,
  175. .auto_corr_max_ofdm = 120,
  176. .auto_corr_max_ofdm_mrc = 210,
  177. .auto_corr_max_ofdm_x1 = 155,
  178. .auto_corr_max_ofdm_mrc_x1 = 290,
  179. .auto_corr_min_cck = 125,
  180. .auto_corr_max_cck = 200,
  181. .auto_corr_min_cck_mrc = 170,
  182. .auto_corr_max_cck_mrc = 400,
  183. .nrg_th_cck = 95,
  184. .nrg_th_ofdm = 95,
  185. };
  186. #endif /* CONFIG_IWL5000_RUN_TIME_CALIB */
  187. static const u8 *iwl5000_eeprom_query_addr(const struct iwl_priv *priv,
  188. size_t offset)
  189. {
  190. u32 address = eeprom_indirect_address(priv, offset);
  191. BUG_ON(address >= priv->cfg->eeprom_size);
  192. return &priv->eeprom[address];
  193. }
  194. static int iwl5000_hw_set_hw_params(struct iwl_priv *priv)
  195. {
  196. if ((priv->cfg->mod_params->num_of_queues > IWL50_NUM_QUEUES) ||
  197. (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
  198. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  199. IWL_MIN_NUM_QUEUES, IWL50_NUM_QUEUES);
  200. return -EINVAL;
  201. }
  202. priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
  203. priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
  204. priv->hw_params.tx_cmd_len = sizeof(struct iwl4965_tx_cmd);
  205. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  206. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  207. if (priv->cfg->mod_params->amsdu_size_8K)
  208. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
  209. else
  210. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
  211. priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
  212. priv->hw_params.max_stations = IWL5000_STATION_COUNT;
  213. priv->hw_params.bcast_sta_id = IWL5000_BROADCAST_ID;
  214. priv->hw_params.max_data_size = IWL50_RTC_DATA_SIZE;
  215. priv->hw_params.max_inst_size = IWL50_RTC_INST_SIZE;
  216. priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
  217. priv->hw_params.fat_channel = BIT(IEEE80211_BAND_2GHZ) |
  218. BIT(IEEE80211_BAND_5GHZ);
  219. #ifdef CONFIG_IWL5000_RUN_TIME_CALIB
  220. priv->hw_params.sens = &iwl5000_sensitivity;
  221. #endif
  222. switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
  223. case CSR_HW_REV_TYPE_5100:
  224. case CSR_HW_REV_TYPE_5150:
  225. priv->hw_params.tx_chains_num = 1;
  226. priv->hw_params.rx_chains_num = 2;
  227. /* FIXME: move to ANT_A, ANT_B, ANT_C enum */
  228. priv->hw_params.valid_tx_ant = ANT_A;
  229. priv->hw_params.valid_rx_ant = ANT_AB;
  230. break;
  231. case CSR_HW_REV_TYPE_5300:
  232. case CSR_HW_REV_TYPE_5350:
  233. priv->hw_params.tx_chains_num = 3;
  234. priv->hw_params.rx_chains_num = 3;
  235. priv->hw_params.valid_tx_ant = ANT_ABC;
  236. priv->hw_params.valid_rx_ant = ANT_ABC;
  237. break;
  238. }
  239. switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
  240. case CSR_HW_REV_TYPE_5100:
  241. case CSR_HW_REV_TYPE_5300:
  242. /* 5X00 wants in Celsius */
  243. priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD;
  244. break;
  245. case CSR_HW_REV_TYPE_5150:
  246. case CSR_HW_REV_TYPE_5350:
  247. /* 5X50 wants in Kelvin */
  248. priv->hw_params.ct_kill_threshold =
  249. CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
  250. break;
  251. }
  252. return 0;
  253. }
  254. static struct iwl_hcmd_ops iwl5000_hcmd = {
  255. };
  256. static struct iwl_hcmd_utils_ops iwl5000_hcmd_utils = {
  257. #ifdef CONFIG_IWL5000_RUN_TIME_CALIB
  258. .gain_computation = iwl5000_gain_computation,
  259. .chain_noise_reset = iwl5000_chain_noise_reset,
  260. #endif
  261. };
  262. static struct iwl_lib_ops iwl5000_lib = {
  263. .set_hw_params = iwl5000_hw_set_hw_params,
  264. .apm_ops = {
  265. .init = iwl5000_apm_init,
  266. .set_pwr_src = iwl4965_set_pwr_src,
  267. },
  268. .eeprom_ops = {
  269. .regulatory_bands = {
  270. EEPROM_5000_REG_BAND_1_CHANNELS,
  271. EEPROM_5000_REG_BAND_2_CHANNELS,
  272. EEPROM_5000_REG_BAND_3_CHANNELS,
  273. EEPROM_5000_REG_BAND_4_CHANNELS,
  274. EEPROM_5000_REG_BAND_5_CHANNELS,
  275. EEPROM_5000_REG_BAND_24_FAT_CHANNELS,
  276. EEPROM_5000_REG_BAND_52_FAT_CHANNELS
  277. },
  278. .verify_signature = iwlcore_eeprom_verify_signature,
  279. .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
  280. .release_semaphore = iwlcore_eeprom_release_semaphore,
  281. .query_addr = iwl5000_eeprom_query_addr,
  282. },
  283. };
  284. static struct iwl_ops iwl5000_ops = {
  285. .lib = &iwl5000_lib,
  286. .hcmd = &iwl5000_hcmd,
  287. .utils = &iwl5000_hcmd_utils,
  288. };
  289. static struct iwl_mod_params iwl50_mod_params = {
  290. .num_of_queues = IWL50_NUM_QUEUES,
  291. .enable_qos = 1,
  292. .amsdu_size_8K = 1,
  293. /* the rest are 0 by default */
  294. };
  295. struct iwl_cfg iwl5300_agn_cfg = {
  296. .name = "5300AGN",
  297. .fw_name = "iwlwifi-5000" IWL5000_UCODE_API ".ucode",
  298. .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
  299. .ops = &iwl5000_ops,
  300. .eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
  301. .mod_params = &iwl50_mod_params,
  302. };
  303. struct iwl_cfg iwl5100_agn_cfg = {
  304. .name = "5100AGN",
  305. .fw_name = "iwlwifi-5000" IWL5000_UCODE_API ".ucode",
  306. .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
  307. .ops = &iwl5000_ops,
  308. .eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
  309. .mod_params = &iwl50_mod_params,
  310. };
  311. struct iwl_cfg iwl5350_agn_cfg = {
  312. .name = "5350AGN",
  313. .fw_name = "iwlwifi-5000" IWL5000_UCODE_API ".ucode",
  314. .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
  315. .ops = &iwl5000_ops,
  316. .eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
  317. .mod_params = &iwl50_mod_params,
  318. };
  319. module_param_named(disable50, iwl50_mod_params.disable, int, 0444);
  320. MODULE_PARM_DESC(disable50,
  321. "manually disable the 50XX radio (default 0 [radio on])");
  322. module_param_named(swcrypto50, iwl50_mod_params.sw_crypto, bool, 0444);
  323. MODULE_PARM_DESC(swcrypto50,
  324. "using software crypto engine (default 0 [hardware])\n");
  325. module_param_named(debug50, iwl50_mod_params.debug, int, 0444);
  326. MODULE_PARM_DESC(debug50, "50XX debug output mask");
  327. module_param_named(queues_num50, iwl50_mod_params.num_of_queues, int, 0444);
  328. MODULE_PARM_DESC(queues_num50, "number of hw queues in 50xx series");
  329. module_param_named(qos_enable50, iwl50_mod_params.enable_qos, int, 0444);
  330. MODULE_PARM_DESC(qos_enable50, "enable all 50XX QoS functionality");
  331. module_param_named(amsdu_size_8K50, iwl50_mod_params.amsdu_size_8K, int, 0444);
  332. MODULE_PARM_DESC(amsdu_size_8K50, "enable 8K amsdu size in 50XX series");