uv_bau.h 11 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * SGI UV Broadcast Assist Unit definitions
  7. *
  8. * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved.
  9. */
  10. #ifndef __ASM_X86_UV_BAU__
  11. #define __ASM_X86_UV_BAU__
  12. #include <linux/bitmap.h>
  13. #define BITSPERBYTE 8
  14. /*
  15. * Broadcast Assist Unit messaging structures
  16. *
  17. * Selective Broadcast activations are induced by software action
  18. * specifying a particular 8-descriptor "set" via a 6-bit index written
  19. * to an MMR.
  20. * Thus there are 64 unique 512-byte sets of SB descriptors - one set for
  21. * each 6-bit index value. These descriptor sets are mapped in sequence
  22. * starting with set 0 located at the address specified in the
  23. * BAU_SB_DESCRIPTOR_BASE register, set 1 is located at BASE + 512,
  24. * set 2 is at BASE + 2*512, set 3 at BASE + 3*512, and so on.
  25. *
  26. * We will use 31 sets, one for sending BAU messages from each of the 32
  27. * cpu's on the node.
  28. *
  29. * TLB shootdown will use the first of the 8 descriptors of each set.
  30. * Each of the descriptors is 64 bytes in size (8*64 = 512 bytes in a set).
  31. */
  32. #define UV_ITEMS_PER_DESCRIPTOR 8
  33. #define UV_CPUS_PER_ACT_STATUS 32
  34. #define UV_ACT_STATUS_MASK 0x3
  35. #define UV_ACT_STATUS_SIZE 2
  36. #define UV_ACTIVATION_DESCRIPTOR_SIZE 32
  37. #define UV_DISTRIBUTION_SIZE 256
  38. #define UV_SW_ACK_NPENDING 8
  39. #define UV_BAU_MESSAGE 200
  40. /*
  41. * Messaging irq; see irq_64.h and include/asm-x86/hw_irq_64.h
  42. * To be dynamically allocated in the future
  43. */
  44. #define UV_NET_ENDPOINT_INTD 0x38
  45. #define UV_DESC_BASE_PNODE_SHIFT 49
  46. #define UV_PAYLOADQ_PNODE_SHIFT 49
  47. #define UV_PTC_BASENAME "sgi_uv/ptc_statistics"
  48. #define uv_physnodeaddr(x) ((__pa((unsigned long)(x)) & uv_mmask))
  49. /*
  50. * bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1
  51. */
  52. #define DESC_STATUS_IDLE 0
  53. #define DESC_STATUS_ACTIVE 1
  54. #define DESC_STATUS_DESTINATION_TIMEOUT 2
  55. #define DESC_STATUS_SOURCE_TIMEOUT 3
  56. /*
  57. * source side threshholds at which message retries print a warning
  58. */
  59. #define SOURCE_TIMEOUT_LIMIT 20
  60. #define DESTINATION_TIMEOUT_LIMIT 20
  61. /*
  62. * number of entries in the destination side payload queue
  63. */
  64. #define DEST_Q_SIZE 17
  65. /*
  66. * number of destination side software ack resources
  67. */
  68. #define DEST_NUM_RESOURCES 8
  69. #define MAX_CPUS_PER_NODE 32
  70. /*
  71. * completion statuses for sending a TLB flush message
  72. */
  73. #define FLUSH_RETRY 1
  74. #define FLUSH_GIVEUP 2
  75. #define FLUSH_COMPLETE 3
  76. /*
  77. * Distribution: 32 bytes (256 bits) (bytes 0-0x1f of descriptor)
  78. * If the 'multilevel' flag in the header portion of the descriptor
  79. * has been set to 0, then endpoint multi-unicast mode is selected.
  80. * The distribution specification (32 bytes) is interpreted as a 256-bit
  81. * distribution vector. Adjacent bits correspond to consecutive even numbered
  82. * nodeIDs. The result of adding the index of a given bit to the 15-bit
  83. * 'base_dest_nodeid' field of the header corresponds to the
  84. * destination nodeID associated with that specified bit.
  85. */
  86. struct bau_target_nodemask {
  87. unsigned long bits[BITS_TO_LONGS(256)];
  88. };
  89. /*
  90. * mask of cpu's on a node
  91. * (during initialization we need to check that unsigned long has
  92. * enough bits for max. cpu's per node)
  93. */
  94. struct bau_local_cpumask {
  95. unsigned long bits;
  96. };
  97. /*
  98. * Payload: 16 bytes (128 bits) (bytes 0x20-0x2f of descriptor)
  99. * only 12 bytes (96 bits) of the payload area are usable.
  100. * An additional 3 bytes (bits 27:4) of the header address are carried
  101. * to the next bytes of the destination payload queue.
  102. * And an additional 2 bytes of the header Suppl_A field are also
  103. * carried to the destination payload queue.
  104. * But the first byte of the Suppl_A becomes bits 127:120 (the 16th byte)
  105. * of the destination payload queue, which is written by the hardware
  106. * with the s/w ack resource bit vector.
  107. * [ effective message contents (16 bytes (128 bits) maximum), not counting
  108. * the s/w ack bit vector ]
  109. */
  110. /*
  111. * The payload is software-defined for INTD transactions
  112. */
  113. struct bau_msg_payload {
  114. unsigned long address; /* signifies a page or all TLB's
  115. of the cpu */
  116. /* 64 bits */
  117. unsigned short sending_cpu; /* filled in by sender */
  118. /* 16 bits */
  119. unsigned short acknowledge_count;/* filled in by destination */
  120. /* 16 bits */
  121. unsigned int reserved1:32; /* not usable */
  122. };
  123. /*
  124. * Message header: 16 bytes (128 bits) (bytes 0x30-0x3f of descriptor)
  125. * see table 4.2.3.0.1 in broacast_assist spec.
  126. */
  127. struct bau_msg_header {
  128. int dest_subnodeid:6; /* must be zero */
  129. /* bits 5:0 */
  130. int base_dest_nodeid:15; /* nasid>>1 (pnode) of first bit in node_map */
  131. /* bits 20:6 */
  132. int command:8; /* message type */
  133. /* bits 28:21 */
  134. /* 0x38: SN3net EndPoint Message */
  135. int rsvd_1:3; /* must be zero */
  136. /* bits 31:29 */
  137. /* int will align on 32 bits */
  138. int rsvd_2:9; /* must be zero */
  139. /* bits 40:32 */
  140. /* Suppl_A is 56-41 */
  141. int payload_2a:8; /* becomes byte 16 of msg */
  142. /* bits 48:41 */ /* not currently using */
  143. int payload_2b:8; /* becomes byte 17 of msg */
  144. /* bits 56:49 */ /* not currently using */
  145. /* Address field (96:57) is never used as an
  146. address (these are address bits 42:3) */
  147. int rsvd_3:1; /* must be zero */
  148. /* bit 57 */
  149. /* address bits 27:4 are payload */
  150. /* these 24 bits become bytes 12-14 of msg */
  151. int replied_to:1; /* sent as 0 by the source to byte 12 */
  152. /* bit 58 */
  153. int payload_1a:5; /* not currently used */
  154. /* bits 63:59 */
  155. int payload_1b:8; /* not currently used */
  156. /* bits 71:64 */
  157. int payload_1c:8; /* not currently used */
  158. /* bits 79:72 */
  159. int payload_1d:2; /* not currently used */
  160. /* bits 81:80 */
  161. int rsvd_4:7; /* must be zero */
  162. /* bits 88:82 */
  163. int sw_ack_flag:1; /* software acknowledge flag */
  164. /* bit 89 */
  165. /* INTD trasactions at destination are to
  166. wait for software acknowledge */
  167. int rsvd_5:6; /* must be zero */
  168. /* bits 95:90 */
  169. int rsvd_6:5; /* must be zero */
  170. /* bits 100:96 */
  171. int int_both:1; /* if 1, interrupt both sockets on the blade */
  172. /* bit 101*/
  173. int fairness:3; /* usually zero */
  174. /* bits 104:102 */
  175. int multilevel:1; /* multi-level multicast format */
  176. /* bit 105 */
  177. /* 0 for TLB: endpoint multi-unicast messages */
  178. int chaining:1; /* next descriptor is part of this activation*/
  179. /* bit 106 */
  180. int rsvd_7:21; /* must be zero */
  181. /* bits 127:107 */
  182. };
  183. /*
  184. * The activation descriptor:
  185. * The format of the message to send, plus all accompanying control
  186. * Should be 64 bytes
  187. */
  188. struct bau_desc {
  189. struct bau_target_nodemask distribution;
  190. /*
  191. * message template, consisting of header and payload:
  192. */
  193. struct bau_msg_header header;
  194. struct bau_msg_payload payload;
  195. };
  196. /*
  197. * -payload-- ---------header------
  198. * bytes 0-11 bits 41-56 bits 58-81
  199. * A B (2) C (3)
  200. *
  201. * A/B/C are moved to:
  202. * A C B
  203. * bytes 0-11 bytes 12-14 bytes 16-17 (byte 15 filled in by hw as vector)
  204. * ------------payload queue-----------
  205. */
  206. /*
  207. * The payload queue on the destination side is an array of these.
  208. * With BAU_MISC_CONTROL set for software acknowledge mode, the messages
  209. * are 32 bytes (2 micropackets) (256 bits) in length, but contain only 17
  210. * bytes of usable data, including the sw ack vector in byte 15 (bits 127:120)
  211. * (12 bytes come from bau_msg_payload, 3 from payload_1, 2 from
  212. * sw_ack_vector and payload_2)
  213. * "Enabling Software Acknowledgment mode (see Section 4.3.3 Software
  214. * Acknowledge Processing) also selects 32 byte (17 bytes usable) payload
  215. * operation."
  216. */
  217. struct bau_payload_queue_entry {
  218. unsigned long address; /* signifies a page or all TLB's
  219. of the cpu */
  220. /* 64 bits, bytes 0-7 */
  221. unsigned short sending_cpu; /* cpu that sent the message */
  222. /* 16 bits, bytes 8-9 */
  223. unsigned short acknowledge_count; /* filled in by destination */
  224. /* 16 bits, bytes 10-11 */
  225. unsigned short replied_to:1; /* sent as 0 by the source */
  226. /* 1 bit */
  227. unsigned short unused1:7; /* not currently using */
  228. /* 7 bits: byte 12) */
  229. unsigned char unused2[2]; /* not currently using */
  230. /* bytes 13-14 */
  231. unsigned char sw_ack_vector; /* filled in by the hardware */
  232. /* byte 15 (bits 127:120) */
  233. unsigned char unused4[3]; /* not currently using bytes 17-19 */
  234. /* bytes 17-19 */
  235. int number_of_cpus; /* filled in at destination */
  236. /* 32 bits, bytes 20-23 (aligned) */
  237. unsigned char unused5[8]; /* not using */
  238. /* bytes 24-31 */
  239. };
  240. /*
  241. * one for every slot in the destination payload queue
  242. */
  243. struct bau_msg_status {
  244. struct bau_local_cpumask seen_by; /* map of cpu's */
  245. };
  246. /*
  247. * one for every slot in the destination software ack resources
  248. */
  249. struct bau_sw_ack_status {
  250. struct bau_payload_queue_entry *msg; /* associated message */
  251. int watcher; /* cpu monitoring, or -1 */
  252. };
  253. /*
  254. * one on every node and per-cpu; to locate the software tables
  255. */
  256. struct bau_control {
  257. struct bau_desc *descriptor_base;
  258. struct bau_payload_queue_entry *bau_msg_head;
  259. struct bau_payload_queue_entry *va_queue_first;
  260. struct bau_payload_queue_entry *va_queue_last;
  261. struct bau_msg_status *msg_statuses;
  262. int *watching; /* pointer to array */
  263. };
  264. /*
  265. * This structure is allocated per_cpu for UV TLB shootdown statistics.
  266. */
  267. struct ptc_stats {
  268. unsigned long ptc_i; /* number of IPI-style flushes */
  269. unsigned long requestor; /* number of nodes this cpu sent to */
  270. unsigned long requestee; /* times cpu was remotely requested */
  271. unsigned long alltlb; /* times all tlb's on this cpu were flushed */
  272. unsigned long onetlb; /* times just one tlb on this cpu was flushed */
  273. unsigned long s_retry; /* retries on source side timeouts */
  274. unsigned long d_retry; /* retries on destination side timeouts */
  275. unsigned long sflush; /* cycles spent in uv_flush_tlb_others */
  276. unsigned long dflush; /* cycles spent on destination side */
  277. unsigned long retriesok; /* successes on retries */
  278. unsigned long nomsg; /* interrupts with no message */
  279. unsigned long multmsg; /* interrupts with multiple messages */
  280. unsigned long ntargeted;/* nodes targeted */
  281. };
  282. static inline int bau_node_isset(int node, struct bau_target_nodemask *dstp)
  283. {
  284. return constant_test_bit(node, &dstp->bits[0]);
  285. }
  286. static inline void bau_node_set(int node, struct bau_target_nodemask *dstp)
  287. {
  288. __set_bit(node, &dstp->bits[0]);
  289. }
  290. static inline void bau_nodes_clear(struct bau_target_nodemask *dstp, int nbits)
  291. {
  292. bitmap_zero(&dstp->bits[0], nbits);
  293. }
  294. static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits)
  295. {
  296. bitmap_zero(&dstp->bits, nbits);
  297. }
  298. #define cpubit_isset(cpu, bau_local_cpumask) \
  299. test_bit((cpu), (bau_local_cpumask).bits)
  300. extern int uv_flush_tlb_others(cpumask_t *, struct mm_struct *, unsigned long);
  301. extern void uv_bau_message_intr1(void);
  302. extern void uv_bau_timeout_intr1(void);
  303. #endif /* __ASM_X86_UV_BAU__ */