gpio.h 3.2 KB

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  1. /*
  2. * Copyright 2002 Integrated Device Technology, Inc.
  3. * All rights reserved.
  4. *
  5. * GPIO register definition.
  6. *
  7. * Author : ryan.holmQVist@idt.com
  8. * Date : 20011005
  9. * Copyright (C) 2001, 2002 Ryan Holm <ryan.holmQVist@idt.com>
  10. * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
  11. */
  12. #ifndef _RC32434_GPIO_H_
  13. #define _RC32434_GPIO_H_
  14. #include <linux/types.h>
  15. struct rb532_gpio_reg {
  16. u32 gpiofunc; /* GPIO Function Register
  17. * gpiofunc[x]==0 bit = gpio
  18. * func[x]==1 bit = altfunc
  19. */
  20. u32 gpiocfg; /* GPIO Configuration Register
  21. * gpiocfg[x]==0 bit = input
  22. * gpiocfg[x]==1 bit = output
  23. */
  24. u32 gpiod; /* GPIO Data Register
  25. * gpiod[x] read/write gpio pinX status
  26. */
  27. u32 gpioilevel; /* GPIO Interrupt Status Register
  28. * interrupt level (see gpioistat)
  29. */
  30. u32 gpioistat; /* Gpio Interrupt Status Register
  31. * istat[x] = (gpiod[x] == level[x])
  32. * cleared in ISR (STICKY bits)
  33. */
  34. u32 gpionmien; /* GPIO Non-maskable Interrupt Enable Register */
  35. };
  36. /* UART GPIO signals */
  37. #define RC32434_UART0_SOUT (1 << 0)
  38. #define RC32434_UART0_SIN (1 << 1)
  39. #define RC32434_UART0_RTS (1 << 2)
  40. #define RC32434_UART0_CTS (1 << 3)
  41. /* M & P bus GPIO signals */
  42. #define RC32434_MP_BIT_22 (1 << 4)
  43. #define RC32434_MP_BIT_23 (1 << 5)
  44. #define RC32434_MP_BIT_24 (1 << 6)
  45. #define RC32434_MP_BIT_25 (1 << 7)
  46. /* CPU GPIO signals */
  47. #define RC32434_CPU_GPIO (1 << 8)
  48. /* Reserved GPIO signals */
  49. #define RC32434_AF_SPARE_6 (1 << 9)
  50. #define RC32434_AF_SPARE_4 (1 << 10)
  51. #define RC32434_AF_SPARE_3 (1 << 11)
  52. #define RC32434_AF_SPARE_2 (1 << 12)
  53. /* PCI messaging unit */
  54. #define RC32434_PCI_MSU_GPIO (1 << 13)
  55. extern void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val);
  56. extern unsigned get_434_reg(unsigned reg_offs);
  57. extern void set_latch_u5(unsigned char or_mask, unsigned char nand_mask);
  58. extern unsigned char get_latch_u5(void);
  59. extern int rb532_gpio_get_value(unsigned gpio);
  60. extern void rb532_gpio_set_value(unsigned gpio, int value);
  61. extern int rb532_gpio_direction_input(unsigned gpio);
  62. extern int rb532_gpio_direction_output(unsigned gpio, int value);
  63. extern void rb532_gpio_set_int_level(unsigned gpio, int value);
  64. extern int rb532_gpio_get_int_level(unsigned gpio);
  65. extern void rb532_gpio_set_int_status(unsigned gpio, int value);
  66. extern int rb532_gpio_get_int_status(unsigned gpio);
  67. /* Wrappers for the arch-neutral GPIO API */
  68. static inline int gpio_request(unsigned gpio, const char *label)
  69. {
  70. /* Not yet implemented */
  71. return 0;
  72. }
  73. static inline void gpio_free(unsigned gpio)
  74. {
  75. /* Not yet implemented */
  76. }
  77. static inline int gpio_direction_input(unsigned gpio)
  78. {
  79. return rb532_gpio_direction_input(gpio);
  80. }
  81. static inline int gpio_direction_output(unsigned gpio, int value)
  82. {
  83. return rb532_gpio_direction_output(gpio, value);
  84. }
  85. static inline int gpio_get_value(unsigned gpio)
  86. {
  87. return rb532_gpio_get_value(gpio);
  88. }
  89. static inline void gpio_set_value(unsigned gpio, int value)
  90. {
  91. rb532_gpio_set_value(gpio, value);
  92. }
  93. static inline int gpio_to_irq(unsigned gpio)
  94. {
  95. return gpio;
  96. }
  97. static inline int irq_to_gpio(unsigned irq)
  98. {
  99. return irq;
  100. }
  101. /* For cansleep */
  102. #include <asm-generic/gpio.h>
  103. #endif /* _RC32434_GPIO_H_ */