uhci-q.c 46 KB

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  1. /*
  2. * Universal Host Controller Interface driver for USB.
  3. *
  4. * Maintainer: Alan Stern <stern@rowland.harvard.edu>
  5. *
  6. * (C) Copyright 1999 Linus Torvalds
  7. * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
  8. * (C) Copyright 1999 Randy Dunlap
  9. * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  10. * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  11. * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  12. * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
  13. * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
  14. * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
  15. * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
  16. * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
  17. */
  18. /*
  19. * Technically, updating td->status here is a race, but it's not really a
  20. * problem. The worst that can happen is that we set the IOC bit again
  21. * generating a spurious interrupt. We could fix this by creating another
  22. * QH and leaving the IOC bit always set, but then we would have to play
  23. * games with the FSBR code to make sure we get the correct order in all
  24. * the cases. I don't think it's worth the effort
  25. */
  26. static void uhci_set_next_interrupt(struct uhci_hcd *uhci)
  27. {
  28. if (uhci->is_stopped)
  29. mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
  30. uhci->term_td->status |= cpu_to_le32(TD_CTRL_IOC);
  31. }
  32. static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci)
  33. {
  34. uhci->term_td->status &= ~cpu_to_le32(TD_CTRL_IOC);
  35. }
  36. /*
  37. * Full-Speed Bandwidth Reclamation (FSBR).
  38. * We turn on FSBR whenever a queue that wants it is advancing,
  39. * and leave it on for a short time thereafter.
  40. */
  41. static void uhci_fsbr_on(struct uhci_hcd *uhci)
  42. {
  43. struct uhci_qh *lqh;
  44. /* The terminating skeleton QH always points back to the first
  45. * FSBR QH. Make the last async QH point to the terminating
  46. * skeleton QH. */
  47. uhci->fsbr_is_on = 1;
  48. lqh = list_entry(uhci->skel_async_qh->node.prev,
  49. struct uhci_qh, node);
  50. lqh->link = LINK_TO_QH(uhci->skel_term_qh);
  51. }
  52. static void uhci_fsbr_off(struct uhci_hcd *uhci)
  53. {
  54. struct uhci_qh *lqh;
  55. /* Remove the link from the last async QH to the terminating
  56. * skeleton QH. */
  57. uhci->fsbr_is_on = 0;
  58. lqh = list_entry(uhci->skel_async_qh->node.prev,
  59. struct uhci_qh, node);
  60. lqh->link = UHCI_PTR_TERM;
  61. }
  62. static void uhci_add_fsbr(struct uhci_hcd *uhci, struct urb *urb)
  63. {
  64. struct urb_priv *urbp = urb->hcpriv;
  65. if (!(urb->transfer_flags & URB_NO_FSBR))
  66. urbp->fsbr = 1;
  67. }
  68. static void uhci_urbp_wants_fsbr(struct uhci_hcd *uhci, struct urb_priv *urbp)
  69. {
  70. if (urbp->fsbr) {
  71. uhci->fsbr_is_wanted = 1;
  72. if (!uhci->fsbr_is_on)
  73. uhci_fsbr_on(uhci);
  74. else if (uhci->fsbr_expiring) {
  75. uhci->fsbr_expiring = 0;
  76. del_timer(&uhci->fsbr_timer);
  77. }
  78. }
  79. }
  80. static void uhci_fsbr_timeout(unsigned long _uhci)
  81. {
  82. struct uhci_hcd *uhci = (struct uhci_hcd *) _uhci;
  83. unsigned long flags;
  84. spin_lock_irqsave(&uhci->lock, flags);
  85. if (uhci->fsbr_expiring) {
  86. uhci->fsbr_expiring = 0;
  87. uhci_fsbr_off(uhci);
  88. }
  89. spin_unlock_irqrestore(&uhci->lock, flags);
  90. }
  91. static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci)
  92. {
  93. dma_addr_t dma_handle;
  94. struct uhci_td *td;
  95. td = dma_pool_alloc(uhci->td_pool, GFP_ATOMIC, &dma_handle);
  96. if (!td)
  97. return NULL;
  98. td->dma_handle = dma_handle;
  99. td->frame = -1;
  100. INIT_LIST_HEAD(&td->list);
  101. INIT_LIST_HEAD(&td->fl_list);
  102. return td;
  103. }
  104. static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td)
  105. {
  106. if (!list_empty(&td->list)) {
  107. dev_warn(uhci_dev(uhci), "td %p still in list!\n", td);
  108. WARN_ON(1);
  109. }
  110. if (!list_empty(&td->fl_list)) {
  111. dev_warn(uhci_dev(uhci), "td %p still in fl_list!\n", td);
  112. WARN_ON(1);
  113. }
  114. dma_pool_free(uhci->td_pool, td, td->dma_handle);
  115. }
  116. static inline void uhci_fill_td(struct uhci_td *td, u32 status,
  117. u32 token, u32 buffer)
  118. {
  119. td->status = cpu_to_le32(status);
  120. td->token = cpu_to_le32(token);
  121. td->buffer = cpu_to_le32(buffer);
  122. }
  123. static void uhci_add_td_to_urbp(struct uhci_td *td, struct urb_priv *urbp)
  124. {
  125. list_add_tail(&td->list, &urbp->td_list);
  126. }
  127. static void uhci_remove_td_from_urbp(struct uhci_td *td)
  128. {
  129. list_del_init(&td->list);
  130. }
  131. /*
  132. * We insert Isochronous URBs directly into the frame list at the beginning
  133. */
  134. static inline void uhci_insert_td_in_frame_list(struct uhci_hcd *uhci,
  135. struct uhci_td *td, unsigned framenum)
  136. {
  137. framenum &= (UHCI_NUMFRAMES - 1);
  138. td->frame = framenum;
  139. /* Is there a TD already mapped there? */
  140. if (uhci->frame_cpu[framenum]) {
  141. struct uhci_td *ftd, *ltd;
  142. ftd = uhci->frame_cpu[framenum];
  143. ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
  144. list_add_tail(&td->fl_list, &ftd->fl_list);
  145. td->link = ltd->link;
  146. wmb();
  147. ltd->link = LINK_TO_TD(td);
  148. } else {
  149. td->link = uhci->frame[framenum];
  150. wmb();
  151. uhci->frame[framenum] = LINK_TO_TD(td);
  152. uhci->frame_cpu[framenum] = td;
  153. }
  154. }
  155. static inline void uhci_remove_td_from_frame_list(struct uhci_hcd *uhci,
  156. struct uhci_td *td)
  157. {
  158. /* If it's not inserted, don't remove it */
  159. if (td->frame == -1) {
  160. WARN_ON(!list_empty(&td->fl_list));
  161. return;
  162. }
  163. if (uhci->frame_cpu[td->frame] == td) {
  164. if (list_empty(&td->fl_list)) {
  165. uhci->frame[td->frame] = td->link;
  166. uhci->frame_cpu[td->frame] = NULL;
  167. } else {
  168. struct uhci_td *ntd;
  169. ntd = list_entry(td->fl_list.next, struct uhci_td, fl_list);
  170. uhci->frame[td->frame] = LINK_TO_TD(ntd);
  171. uhci->frame_cpu[td->frame] = ntd;
  172. }
  173. } else {
  174. struct uhci_td *ptd;
  175. ptd = list_entry(td->fl_list.prev, struct uhci_td, fl_list);
  176. ptd->link = td->link;
  177. }
  178. list_del_init(&td->fl_list);
  179. td->frame = -1;
  180. }
  181. static inline void uhci_remove_tds_from_frame(struct uhci_hcd *uhci,
  182. unsigned int framenum)
  183. {
  184. struct uhci_td *ftd, *ltd;
  185. framenum &= (UHCI_NUMFRAMES - 1);
  186. ftd = uhci->frame_cpu[framenum];
  187. if (ftd) {
  188. ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
  189. uhci->frame[framenum] = ltd->link;
  190. uhci->frame_cpu[framenum] = NULL;
  191. while (!list_empty(&ftd->fl_list))
  192. list_del_init(ftd->fl_list.prev);
  193. }
  194. }
  195. /*
  196. * Remove all the TDs for an Isochronous URB from the frame list
  197. */
  198. static void uhci_unlink_isochronous_tds(struct uhci_hcd *uhci, struct urb *urb)
  199. {
  200. struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
  201. struct uhci_td *td;
  202. list_for_each_entry(td, &urbp->td_list, list)
  203. uhci_remove_td_from_frame_list(uhci, td);
  204. }
  205. static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci,
  206. struct usb_device *udev, struct usb_host_endpoint *hep)
  207. {
  208. dma_addr_t dma_handle;
  209. struct uhci_qh *qh;
  210. qh = dma_pool_alloc(uhci->qh_pool, GFP_ATOMIC, &dma_handle);
  211. if (!qh)
  212. return NULL;
  213. memset(qh, 0, sizeof(*qh));
  214. qh->dma_handle = dma_handle;
  215. qh->element = UHCI_PTR_TERM;
  216. qh->link = UHCI_PTR_TERM;
  217. INIT_LIST_HEAD(&qh->queue);
  218. INIT_LIST_HEAD(&qh->node);
  219. if (udev) { /* Normal QH */
  220. qh->type = hep->desc.bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
  221. if (qh->type != USB_ENDPOINT_XFER_ISOC) {
  222. qh->dummy_td = uhci_alloc_td(uhci);
  223. if (!qh->dummy_td) {
  224. dma_pool_free(uhci->qh_pool, qh, dma_handle);
  225. return NULL;
  226. }
  227. }
  228. qh->state = QH_STATE_IDLE;
  229. qh->hep = hep;
  230. qh->udev = udev;
  231. hep->hcpriv = qh;
  232. if (qh->type == USB_ENDPOINT_XFER_INT ||
  233. qh->type == USB_ENDPOINT_XFER_ISOC)
  234. qh->load = usb_calc_bus_time(udev->speed,
  235. usb_endpoint_dir_in(&hep->desc),
  236. qh->type == USB_ENDPOINT_XFER_ISOC,
  237. le16_to_cpu(hep->desc.wMaxPacketSize))
  238. / 1000 + 1;
  239. } else { /* Skeleton QH */
  240. qh->state = QH_STATE_ACTIVE;
  241. qh->type = -1;
  242. }
  243. return qh;
  244. }
  245. static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  246. {
  247. WARN_ON(qh->state != QH_STATE_IDLE && qh->udev);
  248. if (!list_empty(&qh->queue)) {
  249. dev_warn(uhci_dev(uhci), "qh %p list not empty!\n", qh);
  250. WARN_ON(1);
  251. }
  252. list_del(&qh->node);
  253. if (qh->udev) {
  254. qh->hep->hcpriv = NULL;
  255. if (qh->dummy_td)
  256. uhci_free_td(uhci, qh->dummy_td);
  257. }
  258. dma_pool_free(uhci->qh_pool, qh, qh->dma_handle);
  259. }
  260. /*
  261. * When a queue is stopped and a dequeued URB is given back, adjust
  262. * the previous TD link (if the URB isn't first on the queue) or
  263. * save its toggle value (if it is first and is currently executing).
  264. *
  265. * Returns 0 if the URB should not yet be given back, 1 otherwise.
  266. */
  267. static int uhci_cleanup_queue(struct uhci_hcd *uhci, struct uhci_qh *qh,
  268. struct urb *urb)
  269. {
  270. struct urb_priv *urbp = urb->hcpriv;
  271. struct uhci_td *td;
  272. int ret = 1;
  273. /* Isochronous pipes don't use toggles and their TD link pointers
  274. * get adjusted during uhci_urb_dequeue(). But since their queues
  275. * cannot truly be stopped, we have to watch out for dequeues
  276. * occurring after the nominal unlink frame. */
  277. if (qh->type == USB_ENDPOINT_XFER_ISOC) {
  278. ret = (uhci->frame_number + uhci->is_stopped !=
  279. qh->unlink_frame);
  280. goto done;
  281. }
  282. /* If the URB isn't first on its queue, adjust the link pointer
  283. * of the last TD in the previous URB. The toggle doesn't need
  284. * to be saved since this URB can't be executing yet. */
  285. if (qh->queue.next != &urbp->node) {
  286. struct urb_priv *purbp;
  287. struct uhci_td *ptd;
  288. purbp = list_entry(urbp->node.prev, struct urb_priv, node);
  289. WARN_ON(list_empty(&purbp->td_list));
  290. ptd = list_entry(purbp->td_list.prev, struct uhci_td,
  291. list);
  292. td = list_entry(urbp->td_list.prev, struct uhci_td,
  293. list);
  294. ptd->link = td->link;
  295. goto done;
  296. }
  297. /* If the QH element pointer is UHCI_PTR_TERM then then currently
  298. * executing URB has already been unlinked, so this one isn't it. */
  299. if (qh_element(qh) == UHCI_PTR_TERM)
  300. goto done;
  301. qh->element = UHCI_PTR_TERM;
  302. /* Control pipes don't have to worry about toggles */
  303. if (qh->type == USB_ENDPOINT_XFER_CONTROL)
  304. goto done;
  305. /* Save the next toggle value */
  306. WARN_ON(list_empty(&urbp->td_list));
  307. td = list_entry(urbp->td_list.next, struct uhci_td, list);
  308. qh->needs_fixup = 1;
  309. qh->initial_toggle = uhci_toggle(td_token(td));
  310. done:
  311. return ret;
  312. }
  313. /*
  314. * Fix up the data toggles for URBs in a queue, when one of them
  315. * terminates early (short transfer, error, or dequeued).
  316. */
  317. static void uhci_fixup_toggles(struct uhci_qh *qh, int skip_first)
  318. {
  319. struct urb_priv *urbp = NULL;
  320. struct uhci_td *td;
  321. unsigned int toggle = qh->initial_toggle;
  322. unsigned int pipe;
  323. /* Fixups for a short transfer start with the second URB in the
  324. * queue (the short URB is the first). */
  325. if (skip_first)
  326. urbp = list_entry(qh->queue.next, struct urb_priv, node);
  327. /* When starting with the first URB, if the QH element pointer is
  328. * still valid then we know the URB's toggles are okay. */
  329. else if (qh_element(qh) != UHCI_PTR_TERM)
  330. toggle = 2;
  331. /* Fix up the toggle for the URBs in the queue. Normally this
  332. * loop won't run more than once: When an error or short transfer
  333. * occurs, the queue usually gets emptied. */
  334. urbp = list_prepare_entry(urbp, &qh->queue, node);
  335. list_for_each_entry_continue(urbp, &qh->queue, node) {
  336. /* If the first TD has the right toggle value, we don't
  337. * need to change any toggles in this URB */
  338. td = list_entry(urbp->td_list.next, struct uhci_td, list);
  339. if (toggle > 1 || uhci_toggle(td_token(td)) == toggle) {
  340. td = list_entry(urbp->td_list.prev, struct uhci_td,
  341. list);
  342. toggle = uhci_toggle(td_token(td)) ^ 1;
  343. /* Otherwise all the toggles in the URB have to be switched */
  344. } else {
  345. list_for_each_entry(td, &urbp->td_list, list) {
  346. td->token ^= __constant_cpu_to_le32(
  347. TD_TOKEN_TOGGLE);
  348. toggle ^= 1;
  349. }
  350. }
  351. }
  352. wmb();
  353. pipe = list_entry(qh->queue.next, struct urb_priv, node)->urb->pipe;
  354. usb_settoggle(qh->udev, usb_pipeendpoint(pipe),
  355. usb_pipeout(pipe), toggle);
  356. qh->needs_fixup = 0;
  357. }
  358. /*
  359. * Link an Isochronous QH into its skeleton's list
  360. */
  361. static inline void link_iso(struct uhci_hcd *uhci, struct uhci_qh *qh)
  362. {
  363. list_add_tail(&qh->node, &uhci->skel_iso_qh->node);
  364. /* Isochronous QHs aren't linked by the hardware */
  365. }
  366. /*
  367. * Link a high-period interrupt QH into the schedule at the end of its
  368. * skeleton's list
  369. */
  370. static void link_interrupt(struct uhci_hcd *uhci, struct uhci_qh *qh)
  371. {
  372. struct uhci_qh *pqh;
  373. list_add_tail(&qh->node, &uhci->skelqh[qh->skel]->node);
  374. pqh = list_entry(qh->node.prev, struct uhci_qh, node);
  375. qh->link = pqh->link;
  376. wmb();
  377. pqh->link = LINK_TO_QH(qh);
  378. }
  379. /*
  380. * Link a period-1 interrupt or async QH into the schedule at the
  381. * correct spot in the async skeleton's list, and update the FSBR link
  382. */
  383. static void link_async(struct uhci_hcd *uhci, struct uhci_qh *qh)
  384. {
  385. struct uhci_qh *pqh;
  386. __le32 link_to_new_qh;
  387. /* Find the predecessor QH for our new one and insert it in the list.
  388. * The list of QHs is expected to be short, so linear search won't
  389. * take too long. */
  390. list_for_each_entry_reverse(pqh, &uhci->skel_async_qh->node, node) {
  391. if (pqh->skel <= qh->skel)
  392. break;
  393. }
  394. list_add(&qh->node, &pqh->node);
  395. /* Link it into the schedule */
  396. qh->link = pqh->link;
  397. wmb();
  398. link_to_new_qh = LINK_TO_QH(qh);
  399. pqh->link = link_to_new_qh;
  400. /* If this is now the first FSBR QH, link the terminating skeleton
  401. * QH to it. */
  402. if (pqh->skel < SKEL_FSBR && qh->skel >= SKEL_FSBR)
  403. uhci->skel_term_qh->link = link_to_new_qh;
  404. }
  405. /*
  406. * Put a QH on the schedule in both hardware and software
  407. */
  408. static void uhci_activate_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  409. {
  410. WARN_ON(list_empty(&qh->queue));
  411. /* Set the element pointer if it isn't set already.
  412. * This isn't needed for Isochronous queues, but it doesn't hurt. */
  413. if (qh_element(qh) == UHCI_PTR_TERM) {
  414. struct urb_priv *urbp = list_entry(qh->queue.next,
  415. struct urb_priv, node);
  416. struct uhci_td *td = list_entry(urbp->td_list.next,
  417. struct uhci_td, list);
  418. qh->element = LINK_TO_TD(td);
  419. }
  420. /* Treat the queue as if it has just advanced */
  421. qh->wait_expired = 0;
  422. qh->advance_jiffies = jiffies;
  423. if (qh->state == QH_STATE_ACTIVE)
  424. return;
  425. qh->state = QH_STATE_ACTIVE;
  426. /* Move the QH from its old list to the correct spot in the appropriate
  427. * skeleton's list */
  428. if (qh == uhci->next_qh)
  429. uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
  430. node);
  431. list_del(&qh->node);
  432. if (qh->skel == SKEL_ISO)
  433. link_iso(uhci, qh);
  434. else if (qh->skel < SKEL_ASYNC)
  435. link_interrupt(uhci, qh);
  436. else
  437. link_async(uhci, qh);
  438. }
  439. /*
  440. * Unlink a high-period interrupt QH from the schedule
  441. */
  442. static void unlink_interrupt(struct uhci_hcd *uhci, struct uhci_qh *qh)
  443. {
  444. struct uhci_qh *pqh;
  445. pqh = list_entry(qh->node.prev, struct uhci_qh, node);
  446. pqh->link = qh->link;
  447. mb();
  448. }
  449. /*
  450. * Unlink a period-1 interrupt or async QH from the schedule
  451. */
  452. static void unlink_async(struct uhci_hcd *uhci, struct uhci_qh *qh)
  453. {
  454. struct uhci_qh *pqh;
  455. __le32 link_to_next_qh = qh->link;
  456. pqh = list_entry(qh->node.prev, struct uhci_qh, node);
  457. pqh->link = link_to_next_qh;
  458. /* If this was the old first FSBR QH, link the terminating skeleton
  459. * QH to the next (new first FSBR) QH. */
  460. if (pqh->skel < SKEL_FSBR && qh->skel >= SKEL_FSBR)
  461. uhci->skel_term_qh->link = link_to_next_qh;
  462. mb();
  463. }
  464. /*
  465. * Take a QH off the hardware schedule
  466. */
  467. static void uhci_unlink_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  468. {
  469. if (qh->state == QH_STATE_UNLINKING)
  470. return;
  471. WARN_ON(qh->state != QH_STATE_ACTIVE || !qh->udev);
  472. qh->state = QH_STATE_UNLINKING;
  473. /* Unlink the QH from the schedule and record when we did it */
  474. if (qh->skel == SKEL_ISO)
  475. ;
  476. else if (qh->skel < SKEL_ASYNC)
  477. unlink_interrupt(uhci, qh);
  478. else
  479. unlink_async(uhci, qh);
  480. uhci_get_current_frame_number(uhci);
  481. qh->unlink_frame = uhci->frame_number;
  482. /* Force an interrupt so we know when the QH is fully unlinked */
  483. if (list_empty(&uhci->skel_unlink_qh->node))
  484. uhci_set_next_interrupt(uhci);
  485. /* Move the QH from its old list to the end of the unlinking list */
  486. if (qh == uhci->next_qh)
  487. uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
  488. node);
  489. list_move_tail(&qh->node, &uhci->skel_unlink_qh->node);
  490. }
  491. /*
  492. * When we and the controller are through with a QH, it becomes IDLE.
  493. * This happens when a QH has been off the schedule (on the unlinking
  494. * list) for more than one frame, or when an error occurs while adding
  495. * the first URB onto a new QH.
  496. */
  497. static void uhci_make_qh_idle(struct uhci_hcd *uhci, struct uhci_qh *qh)
  498. {
  499. WARN_ON(qh->state == QH_STATE_ACTIVE);
  500. if (qh == uhci->next_qh)
  501. uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
  502. node);
  503. list_move(&qh->node, &uhci->idle_qh_list);
  504. qh->state = QH_STATE_IDLE;
  505. /* Now that the QH is idle, its post_td isn't being used */
  506. if (qh->post_td) {
  507. uhci_free_td(uhci, qh->post_td);
  508. qh->post_td = NULL;
  509. }
  510. /* If anyone is waiting for a QH to become idle, wake them up */
  511. if (uhci->num_waiting)
  512. wake_up_all(&uhci->waitqh);
  513. }
  514. /*
  515. * Find the highest existing bandwidth load for a given phase and period.
  516. */
  517. static int uhci_highest_load(struct uhci_hcd *uhci, int phase, int period)
  518. {
  519. int highest_load = uhci->load[phase];
  520. for (phase += period; phase < MAX_PHASE; phase += period)
  521. highest_load = max_t(int, highest_load, uhci->load[phase]);
  522. return highest_load;
  523. }
  524. /*
  525. * Set qh->phase to the optimal phase for a periodic transfer and
  526. * check whether the bandwidth requirement is acceptable.
  527. */
  528. static int uhci_check_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
  529. {
  530. int minimax_load;
  531. /* Find the optimal phase (unless it is already set) and get
  532. * its load value. */
  533. if (qh->phase >= 0)
  534. minimax_load = uhci_highest_load(uhci, qh->phase, qh->period);
  535. else {
  536. int phase, load;
  537. int max_phase = min_t(int, MAX_PHASE, qh->period);
  538. qh->phase = 0;
  539. minimax_load = uhci_highest_load(uhci, qh->phase, qh->period);
  540. for (phase = 1; phase < max_phase; ++phase) {
  541. load = uhci_highest_load(uhci, phase, qh->period);
  542. if (load < minimax_load) {
  543. minimax_load = load;
  544. qh->phase = phase;
  545. }
  546. }
  547. }
  548. /* Maximum allowable periodic bandwidth is 90%, or 900 us per frame */
  549. if (minimax_load + qh->load > 900) {
  550. dev_dbg(uhci_dev(uhci), "bandwidth allocation failed: "
  551. "period %d, phase %d, %d + %d us\n",
  552. qh->period, qh->phase, minimax_load, qh->load);
  553. return -ENOSPC;
  554. }
  555. return 0;
  556. }
  557. /*
  558. * Reserve a periodic QH's bandwidth in the schedule
  559. */
  560. static void uhci_reserve_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
  561. {
  562. int i;
  563. int load = qh->load;
  564. char *p = "??";
  565. for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
  566. uhci->load[i] += load;
  567. uhci->total_load += load;
  568. }
  569. uhci_to_hcd(uhci)->self.bandwidth_allocated =
  570. uhci->total_load / MAX_PHASE;
  571. switch (qh->type) {
  572. case USB_ENDPOINT_XFER_INT:
  573. ++uhci_to_hcd(uhci)->self.bandwidth_int_reqs;
  574. p = "INT";
  575. break;
  576. case USB_ENDPOINT_XFER_ISOC:
  577. ++uhci_to_hcd(uhci)->self.bandwidth_isoc_reqs;
  578. p = "ISO";
  579. break;
  580. }
  581. qh->bandwidth_reserved = 1;
  582. dev_dbg(uhci_dev(uhci),
  583. "%s dev %d ep%02x-%s, period %d, phase %d, %d us\n",
  584. "reserve", qh->udev->devnum,
  585. qh->hep->desc.bEndpointAddress, p,
  586. qh->period, qh->phase, load);
  587. }
  588. /*
  589. * Release a periodic QH's bandwidth reservation
  590. */
  591. static void uhci_release_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
  592. {
  593. int i;
  594. int load = qh->load;
  595. char *p = "??";
  596. for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
  597. uhci->load[i] -= load;
  598. uhci->total_load -= load;
  599. }
  600. uhci_to_hcd(uhci)->self.bandwidth_allocated =
  601. uhci->total_load / MAX_PHASE;
  602. switch (qh->type) {
  603. case USB_ENDPOINT_XFER_INT:
  604. --uhci_to_hcd(uhci)->self.bandwidth_int_reqs;
  605. p = "INT";
  606. break;
  607. case USB_ENDPOINT_XFER_ISOC:
  608. --uhci_to_hcd(uhci)->self.bandwidth_isoc_reqs;
  609. p = "ISO";
  610. break;
  611. }
  612. qh->bandwidth_reserved = 0;
  613. dev_dbg(uhci_dev(uhci),
  614. "%s dev %d ep%02x-%s, period %d, phase %d, %d us\n",
  615. "release", qh->udev->devnum,
  616. qh->hep->desc.bEndpointAddress, p,
  617. qh->period, qh->phase, load);
  618. }
  619. static inline struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci,
  620. struct urb *urb)
  621. {
  622. struct urb_priv *urbp;
  623. urbp = kmem_cache_zalloc(uhci_up_cachep, GFP_ATOMIC);
  624. if (!urbp)
  625. return NULL;
  626. urbp->urb = urb;
  627. urb->hcpriv = urbp;
  628. INIT_LIST_HEAD(&urbp->node);
  629. INIT_LIST_HEAD(&urbp->td_list);
  630. return urbp;
  631. }
  632. static void uhci_free_urb_priv(struct uhci_hcd *uhci,
  633. struct urb_priv *urbp)
  634. {
  635. struct uhci_td *td, *tmp;
  636. if (!list_empty(&urbp->node)) {
  637. dev_warn(uhci_dev(uhci), "urb %p still on QH's list!\n",
  638. urbp->urb);
  639. WARN_ON(1);
  640. }
  641. list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
  642. uhci_remove_td_from_urbp(td);
  643. uhci_free_td(uhci, td);
  644. }
  645. kmem_cache_free(uhci_up_cachep, urbp);
  646. }
  647. /*
  648. * Map status to standard result codes
  649. *
  650. * <status> is (td_status(td) & 0xF60000), a.k.a.
  651. * uhci_status_bits(td_status(td)).
  652. * Note: <status> does not include the TD_CTRL_NAK bit.
  653. * <dir_out> is True for output TDs and False for input TDs.
  654. */
  655. static int uhci_map_status(int status, int dir_out)
  656. {
  657. if (!status)
  658. return 0;
  659. if (status & TD_CTRL_BITSTUFF) /* Bitstuff error */
  660. return -EPROTO;
  661. if (status & TD_CTRL_CRCTIMEO) { /* CRC/Timeout */
  662. if (dir_out)
  663. return -EPROTO;
  664. else
  665. return -EILSEQ;
  666. }
  667. if (status & TD_CTRL_BABBLE) /* Babble */
  668. return -EOVERFLOW;
  669. if (status & TD_CTRL_DBUFERR) /* Buffer error */
  670. return -ENOSR;
  671. if (status & TD_CTRL_STALLED) /* Stalled */
  672. return -EPIPE;
  673. return 0;
  674. }
  675. /*
  676. * Control transfers
  677. */
  678. static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb,
  679. struct uhci_qh *qh)
  680. {
  681. struct uhci_td *td;
  682. unsigned long destination, status;
  683. int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize);
  684. int len = urb->transfer_buffer_length;
  685. dma_addr_t data = urb->transfer_dma;
  686. __le32 *plink;
  687. struct urb_priv *urbp = urb->hcpriv;
  688. int skel;
  689. /* The "pipe" thing contains the destination in bits 8--18 */
  690. destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP;
  691. /* 3 errors, dummy TD remains inactive */
  692. status = uhci_maxerr(3);
  693. if (urb->dev->speed == USB_SPEED_LOW)
  694. status |= TD_CTRL_LS;
  695. /*
  696. * Build the TD for the control request setup packet
  697. */
  698. td = qh->dummy_td;
  699. uhci_add_td_to_urbp(td, urbp);
  700. uhci_fill_td(td, status, destination | uhci_explen(8),
  701. urb->setup_dma);
  702. plink = &td->link;
  703. status |= TD_CTRL_ACTIVE;
  704. /*
  705. * If direction is "send", change the packet ID from SETUP (0x2D)
  706. * to OUT (0xE1). Else change it from SETUP to IN (0x69) and
  707. * set Short Packet Detect (SPD) for all data packets.
  708. *
  709. * 0-length transfers always get treated as "send".
  710. */
  711. if (usb_pipeout(urb->pipe) || len == 0)
  712. destination ^= (USB_PID_SETUP ^ USB_PID_OUT);
  713. else {
  714. destination ^= (USB_PID_SETUP ^ USB_PID_IN);
  715. status |= TD_CTRL_SPD;
  716. }
  717. /*
  718. * Build the DATA TDs
  719. */
  720. while (len > 0) {
  721. int pktsze = maxsze;
  722. if (len <= pktsze) { /* The last data packet */
  723. pktsze = len;
  724. status &= ~TD_CTRL_SPD;
  725. }
  726. td = uhci_alloc_td(uhci);
  727. if (!td)
  728. goto nomem;
  729. *plink = LINK_TO_TD(td);
  730. /* Alternate Data0/1 (start with Data1) */
  731. destination ^= TD_TOKEN_TOGGLE;
  732. uhci_add_td_to_urbp(td, urbp);
  733. uhci_fill_td(td, status, destination | uhci_explen(pktsze),
  734. data);
  735. plink = &td->link;
  736. data += pktsze;
  737. len -= pktsze;
  738. }
  739. /*
  740. * Build the final TD for control status
  741. */
  742. td = uhci_alloc_td(uhci);
  743. if (!td)
  744. goto nomem;
  745. *plink = LINK_TO_TD(td);
  746. /* Change direction for the status transaction */
  747. destination ^= (USB_PID_IN ^ USB_PID_OUT);
  748. destination |= TD_TOKEN_TOGGLE; /* End in Data1 */
  749. uhci_add_td_to_urbp(td, urbp);
  750. uhci_fill_td(td, status | TD_CTRL_IOC,
  751. destination | uhci_explen(0), 0);
  752. plink = &td->link;
  753. /*
  754. * Build the new dummy TD and activate the old one
  755. */
  756. td = uhci_alloc_td(uhci);
  757. if (!td)
  758. goto nomem;
  759. *plink = LINK_TO_TD(td);
  760. uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0);
  761. wmb();
  762. qh->dummy_td->status |= __constant_cpu_to_le32(TD_CTRL_ACTIVE);
  763. qh->dummy_td = td;
  764. /* Low-speed transfers get a different queue, and won't hog the bus.
  765. * Also, some devices enumerate better without FSBR; the easiest way
  766. * to do that is to put URBs on the low-speed queue while the device
  767. * isn't in the CONFIGURED state. */
  768. if (urb->dev->speed == USB_SPEED_LOW ||
  769. urb->dev->state != USB_STATE_CONFIGURED)
  770. skel = SKEL_LS_CONTROL;
  771. else {
  772. skel = SKEL_FS_CONTROL;
  773. uhci_add_fsbr(uhci, urb);
  774. }
  775. if (qh->state != QH_STATE_ACTIVE)
  776. qh->skel = skel;
  777. urb->actual_length = -8; /* Account for the SETUP packet */
  778. return 0;
  779. nomem:
  780. /* Remove the dummy TD from the td_list so it doesn't get freed */
  781. uhci_remove_td_from_urbp(qh->dummy_td);
  782. return -ENOMEM;
  783. }
  784. /*
  785. * Common submit for bulk and interrupt
  786. */
  787. static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb,
  788. struct uhci_qh *qh)
  789. {
  790. struct uhci_td *td;
  791. unsigned long destination, status;
  792. int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize);
  793. int len = urb->transfer_buffer_length;
  794. dma_addr_t data = urb->transfer_dma;
  795. __le32 *plink;
  796. struct urb_priv *urbp = urb->hcpriv;
  797. unsigned int toggle;
  798. if (len < 0)
  799. return -EINVAL;
  800. /* The "pipe" thing contains the destination in bits 8--18 */
  801. destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
  802. toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  803. usb_pipeout(urb->pipe));
  804. /* 3 errors, dummy TD remains inactive */
  805. status = uhci_maxerr(3);
  806. if (urb->dev->speed == USB_SPEED_LOW)
  807. status |= TD_CTRL_LS;
  808. if (usb_pipein(urb->pipe))
  809. status |= TD_CTRL_SPD;
  810. /*
  811. * Build the DATA TDs
  812. */
  813. plink = NULL;
  814. td = qh->dummy_td;
  815. do { /* Allow zero length packets */
  816. int pktsze = maxsze;
  817. if (len <= pktsze) { /* The last packet */
  818. pktsze = len;
  819. if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
  820. status &= ~TD_CTRL_SPD;
  821. }
  822. if (plink) {
  823. td = uhci_alloc_td(uhci);
  824. if (!td)
  825. goto nomem;
  826. *plink = LINK_TO_TD(td);
  827. }
  828. uhci_add_td_to_urbp(td, urbp);
  829. uhci_fill_td(td, status,
  830. destination | uhci_explen(pktsze) |
  831. (toggle << TD_TOKEN_TOGGLE_SHIFT),
  832. data);
  833. plink = &td->link;
  834. status |= TD_CTRL_ACTIVE;
  835. data += pktsze;
  836. len -= maxsze;
  837. toggle ^= 1;
  838. } while (len > 0);
  839. /*
  840. * URB_ZERO_PACKET means adding a 0-length packet, if direction
  841. * is OUT and the transfer_length was an exact multiple of maxsze,
  842. * hence (len = transfer_length - N * maxsze) == 0
  843. * however, if transfer_length == 0, the zero packet was already
  844. * prepared above.
  845. */
  846. if ((urb->transfer_flags & URB_ZERO_PACKET) &&
  847. usb_pipeout(urb->pipe) && len == 0 &&
  848. urb->transfer_buffer_length > 0) {
  849. td = uhci_alloc_td(uhci);
  850. if (!td)
  851. goto nomem;
  852. *plink = LINK_TO_TD(td);
  853. uhci_add_td_to_urbp(td, urbp);
  854. uhci_fill_td(td, status,
  855. destination | uhci_explen(0) |
  856. (toggle << TD_TOKEN_TOGGLE_SHIFT),
  857. data);
  858. plink = &td->link;
  859. toggle ^= 1;
  860. }
  861. /* Set the interrupt-on-completion flag on the last packet.
  862. * A more-or-less typical 4 KB URB (= size of one memory page)
  863. * will require about 3 ms to transfer; that's a little on the
  864. * fast side but not enough to justify delaying an interrupt
  865. * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT
  866. * flag setting. */
  867. td->status |= __constant_cpu_to_le32(TD_CTRL_IOC);
  868. /*
  869. * Build the new dummy TD and activate the old one
  870. */
  871. td = uhci_alloc_td(uhci);
  872. if (!td)
  873. goto nomem;
  874. *plink = LINK_TO_TD(td);
  875. uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0);
  876. wmb();
  877. qh->dummy_td->status |= __constant_cpu_to_le32(TD_CTRL_ACTIVE);
  878. qh->dummy_td = td;
  879. usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  880. usb_pipeout(urb->pipe), toggle);
  881. return 0;
  882. nomem:
  883. /* Remove the dummy TD from the td_list so it doesn't get freed */
  884. uhci_remove_td_from_urbp(qh->dummy_td);
  885. return -ENOMEM;
  886. }
  887. static int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb,
  888. struct uhci_qh *qh)
  889. {
  890. int ret;
  891. /* Can't have low-speed bulk transfers */
  892. if (urb->dev->speed == USB_SPEED_LOW)
  893. return -EINVAL;
  894. if (qh->state != QH_STATE_ACTIVE)
  895. qh->skel = SKEL_BULK;
  896. ret = uhci_submit_common(uhci, urb, qh);
  897. if (ret == 0)
  898. uhci_add_fsbr(uhci, urb);
  899. return ret;
  900. }
  901. static int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb,
  902. struct uhci_qh *qh)
  903. {
  904. int ret;
  905. /* USB 1.1 interrupt transfers only involve one packet per interval.
  906. * Drivers can submit URBs of any length, but longer ones will need
  907. * multiple intervals to complete.
  908. */
  909. if (!qh->bandwidth_reserved) {
  910. int exponent;
  911. /* Figure out which power-of-two queue to use */
  912. for (exponent = 7; exponent >= 0; --exponent) {
  913. if ((1 << exponent) <= urb->interval)
  914. break;
  915. }
  916. if (exponent < 0)
  917. return -EINVAL;
  918. qh->period = 1 << exponent;
  919. qh->skel = SKEL_INDEX(exponent);
  920. /* For now, interrupt phase is fixed by the layout
  921. * of the QH lists. */
  922. qh->phase = (qh->period / 2) & (MAX_PHASE - 1);
  923. ret = uhci_check_bandwidth(uhci, qh);
  924. if (ret)
  925. return ret;
  926. } else if (qh->period > urb->interval)
  927. return -EINVAL; /* Can't decrease the period */
  928. ret = uhci_submit_common(uhci, urb, qh);
  929. if (ret == 0) {
  930. urb->interval = qh->period;
  931. if (!qh->bandwidth_reserved)
  932. uhci_reserve_bandwidth(uhci, qh);
  933. }
  934. return ret;
  935. }
  936. /*
  937. * Fix up the data structures following a short transfer
  938. */
  939. static int uhci_fixup_short_transfer(struct uhci_hcd *uhci,
  940. struct uhci_qh *qh, struct urb_priv *urbp)
  941. {
  942. struct uhci_td *td;
  943. struct list_head *tmp;
  944. int ret;
  945. td = list_entry(urbp->td_list.prev, struct uhci_td, list);
  946. if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
  947. /* When a control transfer is short, we have to restart
  948. * the queue at the status stage transaction, which is
  949. * the last TD. */
  950. WARN_ON(list_empty(&urbp->td_list));
  951. qh->element = LINK_TO_TD(td);
  952. tmp = td->list.prev;
  953. ret = -EINPROGRESS;
  954. } else {
  955. /* When a bulk/interrupt transfer is short, we have to
  956. * fix up the toggles of the following URBs on the queue
  957. * before restarting the queue at the next URB. */
  958. qh->initial_toggle = uhci_toggle(td_token(qh->post_td)) ^ 1;
  959. uhci_fixup_toggles(qh, 1);
  960. if (list_empty(&urbp->td_list))
  961. td = qh->post_td;
  962. qh->element = td->link;
  963. tmp = urbp->td_list.prev;
  964. ret = 0;
  965. }
  966. /* Remove all the TDs we skipped over, from tmp back to the start */
  967. while (tmp != &urbp->td_list) {
  968. td = list_entry(tmp, struct uhci_td, list);
  969. tmp = tmp->prev;
  970. uhci_remove_td_from_urbp(td);
  971. uhci_free_td(uhci, td);
  972. }
  973. return ret;
  974. }
  975. /*
  976. * Common result for control, bulk, and interrupt
  977. */
  978. static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb)
  979. {
  980. struct urb_priv *urbp = urb->hcpriv;
  981. struct uhci_qh *qh = urbp->qh;
  982. struct uhci_td *td, *tmp;
  983. unsigned status;
  984. int ret = 0;
  985. list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
  986. unsigned int ctrlstat;
  987. int len;
  988. ctrlstat = td_status(td);
  989. status = uhci_status_bits(ctrlstat);
  990. if (status & TD_CTRL_ACTIVE)
  991. return -EINPROGRESS;
  992. len = uhci_actual_length(ctrlstat);
  993. urb->actual_length += len;
  994. if (status) {
  995. ret = uhci_map_status(status,
  996. uhci_packetout(td_token(td)));
  997. if ((debug == 1 && ret != -EPIPE) || debug > 1) {
  998. /* Some debugging code */
  999. dev_dbg(&urb->dev->dev,
  1000. "%s: failed with status %x\n",
  1001. __func__, status);
  1002. if (debug > 1 && errbuf) {
  1003. /* Print the chain for debugging */
  1004. uhci_show_qh(uhci, urbp->qh, errbuf,
  1005. ERRBUF_LEN, 0);
  1006. lprintk(errbuf);
  1007. }
  1008. }
  1009. /* Did we receive a short packet? */
  1010. } else if (len < uhci_expected_length(td_token(td))) {
  1011. /* For control transfers, go to the status TD if
  1012. * this isn't already the last data TD */
  1013. if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
  1014. if (td->list.next != urbp->td_list.prev)
  1015. ret = 1;
  1016. }
  1017. /* For bulk and interrupt, this may be an error */
  1018. else if (urb->transfer_flags & URB_SHORT_NOT_OK)
  1019. ret = -EREMOTEIO;
  1020. /* Fixup needed only if this isn't the URB's last TD */
  1021. else if (&td->list != urbp->td_list.prev)
  1022. ret = 1;
  1023. }
  1024. uhci_remove_td_from_urbp(td);
  1025. if (qh->post_td)
  1026. uhci_free_td(uhci, qh->post_td);
  1027. qh->post_td = td;
  1028. if (ret != 0)
  1029. goto err;
  1030. }
  1031. return ret;
  1032. err:
  1033. if (ret < 0) {
  1034. /* Note that the queue has stopped and save
  1035. * the next toggle value */
  1036. qh->element = UHCI_PTR_TERM;
  1037. qh->is_stopped = 1;
  1038. qh->needs_fixup = (qh->type != USB_ENDPOINT_XFER_CONTROL);
  1039. qh->initial_toggle = uhci_toggle(td_token(td)) ^
  1040. (ret == -EREMOTEIO);
  1041. } else /* Short packet received */
  1042. ret = uhci_fixup_short_transfer(uhci, qh, urbp);
  1043. return ret;
  1044. }
  1045. /*
  1046. * Isochronous transfers
  1047. */
  1048. static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb,
  1049. struct uhci_qh *qh)
  1050. {
  1051. struct uhci_td *td = NULL; /* Since urb->number_of_packets > 0 */
  1052. int i, frame;
  1053. unsigned long destination, status;
  1054. struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
  1055. /* Values must not be too big (could overflow below) */
  1056. if (urb->interval >= UHCI_NUMFRAMES ||
  1057. urb->number_of_packets >= UHCI_NUMFRAMES)
  1058. return -EFBIG;
  1059. /* Check the period and figure out the starting frame number */
  1060. if (!qh->bandwidth_reserved) {
  1061. qh->period = urb->interval;
  1062. if (urb->transfer_flags & URB_ISO_ASAP) {
  1063. qh->phase = -1; /* Find the best phase */
  1064. i = uhci_check_bandwidth(uhci, qh);
  1065. if (i)
  1066. return i;
  1067. /* Allow a little time to allocate the TDs */
  1068. uhci_get_current_frame_number(uhci);
  1069. frame = uhci->frame_number + 10;
  1070. /* Move forward to the first frame having the
  1071. * correct phase */
  1072. urb->start_frame = frame + ((qh->phase - frame) &
  1073. (qh->period - 1));
  1074. } else {
  1075. i = urb->start_frame - uhci->last_iso_frame;
  1076. if (i <= 0 || i >= UHCI_NUMFRAMES)
  1077. return -EINVAL;
  1078. qh->phase = urb->start_frame & (qh->period - 1);
  1079. i = uhci_check_bandwidth(uhci, qh);
  1080. if (i)
  1081. return i;
  1082. }
  1083. } else if (qh->period != urb->interval) {
  1084. return -EINVAL; /* Can't change the period */
  1085. } else {
  1086. /* Find the next unused frame */
  1087. if (list_empty(&qh->queue)) {
  1088. frame = qh->iso_frame;
  1089. } else {
  1090. struct urb *lurb;
  1091. lurb = list_entry(qh->queue.prev,
  1092. struct urb_priv, node)->urb;
  1093. frame = lurb->start_frame +
  1094. lurb->number_of_packets *
  1095. lurb->interval;
  1096. }
  1097. if (urb->transfer_flags & URB_ISO_ASAP) {
  1098. /* Skip some frames if necessary to insure
  1099. * the start frame is in the future.
  1100. */
  1101. uhci_get_current_frame_number(uhci);
  1102. if (uhci_frame_before_eq(frame, uhci->frame_number)) {
  1103. frame = uhci->frame_number + 1;
  1104. frame += ((qh->phase - frame) &
  1105. (qh->period - 1));
  1106. }
  1107. } /* Otherwise pick up where the last URB leaves off */
  1108. urb->start_frame = frame;
  1109. }
  1110. /* Make sure we won't have to go too far into the future */
  1111. if (uhci_frame_before_eq(uhci->last_iso_frame + UHCI_NUMFRAMES,
  1112. urb->start_frame + urb->number_of_packets *
  1113. urb->interval))
  1114. return -EFBIG;
  1115. status = TD_CTRL_ACTIVE | TD_CTRL_IOS;
  1116. destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
  1117. for (i = 0; i < urb->number_of_packets; i++) {
  1118. td = uhci_alloc_td(uhci);
  1119. if (!td)
  1120. return -ENOMEM;
  1121. uhci_add_td_to_urbp(td, urbp);
  1122. uhci_fill_td(td, status, destination |
  1123. uhci_explen(urb->iso_frame_desc[i].length),
  1124. urb->transfer_dma +
  1125. urb->iso_frame_desc[i].offset);
  1126. }
  1127. /* Set the interrupt-on-completion flag on the last packet. */
  1128. td->status |= __constant_cpu_to_le32(TD_CTRL_IOC);
  1129. /* Add the TDs to the frame list */
  1130. frame = urb->start_frame;
  1131. list_for_each_entry(td, &urbp->td_list, list) {
  1132. uhci_insert_td_in_frame_list(uhci, td, frame);
  1133. frame += qh->period;
  1134. }
  1135. if (list_empty(&qh->queue)) {
  1136. qh->iso_packet_desc = &urb->iso_frame_desc[0];
  1137. qh->iso_frame = urb->start_frame;
  1138. }
  1139. qh->skel = SKEL_ISO;
  1140. if (!qh->bandwidth_reserved)
  1141. uhci_reserve_bandwidth(uhci, qh);
  1142. return 0;
  1143. }
  1144. static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb)
  1145. {
  1146. struct uhci_td *td, *tmp;
  1147. struct urb_priv *urbp = urb->hcpriv;
  1148. struct uhci_qh *qh = urbp->qh;
  1149. list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
  1150. unsigned int ctrlstat;
  1151. int status;
  1152. int actlength;
  1153. if (uhci_frame_before_eq(uhci->cur_iso_frame, qh->iso_frame))
  1154. return -EINPROGRESS;
  1155. uhci_remove_tds_from_frame(uhci, qh->iso_frame);
  1156. ctrlstat = td_status(td);
  1157. if (ctrlstat & TD_CTRL_ACTIVE) {
  1158. status = -EXDEV; /* TD was added too late? */
  1159. } else {
  1160. status = uhci_map_status(uhci_status_bits(ctrlstat),
  1161. usb_pipeout(urb->pipe));
  1162. actlength = uhci_actual_length(ctrlstat);
  1163. urb->actual_length += actlength;
  1164. qh->iso_packet_desc->actual_length = actlength;
  1165. qh->iso_packet_desc->status = status;
  1166. }
  1167. if (status)
  1168. urb->error_count++;
  1169. uhci_remove_td_from_urbp(td);
  1170. uhci_free_td(uhci, td);
  1171. qh->iso_frame += qh->period;
  1172. ++qh->iso_packet_desc;
  1173. }
  1174. return 0;
  1175. }
  1176. static int uhci_urb_enqueue(struct usb_hcd *hcd,
  1177. struct urb *urb, gfp_t mem_flags)
  1178. {
  1179. int ret;
  1180. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  1181. unsigned long flags;
  1182. struct urb_priv *urbp;
  1183. struct uhci_qh *qh;
  1184. spin_lock_irqsave(&uhci->lock, flags);
  1185. ret = usb_hcd_link_urb_to_ep(hcd, urb);
  1186. if (ret)
  1187. goto done_not_linked;
  1188. ret = -ENOMEM;
  1189. urbp = uhci_alloc_urb_priv(uhci, urb);
  1190. if (!urbp)
  1191. goto done;
  1192. if (urb->ep->hcpriv)
  1193. qh = urb->ep->hcpriv;
  1194. else {
  1195. qh = uhci_alloc_qh(uhci, urb->dev, urb->ep);
  1196. if (!qh)
  1197. goto err_no_qh;
  1198. }
  1199. urbp->qh = qh;
  1200. switch (qh->type) {
  1201. case USB_ENDPOINT_XFER_CONTROL:
  1202. ret = uhci_submit_control(uhci, urb, qh);
  1203. break;
  1204. case USB_ENDPOINT_XFER_BULK:
  1205. ret = uhci_submit_bulk(uhci, urb, qh);
  1206. break;
  1207. case USB_ENDPOINT_XFER_INT:
  1208. ret = uhci_submit_interrupt(uhci, urb, qh);
  1209. break;
  1210. case USB_ENDPOINT_XFER_ISOC:
  1211. urb->error_count = 0;
  1212. ret = uhci_submit_isochronous(uhci, urb, qh);
  1213. break;
  1214. }
  1215. if (ret != 0)
  1216. goto err_submit_failed;
  1217. /* Add this URB to the QH */
  1218. urbp->qh = qh;
  1219. list_add_tail(&urbp->node, &qh->queue);
  1220. /* If the new URB is the first and only one on this QH then either
  1221. * the QH is new and idle or else it's unlinked and waiting to
  1222. * become idle, so we can activate it right away. But only if the
  1223. * queue isn't stopped. */
  1224. if (qh->queue.next == &urbp->node && !qh->is_stopped) {
  1225. uhci_activate_qh(uhci, qh);
  1226. uhci_urbp_wants_fsbr(uhci, urbp);
  1227. }
  1228. goto done;
  1229. err_submit_failed:
  1230. if (qh->state == QH_STATE_IDLE)
  1231. uhci_make_qh_idle(uhci, qh); /* Reclaim unused QH */
  1232. err_no_qh:
  1233. uhci_free_urb_priv(uhci, urbp);
  1234. done:
  1235. if (ret)
  1236. usb_hcd_unlink_urb_from_ep(hcd, urb);
  1237. done_not_linked:
  1238. spin_unlock_irqrestore(&uhci->lock, flags);
  1239. return ret;
  1240. }
  1241. static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  1242. {
  1243. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  1244. unsigned long flags;
  1245. struct uhci_qh *qh;
  1246. int rc;
  1247. spin_lock_irqsave(&uhci->lock, flags);
  1248. rc = usb_hcd_check_unlink_urb(hcd, urb, status);
  1249. if (rc)
  1250. goto done;
  1251. qh = ((struct urb_priv *) urb->hcpriv)->qh;
  1252. /* Remove Isochronous TDs from the frame list ASAP */
  1253. if (qh->type == USB_ENDPOINT_XFER_ISOC) {
  1254. uhci_unlink_isochronous_tds(uhci, urb);
  1255. mb();
  1256. /* If the URB has already started, update the QH unlink time */
  1257. uhci_get_current_frame_number(uhci);
  1258. if (uhci_frame_before_eq(urb->start_frame, uhci->frame_number))
  1259. qh->unlink_frame = uhci->frame_number;
  1260. }
  1261. uhci_unlink_qh(uhci, qh);
  1262. done:
  1263. spin_unlock_irqrestore(&uhci->lock, flags);
  1264. return rc;
  1265. }
  1266. /*
  1267. * Finish unlinking an URB and give it back
  1268. */
  1269. static void uhci_giveback_urb(struct uhci_hcd *uhci, struct uhci_qh *qh,
  1270. struct urb *urb, int status)
  1271. __releases(uhci->lock)
  1272. __acquires(uhci->lock)
  1273. {
  1274. struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
  1275. if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
  1276. /* urb->actual_length < 0 means the setup transaction didn't
  1277. * complete successfully. Either it failed or the URB was
  1278. * unlinked first. Regardless, don't confuse people with a
  1279. * negative length. */
  1280. urb->actual_length = max(urb->actual_length, 0);
  1281. }
  1282. /* When giving back the first URB in an Isochronous queue,
  1283. * reinitialize the QH's iso-related members for the next URB. */
  1284. else if (qh->type == USB_ENDPOINT_XFER_ISOC &&
  1285. urbp->node.prev == &qh->queue &&
  1286. urbp->node.next != &qh->queue) {
  1287. struct urb *nurb = list_entry(urbp->node.next,
  1288. struct urb_priv, node)->urb;
  1289. qh->iso_packet_desc = &nurb->iso_frame_desc[0];
  1290. qh->iso_frame = nurb->start_frame;
  1291. }
  1292. /* Take the URB off the QH's queue. If the queue is now empty,
  1293. * this is a perfect time for a toggle fixup. */
  1294. list_del_init(&urbp->node);
  1295. if (list_empty(&qh->queue) && qh->needs_fixup) {
  1296. usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  1297. usb_pipeout(urb->pipe), qh->initial_toggle);
  1298. qh->needs_fixup = 0;
  1299. }
  1300. uhci_free_urb_priv(uhci, urbp);
  1301. usb_hcd_unlink_urb_from_ep(uhci_to_hcd(uhci), urb);
  1302. spin_unlock(&uhci->lock);
  1303. usb_hcd_giveback_urb(uhci_to_hcd(uhci), urb, status);
  1304. spin_lock(&uhci->lock);
  1305. /* If the queue is now empty, we can unlink the QH and give up its
  1306. * reserved bandwidth. */
  1307. if (list_empty(&qh->queue)) {
  1308. uhci_unlink_qh(uhci, qh);
  1309. if (qh->bandwidth_reserved)
  1310. uhci_release_bandwidth(uhci, qh);
  1311. }
  1312. }
  1313. /*
  1314. * Scan the URBs in a QH's queue
  1315. */
  1316. #define QH_FINISHED_UNLINKING(qh) \
  1317. (qh->state == QH_STATE_UNLINKING && \
  1318. uhci->frame_number + uhci->is_stopped != qh->unlink_frame)
  1319. static void uhci_scan_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  1320. {
  1321. struct urb_priv *urbp;
  1322. struct urb *urb;
  1323. int status;
  1324. while (!list_empty(&qh->queue)) {
  1325. urbp = list_entry(qh->queue.next, struct urb_priv, node);
  1326. urb = urbp->urb;
  1327. if (qh->type == USB_ENDPOINT_XFER_ISOC)
  1328. status = uhci_result_isochronous(uhci, urb);
  1329. else
  1330. status = uhci_result_common(uhci, urb);
  1331. if (status == -EINPROGRESS)
  1332. break;
  1333. /* Dequeued but completed URBs can't be given back unless
  1334. * the QH is stopped or has finished unlinking. */
  1335. if (urb->unlinked) {
  1336. if (QH_FINISHED_UNLINKING(qh))
  1337. qh->is_stopped = 1;
  1338. else if (!qh->is_stopped)
  1339. return;
  1340. }
  1341. uhci_giveback_urb(uhci, qh, urb, status);
  1342. if (status < 0)
  1343. break;
  1344. }
  1345. /* If the QH is neither stopped nor finished unlinking (normal case),
  1346. * our work here is done. */
  1347. if (QH_FINISHED_UNLINKING(qh))
  1348. qh->is_stopped = 1;
  1349. else if (!qh->is_stopped)
  1350. return;
  1351. /* Otherwise give back each of the dequeued URBs */
  1352. restart:
  1353. list_for_each_entry(urbp, &qh->queue, node) {
  1354. urb = urbp->urb;
  1355. if (urb->unlinked) {
  1356. /* Fix up the TD links and save the toggles for
  1357. * non-Isochronous queues. For Isochronous queues,
  1358. * test for too-recent dequeues. */
  1359. if (!uhci_cleanup_queue(uhci, qh, urb)) {
  1360. qh->is_stopped = 0;
  1361. return;
  1362. }
  1363. uhci_giveback_urb(uhci, qh, urb, 0);
  1364. goto restart;
  1365. }
  1366. }
  1367. qh->is_stopped = 0;
  1368. /* There are no more dequeued URBs. If there are still URBs on the
  1369. * queue, the QH can now be re-activated. */
  1370. if (!list_empty(&qh->queue)) {
  1371. if (qh->needs_fixup)
  1372. uhci_fixup_toggles(qh, 0);
  1373. /* If the first URB on the queue wants FSBR but its time
  1374. * limit has expired, set the next TD to interrupt on
  1375. * completion before reactivating the QH. */
  1376. urbp = list_entry(qh->queue.next, struct urb_priv, node);
  1377. if (urbp->fsbr && qh->wait_expired) {
  1378. struct uhci_td *td = list_entry(urbp->td_list.next,
  1379. struct uhci_td, list);
  1380. td->status |= __cpu_to_le32(TD_CTRL_IOC);
  1381. }
  1382. uhci_activate_qh(uhci, qh);
  1383. }
  1384. /* The queue is empty. The QH can become idle if it is fully
  1385. * unlinked. */
  1386. else if (QH_FINISHED_UNLINKING(qh))
  1387. uhci_make_qh_idle(uhci, qh);
  1388. }
  1389. /*
  1390. * Check for queues that have made some forward progress.
  1391. * Returns 0 if the queue is not Isochronous, is ACTIVE, and
  1392. * has not advanced since last examined; 1 otherwise.
  1393. *
  1394. * Early Intel controllers have a bug which causes qh->element sometimes
  1395. * not to advance when a TD completes successfully. The queue remains
  1396. * stuck on the inactive completed TD. We detect such cases and advance
  1397. * the element pointer by hand.
  1398. */
  1399. static int uhci_advance_check(struct uhci_hcd *uhci, struct uhci_qh *qh)
  1400. {
  1401. struct urb_priv *urbp = NULL;
  1402. struct uhci_td *td;
  1403. int ret = 1;
  1404. unsigned status;
  1405. if (qh->type == USB_ENDPOINT_XFER_ISOC)
  1406. goto done;
  1407. /* Treat an UNLINKING queue as though it hasn't advanced.
  1408. * This is okay because reactivation will treat it as though
  1409. * it has advanced, and if it is going to become IDLE then
  1410. * this doesn't matter anyway. Furthermore it's possible
  1411. * for an UNLINKING queue not to have any URBs at all, or
  1412. * for its first URB not to have any TDs (if it was dequeued
  1413. * just as it completed). So it's not easy in any case to
  1414. * test whether such queues have advanced. */
  1415. if (qh->state != QH_STATE_ACTIVE) {
  1416. urbp = NULL;
  1417. status = 0;
  1418. } else {
  1419. urbp = list_entry(qh->queue.next, struct urb_priv, node);
  1420. td = list_entry(urbp->td_list.next, struct uhci_td, list);
  1421. status = td_status(td);
  1422. if (!(status & TD_CTRL_ACTIVE)) {
  1423. /* We're okay, the queue has advanced */
  1424. qh->wait_expired = 0;
  1425. qh->advance_jiffies = jiffies;
  1426. goto done;
  1427. }
  1428. ret = 0;
  1429. }
  1430. /* The queue hasn't advanced; check for timeout */
  1431. if (qh->wait_expired)
  1432. goto done;
  1433. if (time_after(jiffies, qh->advance_jiffies + QH_WAIT_TIMEOUT)) {
  1434. /* Detect the Intel bug and work around it */
  1435. if (qh->post_td && qh_element(qh) == LINK_TO_TD(qh->post_td)) {
  1436. qh->element = qh->post_td->link;
  1437. qh->advance_jiffies = jiffies;
  1438. ret = 1;
  1439. goto done;
  1440. }
  1441. qh->wait_expired = 1;
  1442. /* If the current URB wants FSBR, unlink it temporarily
  1443. * so that we can safely set the next TD to interrupt on
  1444. * completion. That way we'll know as soon as the queue
  1445. * starts moving again. */
  1446. if (urbp && urbp->fsbr && !(status & TD_CTRL_IOC))
  1447. uhci_unlink_qh(uhci, qh);
  1448. } else {
  1449. /* Unmoving but not-yet-expired queues keep FSBR alive */
  1450. if (urbp)
  1451. uhci_urbp_wants_fsbr(uhci, urbp);
  1452. }
  1453. done:
  1454. return ret;
  1455. }
  1456. /*
  1457. * Process events in the schedule, but only in one thread at a time
  1458. */
  1459. static void uhci_scan_schedule(struct uhci_hcd *uhci)
  1460. {
  1461. int i;
  1462. struct uhci_qh *qh;
  1463. /* Don't allow re-entrant calls */
  1464. if (uhci->scan_in_progress) {
  1465. uhci->need_rescan = 1;
  1466. return;
  1467. }
  1468. uhci->scan_in_progress = 1;
  1469. rescan:
  1470. uhci->need_rescan = 0;
  1471. uhci->fsbr_is_wanted = 0;
  1472. uhci_clear_next_interrupt(uhci);
  1473. uhci_get_current_frame_number(uhci);
  1474. uhci->cur_iso_frame = uhci->frame_number;
  1475. /* Go through all the QH queues and process the URBs in each one */
  1476. for (i = 0; i < UHCI_NUM_SKELQH - 1; ++i) {
  1477. uhci->next_qh = list_entry(uhci->skelqh[i]->node.next,
  1478. struct uhci_qh, node);
  1479. while ((qh = uhci->next_qh) != uhci->skelqh[i]) {
  1480. uhci->next_qh = list_entry(qh->node.next,
  1481. struct uhci_qh, node);
  1482. if (uhci_advance_check(uhci, qh)) {
  1483. uhci_scan_qh(uhci, qh);
  1484. if (qh->state == QH_STATE_ACTIVE) {
  1485. uhci_urbp_wants_fsbr(uhci,
  1486. list_entry(qh->queue.next, struct urb_priv, node));
  1487. }
  1488. }
  1489. }
  1490. }
  1491. uhci->last_iso_frame = uhci->cur_iso_frame;
  1492. if (uhci->need_rescan)
  1493. goto rescan;
  1494. uhci->scan_in_progress = 0;
  1495. if (uhci->fsbr_is_on && !uhci->fsbr_is_wanted &&
  1496. !uhci->fsbr_expiring) {
  1497. uhci->fsbr_expiring = 1;
  1498. mod_timer(&uhci->fsbr_timer, jiffies + FSBR_OFF_DELAY);
  1499. }
  1500. if (list_empty(&uhci->skel_unlink_qh->node))
  1501. uhci_clear_next_interrupt(uhci);
  1502. else
  1503. uhci_set_next_interrupt(uhci);
  1504. }