uhci-hcd.c 27 KB

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  1. /*
  2. * Universal Host Controller Interface driver for USB.
  3. *
  4. * Maintainer: Alan Stern <stern@rowland.harvard.edu>
  5. *
  6. * (C) Copyright 1999 Linus Torvalds
  7. * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
  8. * (C) Copyright 1999 Randy Dunlap
  9. * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  10. * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  11. * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  12. * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
  13. * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
  14. * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
  15. * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
  16. * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
  17. *
  18. * Intel documents this fairly well, and as far as I know there
  19. * are no royalties or anything like that, but even so there are
  20. * people who decided that they want to do the same thing in a
  21. * completely different way.
  22. *
  23. */
  24. #include <linux/module.h>
  25. #include <linux/pci.h>
  26. #include <linux/kernel.h>
  27. #include <linux/init.h>
  28. #include <linux/delay.h>
  29. #include <linux/ioport.h>
  30. #include <linux/slab.h>
  31. #include <linux/errno.h>
  32. #include <linux/unistd.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/debugfs.h>
  36. #include <linux/pm.h>
  37. #include <linux/dmapool.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/usb.h>
  40. #include <linux/bitops.h>
  41. #include <linux/dmi.h>
  42. #include <asm/uaccess.h>
  43. #include <asm/io.h>
  44. #include <asm/irq.h>
  45. #include <asm/system.h>
  46. #include "../core/hcd.h"
  47. #include "uhci-hcd.h"
  48. #include "pci-quirks.h"
  49. /*
  50. * Version Information
  51. */
  52. #define DRIVER_VERSION "v3.0"
  53. #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
  54. Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
  55. Alan Stern"
  56. #define DRIVER_DESC "USB Universal Host Controller Interface driver"
  57. /* for flakey hardware, ignore overcurrent indicators */
  58. static int ignore_oc;
  59. module_param(ignore_oc, bool, S_IRUGO);
  60. MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications");
  61. /*
  62. * debug = 0, no debugging messages
  63. * debug = 1, dump failed URBs except for stalls
  64. * debug = 2, dump all failed URBs (including stalls)
  65. * show all queues in /debug/uhci/[pci_addr]
  66. * debug = 3, show all TDs in URBs when dumping
  67. */
  68. #ifdef DEBUG
  69. #define DEBUG_CONFIGURED 1
  70. static int debug = 1;
  71. module_param(debug, int, S_IRUGO | S_IWUSR);
  72. MODULE_PARM_DESC(debug, "Debug level");
  73. #else
  74. #define DEBUG_CONFIGURED 0
  75. #define debug 0
  76. #endif
  77. static char *errbuf;
  78. #define ERRBUF_LEN (32 * 1024)
  79. static struct kmem_cache *uhci_up_cachep; /* urb_priv */
  80. static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
  81. static void wakeup_rh(struct uhci_hcd *uhci);
  82. static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
  83. /*
  84. * Calculate the link pointer DMA value for the first Skeleton QH in a frame.
  85. */
  86. static __le32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame)
  87. {
  88. int skelnum;
  89. /*
  90. * The interrupt queues will be interleaved as evenly as possible.
  91. * There's not much to be done about period-1 interrupts; they have
  92. * to occur in every frame. But we can schedule period-2 interrupts
  93. * in odd-numbered frames, period-4 interrupts in frames congruent
  94. * to 2 (mod 4), and so on. This way each frame only has two
  95. * interrupt QHs, which will help spread out bandwidth utilization.
  96. *
  97. * ffs (Find First bit Set) does exactly what we need:
  98. * 1,3,5,... => ffs = 0 => use period-2 QH = skelqh[8],
  99. * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc.
  100. * ffs >= 7 => not on any high-period queue, so use
  101. * period-1 QH = skelqh[9].
  102. * Add in UHCI_NUMFRAMES to insure at least one bit is set.
  103. */
  104. skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES);
  105. if (skelnum <= 1)
  106. skelnum = 9;
  107. return LINK_TO_QH(uhci->skelqh[skelnum]);
  108. }
  109. #include "uhci-debug.c"
  110. #include "uhci-q.c"
  111. #include "uhci-hub.c"
  112. /*
  113. * Finish up a host controller reset and update the recorded state.
  114. */
  115. static void finish_reset(struct uhci_hcd *uhci)
  116. {
  117. int port;
  118. /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
  119. * bits in the port status and control registers.
  120. * We have to clear them by hand.
  121. */
  122. for (port = 0; port < uhci->rh_numports; ++port)
  123. outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
  124. uhci->port_c_suspend = uhci->resuming_ports = 0;
  125. uhci->rh_state = UHCI_RH_RESET;
  126. uhci->is_stopped = UHCI_IS_STOPPED;
  127. uhci_to_hcd(uhci)->state = HC_STATE_HALT;
  128. uhci_to_hcd(uhci)->poll_rh = 0;
  129. uhci->dead = 0; /* Full reset resurrects the controller */
  130. }
  131. /*
  132. * Last rites for a defunct/nonfunctional controller
  133. * or one we don't want to use any more.
  134. */
  135. static void uhci_hc_died(struct uhci_hcd *uhci)
  136. {
  137. uhci_get_current_frame_number(uhci);
  138. uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
  139. finish_reset(uhci);
  140. uhci->dead = 1;
  141. /* The current frame may already be partway finished */
  142. ++uhci->frame_number;
  143. }
  144. /*
  145. * Initialize a controller that was newly discovered or has lost power
  146. * or otherwise been reset while it was suspended. In none of these cases
  147. * can we be sure of its previous state.
  148. */
  149. static void check_and_reset_hc(struct uhci_hcd *uhci)
  150. {
  151. if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
  152. finish_reset(uhci);
  153. }
  154. /*
  155. * Store the basic register settings needed by the controller.
  156. */
  157. static void configure_hc(struct uhci_hcd *uhci)
  158. {
  159. /* Set the frame length to the default: 1 ms exactly */
  160. outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
  161. /* Store the frame list base address */
  162. outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
  163. /* Set the current frame number */
  164. outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER,
  165. uhci->io_addr + USBFRNUM);
  166. /* Mark controller as not halted before we enable interrupts */
  167. uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;
  168. mb();
  169. /* Enable PIRQ */
  170. pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
  171. USBLEGSUP_DEFAULT);
  172. }
  173. static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
  174. {
  175. int port;
  176. /* If we have to ignore overcurrent events then almost by definition
  177. * we can't depend on resume-detect interrupts. */
  178. if (ignore_oc)
  179. return 1;
  180. switch (to_pci_dev(uhci_dev(uhci))->vendor) {
  181. default:
  182. break;
  183. case PCI_VENDOR_ID_GENESYS:
  184. /* Genesys Logic's GL880S controllers don't generate
  185. * resume-detect interrupts.
  186. */
  187. return 1;
  188. case PCI_VENDOR_ID_INTEL:
  189. /* Some of Intel's USB controllers have a bug that causes
  190. * resume-detect interrupts if any port has an over-current
  191. * condition. To make matters worse, some motherboards
  192. * hardwire unused USB ports' over-current inputs active!
  193. * To prevent problems, we will not enable resume-detect
  194. * interrupts if any ports are OC.
  195. */
  196. for (port = 0; port < uhci->rh_numports; ++port) {
  197. if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
  198. USBPORTSC_OC)
  199. return 1;
  200. }
  201. break;
  202. }
  203. return 0;
  204. }
  205. static int global_suspend_mode_is_broken(struct uhci_hcd *uhci)
  206. {
  207. int port;
  208. const char *sys_info;
  209. static char bad_Asus_board[] = "A7V8X";
  210. /* One of Asus's motherboards has a bug which causes it to
  211. * wake up immediately from suspend-to-RAM if any of the ports
  212. * are connected. In such cases we will not set EGSM.
  213. */
  214. sys_info = dmi_get_system_info(DMI_BOARD_NAME);
  215. if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
  216. for (port = 0; port < uhci->rh_numports; ++port) {
  217. if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
  218. USBPORTSC_CCS)
  219. return 1;
  220. }
  221. }
  222. return 0;
  223. }
  224. static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
  225. __releases(uhci->lock)
  226. __acquires(uhci->lock)
  227. {
  228. int auto_stop;
  229. int int_enable, egsm_enable, wakeup_enable;
  230. struct usb_device *rhdev = uhci_to_hcd(uhci)->self.root_hub;
  231. auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
  232. dev_dbg(&rhdev->dev, "%s%s\n", __func__,
  233. (auto_stop ? " (auto-stop)" : ""));
  234. /* Start off by assuming Resume-Detect interrupts and EGSM work
  235. * and that remote wakeups should be enabled.
  236. */
  237. egsm_enable = USBCMD_EGSM;
  238. uhci->RD_enable = 1;
  239. int_enable = USBINTR_RESUME;
  240. wakeup_enable = 1;
  241. /* In auto-stop mode wakeups must always be detected, but
  242. * Resume-Detect interrupts may be prohibited. (In the absence
  243. * of CONFIG_PM, they are always disallowed.)
  244. */
  245. if (auto_stop) {
  246. if (!device_may_wakeup(&rhdev->dev))
  247. int_enable = 0;
  248. /* In bus-suspend mode wakeups may be disabled, but if they are
  249. * allowed then so are Resume-Detect interrupts.
  250. */
  251. } else {
  252. #ifdef CONFIG_PM
  253. if (!rhdev->do_remote_wakeup)
  254. wakeup_enable = 0;
  255. #endif
  256. }
  257. /* EGSM causes the root hub to echo a 'K' signal (resume) out any
  258. * port which requests a remote wakeup. According to the USB spec,
  259. * every hub is supposed to do this. But if we are ignoring
  260. * remote-wakeup requests anyway then there's no point to it.
  261. * We also shouldn't enable EGSM if it's broken.
  262. */
  263. if (!wakeup_enable || global_suspend_mode_is_broken(uhci))
  264. egsm_enable = 0;
  265. /* If we're ignoring wakeup events then there's no reason to
  266. * enable Resume-Detect interrupts. We also shouldn't enable
  267. * them if they are broken or disallowed.
  268. *
  269. * This logic may lead us to enabling RD but not EGSM. The UHCI
  270. * spec foolishly says that RD works only when EGSM is on, but
  271. * there's no harm in enabling it anyway -- perhaps some chips
  272. * will implement it!
  273. */
  274. if (!wakeup_enable || resume_detect_interrupts_are_broken(uhci) ||
  275. !int_enable)
  276. uhci->RD_enable = int_enable = 0;
  277. outw(int_enable, uhci->io_addr + USBINTR);
  278. outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD);
  279. mb();
  280. udelay(5);
  281. /* If we're auto-stopping then no devices have been attached
  282. * for a while, so there shouldn't be any active URBs and the
  283. * controller should stop after a few microseconds. Otherwise
  284. * we will give the controller one frame to stop.
  285. */
  286. if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
  287. uhci->rh_state = UHCI_RH_SUSPENDING;
  288. spin_unlock_irq(&uhci->lock);
  289. msleep(1);
  290. spin_lock_irq(&uhci->lock);
  291. if (uhci->dead)
  292. return;
  293. }
  294. if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
  295. dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
  296. uhci_get_current_frame_number(uhci);
  297. uhci->rh_state = new_state;
  298. uhci->is_stopped = UHCI_IS_STOPPED;
  299. /* If interrupts don't work and remote wakeup is enabled then
  300. * the suspended root hub needs to be polled.
  301. */
  302. uhci_to_hcd(uhci)->poll_rh = (!int_enable && wakeup_enable);
  303. uhci_scan_schedule(uhci);
  304. uhci_fsbr_off(uhci);
  305. }
  306. static void start_rh(struct uhci_hcd *uhci)
  307. {
  308. uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
  309. uhci->is_stopped = 0;
  310. /* Mark it configured and running with a 64-byte max packet.
  311. * All interrupts are enabled, even though RESUME won't do anything.
  312. */
  313. outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
  314. outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
  315. uhci->io_addr + USBINTR);
  316. mb();
  317. uhci->rh_state = UHCI_RH_RUNNING;
  318. uhci_to_hcd(uhci)->poll_rh = 1;
  319. }
  320. static void wakeup_rh(struct uhci_hcd *uhci)
  321. __releases(uhci->lock)
  322. __acquires(uhci->lock)
  323. {
  324. dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
  325. "%s%s\n", __func__,
  326. uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
  327. " (auto-start)" : "");
  328. /* If we are auto-stopped then no devices are attached so there's
  329. * no need for wakeup signals. Otherwise we send Global Resume
  330. * for 20 ms.
  331. */
  332. if (uhci->rh_state == UHCI_RH_SUSPENDED) {
  333. unsigned egsm;
  334. /* Keep EGSM on if it was set before */
  335. egsm = inw(uhci->io_addr + USBCMD) & USBCMD_EGSM;
  336. uhci->rh_state = UHCI_RH_RESUMING;
  337. outw(USBCMD_FGR | USBCMD_CF | egsm, uhci->io_addr + USBCMD);
  338. spin_unlock_irq(&uhci->lock);
  339. msleep(20);
  340. spin_lock_irq(&uhci->lock);
  341. if (uhci->dead)
  342. return;
  343. /* End Global Resume and wait for EOP to be sent */
  344. outw(USBCMD_CF, uhci->io_addr + USBCMD);
  345. mb();
  346. udelay(4);
  347. if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
  348. dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
  349. }
  350. start_rh(uhci);
  351. /* Restart root hub polling */
  352. mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
  353. }
  354. static irqreturn_t uhci_irq(struct usb_hcd *hcd)
  355. {
  356. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  357. unsigned short status;
  358. /*
  359. * Read the interrupt status, and write it back to clear the
  360. * interrupt cause. Contrary to the UHCI specification, the
  361. * "HC Halted" status bit is persistent: it is RO, not R/WC.
  362. */
  363. status = inw(uhci->io_addr + USBSTS);
  364. if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
  365. return IRQ_NONE;
  366. outw(status, uhci->io_addr + USBSTS); /* Clear it */
  367. if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
  368. if (status & USBSTS_HSE)
  369. dev_err(uhci_dev(uhci), "host system error, "
  370. "PCI problems?\n");
  371. if (status & USBSTS_HCPE)
  372. dev_err(uhci_dev(uhci), "host controller process "
  373. "error, something bad happened!\n");
  374. if (status & USBSTS_HCH) {
  375. spin_lock(&uhci->lock);
  376. if (uhci->rh_state >= UHCI_RH_RUNNING) {
  377. dev_err(uhci_dev(uhci),
  378. "host controller halted, "
  379. "very bad!\n");
  380. if (debug > 1 && errbuf) {
  381. /* Print the schedule for debugging */
  382. uhci_sprint_schedule(uhci,
  383. errbuf, ERRBUF_LEN);
  384. lprintk(errbuf);
  385. }
  386. uhci_hc_died(uhci);
  387. /* Force a callback in case there are
  388. * pending unlinks */
  389. mod_timer(&hcd->rh_timer, jiffies);
  390. }
  391. spin_unlock(&uhci->lock);
  392. }
  393. }
  394. if (status & USBSTS_RD)
  395. usb_hcd_poll_rh_status(hcd);
  396. else {
  397. spin_lock(&uhci->lock);
  398. uhci_scan_schedule(uhci);
  399. spin_unlock(&uhci->lock);
  400. }
  401. return IRQ_HANDLED;
  402. }
  403. /*
  404. * Store the current frame number in uhci->frame_number if the controller
  405. * is runnning. Expand from 11 bits (of which we use only 10) to a
  406. * full-sized integer.
  407. *
  408. * Like many other parts of the driver, this code relies on being polled
  409. * more than once per second as long as the controller is running.
  410. */
  411. static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
  412. {
  413. if (!uhci->is_stopped) {
  414. unsigned delta;
  415. delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) &
  416. (UHCI_NUMFRAMES - 1);
  417. uhci->frame_number += delta;
  418. }
  419. }
  420. /*
  421. * De-allocate all resources
  422. */
  423. static void release_uhci(struct uhci_hcd *uhci)
  424. {
  425. int i;
  426. if (DEBUG_CONFIGURED) {
  427. spin_lock_irq(&uhci->lock);
  428. uhci->is_initialized = 0;
  429. spin_unlock_irq(&uhci->lock);
  430. debugfs_remove(uhci->dentry);
  431. }
  432. for (i = 0; i < UHCI_NUM_SKELQH; i++)
  433. uhci_free_qh(uhci, uhci->skelqh[i]);
  434. uhci_free_td(uhci, uhci->term_td);
  435. dma_pool_destroy(uhci->qh_pool);
  436. dma_pool_destroy(uhci->td_pool);
  437. kfree(uhci->frame_cpu);
  438. dma_free_coherent(uhci_dev(uhci),
  439. UHCI_NUMFRAMES * sizeof(*uhci->frame),
  440. uhci->frame, uhci->frame_dma_handle);
  441. }
  442. static int uhci_init(struct usb_hcd *hcd)
  443. {
  444. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  445. unsigned io_size = (unsigned) hcd->rsrc_len;
  446. int port;
  447. uhci->io_addr = (unsigned long) hcd->rsrc_start;
  448. /* The UHCI spec says devices must have 2 ports, and goes on to say
  449. * they may have more but gives no way to determine how many there
  450. * are. However according to the UHCI spec, Bit 7 of the port
  451. * status and control register is always set to 1. So we try to
  452. * use this to our advantage. Another common failure mode when
  453. * a nonexistent register is addressed is to return all ones, so
  454. * we test for that also.
  455. */
  456. for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
  457. unsigned int portstatus;
  458. portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
  459. if (!(portstatus & 0x0080) || portstatus == 0xffff)
  460. break;
  461. }
  462. if (debug)
  463. dev_info(uhci_dev(uhci), "detected %d ports\n", port);
  464. /* Anything greater than 7 is weird so we'll ignore it. */
  465. if (port > UHCI_RH_MAXCHILD) {
  466. dev_info(uhci_dev(uhci), "port count misdetected? "
  467. "forcing to 2 ports\n");
  468. port = 2;
  469. }
  470. uhci->rh_numports = port;
  471. /* Kick BIOS off this hardware and reset if the controller
  472. * isn't already safely quiescent.
  473. */
  474. check_and_reset_hc(uhci);
  475. return 0;
  476. }
  477. /* Make sure the controller is quiescent and that we're not using it
  478. * any more. This is mainly for the benefit of programs which, like kexec,
  479. * expect the hardware to be idle: not doing DMA or generating IRQs.
  480. *
  481. * This routine may be called in a damaged or failing kernel. Hence we
  482. * do not acquire the spinlock before shutting down the controller.
  483. */
  484. static void uhci_shutdown(struct pci_dev *pdev)
  485. {
  486. struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
  487. uhci_hc_died(hcd_to_uhci(hcd));
  488. }
  489. /*
  490. * Allocate a frame list, and then setup the skeleton
  491. *
  492. * The hardware doesn't really know any difference
  493. * in the queues, but the order does matter for the
  494. * protocols higher up. The order in which the queues
  495. * are encountered by the hardware is:
  496. *
  497. * - All isochronous events are handled before any
  498. * of the queues. We don't do that here, because
  499. * we'll create the actual TD entries on demand.
  500. * - The first queue is the high-period interrupt queue.
  501. * - The second queue is the period-1 interrupt and async
  502. * (low-speed control, full-speed control, then bulk) queue.
  503. * - The third queue is the terminating bandwidth reclamation queue,
  504. * which contains no members, loops back to itself, and is present
  505. * only when FSBR is on and there are no full-speed control or bulk QHs.
  506. */
  507. static int uhci_start(struct usb_hcd *hcd)
  508. {
  509. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  510. int retval = -EBUSY;
  511. int i;
  512. struct dentry *dentry;
  513. hcd->uses_new_polling = 1;
  514. spin_lock_init(&uhci->lock);
  515. setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout,
  516. (unsigned long) uhci);
  517. INIT_LIST_HEAD(&uhci->idle_qh_list);
  518. init_waitqueue_head(&uhci->waitqh);
  519. if (DEBUG_CONFIGURED) {
  520. dentry = debugfs_create_file(hcd->self.bus_name,
  521. S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
  522. uhci, &uhci_debug_operations);
  523. if (!dentry) {
  524. dev_err(uhci_dev(uhci), "couldn't create uhci "
  525. "debugfs entry\n");
  526. retval = -ENOMEM;
  527. goto err_create_debug_entry;
  528. }
  529. uhci->dentry = dentry;
  530. }
  531. uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
  532. UHCI_NUMFRAMES * sizeof(*uhci->frame),
  533. &uhci->frame_dma_handle, 0);
  534. if (!uhci->frame) {
  535. dev_err(uhci_dev(uhci), "unable to allocate "
  536. "consistent memory for frame list\n");
  537. goto err_alloc_frame;
  538. }
  539. memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
  540. uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
  541. GFP_KERNEL);
  542. if (!uhci->frame_cpu) {
  543. dev_err(uhci_dev(uhci), "unable to allocate "
  544. "memory for frame pointers\n");
  545. goto err_alloc_frame_cpu;
  546. }
  547. uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
  548. sizeof(struct uhci_td), 16, 0);
  549. if (!uhci->td_pool) {
  550. dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
  551. goto err_create_td_pool;
  552. }
  553. uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
  554. sizeof(struct uhci_qh), 16, 0);
  555. if (!uhci->qh_pool) {
  556. dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
  557. goto err_create_qh_pool;
  558. }
  559. uhci->term_td = uhci_alloc_td(uhci);
  560. if (!uhci->term_td) {
  561. dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
  562. goto err_alloc_term_td;
  563. }
  564. for (i = 0; i < UHCI_NUM_SKELQH; i++) {
  565. uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
  566. if (!uhci->skelqh[i]) {
  567. dev_err(uhci_dev(uhci), "unable to allocate QH\n");
  568. goto err_alloc_skelqh;
  569. }
  570. }
  571. /*
  572. * 8 Interrupt queues; link all higher int queues to int1 = async
  573. */
  574. for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i)
  575. uhci->skelqh[i]->link = LINK_TO_QH(uhci->skel_async_qh);
  576. uhci->skel_async_qh->link = UHCI_PTR_TERM;
  577. uhci->skel_term_qh->link = LINK_TO_QH(uhci->skel_term_qh);
  578. /* This dummy TD is to work around a bug in Intel PIIX controllers */
  579. uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
  580. (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
  581. uhci->term_td->link = UHCI_PTR_TERM;
  582. uhci->skel_async_qh->element = uhci->skel_term_qh->element =
  583. LINK_TO_TD(uhci->term_td);
  584. /*
  585. * Fill the frame list: make all entries point to the proper
  586. * interrupt queue.
  587. */
  588. for (i = 0; i < UHCI_NUMFRAMES; i++) {
  589. /* Only place we don't use the frame list routines */
  590. uhci->frame[i] = uhci_frame_skel_link(uhci, i);
  591. }
  592. /*
  593. * Some architectures require a full mb() to enforce completion of
  594. * the memory writes above before the I/O transfers in configure_hc().
  595. */
  596. mb();
  597. configure_hc(uhci);
  598. uhci->is_initialized = 1;
  599. start_rh(uhci);
  600. return 0;
  601. /*
  602. * error exits:
  603. */
  604. err_alloc_skelqh:
  605. for (i = 0; i < UHCI_NUM_SKELQH; i++) {
  606. if (uhci->skelqh[i])
  607. uhci_free_qh(uhci, uhci->skelqh[i]);
  608. }
  609. uhci_free_td(uhci, uhci->term_td);
  610. err_alloc_term_td:
  611. dma_pool_destroy(uhci->qh_pool);
  612. err_create_qh_pool:
  613. dma_pool_destroy(uhci->td_pool);
  614. err_create_td_pool:
  615. kfree(uhci->frame_cpu);
  616. err_alloc_frame_cpu:
  617. dma_free_coherent(uhci_dev(uhci),
  618. UHCI_NUMFRAMES * sizeof(*uhci->frame),
  619. uhci->frame, uhci->frame_dma_handle);
  620. err_alloc_frame:
  621. debugfs_remove(uhci->dentry);
  622. err_create_debug_entry:
  623. return retval;
  624. }
  625. static void uhci_stop(struct usb_hcd *hcd)
  626. {
  627. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  628. spin_lock_irq(&uhci->lock);
  629. if (test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) && !uhci->dead)
  630. uhci_hc_died(uhci);
  631. uhci_scan_schedule(uhci);
  632. spin_unlock_irq(&uhci->lock);
  633. del_timer_sync(&uhci->fsbr_timer);
  634. release_uhci(uhci);
  635. }
  636. #ifdef CONFIG_PM
  637. static int uhci_rh_suspend(struct usb_hcd *hcd)
  638. {
  639. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  640. int rc = 0;
  641. spin_lock_irq(&uhci->lock);
  642. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
  643. rc = -ESHUTDOWN;
  644. else if (!uhci->dead)
  645. suspend_rh(uhci, UHCI_RH_SUSPENDED);
  646. spin_unlock_irq(&uhci->lock);
  647. return rc;
  648. }
  649. static int uhci_rh_resume(struct usb_hcd *hcd)
  650. {
  651. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  652. int rc = 0;
  653. spin_lock_irq(&uhci->lock);
  654. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
  655. rc = -ESHUTDOWN;
  656. else if (!uhci->dead)
  657. wakeup_rh(uhci);
  658. spin_unlock_irq(&uhci->lock);
  659. return rc;
  660. }
  661. static int uhci_pci_suspend(struct usb_hcd *hcd, pm_message_t message)
  662. {
  663. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  664. int rc = 0;
  665. dev_dbg(uhci_dev(uhci), "%s\n", __func__);
  666. spin_lock_irq(&uhci->lock);
  667. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead)
  668. goto done_okay; /* Already suspended or dead */
  669. if (uhci->rh_state > UHCI_RH_SUSPENDED) {
  670. dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
  671. rc = -EBUSY;
  672. goto done;
  673. };
  674. /* All PCI host controllers are required to disable IRQ generation
  675. * at the source, so we must turn off PIRQ.
  676. */
  677. pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
  678. mb();
  679. hcd->poll_rh = 0;
  680. /* FIXME: Enable non-PME# remote wakeup? */
  681. /* make sure snapshot being resumed re-enumerates everything */
  682. if (message.event == PM_EVENT_PRETHAW)
  683. uhci_hc_died(uhci);
  684. done_okay:
  685. clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  686. done:
  687. spin_unlock_irq(&uhci->lock);
  688. return rc;
  689. }
  690. static int uhci_pci_resume(struct usb_hcd *hcd)
  691. {
  692. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  693. dev_dbg(uhci_dev(uhci), "%s\n", __func__);
  694. /* Since we aren't in D3 any more, it's safe to set this flag
  695. * even if the controller was dead.
  696. */
  697. set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  698. mb();
  699. spin_lock_irq(&uhci->lock);
  700. /* FIXME: Disable non-PME# remote wakeup? */
  701. /* The firmware or a boot kernel may have changed the controller
  702. * settings during a system wakeup. Check it and reconfigure
  703. * to avoid problems.
  704. */
  705. check_and_reset_hc(uhci);
  706. /* If the controller was dead before, it's back alive now */
  707. configure_hc(uhci);
  708. if (uhci->rh_state == UHCI_RH_RESET) {
  709. /* The controller had to be reset */
  710. usb_root_hub_lost_power(hcd->self.root_hub);
  711. suspend_rh(uhci, UHCI_RH_SUSPENDED);
  712. }
  713. spin_unlock_irq(&uhci->lock);
  714. /* If interrupts don't work and remote wakeup is enabled then
  715. * the suspended root hub needs to be polled.
  716. */
  717. if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup) {
  718. hcd->poll_rh = 1;
  719. usb_hcd_poll_rh_status(hcd);
  720. }
  721. return 0;
  722. }
  723. #endif
  724. /* Wait until a particular device/endpoint's QH is idle, and free it */
  725. static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
  726. struct usb_host_endpoint *hep)
  727. {
  728. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  729. struct uhci_qh *qh;
  730. spin_lock_irq(&uhci->lock);
  731. qh = (struct uhci_qh *) hep->hcpriv;
  732. if (qh == NULL)
  733. goto done;
  734. while (qh->state != QH_STATE_IDLE) {
  735. ++uhci->num_waiting;
  736. spin_unlock_irq(&uhci->lock);
  737. wait_event_interruptible(uhci->waitqh,
  738. qh->state == QH_STATE_IDLE);
  739. spin_lock_irq(&uhci->lock);
  740. --uhci->num_waiting;
  741. }
  742. uhci_free_qh(uhci, qh);
  743. done:
  744. spin_unlock_irq(&uhci->lock);
  745. }
  746. static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
  747. {
  748. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  749. unsigned frame_number;
  750. unsigned delta;
  751. /* Minimize latency by avoiding the spinlock */
  752. frame_number = uhci->frame_number;
  753. barrier();
  754. delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) &
  755. (UHCI_NUMFRAMES - 1);
  756. return frame_number + delta;
  757. }
  758. static const char hcd_name[] = "uhci_hcd";
  759. static const struct hc_driver uhci_driver = {
  760. .description = hcd_name,
  761. .product_desc = "UHCI Host Controller",
  762. .hcd_priv_size = sizeof(struct uhci_hcd),
  763. /* Generic hardware linkage */
  764. .irq = uhci_irq,
  765. .flags = HCD_USB11,
  766. /* Basic lifecycle operations */
  767. .reset = uhci_init,
  768. .start = uhci_start,
  769. #ifdef CONFIG_PM
  770. .pci_suspend = uhci_pci_suspend,
  771. .pci_resume = uhci_pci_resume,
  772. .bus_suspend = uhci_rh_suspend,
  773. .bus_resume = uhci_rh_resume,
  774. #endif
  775. .stop = uhci_stop,
  776. .urb_enqueue = uhci_urb_enqueue,
  777. .urb_dequeue = uhci_urb_dequeue,
  778. .endpoint_disable = uhci_hcd_endpoint_disable,
  779. .get_frame_number = uhci_hcd_get_frame_number,
  780. .hub_status_data = uhci_hub_status_data,
  781. .hub_control = uhci_hub_control,
  782. };
  783. static const struct pci_device_id uhci_pci_ids[] = { {
  784. /* handle any USB UHCI controller */
  785. PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
  786. .driver_data = (unsigned long) &uhci_driver,
  787. }, { /* end: all zeroes */ }
  788. };
  789. MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
  790. static struct pci_driver uhci_pci_driver = {
  791. .name = (char *)hcd_name,
  792. .id_table = uhci_pci_ids,
  793. .probe = usb_hcd_pci_probe,
  794. .remove = usb_hcd_pci_remove,
  795. .shutdown = uhci_shutdown,
  796. #ifdef CONFIG_PM
  797. .suspend = usb_hcd_pci_suspend,
  798. .resume = usb_hcd_pci_resume,
  799. #endif /* PM */
  800. };
  801. static int __init uhci_hcd_init(void)
  802. {
  803. int retval = -ENOMEM;
  804. printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "%s\n",
  805. ignore_oc ? ", overcurrent ignored" : "");
  806. if (usb_disabled())
  807. return -ENODEV;
  808. if (DEBUG_CONFIGURED) {
  809. errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
  810. if (!errbuf)
  811. goto errbuf_failed;
  812. uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
  813. if (!uhci_debugfs_root)
  814. goto debug_failed;
  815. }
  816. uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
  817. sizeof(struct urb_priv), 0, 0, NULL);
  818. if (!uhci_up_cachep)
  819. goto up_failed;
  820. retval = pci_register_driver(&uhci_pci_driver);
  821. if (retval)
  822. goto init_failed;
  823. return 0;
  824. init_failed:
  825. kmem_cache_destroy(uhci_up_cachep);
  826. up_failed:
  827. debugfs_remove(uhci_debugfs_root);
  828. debug_failed:
  829. kfree(errbuf);
  830. errbuf_failed:
  831. return retval;
  832. }
  833. static void __exit uhci_hcd_cleanup(void)
  834. {
  835. pci_unregister_driver(&uhci_pci_driver);
  836. kmem_cache_destroy(uhci_up_cachep);
  837. debugfs_remove(uhci_debugfs_root);
  838. kfree(errbuf);
  839. }
  840. module_init(uhci_hcd_init);
  841. module_exit(uhci_hcd_cleanup);
  842. MODULE_AUTHOR(DRIVER_AUTHOR);
  843. MODULE_DESCRIPTION(DRIVER_DESC);
  844. MODULE_LICENSE("GPL");