ab8500-core.c 29 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License Terms: GNU General Public License v2
  5. * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
  6. * Author: Rabin Vincent <rabin.vincent@stericsson.com>
  7. * Author: Mattias Wallin <mattias.wallin@stericsson.com>
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/slab.h>
  11. #include <linux/init.h>
  12. #include <linux/irq.h>
  13. #include <linux/delay.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/module.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/mfd/core.h>
  18. #include <linux/mfd/abx500.h>
  19. #include <linux/mfd/abx500/ab8500.h>
  20. #include <linux/regulator/ab8500.h>
  21. /*
  22. * Interrupt register offsets
  23. * Bank : 0x0E
  24. */
  25. #define AB8500_IT_SOURCE1_REG 0x00
  26. #define AB8500_IT_SOURCE2_REG 0x01
  27. #define AB8500_IT_SOURCE3_REG 0x02
  28. #define AB8500_IT_SOURCE4_REG 0x03
  29. #define AB8500_IT_SOURCE5_REG 0x04
  30. #define AB8500_IT_SOURCE6_REG 0x05
  31. #define AB8500_IT_SOURCE7_REG 0x06
  32. #define AB8500_IT_SOURCE8_REG 0x07
  33. #define AB9540_IT_SOURCE13_REG 0x0C
  34. #define AB8500_IT_SOURCE19_REG 0x12
  35. #define AB8500_IT_SOURCE20_REG 0x13
  36. #define AB8500_IT_SOURCE21_REG 0x14
  37. #define AB8500_IT_SOURCE22_REG 0x15
  38. #define AB8500_IT_SOURCE23_REG 0x16
  39. #define AB8500_IT_SOURCE24_REG 0x17
  40. /*
  41. * latch registers
  42. */
  43. #define AB8500_IT_LATCH1_REG 0x20
  44. #define AB8500_IT_LATCH2_REG 0x21
  45. #define AB8500_IT_LATCH3_REG 0x22
  46. #define AB8500_IT_LATCH4_REG 0x23
  47. #define AB8500_IT_LATCH5_REG 0x24
  48. #define AB8500_IT_LATCH6_REG 0x25
  49. #define AB8500_IT_LATCH7_REG 0x26
  50. #define AB8500_IT_LATCH8_REG 0x27
  51. #define AB8500_IT_LATCH9_REG 0x28
  52. #define AB8500_IT_LATCH10_REG 0x29
  53. #define AB8500_IT_LATCH12_REG 0x2B
  54. #define AB9540_IT_LATCH13_REG 0x2C
  55. #define AB8500_IT_LATCH19_REG 0x32
  56. #define AB8500_IT_LATCH20_REG 0x33
  57. #define AB8500_IT_LATCH21_REG 0x34
  58. #define AB8500_IT_LATCH22_REG 0x35
  59. #define AB8500_IT_LATCH23_REG 0x36
  60. #define AB8500_IT_LATCH24_REG 0x37
  61. /*
  62. * mask registers
  63. */
  64. #define AB8500_IT_MASK1_REG 0x40
  65. #define AB8500_IT_MASK2_REG 0x41
  66. #define AB8500_IT_MASK3_REG 0x42
  67. #define AB8500_IT_MASK4_REG 0x43
  68. #define AB8500_IT_MASK5_REG 0x44
  69. #define AB8500_IT_MASK6_REG 0x45
  70. #define AB8500_IT_MASK7_REG 0x46
  71. #define AB8500_IT_MASK8_REG 0x47
  72. #define AB8500_IT_MASK9_REG 0x48
  73. #define AB8500_IT_MASK10_REG 0x49
  74. #define AB8500_IT_MASK11_REG 0x4A
  75. #define AB8500_IT_MASK12_REG 0x4B
  76. #define AB8500_IT_MASK13_REG 0x4C
  77. #define AB8500_IT_MASK14_REG 0x4D
  78. #define AB8500_IT_MASK15_REG 0x4E
  79. #define AB8500_IT_MASK16_REG 0x4F
  80. #define AB8500_IT_MASK17_REG 0x50
  81. #define AB8500_IT_MASK18_REG 0x51
  82. #define AB8500_IT_MASK19_REG 0x52
  83. #define AB8500_IT_MASK20_REG 0x53
  84. #define AB8500_IT_MASK21_REG 0x54
  85. #define AB8500_IT_MASK22_REG 0x55
  86. #define AB8500_IT_MASK23_REG 0x56
  87. #define AB8500_IT_MASK24_REG 0x57
  88. #define AB8500_REV_REG 0x80
  89. #define AB8500_IC_NAME_REG 0x82
  90. #define AB8500_SWITCH_OFF_STATUS 0x00
  91. #define AB8500_TURN_ON_STATUS 0x00
  92. #define AB9540_MODEM_CTRL2_REG 0x23
  93. #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
  94. /*
  95. * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
  96. * numbers are indexed into this array with (num / 8). The interupts are
  97. * defined in linux/mfd/ab8500.h
  98. *
  99. * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
  100. * offset 0.
  101. */
  102. /* AB8500 support */
  103. static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
  104. 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
  105. };
  106. /* AB9540 support */
  107. static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
  108. 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24,
  109. };
  110. static const char ab8500_version_str[][7] = {
  111. [AB8500_VERSION_AB8500] = "AB8500",
  112. [AB8500_VERSION_AB8505] = "AB8505",
  113. [AB8500_VERSION_AB9540] = "AB9540",
  114. [AB8500_VERSION_AB8540] = "AB8540",
  115. };
  116. static int ab8500_get_chip_id(struct device *dev)
  117. {
  118. struct ab8500 *ab8500;
  119. if (!dev)
  120. return -EINVAL;
  121. ab8500 = dev_get_drvdata(dev->parent);
  122. return ab8500 ? (int)ab8500->chip_id : -EINVAL;
  123. }
  124. static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
  125. u8 reg, u8 data)
  126. {
  127. int ret;
  128. /*
  129. * Put the u8 bank and u8 register together into a an u16.
  130. * The bank on higher 8 bits and register in lower 8 bits.
  131. * */
  132. u16 addr = ((u16)bank) << 8 | reg;
  133. dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
  134. mutex_lock(&ab8500->lock);
  135. ret = ab8500->write(ab8500, addr, data);
  136. if (ret < 0)
  137. dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
  138. addr, ret);
  139. mutex_unlock(&ab8500->lock);
  140. return ret;
  141. }
  142. static int ab8500_set_register(struct device *dev, u8 bank,
  143. u8 reg, u8 value)
  144. {
  145. int ret;
  146. struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
  147. atomic_inc(&ab8500->transfer_ongoing);
  148. ret = set_register_interruptible(ab8500, bank, reg, value);
  149. atomic_dec(&ab8500->transfer_ongoing);
  150. return ret;
  151. }
  152. static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
  153. u8 reg, u8 *value)
  154. {
  155. int ret;
  156. /* put the u8 bank and u8 reg together into a an u16.
  157. * bank on higher 8 bits and reg in lower */
  158. u16 addr = ((u16)bank) << 8 | reg;
  159. mutex_lock(&ab8500->lock);
  160. ret = ab8500->read(ab8500, addr);
  161. if (ret < 0)
  162. dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
  163. addr, ret);
  164. else
  165. *value = ret;
  166. mutex_unlock(&ab8500->lock);
  167. dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
  168. return ret;
  169. }
  170. static int ab8500_get_register(struct device *dev, u8 bank,
  171. u8 reg, u8 *value)
  172. {
  173. int ret;
  174. struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
  175. atomic_inc(&ab8500->transfer_ongoing);
  176. ret = get_register_interruptible(ab8500, bank, reg, value);
  177. atomic_dec(&ab8500->transfer_ongoing);
  178. return ret;
  179. }
  180. static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
  181. u8 reg, u8 bitmask, u8 bitvalues)
  182. {
  183. int ret;
  184. /* put the u8 bank and u8 reg together into a an u16.
  185. * bank on higher 8 bits and reg in lower */
  186. u16 addr = ((u16)bank) << 8 | reg;
  187. mutex_lock(&ab8500->lock);
  188. if (ab8500->write_masked == NULL) {
  189. u8 data;
  190. ret = ab8500->read(ab8500, addr);
  191. if (ret < 0) {
  192. dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
  193. addr, ret);
  194. goto out;
  195. }
  196. data = (u8)ret;
  197. data = (~bitmask & data) | (bitmask & bitvalues);
  198. ret = ab8500->write(ab8500, addr, data);
  199. if (ret < 0)
  200. dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
  201. addr, ret);
  202. dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
  203. data);
  204. goto out;
  205. }
  206. ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
  207. if (ret < 0)
  208. dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
  209. ret);
  210. out:
  211. mutex_unlock(&ab8500->lock);
  212. return ret;
  213. }
  214. static int ab8500_mask_and_set_register(struct device *dev,
  215. u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
  216. {
  217. int ret;
  218. struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
  219. atomic_inc(&ab8500->transfer_ongoing);
  220. ret= mask_and_set_register_interruptible(ab8500, bank, reg,
  221. bitmask, bitvalues);
  222. atomic_dec(&ab8500->transfer_ongoing);
  223. return ret;
  224. }
  225. static struct abx500_ops ab8500_ops = {
  226. .get_chip_id = ab8500_get_chip_id,
  227. .get_register = ab8500_get_register,
  228. .set_register = ab8500_set_register,
  229. .get_register_page = NULL,
  230. .set_register_page = NULL,
  231. .mask_and_set_register = ab8500_mask_and_set_register,
  232. .event_registers_startup_state_get = NULL,
  233. .startup_irq_enabled = NULL,
  234. };
  235. static void ab8500_irq_lock(struct irq_data *data)
  236. {
  237. struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
  238. mutex_lock(&ab8500->irq_lock);
  239. atomic_inc(&ab8500->transfer_ongoing);
  240. }
  241. static void ab8500_irq_sync_unlock(struct irq_data *data)
  242. {
  243. struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
  244. int i;
  245. for (i = 0; i < ab8500->mask_size; i++) {
  246. u8 old = ab8500->oldmask[i];
  247. u8 new = ab8500->mask[i];
  248. int reg;
  249. if (new == old)
  250. continue;
  251. /*
  252. * Interrupt register 12 doesn't exist prior to AB8500 version
  253. * 2.0
  254. */
  255. if (ab8500->irq_reg_offset[i] == 11 &&
  256. is_ab8500_1p1_or_earlier(ab8500))
  257. continue;
  258. ab8500->oldmask[i] = new;
  259. reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
  260. set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
  261. }
  262. atomic_dec(&ab8500->transfer_ongoing);
  263. mutex_unlock(&ab8500->irq_lock);
  264. }
  265. static void ab8500_irq_mask(struct irq_data *data)
  266. {
  267. struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
  268. int offset = data->irq - ab8500->irq_base;
  269. int index = offset / 8;
  270. int mask = 1 << (offset % 8);
  271. ab8500->mask[index] |= mask;
  272. }
  273. static void ab8500_irq_unmask(struct irq_data *data)
  274. {
  275. struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
  276. int offset = data->irq - ab8500->irq_base;
  277. int index = offset / 8;
  278. int mask = 1 << (offset % 8);
  279. ab8500->mask[index] &= ~mask;
  280. }
  281. static struct irq_chip ab8500_irq_chip = {
  282. .name = "ab8500",
  283. .irq_bus_lock = ab8500_irq_lock,
  284. .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
  285. .irq_mask = ab8500_irq_mask,
  286. .irq_disable = ab8500_irq_mask,
  287. .irq_unmask = ab8500_irq_unmask,
  288. };
  289. static irqreturn_t ab8500_irq(int irq, void *dev)
  290. {
  291. struct ab8500 *ab8500 = dev;
  292. int i;
  293. dev_vdbg(ab8500->dev, "interrupt\n");
  294. atomic_inc(&ab8500->transfer_ongoing);
  295. for (i = 0; i < ab8500->mask_size; i++) {
  296. int regoffset = ab8500->irq_reg_offset[i];
  297. int status;
  298. u8 value;
  299. /*
  300. * Interrupt register 12 doesn't exist prior to AB8500 version
  301. * 2.0
  302. */
  303. if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500))
  304. continue;
  305. status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
  306. AB8500_IT_LATCH1_REG + regoffset, &value);
  307. if (status < 0 || value == 0)
  308. continue;
  309. do {
  310. int bit = __ffs(value);
  311. int line = i * 8 + bit;
  312. handle_nested_irq(ab8500->irq_base + line);
  313. value &= ~(1 << bit);
  314. } while (value);
  315. }
  316. atomic_dec(&ab8500->transfer_ongoing);
  317. return IRQ_HANDLED;
  318. }
  319. static int ab8500_irq_init(struct ab8500 *ab8500)
  320. {
  321. int base = ab8500->irq_base;
  322. int irq;
  323. int num_irqs;
  324. if (is_ab9540(ab8500))
  325. num_irqs = AB9540_NR_IRQS;
  326. else if (is_ab8505(ab8500))
  327. num_irqs = AB8505_NR_IRQS;
  328. else
  329. num_irqs = AB8500_NR_IRQS;
  330. for (irq = base; irq < base + num_irqs; irq++) {
  331. irq_set_chip_data(irq, ab8500);
  332. irq_set_chip_and_handler(irq, &ab8500_irq_chip,
  333. handle_simple_irq);
  334. irq_set_nested_thread(irq, 1);
  335. #ifdef CONFIG_ARM
  336. set_irq_flags(irq, IRQF_VALID);
  337. #else
  338. irq_set_noprobe(irq);
  339. #endif
  340. }
  341. return 0;
  342. }
  343. static void ab8500_irq_remove(struct ab8500 *ab8500)
  344. {
  345. int base = ab8500->irq_base;
  346. int irq;
  347. int num_irqs;
  348. if (is_ab9540(ab8500))
  349. num_irqs = AB9540_NR_IRQS;
  350. else if (is_ab8505(ab8500))
  351. num_irqs = AB8505_NR_IRQS;
  352. else
  353. num_irqs = AB8500_NR_IRQS;
  354. for (irq = base; irq < base + num_irqs; irq++) {
  355. #ifdef CONFIG_ARM
  356. set_irq_flags(irq, 0);
  357. #endif
  358. irq_set_chip_and_handler(irq, NULL, NULL);
  359. irq_set_chip_data(irq, NULL);
  360. }
  361. }
  362. int ab8500_suspend(struct ab8500 *ab8500)
  363. {
  364. if (atomic_read(&ab8500->transfer_ongoing))
  365. return -EINVAL;
  366. else
  367. return 0;
  368. }
  369. /* AB8500 GPIO Resources */
  370. static struct resource __devinitdata ab8500_gpio_resources[] = {
  371. {
  372. .name = "GPIO_INT6",
  373. .start = AB8500_INT_GPIO6R,
  374. .end = AB8500_INT_GPIO41F,
  375. .flags = IORESOURCE_IRQ,
  376. }
  377. };
  378. /* AB9540 GPIO Resources */
  379. static struct resource __devinitdata ab9540_gpio_resources[] = {
  380. {
  381. .name = "GPIO_INT6",
  382. .start = AB8500_INT_GPIO6R,
  383. .end = AB8500_INT_GPIO41F,
  384. .flags = IORESOURCE_IRQ,
  385. },
  386. {
  387. .name = "GPIO_INT14",
  388. .start = AB9540_INT_GPIO50R,
  389. .end = AB9540_INT_GPIO54R,
  390. .flags = IORESOURCE_IRQ,
  391. },
  392. {
  393. .name = "GPIO_INT15",
  394. .start = AB9540_INT_GPIO50F,
  395. .end = AB9540_INT_GPIO54F,
  396. .flags = IORESOURCE_IRQ,
  397. }
  398. };
  399. static struct resource __devinitdata ab8500_gpadc_resources[] = {
  400. {
  401. .name = "HW_CONV_END",
  402. .start = AB8500_INT_GP_HW_ADC_CONV_END,
  403. .end = AB8500_INT_GP_HW_ADC_CONV_END,
  404. .flags = IORESOURCE_IRQ,
  405. },
  406. {
  407. .name = "SW_CONV_END",
  408. .start = AB8500_INT_GP_SW_ADC_CONV_END,
  409. .end = AB8500_INT_GP_SW_ADC_CONV_END,
  410. .flags = IORESOURCE_IRQ,
  411. },
  412. };
  413. static struct resource __devinitdata ab8500_rtc_resources[] = {
  414. {
  415. .name = "60S",
  416. .start = AB8500_INT_RTC_60S,
  417. .end = AB8500_INT_RTC_60S,
  418. .flags = IORESOURCE_IRQ,
  419. },
  420. {
  421. .name = "ALARM",
  422. .start = AB8500_INT_RTC_ALARM,
  423. .end = AB8500_INT_RTC_ALARM,
  424. .flags = IORESOURCE_IRQ,
  425. },
  426. };
  427. static struct resource __devinitdata ab8500_poweronkey_db_resources[] = {
  428. {
  429. .name = "ONKEY_DBF",
  430. .start = AB8500_INT_PON_KEY1DB_F,
  431. .end = AB8500_INT_PON_KEY1DB_F,
  432. .flags = IORESOURCE_IRQ,
  433. },
  434. {
  435. .name = "ONKEY_DBR",
  436. .start = AB8500_INT_PON_KEY1DB_R,
  437. .end = AB8500_INT_PON_KEY1DB_R,
  438. .flags = IORESOURCE_IRQ,
  439. },
  440. };
  441. static struct resource __devinitdata ab8500_av_acc_detect_resources[] = {
  442. {
  443. .name = "ACC_DETECT_1DB_F",
  444. .start = AB8500_INT_ACC_DETECT_1DB_F,
  445. .end = AB8500_INT_ACC_DETECT_1DB_F,
  446. .flags = IORESOURCE_IRQ,
  447. },
  448. {
  449. .name = "ACC_DETECT_1DB_R",
  450. .start = AB8500_INT_ACC_DETECT_1DB_R,
  451. .end = AB8500_INT_ACC_DETECT_1DB_R,
  452. .flags = IORESOURCE_IRQ,
  453. },
  454. {
  455. .name = "ACC_DETECT_21DB_F",
  456. .start = AB8500_INT_ACC_DETECT_21DB_F,
  457. .end = AB8500_INT_ACC_DETECT_21DB_F,
  458. .flags = IORESOURCE_IRQ,
  459. },
  460. {
  461. .name = "ACC_DETECT_21DB_R",
  462. .start = AB8500_INT_ACC_DETECT_21DB_R,
  463. .end = AB8500_INT_ACC_DETECT_21DB_R,
  464. .flags = IORESOURCE_IRQ,
  465. },
  466. {
  467. .name = "ACC_DETECT_22DB_F",
  468. .start = AB8500_INT_ACC_DETECT_22DB_F,
  469. .end = AB8500_INT_ACC_DETECT_22DB_F,
  470. .flags = IORESOURCE_IRQ,
  471. },
  472. {
  473. .name = "ACC_DETECT_22DB_R",
  474. .start = AB8500_INT_ACC_DETECT_22DB_R,
  475. .end = AB8500_INT_ACC_DETECT_22DB_R,
  476. .flags = IORESOURCE_IRQ,
  477. },
  478. };
  479. static struct resource __devinitdata ab8500_charger_resources[] = {
  480. {
  481. .name = "MAIN_CH_UNPLUG_DET",
  482. .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
  483. .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
  484. .flags = IORESOURCE_IRQ,
  485. },
  486. {
  487. .name = "MAIN_CHARGE_PLUG_DET",
  488. .start = AB8500_INT_MAIN_CH_PLUG_DET,
  489. .end = AB8500_INT_MAIN_CH_PLUG_DET,
  490. .flags = IORESOURCE_IRQ,
  491. },
  492. {
  493. .name = "VBUS_DET_R",
  494. .start = AB8500_INT_VBUS_DET_R,
  495. .end = AB8500_INT_VBUS_DET_R,
  496. .flags = IORESOURCE_IRQ,
  497. },
  498. {
  499. .name = "VBUS_DET_F",
  500. .start = AB8500_INT_VBUS_DET_F,
  501. .end = AB8500_INT_VBUS_DET_F,
  502. .flags = IORESOURCE_IRQ,
  503. },
  504. {
  505. .name = "USB_LINK_STATUS",
  506. .start = AB8500_INT_USB_LINK_STATUS,
  507. .end = AB8500_INT_USB_LINK_STATUS,
  508. .flags = IORESOURCE_IRQ,
  509. },
  510. {
  511. .name = "VBUS_OVV",
  512. .start = AB8500_INT_VBUS_OVV,
  513. .end = AB8500_INT_VBUS_OVV,
  514. .flags = IORESOURCE_IRQ,
  515. },
  516. {
  517. .name = "USB_CH_TH_PROT_R",
  518. .start = AB8500_INT_USB_CH_TH_PROT_R,
  519. .end = AB8500_INT_USB_CH_TH_PROT_R,
  520. .flags = IORESOURCE_IRQ,
  521. },
  522. {
  523. .name = "USB_CH_TH_PROT_F",
  524. .start = AB8500_INT_USB_CH_TH_PROT_F,
  525. .end = AB8500_INT_USB_CH_TH_PROT_F,
  526. .flags = IORESOURCE_IRQ,
  527. },
  528. {
  529. .name = "MAIN_EXT_CH_NOT_OK",
  530. .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
  531. .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
  532. .flags = IORESOURCE_IRQ,
  533. },
  534. {
  535. .name = "MAIN_CH_TH_PROT_R",
  536. .start = AB8500_INT_MAIN_CH_TH_PROT_R,
  537. .end = AB8500_INT_MAIN_CH_TH_PROT_R,
  538. .flags = IORESOURCE_IRQ,
  539. },
  540. {
  541. .name = "MAIN_CH_TH_PROT_F",
  542. .start = AB8500_INT_MAIN_CH_TH_PROT_F,
  543. .end = AB8500_INT_MAIN_CH_TH_PROT_F,
  544. .flags = IORESOURCE_IRQ,
  545. },
  546. {
  547. .name = "USB_CHARGER_NOT_OKR",
  548. .start = AB8500_INT_USB_CHARGER_NOT_OKR,
  549. .end = AB8500_INT_USB_CHARGER_NOT_OKR,
  550. .flags = IORESOURCE_IRQ,
  551. },
  552. {
  553. .name = "CH_WD_EXP",
  554. .start = AB8500_INT_CH_WD_EXP,
  555. .end = AB8500_INT_CH_WD_EXP,
  556. .flags = IORESOURCE_IRQ,
  557. },
  558. };
  559. static struct resource __devinitdata ab8500_btemp_resources[] = {
  560. {
  561. .name = "BAT_CTRL_INDB",
  562. .start = AB8500_INT_BAT_CTRL_INDB,
  563. .end = AB8500_INT_BAT_CTRL_INDB,
  564. .flags = IORESOURCE_IRQ,
  565. },
  566. {
  567. .name = "BTEMP_LOW",
  568. .start = AB8500_INT_BTEMP_LOW,
  569. .end = AB8500_INT_BTEMP_LOW,
  570. .flags = IORESOURCE_IRQ,
  571. },
  572. {
  573. .name = "BTEMP_HIGH",
  574. .start = AB8500_INT_BTEMP_HIGH,
  575. .end = AB8500_INT_BTEMP_HIGH,
  576. .flags = IORESOURCE_IRQ,
  577. },
  578. {
  579. .name = "BTEMP_LOW_MEDIUM",
  580. .start = AB8500_INT_BTEMP_LOW_MEDIUM,
  581. .end = AB8500_INT_BTEMP_LOW_MEDIUM,
  582. .flags = IORESOURCE_IRQ,
  583. },
  584. {
  585. .name = "BTEMP_MEDIUM_HIGH",
  586. .start = AB8500_INT_BTEMP_MEDIUM_HIGH,
  587. .end = AB8500_INT_BTEMP_MEDIUM_HIGH,
  588. .flags = IORESOURCE_IRQ,
  589. },
  590. };
  591. static struct resource __devinitdata ab8500_fg_resources[] = {
  592. {
  593. .name = "NCONV_ACCU",
  594. .start = AB8500_INT_CCN_CONV_ACC,
  595. .end = AB8500_INT_CCN_CONV_ACC,
  596. .flags = IORESOURCE_IRQ,
  597. },
  598. {
  599. .name = "BATT_OVV",
  600. .start = AB8500_INT_BATT_OVV,
  601. .end = AB8500_INT_BATT_OVV,
  602. .flags = IORESOURCE_IRQ,
  603. },
  604. {
  605. .name = "LOW_BAT_F",
  606. .start = AB8500_INT_LOW_BAT_F,
  607. .end = AB8500_INT_LOW_BAT_F,
  608. .flags = IORESOURCE_IRQ,
  609. },
  610. {
  611. .name = "LOW_BAT_R",
  612. .start = AB8500_INT_LOW_BAT_R,
  613. .end = AB8500_INT_LOW_BAT_R,
  614. .flags = IORESOURCE_IRQ,
  615. },
  616. {
  617. .name = "CC_INT_CALIB",
  618. .start = AB8500_INT_CC_INT_CALIB,
  619. .end = AB8500_INT_CC_INT_CALIB,
  620. .flags = IORESOURCE_IRQ,
  621. },
  622. {
  623. .name = "CCEOC",
  624. .start = AB8500_INT_CCEOC,
  625. .end = AB8500_INT_CCEOC,
  626. .flags = IORESOURCE_IRQ,
  627. },
  628. };
  629. static struct resource __devinitdata ab8500_chargalg_resources[] = {};
  630. #ifdef CONFIG_DEBUG_FS
  631. static struct resource __devinitdata ab8500_debug_resources[] = {
  632. {
  633. .name = "IRQ_FIRST",
  634. .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
  635. .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
  636. .flags = IORESOURCE_IRQ,
  637. },
  638. {
  639. .name = "IRQ_LAST",
  640. .start = AB8500_INT_XTAL32K_KO,
  641. .end = AB8500_INT_XTAL32K_KO,
  642. .flags = IORESOURCE_IRQ,
  643. },
  644. };
  645. #endif
  646. static struct resource __devinitdata ab8500_usb_resources[] = {
  647. {
  648. .name = "ID_WAKEUP_R",
  649. .start = AB8500_INT_ID_WAKEUP_R,
  650. .end = AB8500_INT_ID_WAKEUP_R,
  651. .flags = IORESOURCE_IRQ,
  652. },
  653. {
  654. .name = "ID_WAKEUP_F",
  655. .start = AB8500_INT_ID_WAKEUP_F,
  656. .end = AB8500_INT_ID_WAKEUP_F,
  657. .flags = IORESOURCE_IRQ,
  658. },
  659. {
  660. .name = "VBUS_DET_F",
  661. .start = AB8500_INT_VBUS_DET_F,
  662. .end = AB8500_INT_VBUS_DET_F,
  663. .flags = IORESOURCE_IRQ,
  664. },
  665. {
  666. .name = "VBUS_DET_R",
  667. .start = AB8500_INT_VBUS_DET_R,
  668. .end = AB8500_INT_VBUS_DET_R,
  669. .flags = IORESOURCE_IRQ,
  670. },
  671. {
  672. .name = "USB_LINK_STATUS",
  673. .start = AB8500_INT_USB_LINK_STATUS,
  674. .end = AB8500_INT_USB_LINK_STATUS,
  675. .flags = IORESOURCE_IRQ,
  676. },
  677. {
  678. .name = "USB_ADP_PROBE_PLUG",
  679. .start = AB8500_INT_ADP_PROBE_PLUG,
  680. .end = AB8500_INT_ADP_PROBE_PLUG,
  681. .flags = IORESOURCE_IRQ,
  682. },
  683. {
  684. .name = "USB_ADP_PROBE_UNPLUG",
  685. .start = AB8500_INT_ADP_PROBE_UNPLUG,
  686. .end = AB8500_INT_ADP_PROBE_UNPLUG,
  687. .flags = IORESOURCE_IRQ,
  688. },
  689. };
  690. static struct resource __devinitdata ab8505_iddet_resources[] = {
  691. {
  692. .name = "KeyDeglitch",
  693. .start = AB8505_INT_KEYDEGLITCH,
  694. .end = AB8505_INT_KEYDEGLITCH,
  695. .flags = IORESOURCE_IRQ,
  696. },
  697. {
  698. .name = "KP",
  699. .start = AB8505_INT_KP,
  700. .end = AB8505_INT_KP,
  701. .flags = IORESOURCE_IRQ,
  702. },
  703. {
  704. .name = "IKP",
  705. .start = AB8505_INT_IKP,
  706. .end = AB8505_INT_IKP,
  707. .flags = IORESOURCE_IRQ,
  708. },
  709. {
  710. .name = "IKR",
  711. .start = AB8505_INT_IKR,
  712. .end = AB8505_INT_IKR,
  713. .flags = IORESOURCE_IRQ,
  714. },
  715. {
  716. .name = "KeyStuck",
  717. .start = AB8505_INT_KEYSTUCK,
  718. .end = AB8505_INT_KEYSTUCK,
  719. .flags = IORESOURCE_IRQ,
  720. },
  721. };
  722. static struct resource __devinitdata ab8500_temp_resources[] = {
  723. {
  724. .name = "AB8500_TEMP_WARM",
  725. .start = AB8500_INT_TEMP_WARM,
  726. .end = AB8500_INT_TEMP_WARM,
  727. .flags = IORESOURCE_IRQ,
  728. },
  729. };
  730. static struct mfd_cell __devinitdata abx500_common_devs[] = {
  731. #ifdef CONFIG_DEBUG_FS
  732. {
  733. .name = "ab8500-debug",
  734. .num_resources = ARRAY_SIZE(ab8500_debug_resources),
  735. .resources = ab8500_debug_resources,
  736. },
  737. #endif
  738. {
  739. .name = "ab8500-sysctrl",
  740. },
  741. {
  742. .name = "ab8500-regulator",
  743. },
  744. {
  745. .name = "ab8500-gpadc",
  746. .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
  747. .resources = ab8500_gpadc_resources,
  748. },
  749. {
  750. .name = "ab8500-rtc",
  751. .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
  752. .resources = ab8500_rtc_resources,
  753. },
  754. {
  755. .name = "ab8500-charger",
  756. .num_resources = ARRAY_SIZE(ab8500_charger_resources),
  757. .resources = ab8500_charger_resources,
  758. },
  759. {
  760. .name = "ab8500-btemp",
  761. .num_resources = ARRAY_SIZE(ab8500_btemp_resources),
  762. .resources = ab8500_btemp_resources,
  763. },
  764. {
  765. .name = "ab8500-fg",
  766. .num_resources = ARRAY_SIZE(ab8500_fg_resources),
  767. .resources = ab8500_fg_resources,
  768. },
  769. {
  770. .name = "ab8500-chargalg",
  771. .num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
  772. .resources = ab8500_chargalg_resources,
  773. },
  774. {
  775. .name = "ab8500-acc-det",
  776. .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
  777. .resources = ab8500_av_acc_detect_resources,
  778. },
  779. {
  780. .name = "ab8500-poweron-key",
  781. .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
  782. .resources = ab8500_poweronkey_db_resources,
  783. },
  784. {
  785. .name = "ab8500-pwm",
  786. .id = 1,
  787. },
  788. {
  789. .name = "ab8500-pwm",
  790. .id = 2,
  791. },
  792. {
  793. .name = "ab8500-pwm",
  794. .id = 3,
  795. },
  796. { .name = "ab8500-leds", },
  797. {
  798. .name = "ab8500-denc",
  799. },
  800. {
  801. .name = "ab8500-temp",
  802. .num_resources = ARRAY_SIZE(ab8500_temp_resources),
  803. .resources = ab8500_temp_resources,
  804. },
  805. };
  806. static struct mfd_cell __devinitdata ab8500_devs[] = {
  807. {
  808. .name = "ab8500-gpio",
  809. .num_resources = ARRAY_SIZE(ab8500_gpio_resources),
  810. .resources = ab8500_gpio_resources,
  811. },
  812. {
  813. .name = "ab8500-usb",
  814. .num_resources = ARRAY_SIZE(ab8500_usb_resources),
  815. .resources = ab8500_usb_resources,
  816. },
  817. {
  818. .name = "ab8500-codec",
  819. },
  820. };
  821. static struct mfd_cell __devinitdata ab9540_devs[] = {
  822. {
  823. .name = "ab8500-gpio",
  824. .num_resources = ARRAY_SIZE(ab9540_gpio_resources),
  825. .resources = ab9540_gpio_resources,
  826. },
  827. {
  828. .name = "ab9540-usb",
  829. .num_resources = ARRAY_SIZE(ab8500_usb_resources),
  830. .resources = ab8500_usb_resources,
  831. },
  832. {
  833. .name = "ab9540-codec",
  834. },
  835. };
  836. /* Device list common to ab9540 and ab8505 */
  837. static struct mfd_cell __devinitdata ab9540_ab8505_devs[] = {
  838. {
  839. .name = "ab-iddet",
  840. .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
  841. .resources = ab8505_iddet_resources,
  842. },
  843. };
  844. static ssize_t show_chip_id(struct device *dev,
  845. struct device_attribute *attr, char *buf)
  846. {
  847. struct ab8500 *ab8500;
  848. ab8500 = dev_get_drvdata(dev);
  849. return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
  850. }
  851. /*
  852. * ab8500 has switched off due to (SWITCH_OFF_STATUS):
  853. * 0x01 Swoff bit programming
  854. * 0x02 Thermal protection activation
  855. * 0x04 Vbat lower then BattOk falling threshold
  856. * 0x08 Watchdog expired
  857. * 0x10 Non presence of 32kHz clock
  858. * 0x20 Battery level lower than power on reset threshold
  859. * 0x40 Power on key 1 pressed longer than 10 seconds
  860. * 0x80 DB8500 thermal shutdown
  861. */
  862. static ssize_t show_switch_off_status(struct device *dev,
  863. struct device_attribute *attr, char *buf)
  864. {
  865. int ret;
  866. u8 value;
  867. struct ab8500 *ab8500;
  868. ab8500 = dev_get_drvdata(dev);
  869. ret = get_register_interruptible(ab8500, AB8500_RTC,
  870. AB8500_SWITCH_OFF_STATUS, &value);
  871. if (ret < 0)
  872. return ret;
  873. return sprintf(buf, "%#x\n", value);
  874. }
  875. /*
  876. * ab8500 has turned on due to (TURN_ON_STATUS):
  877. * 0x01 PORnVbat
  878. * 0x02 PonKey1dbF
  879. * 0x04 PonKey2dbF
  880. * 0x08 RTCAlarm
  881. * 0x10 MainChDet
  882. * 0x20 VbusDet
  883. * 0x40 UsbIDDetect
  884. * 0x80 Reserved
  885. */
  886. static ssize_t show_turn_on_status(struct device *dev,
  887. struct device_attribute *attr, char *buf)
  888. {
  889. int ret;
  890. u8 value;
  891. struct ab8500 *ab8500;
  892. ab8500 = dev_get_drvdata(dev);
  893. ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
  894. AB8500_TURN_ON_STATUS, &value);
  895. if (ret < 0)
  896. return ret;
  897. return sprintf(buf, "%#x\n", value);
  898. }
  899. static ssize_t show_ab9540_dbbrstn(struct device *dev,
  900. struct device_attribute *attr, char *buf)
  901. {
  902. struct ab8500 *ab8500;
  903. int ret;
  904. u8 value;
  905. ab8500 = dev_get_drvdata(dev);
  906. ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
  907. AB9540_MODEM_CTRL2_REG, &value);
  908. if (ret < 0)
  909. return ret;
  910. return sprintf(buf, "%d\n",
  911. (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
  912. }
  913. static ssize_t store_ab9540_dbbrstn(struct device *dev,
  914. struct device_attribute *attr, const char *buf, size_t count)
  915. {
  916. struct ab8500 *ab8500;
  917. int ret = count;
  918. int err;
  919. u8 bitvalues;
  920. ab8500 = dev_get_drvdata(dev);
  921. if (count > 0) {
  922. switch (buf[0]) {
  923. case '0':
  924. bitvalues = 0;
  925. break;
  926. case '1':
  927. bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
  928. break;
  929. default:
  930. goto exit;
  931. }
  932. err = mask_and_set_register_interruptible(ab8500,
  933. AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
  934. AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
  935. if (err)
  936. dev_info(ab8500->dev,
  937. "Failed to set DBBRSTN %c, err %#x\n",
  938. buf[0], err);
  939. }
  940. exit:
  941. return ret;
  942. }
  943. static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
  944. static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
  945. static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL);
  946. static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR,
  947. show_ab9540_dbbrstn, store_ab9540_dbbrstn);
  948. static struct attribute *ab8500_sysfs_entries[] = {
  949. &dev_attr_chip_id.attr,
  950. &dev_attr_switch_off_status.attr,
  951. &dev_attr_turn_on_status.attr,
  952. NULL,
  953. };
  954. static struct attribute *ab9540_sysfs_entries[] = {
  955. &dev_attr_chip_id.attr,
  956. &dev_attr_switch_off_status.attr,
  957. &dev_attr_turn_on_status.attr,
  958. &dev_attr_dbbrstn.attr,
  959. NULL,
  960. };
  961. static struct attribute_group ab8500_attr_group = {
  962. .attrs = ab8500_sysfs_entries,
  963. };
  964. static struct attribute_group ab9540_attr_group = {
  965. .attrs = ab9540_sysfs_entries,
  966. };
  967. int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version)
  968. {
  969. struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev);
  970. int ret;
  971. int i;
  972. u8 value;
  973. if (plat)
  974. ab8500->irq_base = plat->irq_base;
  975. mutex_init(&ab8500->lock);
  976. mutex_init(&ab8500->irq_lock);
  977. atomic_set(&ab8500->transfer_ongoing, 0);
  978. if (version != AB8500_VERSION_UNDEFINED)
  979. ab8500->version = version;
  980. else {
  981. ret = get_register_interruptible(ab8500, AB8500_MISC,
  982. AB8500_IC_NAME_REG, &value);
  983. if (ret < 0)
  984. return ret;
  985. ab8500->version = value;
  986. }
  987. ret = get_register_interruptible(ab8500, AB8500_MISC,
  988. AB8500_REV_REG, &value);
  989. if (ret < 0)
  990. return ret;
  991. ab8500->chip_id = value;
  992. dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
  993. ab8500_version_str[ab8500->version],
  994. ab8500->chip_id >> 4,
  995. ab8500->chip_id & 0x0F);
  996. /* Configure AB8500 or AB9540 IRQ */
  997. if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
  998. ab8500->mask_size = AB9540_NUM_IRQ_REGS;
  999. ab8500->irq_reg_offset = ab9540_irq_regoffset;
  1000. } else {
  1001. ab8500->mask_size = AB8500_NUM_IRQ_REGS;
  1002. ab8500->irq_reg_offset = ab8500_irq_regoffset;
  1003. }
  1004. ab8500->mask = kzalloc(ab8500->mask_size, GFP_KERNEL);
  1005. if (!ab8500->mask)
  1006. return -ENOMEM;
  1007. ab8500->oldmask = kzalloc(ab8500->mask_size, GFP_KERNEL);
  1008. if (!ab8500->oldmask) {
  1009. ret = -ENOMEM;
  1010. goto out_freemask;
  1011. }
  1012. /*
  1013. * ab8500 has switched off due to (SWITCH_OFF_STATUS):
  1014. * 0x01 Swoff bit programming
  1015. * 0x02 Thermal protection activation
  1016. * 0x04 Vbat lower then BattOk falling threshold
  1017. * 0x08 Watchdog expired
  1018. * 0x10 Non presence of 32kHz clock
  1019. * 0x20 Battery level lower than power on reset threshold
  1020. * 0x40 Power on key 1 pressed longer than 10 seconds
  1021. * 0x80 DB8500 thermal shutdown
  1022. */
  1023. ret = get_register_interruptible(ab8500, AB8500_RTC,
  1024. AB8500_SWITCH_OFF_STATUS, &value);
  1025. if (ret < 0)
  1026. return ret;
  1027. dev_info(ab8500->dev, "switch off status: %#x", value);
  1028. if (plat && plat->init)
  1029. plat->init(ab8500);
  1030. /* Clear and mask all interrupts */
  1031. for (i = 0; i < ab8500->mask_size; i++) {
  1032. /*
  1033. * Interrupt register 12 doesn't exist prior to AB8500 version
  1034. * 2.0
  1035. */
  1036. if (ab8500->irq_reg_offset[i] == 11 &&
  1037. is_ab8500_1p1_or_earlier(ab8500))
  1038. continue;
  1039. get_register_interruptible(ab8500, AB8500_INTERRUPT,
  1040. AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
  1041. &value);
  1042. set_register_interruptible(ab8500, AB8500_INTERRUPT,
  1043. AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
  1044. }
  1045. ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
  1046. if (ret)
  1047. goto out_freeoldmask;
  1048. for (i = 0; i < ab8500->mask_size; i++)
  1049. ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
  1050. if (ab8500->irq_base) {
  1051. ret = ab8500_irq_init(ab8500);
  1052. if (ret)
  1053. goto out_freeoldmask;
  1054. ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq,
  1055. IRQF_ONESHOT | IRQF_NO_SUSPEND,
  1056. "ab8500", ab8500);
  1057. if (ret)
  1058. goto out_removeirq;
  1059. }
  1060. ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs,
  1061. ARRAY_SIZE(abx500_common_devs), NULL,
  1062. ab8500->irq_base);
  1063. if (ret)
  1064. goto out_freeirq;
  1065. if (is_ab9540(ab8500))
  1066. ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
  1067. ARRAY_SIZE(ab9540_devs), NULL,
  1068. ab8500->irq_base);
  1069. else
  1070. ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
  1071. ARRAY_SIZE(ab8500_devs), NULL,
  1072. ab8500->irq_base);
  1073. if (is_ab9540(ab8500) || is_ab8505(ab8500))
  1074. ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs,
  1075. ARRAY_SIZE(ab9540_ab8505_devs), NULL,
  1076. ab8500->irq_base);
  1077. if (ret)
  1078. goto out_freeirq;
  1079. if (is_ab9540(ab8500))
  1080. ret = sysfs_create_group(&ab8500->dev->kobj,
  1081. &ab9540_attr_group);
  1082. else
  1083. ret = sysfs_create_group(&ab8500->dev->kobj,
  1084. &ab8500_attr_group);
  1085. if (ret)
  1086. dev_err(ab8500->dev, "error creating sysfs entries\n");
  1087. else
  1088. return ret;
  1089. out_freeirq:
  1090. if (ab8500->irq_base)
  1091. free_irq(ab8500->irq, ab8500);
  1092. out_removeirq:
  1093. if (ab8500->irq_base)
  1094. ab8500_irq_remove(ab8500);
  1095. out_freeoldmask:
  1096. kfree(ab8500->oldmask);
  1097. out_freemask:
  1098. kfree(ab8500->mask);
  1099. return ret;
  1100. }
  1101. int __devexit ab8500_exit(struct ab8500 *ab8500)
  1102. {
  1103. if (is_ab9540(ab8500))
  1104. sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group);
  1105. else
  1106. sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
  1107. mfd_remove_devices(ab8500->dev);
  1108. if (ab8500->irq_base) {
  1109. free_irq(ab8500->irq, ab8500);
  1110. ab8500_irq_remove(ab8500);
  1111. }
  1112. kfree(ab8500->oldmask);
  1113. kfree(ab8500->mask);
  1114. return 0;
  1115. }
  1116. MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
  1117. MODULE_DESCRIPTION("AB8500 MFD core");
  1118. MODULE_LICENSE("GPL v2");