time_64.c 3.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157
  1. /*
  2. * "High Precision Event Timer" based timekeeping.
  3. *
  4. * Copyright (c) 1991,1992,1995 Linus Torvalds
  5. * Copyright (c) 1994 Alan Modra
  6. * Copyright (c) 1995 Markus Kuhn
  7. * Copyright (c) 1996 Ingo Molnar
  8. * Copyright (c) 1998 Andrea Arcangeli
  9. * Copyright (c) 2002,2006 Vojtech Pavlik
  10. * Copyright (c) 2003 Andi Kleen
  11. * RTC support code taken from arch/i386/kernel/timers/time_hpet.c
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/init.h>
  17. #include <linux/mc146818rtc.h>
  18. #include <linux/time.h>
  19. #include <linux/ioport.h>
  20. #include <linux/module.h>
  21. #include <linux/device.h>
  22. #include <linux/sysdev.h>
  23. #include <linux/bcd.h>
  24. #include <linux/notifier.h>
  25. #include <linux/cpu.h>
  26. #include <linux/kallsyms.h>
  27. #include <linux/acpi.h>
  28. #include <linux/clockchips.h>
  29. #ifdef CONFIG_ACPI
  30. #include <acpi/achware.h> /* for PM timer frequency */
  31. #include <acpi/acpi_bus.h>
  32. #endif
  33. #include <asm/i8253.h>
  34. #include <asm/pgtable.h>
  35. #include <asm/vsyscall.h>
  36. #include <asm/timex.h>
  37. #include <asm/proto.h>
  38. #include <asm/hpet.h>
  39. #include <asm/sections.h>
  40. #include <linux/hpet.h>
  41. #include <asm/apic.h>
  42. #include <asm/hpet.h>
  43. #include <asm/mpspec.h>
  44. #include <asm/nmi.h>
  45. #include <asm/vgtod.h>
  46. volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
  47. unsigned long profile_pc(struct pt_regs *regs)
  48. {
  49. unsigned long pc = instruction_pointer(regs);
  50. /* Assume the lock function has either no stack frame or a copy
  51. of eflags from PUSHF
  52. Eflags always has bits 22 and up cleared unlike kernel addresses. */
  53. if (!user_mode(regs) && in_lock_functions(pc)) {
  54. unsigned long *sp = (unsigned long *)regs->rsp;
  55. if (sp[0] >> 22)
  56. return sp[0];
  57. if (sp[1] >> 22)
  58. return sp[1];
  59. }
  60. return pc;
  61. }
  62. EXPORT_SYMBOL(profile_pc);
  63. static irqreturn_t timer_event_interrupt(int irq, void *dev_id)
  64. {
  65. add_pda(irq0_irqs, 1);
  66. global_clock_event->event_handler(global_clock_event);
  67. return IRQ_HANDLED;
  68. }
  69. /* calibrate_cpu is used on systems with fixed rate TSCs to determine
  70. * processor frequency */
  71. #define TICK_COUNT 100000000
  72. static unsigned int __init tsc_calibrate_cpu_khz(void)
  73. {
  74. int tsc_start, tsc_now;
  75. int i, no_ctr_free;
  76. unsigned long evntsel3 = 0, pmc3 = 0, pmc_now = 0;
  77. unsigned long flags;
  78. for (i = 0; i < 4; i++)
  79. if (avail_to_resrv_perfctr_nmi_bit(i))
  80. break;
  81. no_ctr_free = (i == 4);
  82. if (no_ctr_free) {
  83. i = 3;
  84. rdmsrl(MSR_K7_EVNTSEL3, evntsel3);
  85. wrmsrl(MSR_K7_EVNTSEL3, 0);
  86. rdmsrl(MSR_K7_PERFCTR3, pmc3);
  87. } else {
  88. reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i);
  89. reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
  90. }
  91. local_irq_save(flags);
  92. /* start meauring cycles, incrementing from 0 */
  93. wrmsrl(MSR_K7_PERFCTR0 + i, 0);
  94. wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 | 3 << 16 | 0x76);
  95. rdtscl(tsc_start);
  96. do {
  97. rdmsrl(MSR_K7_PERFCTR0 + i, pmc_now);
  98. tsc_now = get_cycles_sync();
  99. } while ((tsc_now - tsc_start) < TICK_COUNT);
  100. local_irq_restore(flags);
  101. if (no_ctr_free) {
  102. wrmsrl(MSR_K7_EVNTSEL3, 0);
  103. wrmsrl(MSR_K7_PERFCTR3, pmc3);
  104. wrmsrl(MSR_K7_EVNTSEL3, evntsel3);
  105. } else {
  106. release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
  107. release_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
  108. }
  109. return pmc_now * tsc_khz / (tsc_now - tsc_start);
  110. }
  111. static struct irqaction irq0 = {
  112. .handler = timer_event_interrupt,
  113. .flags = IRQF_DISABLED | IRQF_IRQPOLL | IRQF_NOBALANCING,
  114. .mask = CPU_MASK_NONE,
  115. .name = "timer"
  116. };
  117. void __init time_init(void)
  118. {
  119. if (!hpet_enable())
  120. setup_pit_timer();
  121. setup_irq(0, &irq0);
  122. tsc_calibrate();
  123. cpu_khz = tsc_khz;
  124. if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) &&
  125. boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
  126. boot_cpu_data.x86 == 16)
  127. cpu_khz = tsc_calibrate_cpu_khz();
  128. if (unsynchronized_tsc())
  129. mark_tsc_unstable("TSCs unsynchronized");
  130. if (cpu_has(&boot_cpu_data, X86_FEATURE_RDTSCP))
  131. vgetcpu_mode = VGETCPU_RDTSCP;
  132. else
  133. vgetcpu_mode = VGETCPU_LSL;
  134. printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
  135. cpu_khz / 1000, cpu_khz % 1000);
  136. init_tsc_clocksource();
  137. }