cx88-dvb.c 45 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-simple.h"
  46. #include "tda9887.h"
  47. #include "s5h1411.h"
  48. #include "stv0299.h"
  49. #include "z0194a.h"
  50. #include "stv0288.h"
  51. #include "stb6000.h"
  52. #include "cx24116.h"
  53. #include "stv0900.h"
  54. #include "stb6100.h"
  55. #include "stb6100_proc.h"
  56. #include "mb86a16.h"
  57. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  58. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  59. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  60. MODULE_LICENSE("GPL");
  61. static unsigned int debug;
  62. module_param(debug, int, 0644);
  63. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  64. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  65. #define dprintk(level,fmt, arg...) if (debug >= level) \
  66. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  67. /* ------------------------------------------------------------------ */
  68. static int dvb_buf_setup(struct videobuf_queue *q,
  69. unsigned int *count, unsigned int *size)
  70. {
  71. struct cx8802_dev *dev = q->priv_data;
  72. dev->ts_packet_size = 188 * 4;
  73. dev->ts_packet_count = 32;
  74. *size = dev->ts_packet_size * dev->ts_packet_count;
  75. *count = 32;
  76. return 0;
  77. }
  78. static int dvb_buf_prepare(struct videobuf_queue *q,
  79. struct videobuf_buffer *vb, enum v4l2_field field)
  80. {
  81. struct cx8802_dev *dev = q->priv_data;
  82. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  83. }
  84. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  85. {
  86. struct cx8802_dev *dev = q->priv_data;
  87. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  88. }
  89. static void dvb_buf_release(struct videobuf_queue *q,
  90. struct videobuf_buffer *vb)
  91. {
  92. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  93. }
  94. static const struct videobuf_queue_ops dvb_qops = {
  95. .buf_setup = dvb_buf_setup,
  96. .buf_prepare = dvb_buf_prepare,
  97. .buf_queue = dvb_buf_queue,
  98. .buf_release = dvb_buf_release,
  99. };
  100. /* ------------------------------------------------------------------ */
  101. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  102. {
  103. struct cx8802_dev *dev= fe->dvb->priv;
  104. struct cx8802_driver *drv = NULL;
  105. int ret = 0;
  106. int fe_id;
  107. fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
  108. if (!fe_id) {
  109. printk(KERN_ERR "%s() No frontend found\n", __func__);
  110. return -EINVAL;
  111. }
  112. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  113. if (drv) {
  114. if (acquire){
  115. dev->frontends.active_fe_id = fe_id;
  116. ret = drv->request_acquire(drv);
  117. } else {
  118. ret = drv->request_release(drv);
  119. dev->frontends.active_fe_id = 0;
  120. }
  121. }
  122. return ret;
  123. }
  124. static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
  125. {
  126. struct videobuf_dvb_frontends *f;
  127. struct videobuf_dvb_frontend *fe;
  128. if (!core->dvbdev)
  129. return;
  130. f = &core->dvbdev->frontends;
  131. if (!f)
  132. return;
  133. if (f->gate <= 1) /* undefined or fe0 */
  134. fe = videobuf_dvb_get_frontend(f, 1);
  135. else
  136. fe = videobuf_dvb_get_frontend(f, f->gate);
  137. if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
  138. fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
  139. }
  140. /* ------------------------------------------------------------------ */
  141. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  142. {
  143. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  144. static const u8 reset [] = { RESET, 0x80 };
  145. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  146. static const u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  147. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  148. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  149. mt352_write(fe, clock_config, sizeof(clock_config));
  150. udelay(200);
  151. mt352_write(fe, reset, sizeof(reset));
  152. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  153. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  154. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  155. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  156. return 0;
  157. }
  158. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  159. {
  160. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  161. static const u8 reset [] = { RESET, 0x80 };
  162. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  163. static const u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  164. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  165. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  166. mt352_write(fe, clock_config, sizeof(clock_config));
  167. udelay(200);
  168. mt352_write(fe, reset, sizeof(reset));
  169. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  170. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  171. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  172. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  173. return 0;
  174. }
  175. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  176. {
  177. static const u8 clock_config [] = { 0x89, 0x38, 0x39 };
  178. static const u8 reset [] = { 0x50, 0x80 };
  179. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  180. static const u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  181. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  182. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  183. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  184. mt352_write(fe, clock_config, sizeof(clock_config));
  185. udelay(2000);
  186. mt352_write(fe, reset, sizeof(reset));
  187. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  188. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  189. udelay(2000);
  190. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  191. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  192. return 0;
  193. }
  194. static const struct mt352_config dvico_fusionhdtv = {
  195. .demod_address = 0x0f,
  196. .demod_init = dvico_fusionhdtv_demod_init,
  197. };
  198. static const struct mt352_config dntv_live_dvbt_config = {
  199. .demod_address = 0x0f,
  200. .demod_init = dntv_live_dvbt_demod_init,
  201. };
  202. static const struct mt352_config dvico_fusionhdtv_dual = {
  203. .demod_address = 0x0f,
  204. .demod_init = dvico_dual_demod_init,
  205. };
  206. static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
  207. .demod_address = (0x1e >> 1),
  208. .no_tuner = 1,
  209. .if2 = 45600,
  210. };
  211. static struct mb86a16_config twinhan_vp1027 = {
  212. .demod_address = 0x08,
  213. };
  214. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  215. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  216. {
  217. static const u8 clock_config [] = { 0x89, 0x38, 0x38 };
  218. static const u8 reset [] = { 0x50, 0x80 };
  219. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  220. static const u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  221. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  222. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  223. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  224. mt352_write(fe, clock_config, sizeof(clock_config));
  225. udelay(2000);
  226. mt352_write(fe, reset, sizeof(reset));
  227. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  228. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  229. udelay(2000);
  230. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  231. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  232. return 0;
  233. }
  234. static const struct mt352_config dntv_live_dvbt_pro_config = {
  235. .demod_address = 0x0f,
  236. .no_tuner = 1,
  237. .demod_init = dntv_live_dvbt_pro_demod_init,
  238. };
  239. #endif
  240. static const struct zl10353_config dvico_fusionhdtv_hybrid = {
  241. .demod_address = 0x0f,
  242. .no_tuner = 1,
  243. };
  244. static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
  245. .demod_address = 0x0f,
  246. .if2 = 45600,
  247. .no_tuner = 1,
  248. };
  249. static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  250. .demod_address = 0x0f,
  251. .if2 = 4560,
  252. .no_tuner = 1,
  253. .demod_init = dvico_fusionhdtv_demod_init,
  254. };
  255. static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  256. .demod_address = 0x0f,
  257. };
  258. static const struct cx22702_config connexant_refboard_config = {
  259. .demod_address = 0x43,
  260. .output_mode = CX22702_SERIAL_OUTPUT,
  261. };
  262. static const struct cx22702_config hauppauge_hvr_config = {
  263. .demod_address = 0x63,
  264. .output_mode = CX22702_SERIAL_OUTPUT,
  265. };
  266. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  267. {
  268. struct cx8802_dev *dev= fe->dvb->priv;
  269. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  270. return 0;
  271. }
  272. static const struct or51132_config pchdtv_hd3000 = {
  273. .demod_address = 0x15,
  274. .set_ts_params = or51132_set_ts_param,
  275. };
  276. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  277. {
  278. struct cx8802_dev *dev= fe->dvb->priv;
  279. struct cx88_core *core = dev->core;
  280. dprintk(1, "%s: index = %d\n", __func__, index);
  281. if (index == 0)
  282. cx_clear(MO_GP0_IO, 8);
  283. else
  284. cx_set(MO_GP0_IO, 8);
  285. return 0;
  286. }
  287. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  288. {
  289. struct cx8802_dev *dev= fe->dvb->priv;
  290. if (is_punctured)
  291. dev->ts_gen_cntrl |= 0x04;
  292. else
  293. dev->ts_gen_cntrl &= ~0x04;
  294. return 0;
  295. }
  296. static struct lgdt330x_config fusionhdtv_3_gold = {
  297. .demod_address = 0x0e,
  298. .demod_chip = LGDT3302,
  299. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  300. .set_ts_params = lgdt330x_set_ts_param,
  301. };
  302. static const struct lgdt330x_config fusionhdtv_5_gold = {
  303. .demod_address = 0x0e,
  304. .demod_chip = LGDT3303,
  305. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  306. .set_ts_params = lgdt330x_set_ts_param,
  307. };
  308. static const struct lgdt330x_config pchdtv_hd5500 = {
  309. .demod_address = 0x59,
  310. .demod_chip = LGDT3303,
  311. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  312. .set_ts_params = lgdt330x_set_ts_param,
  313. };
  314. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  315. {
  316. struct cx8802_dev *dev= fe->dvb->priv;
  317. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  318. return 0;
  319. }
  320. static const struct nxt200x_config ati_hdtvwonder = {
  321. .demod_address = 0x0a,
  322. .set_ts_params = nxt200x_set_ts_param,
  323. };
  324. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  325. int is_punctured)
  326. {
  327. struct cx8802_dev *dev= fe->dvb->priv;
  328. dev->ts_gen_cntrl = 0x02;
  329. return 0;
  330. }
  331. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  332. fe_sec_voltage_t voltage)
  333. {
  334. struct cx8802_dev *dev= fe->dvb->priv;
  335. struct cx88_core *core = dev->core;
  336. if (voltage == SEC_VOLTAGE_OFF)
  337. cx_write(MO_GP0_IO, 0x000006fb);
  338. else
  339. cx_write(MO_GP0_IO, 0x000006f9);
  340. if (core->prev_set_voltage)
  341. return core->prev_set_voltage(fe, voltage);
  342. return 0;
  343. }
  344. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  345. fe_sec_voltage_t voltage)
  346. {
  347. struct cx8802_dev *dev= fe->dvb->priv;
  348. struct cx88_core *core = dev->core;
  349. if (voltage == SEC_VOLTAGE_OFF) {
  350. dprintk(1,"LNB Voltage OFF\n");
  351. cx_write(MO_GP0_IO, 0x0000efff);
  352. }
  353. if (core->prev_set_voltage)
  354. return core->prev_set_voltage(fe, voltage);
  355. return 0;
  356. }
  357. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  358. fe_sec_voltage_t voltage)
  359. {
  360. struct cx8802_dev *dev= fe->dvb->priv;
  361. struct cx88_core *core = dev->core;
  362. cx_set(MO_GP0_IO, 0x6040);
  363. switch (voltage) {
  364. case SEC_VOLTAGE_13:
  365. cx_clear(MO_GP0_IO, 0x20);
  366. break;
  367. case SEC_VOLTAGE_18:
  368. cx_set(MO_GP0_IO, 0x20);
  369. break;
  370. case SEC_VOLTAGE_OFF:
  371. cx_clear(MO_GP0_IO, 0x20);
  372. break;
  373. }
  374. if (core->prev_set_voltage)
  375. return core->prev_set_voltage(fe, voltage);
  376. return 0;
  377. }
  378. static int vp1027_set_voltage(struct dvb_frontend *fe,
  379. fe_sec_voltage_t voltage)
  380. {
  381. struct cx8802_dev *dev = fe->dvb->priv;
  382. struct cx88_core *core = dev->core;
  383. switch (voltage) {
  384. case SEC_VOLTAGE_13:
  385. dprintk(1, "LNB SEC Voltage=13\n");
  386. cx_write(MO_GP0_IO, 0x00001220);
  387. break;
  388. case SEC_VOLTAGE_18:
  389. dprintk(1, "LNB SEC Voltage=18\n");
  390. cx_write(MO_GP0_IO, 0x00001222);
  391. break;
  392. case SEC_VOLTAGE_OFF:
  393. dprintk(1, "LNB Voltage OFF\n");
  394. cx_write(MO_GP0_IO, 0x00001230);
  395. break;
  396. }
  397. if (core->prev_set_voltage)
  398. return core->prev_set_voltage(fe, voltage);
  399. return 0;
  400. }
  401. static const struct cx24123_config geniatech_dvbs_config = {
  402. .demod_address = 0x55,
  403. .set_ts_params = cx24123_set_ts_param,
  404. };
  405. static const struct cx24123_config hauppauge_novas_config = {
  406. .demod_address = 0x55,
  407. .set_ts_params = cx24123_set_ts_param,
  408. };
  409. static const struct cx24123_config kworld_dvbs_100_config = {
  410. .demod_address = 0x15,
  411. .set_ts_params = cx24123_set_ts_param,
  412. .lnb_polarity = 1,
  413. };
  414. static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  415. .demod_address = 0x32 >> 1,
  416. .output_mode = S5H1409_PARALLEL_OUTPUT,
  417. .gpio = S5H1409_GPIO_ON,
  418. .qam_if = 44000,
  419. .inversion = S5H1409_INVERSION_OFF,
  420. .status_mode = S5H1409_DEMODLOCKING,
  421. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  422. };
  423. static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  424. .demod_address = 0x32 >> 1,
  425. .output_mode = S5H1409_SERIAL_OUTPUT,
  426. .gpio = S5H1409_GPIO_OFF,
  427. .inversion = S5H1409_INVERSION_OFF,
  428. .status_mode = S5H1409_DEMODLOCKING,
  429. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  430. };
  431. static const struct s5h1409_config kworld_atsc_120_config = {
  432. .demod_address = 0x32 >> 1,
  433. .output_mode = S5H1409_SERIAL_OUTPUT,
  434. .gpio = S5H1409_GPIO_OFF,
  435. .inversion = S5H1409_INVERSION_OFF,
  436. .status_mode = S5H1409_DEMODLOCKING,
  437. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  438. };
  439. static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  440. .i2c_address = 0x64,
  441. .if_khz = 5380,
  442. };
  443. static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  444. .demod_address = (0x1e >> 1),
  445. .no_tuner = 1,
  446. .if2 = 45600,
  447. };
  448. static const struct zl10353_config cx88_geniatech_x8000_mt = {
  449. .demod_address = (0x1e >> 1),
  450. .no_tuner = 1,
  451. .disable_i2c_gate_ctrl = 1,
  452. };
  453. static const struct s5h1411_config dvico_fusionhdtv7_config = {
  454. .output_mode = S5H1411_SERIAL_OUTPUT,
  455. .gpio = S5H1411_GPIO_ON,
  456. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  457. .qam_if = S5H1411_IF_44000,
  458. .vsb_if = S5H1411_IF_44000,
  459. .inversion = S5H1411_INVERSION_OFF,
  460. .status_mode = S5H1411_DEMODLOCKING
  461. };
  462. static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  463. .i2c_address = 0xc2 >> 1,
  464. .if_khz = 5380,
  465. };
  466. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  467. {
  468. struct dvb_frontend *fe;
  469. struct videobuf_dvb_frontend *fe0 = NULL;
  470. struct xc2028_ctrl ctl;
  471. struct xc2028_config cfg = {
  472. .i2c_adap = &dev->core->i2c_adap,
  473. .i2c_addr = addr,
  474. .ctrl = &ctl,
  475. };
  476. /* Get the first frontend */
  477. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  478. if (!fe0)
  479. return -EINVAL;
  480. if (!fe0->dvb.frontend) {
  481. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  482. "Can't attach xc3028\n",
  483. dev->core->name);
  484. return -EINVAL;
  485. }
  486. /*
  487. * Some xc3028 devices may be hidden by an I2C gate. This is known
  488. * to happen with some s5h1409-based devices.
  489. * Now that I2C gate is open, sets up xc3028 configuration
  490. */
  491. cx88_setup_xc3028(dev->core, &ctl);
  492. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  493. if (!fe) {
  494. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  495. dev->core->name);
  496. dvb_frontend_detach(fe0->dvb.frontend);
  497. dvb_unregister_frontend(fe0->dvb.frontend);
  498. fe0->dvb.frontend = NULL;
  499. return -EINVAL;
  500. }
  501. printk(KERN_INFO "%s/2: xc3028 attached\n",
  502. dev->core->name);
  503. return 0;
  504. }
  505. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  506. int is_punctured)
  507. {
  508. struct cx8802_dev *dev = fe->dvb->priv;
  509. dev->ts_gen_cntrl = 0x2;
  510. return 0;
  511. }
  512. static int stv0900_set_ts_param(struct dvb_frontend *fe,
  513. int is_punctured)
  514. {
  515. struct cx8802_dev *dev = fe->dvb->priv;
  516. dev->ts_gen_cntrl = 0;
  517. return 0;
  518. }
  519. static int cx24116_reset_device(struct dvb_frontend *fe)
  520. {
  521. struct cx8802_dev *dev = fe->dvb->priv;
  522. struct cx88_core *core = dev->core;
  523. /* Reset the part */
  524. /* Put the cx24116 into reset */
  525. cx_write(MO_SRST_IO, 0);
  526. msleep(10);
  527. /* Take the cx24116 out of reset */
  528. cx_write(MO_SRST_IO, 1);
  529. msleep(10);
  530. return 0;
  531. }
  532. static const struct cx24116_config hauppauge_hvr4000_config = {
  533. .demod_address = 0x05,
  534. .set_ts_params = cx24116_set_ts_param,
  535. .reset_device = cx24116_reset_device,
  536. };
  537. static const struct cx24116_config tevii_s460_config = {
  538. .demod_address = 0x55,
  539. .set_ts_params = cx24116_set_ts_param,
  540. .reset_device = cx24116_reset_device,
  541. };
  542. static const struct stv0900_config prof_7301_stv0900_config = {
  543. .demod_address = 0x6a,
  544. /* demod_mode = 0,*/
  545. .xtal = 27000000,
  546. .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
  547. .diseqc_mode = 2,/* 2/3 PWM */
  548. .tun1_maddress = 0,/* 0x60 */
  549. .tun1_adc = 0,/* 2 Vpp */
  550. .path1_mode = 3,
  551. .set_ts_params = stv0900_set_ts_param,
  552. };
  553. static const struct stb6100_config prof_7301_stb6100_config = {
  554. .tuner_address = 0x60,
  555. .refclock = 27000000,
  556. };
  557. static const struct stv0299_config tevii_tuner_sharp_config = {
  558. .demod_address = 0x68,
  559. .inittab = sharp_z0194a_inittab,
  560. .mclk = 88000000UL,
  561. .invert = 1,
  562. .skip_reinit = 0,
  563. .lock_output = 1,
  564. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  565. .min_delay_ms = 100,
  566. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  567. .set_ts_params = cx24116_set_ts_param,
  568. };
  569. static const struct stv0288_config tevii_tuner_earda_config = {
  570. .demod_address = 0x68,
  571. .min_delay_ms = 100,
  572. .set_ts_params = cx24116_set_ts_param,
  573. };
  574. static int cx8802_alloc_frontends(struct cx8802_dev *dev)
  575. {
  576. struct cx88_core *core = dev->core;
  577. struct videobuf_dvb_frontend *fe = NULL;
  578. int i;
  579. mutex_init(&dev->frontends.lock);
  580. INIT_LIST_HEAD(&dev->frontends.felist);
  581. if (!core->board.num_frontends)
  582. return -ENODEV;
  583. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  584. core->board.num_frontends);
  585. for (i = 1; i <= core->board.num_frontends; i++) {
  586. fe = videobuf_dvb_alloc_frontend(&dev->frontends, i);
  587. if (!fe) {
  588. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  589. videobuf_dvb_dealloc_frontends(&dev->frontends);
  590. return -ENOMEM;
  591. }
  592. }
  593. return 0;
  594. }
  595. static const u8 samsung_smt_7020_inittab[] = {
  596. 0x01, 0x15,
  597. 0x02, 0x00,
  598. 0x03, 0x00,
  599. 0x04, 0x7D,
  600. 0x05, 0x0F,
  601. 0x06, 0x02,
  602. 0x07, 0x00,
  603. 0x08, 0x60,
  604. 0x0A, 0xC2,
  605. 0x0B, 0x00,
  606. 0x0C, 0x01,
  607. 0x0D, 0x81,
  608. 0x0E, 0x44,
  609. 0x0F, 0x09,
  610. 0x10, 0x3C,
  611. 0x11, 0x84,
  612. 0x12, 0xDA,
  613. 0x13, 0x99,
  614. 0x14, 0x8D,
  615. 0x15, 0xCE,
  616. 0x16, 0xE8,
  617. 0x17, 0x43,
  618. 0x18, 0x1C,
  619. 0x19, 0x1B,
  620. 0x1A, 0x1D,
  621. 0x1C, 0x12,
  622. 0x1D, 0x00,
  623. 0x1E, 0x00,
  624. 0x1F, 0x00,
  625. 0x20, 0x00,
  626. 0x21, 0x00,
  627. 0x22, 0x00,
  628. 0x23, 0x00,
  629. 0x28, 0x02,
  630. 0x29, 0x28,
  631. 0x2A, 0x14,
  632. 0x2B, 0x0F,
  633. 0x2C, 0x09,
  634. 0x2D, 0x05,
  635. 0x31, 0x1F,
  636. 0x32, 0x19,
  637. 0x33, 0xFC,
  638. 0x34, 0x13,
  639. 0xff, 0xff,
  640. };
  641. static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe,
  642. struct dvb_frontend_parameters *params)
  643. {
  644. struct cx8802_dev *dev = fe->dvb->priv;
  645. u8 buf[4];
  646. u32 div;
  647. struct i2c_msg msg = {
  648. .addr = 0x61,
  649. .flags = 0,
  650. .buf = buf,
  651. .len = sizeof(buf) };
  652. div = params->frequency / 125;
  653. buf[0] = (div >> 8) & 0x7f;
  654. buf[1] = div & 0xff;
  655. buf[2] = 0x84; /* 0xC4 */
  656. buf[3] = 0x00;
  657. if (params->frequency < 1500000)
  658. buf[3] |= 0x10;
  659. if (fe->ops.i2c_gate_ctrl)
  660. fe->ops.i2c_gate_ctrl(fe, 1);
  661. if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
  662. return -EIO;
  663. return 0;
  664. }
  665. static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
  666. fe_sec_tone_mode_t tone)
  667. {
  668. struct cx8802_dev *dev = fe->dvb->priv;
  669. struct cx88_core *core = dev->core;
  670. cx_set(MO_GP0_IO, 0x0800);
  671. switch (tone) {
  672. case SEC_TONE_ON:
  673. cx_set(MO_GP0_IO, 0x08);
  674. break;
  675. case SEC_TONE_OFF:
  676. cx_clear(MO_GP0_IO, 0x08);
  677. break;
  678. default:
  679. return -EINVAL;
  680. }
  681. return 0;
  682. }
  683. static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
  684. fe_sec_voltage_t voltage)
  685. {
  686. struct cx8802_dev *dev = fe->dvb->priv;
  687. struct cx88_core *core = dev->core;
  688. u8 data;
  689. struct i2c_msg msg = {
  690. .addr = 8,
  691. .flags = 0,
  692. .buf = &data,
  693. .len = sizeof(data) };
  694. cx_set(MO_GP0_IO, 0x8000);
  695. switch (voltage) {
  696. case SEC_VOLTAGE_OFF:
  697. break;
  698. case SEC_VOLTAGE_13:
  699. data = ISL6421_EN1 | ISL6421_LLC1;
  700. cx_clear(MO_GP0_IO, 0x80);
  701. break;
  702. case SEC_VOLTAGE_18:
  703. data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
  704. cx_clear(MO_GP0_IO, 0x80);
  705. break;
  706. default:
  707. return -EINVAL;
  708. };
  709. return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
  710. }
  711. static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
  712. u32 srate, u32 ratio)
  713. {
  714. u8 aclk = 0;
  715. u8 bclk = 0;
  716. if (srate < 1500000) {
  717. aclk = 0xb7;
  718. bclk = 0x47;
  719. } else if (srate < 3000000) {
  720. aclk = 0xb7;
  721. bclk = 0x4b;
  722. } else if (srate < 7000000) {
  723. aclk = 0xb7;
  724. bclk = 0x4f;
  725. } else if (srate < 14000000) {
  726. aclk = 0xb7;
  727. bclk = 0x53;
  728. } else if (srate < 30000000) {
  729. aclk = 0xb6;
  730. bclk = 0x53;
  731. } else if (srate < 45000000) {
  732. aclk = 0xb4;
  733. bclk = 0x51;
  734. }
  735. stv0299_writereg(fe, 0x13, aclk);
  736. stv0299_writereg(fe, 0x14, bclk);
  737. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  738. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  739. stv0299_writereg(fe, 0x21, ratio & 0xf0);
  740. return 0;
  741. }
  742. static const struct stv0299_config samsung_stv0299_config = {
  743. .demod_address = 0x68,
  744. .inittab = samsung_smt_7020_inittab,
  745. .mclk = 88000000UL,
  746. .invert = 0,
  747. .skip_reinit = 0,
  748. .lock_output = STV0299_LOCKOUTPUT_LK,
  749. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  750. .min_delay_ms = 100,
  751. .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
  752. };
  753. static int dvb_register(struct cx8802_dev *dev)
  754. {
  755. struct cx88_core *core = dev->core;
  756. struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
  757. int mfe_shared = 0; /* bus not shared by default */
  758. if (0 != core->i2c_rc) {
  759. printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
  760. goto frontend_detach;
  761. }
  762. /* Get the first frontend */
  763. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  764. if (!fe0)
  765. goto frontend_detach;
  766. /* multi-frontend gate control is undefined or defaults to fe0 */
  767. dev->frontends.gate = 0;
  768. /* Sets the gate control callback to be used by i2c command calls */
  769. core->gate_ctrl = cx88_dvb_gate_ctrl;
  770. /* init frontend(s) */
  771. switch (core->boardnr) {
  772. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  773. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  774. &connexant_refboard_config,
  775. &core->i2c_adap);
  776. if (fe0->dvb.frontend != NULL) {
  777. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  778. 0x61, &core->i2c_adap,
  779. DVB_PLL_THOMSON_DTT759X))
  780. goto frontend_detach;
  781. }
  782. break;
  783. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  784. case CX88_BOARD_CONEXANT_DVB_T1:
  785. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  786. case CX88_BOARD_WINFAST_DTV1000:
  787. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  788. &connexant_refboard_config,
  789. &core->i2c_adap);
  790. if (fe0->dvb.frontend != NULL) {
  791. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  792. 0x60, &core->i2c_adap,
  793. DVB_PLL_THOMSON_DTT7579))
  794. goto frontend_detach;
  795. }
  796. break;
  797. case CX88_BOARD_WINFAST_DTV2000H:
  798. case CX88_BOARD_WINFAST_DTV2000H_J:
  799. case CX88_BOARD_HAUPPAUGE_HVR1100:
  800. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  801. case CX88_BOARD_HAUPPAUGE_HVR1300:
  802. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  803. &hauppauge_hvr_config,
  804. &core->i2c_adap);
  805. if (fe0->dvb.frontend != NULL) {
  806. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  807. &core->i2c_adap, 0x61,
  808. TUNER_PHILIPS_FMD1216ME_MK3))
  809. goto frontend_detach;
  810. }
  811. break;
  812. case CX88_BOARD_HAUPPAUGE_HVR3000:
  813. /* MFE frontend 1 */
  814. mfe_shared = 1;
  815. dev->frontends.gate = 2;
  816. /* DVB-S init */
  817. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  818. &hauppauge_novas_config,
  819. &dev->core->i2c_adap);
  820. if (fe0->dvb.frontend) {
  821. if (!dvb_attach(isl6421_attach,
  822. fe0->dvb.frontend,
  823. &dev->core->i2c_adap,
  824. 0x08, ISL6421_DCL, 0x00))
  825. goto frontend_detach;
  826. }
  827. /* MFE frontend 2 */
  828. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  829. if (!fe1)
  830. goto frontend_detach;
  831. /* DVB-T init */
  832. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  833. &hauppauge_hvr_config,
  834. &dev->core->i2c_adap);
  835. if (fe1->dvb.frontend) {
  836. fe1->dvb.frontend->id = 1;
  837. if (!dvb_attach(simple_tuner_attach,
  838. fe1->dvb.frontend,
  839. &dev->core->i2c_adap,
  840. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  841. goto frontend_detach;
  842. }
  843. break;
  844. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  845. fe0->dvb.frontend = dvb_attach(mt352_attach,
  846. &dvico_fusionhdtv,
  847. &core->i2c_adap);
  848. if (fe0->dvb.frontend != NULL) {
  849. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  850. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  851. goto frontend_detach;
  852. break;
  853. }
  854. /* ZL10353 replaces MT352 on later cards */
  855. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  856. &dvico_fusionhdtv_plus_v1_1,
  857. &core->i2c_adap);
  858. if (fe0->dvb.frontend != NULL) {
  859. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  860. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  861. goto frontend_detach;
  862. }
  863. break;
  864. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  865. /* The tin box says DEE1601, but it seems to be DTT7579
  866. * compatible, with a slightly different MT352 AGC gain. */
  867. fe0->dvb.frontend = dvb_attach(mt352_attach,
  868. &dvico_fusionhdtv_dual,
  869. &core->i2c_adap);
  870. if (fe0->dvb.frontend != NULL) {
  871. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  872. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  873. goto frontend_detach;
  874. break;
  875. }
  876. /* ZL10353 replaces MT352 on later cards */
  877. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  878. &dvico_fusionhdtv_plus_v1_1,
  879. &core->i2c_adap);
  880. if (fe0->dvb.frontend != NULL) {
  881. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  882. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  883. goto frontend_detach;
  884. }
  885. break;
  886. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  887. fe0->dvb.frontend = dvb_attach(mt352_attach,
  888. &dvico_fusionhdtv,
  889. &core->i2c_adap);
  890. if (fe0->dvb.frontend != NULL) {
  891. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  892. 0x61, NULL, DVB_PLL_LG_Z201))
  893. goto frontend_detach;
  894. }
  895. break;
  896. case CX88_BOARD_KWORLD_DVB_T:
  897. case CX88_BOARD_DNTV_LIVE_DVB_T:
  898. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  899. fe0->dvb.frontend = dvb_attach(mt352_attach,
  900. &dntv_live_dvbt_config,
  901. &core->i2c_adap);
  902. if (fe0->dvb.frontend != NULL) {
  903. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  904. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  905. goto frontend_detach;
  906. }
  907. break;
  908. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  909. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  910. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  911. fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  912. &dev->vp3054->adap);
  913. if (fe0->dvb.frontend != NULL) {
  914. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  915. &core->i2c_adap, 0x61,
  916. TUNER_PHILIPS_FMD1216ME_MK3))
  917. goto frontend_detach;
  918. }
  919. #else
  920. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  921. core->name);
  922. #endif
  923. break;
  924. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  925. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  926. &dvico_fusionhdtv_hybrid,
  927. &core->i2c_adap);
  928. if (fe0->dvb.frontend != NULL) {
  929. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  930. &core->i2c_adap, 0x61,
  931. TUNER_THOMSON_FE6600))
  932. goto frontend_detach;
  933. }
  934. break;
  935. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  936. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  937. &dvico_fusionhdtv_xc3028,
  938. &core->i2c_adap);
  939. if (fe0->dvb.frontend == NULL)
  940. fe0->dvb.frontend = dvb_attach(mt352_attach,
  941. &dvico_fusionhdtv_mt352_xc3028,
  942. &core->i2c_adap);
  943. /*
  944. * On this board, the demod provides the I2C bus pullup.
  945. * We must not permit gate_ctrl to be performed, or
  946. * the xc3028 cannot communicate on the bus.
  947. */
  948. if (fe0->dvb.frontend)
  949. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  950. if (attach_xc3028(0x61, dev) < 0)
  951. goto frontend_detach;
  952. break;
  953. case CX88_BOARD_PCHDTV_HD3000:
  954. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  955. &core->i2c_adap);
  956. if (fe0->dvb.frontend != NULL) {
  957. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  958. &core->i2c_adap, 0x61,
  959. TUNER_THOMSON_DTT761X))
  960. goto frontend_detach;
  961. }
  962. break;
  963. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  964. dev->ts_gen_cntrl = 0x08;
  965. /* Do a hardware reset of chip before using it. */
  966. cx_clear(MO_GP0_IO, 1);
  967. mdelay(100);
  968. cx_set(MO_GP0_IO, 1);
  969. mdelay(200);
  970. /* Select RF connector callback */
  971. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  972. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  973. &fusionhdtv_3_gold,
  974. &core->i2c_adap);
  975. if (fe0->dvb.frontend != NULL) {
  976. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  977. &core->i2c_adap, 0x61,
  978. TUNER_MICROTUNE_4042FI5))
  979. goto frontend_detach;
  980. }
  981. break;
  982. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  983. dev->ts_gen_cntrl = 0x08;
  984. /* Do a hardware reset of chip before using it. */
  985. cx_clear(MO_GP0_IO, 1);
  986. mdelay(100);
  987. cx_set(MO_GP0_IO, 9);
  988. mdelay(200);
  989. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  990. &fusionhdtv_3_gold,
  991. &core->i2c_adap);
  992. if (fe0->dvb.frontend != NULL) {
  993. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  994. &core->i2c_adap, 0x61,
  995. TUNER_THOMSON_DTT761X))
  996. goto frontend_detach;
  997. }
  998. break;
  999. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1000. dev->ts_gen_cntrl = 0x08;
  1001. /* Do a hardware reset of chip before using it. */
  1002. cx_clear(MO_GP0_IO, 1);
  1003. mdelay(100);
  1004. cx_set(MO_GP0_IO, 1);
  1005. mdelay(200);
  1006. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1007. &fusionhdtv_5_gold,
  1008. &core->i2c_adap);
  1009. if (fe0->dvb.frontend != NULL) {
  1010. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1011. &core->i2c_adap, 0x61,
  1012. TUNER_LG_TDVS_H06XF))
  1013. goto frontend_detach;
  1014. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1015. &core->i2c_adap, 0x43))
  1016. goto frontend_detach;
  1017. }
  1018. break;
  1019. case CX88_BOARD_PCHDTV_HD5500:
  1020. dev->ts_gen_cntrl = 0x08;
  1021. /* Do a hardware reset of chip before using it. */
  1022. cx_clear(MO_GP0_IO, 1);
  1023. mdelay(100);
  1024. cx_set(MO_GP0_IO, 1);
  1025. mdelay(200);
  1026. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1027. &pchdtv_hd5500,
  1028. &core->i2c_adap);
  1029. if (fe0->dvb.frontend != NULL) {
  1030. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1031. &core->i2c_adap, 0x61,
  1032. TUNER_LG_TDVS_H06XF))
  1033. goto frontend_detach;
  1034. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1035. &core->i2c_adap, 0x43))
  1036. goto frontend_detach;
  1037. }
  1038. break;
  1039. case CX88_BOARD_ATI_HDTVWONDER:
  1040. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  1041. &ati_hdtvwonder,
  1042. &core->i2c_adap);
  1043. if (fe0->dvb.frontend != NULL) {
  1044. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1045. &core->i2c_adap, 0x61,
  1046. TUNER_PHILIPS_TUV1236D))
  1047. goto frontend_detach;
  1048. }
  1049. break;
  1050. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  1051. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  1052. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1053. &hauppauge_novas_config,
  1054. &core->i2c_adap);
  1055. if (fe0->dvb.frontend) {
  1056. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  1057. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
  1058. goto frontend_detach;
  1059. }
  1060. break;
  1061. case CX88_BOARD_KWORLD_DVBS_100:
  1062. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1063. &kworld_dvbs_100_config,
  1064. &core->i2c_adap);
  1065. if (fe0->dvb.frontend) {
  1066. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1067. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  1068. }
  1069. break;
  1070. case CX88_BOARD_GENIATECH_DVBS:
  1071. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1072. &geniatech_dvbs_config,
  1073. &core->i2c_adap);
  1074. if (fe0->dvb.frontend) {
  1075. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1076. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  1077. }
  1078. break;
  1079. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  1080. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1081. &pinnacle_pctv_hd_800i_config,
  1082. &core->i2c_adap);
  1083. if (fe0->dvb.frontend != NULL) {
  1084. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1085. &core->i2c_adap,
  1086. &pinnacle_pctv_hd_800i_tuner_config))
  1087. goto frontend_detach;
  1088. }
  1089. break;
  1090. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1091. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1092. &dvico_hdtv5_pci_nano_config,
  1093. &core->i2c_adap);
  1094. if (fe0->dvb.frontend != NULL) {
  1095. struct dvb_frontend *fe;
  1096. struct xc2028_config cfg = {
  1097. .i2c_adap = &core->i2c_adap,
  1098. .i2c_addr = 0x61,
  1099. };
  1100. static struct xc2028_ctrl ctl = {
  1101. .fname = XC2028_DEFAULT_FIRMWARE,
  1102. .max_len = 64,
  1103. .scode_table = XC3028_FE_OREN538,
  1104. };
  1105. fe = dvb_attach(xc2028_attach,
  1106. fe0->dvb.frontend, &cfg);
  1107. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  1108. fe->ops.tuner_ops.set_config(fe, &ctl);
  1109. }
  1110. break;
  1111. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  1112. case CX88_BOARD_WINFAST_DTV1800H:
  1113. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1114. &cx88_pinnacle_hybrid_pctv,
  1115. &core->i2c_adap);
  1116. if (fe0->dvb.frontend) {
  1117. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1118. if (attach_xc3028(0x61, dev) < 0)
  1119. goto frontend_detach;
  1120. }
  1121. break;
  1122. case CX88_BOARD_GENIATECH_X8000_MT:
  1123. dev->ts_gen_cntrl = 0x00;
  1124. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1125. &cx88_geniatech_x8000_mt,
  1126. &core->i2c_adap);
  1127. if (attach_xc3028(0x61, dev) < 0)
  1128. goto frontend_detach;
  1129. break;
  1130. case CX88_BOARD_KWORLD_ATSC_120:
  1131. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1132. &kworld_atsc_120_config,
  1133. &core->i2c_adap);
  1134. if (attach_xc3028(0x61, dev) < 0)
  1135. goto frontend_detach;
  1136. break;
  1137. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  1138. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  1139. &dvico_fusionhdtv7_config,
  1140. &core->i2c_adap);
  1141. if (fe0->dvb.frontend != NULL) {
  1142. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1143. &core->i2c_adap,
  1144. &dvico_fusionhdtv7_tuner_config))
  1145. goto frontend_detach;
  1146. }
  1147. break;
  1148. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1149. /* MFE frontend 1 */
  1150. mfe_shared = 1;
  1151. dev->frontends.gate = 2;
  1152. /* DVB-S/S2 Init */
  1153. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1154. &hauppauge_hvr4000_config,
  1155. &dev->core->i2c_adap);
  1156. if (fe0->dvb.frontend) {
  1157. if (!dvb_attach(isl6421_attach,
  1158. fe0->dvb.frontend,
  1159. &dev->core->i2c_adap,
  1160. 0x08, ISL6421_DCL, 0x00))
  1161. goto frontend_detach;
  1162. }
  1163. /* MFE frontend 2 */
  1164. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  1165. if (!fe1)
  1166. goto frontend_detach;
  1167. /* DVB-T Init */
  1168. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  1169. &hauppauge_hvr_config,
  1170. &dev->core->i2c_adap);
  1171. if (fe1->dvb.frontend) {
  1172. fe1->dvb.frontend->id = 1;
  1173. if (!dvb_attach(simple_tuner_attach,
  1174. fe1->dvb.frontend,
  1175. &dev->core->i2c_adap,
  1176. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  1177. goto frontend_detach;
  1178. }
  1179. break;
  1180. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  1181. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1182. &hauppauge_hvr4000_config,
  1183. &dev->core->i2c_adap);
  1184. if (fe0->dvb.frontend) {
  1185. if (!dvb_attach(isl6421_attach,
  1186. fe0->dvb.frontend,
  1187. &dev->core->i2c_adap,
  1188. 0x08, ISL6421_DCL, 0x00))
  1189. goto frontend_detach;
  1190. }
  1191. break;
  1192. case CX88_BOARD_PROF_6200:
  1193. case CX88_BOARD_TBS_8910:
  1194. case CX88_BOARD_TEVII_S420:
  1195. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1196. &tevii_tuner_sharp_config,
  1197. &core->i2c_adap);
  1198. if (fe0->dvb.frontend != NULL) {
  1199. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  1200. &core->i2c_adap, DVB_PLL_OPERA1))
  1201. goto frontend_detach;
  1202. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1203. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1204. } else {
  1205. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  1206. &tevii_tuner_earda_config,
  1207. &core->i2c_adap);
  1208. if (fe0->dvb.frontend != NULL) {
  1209. if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
  1210. &core->i2c_adap))
  1211. goto frontend_detach;
  1212. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1213. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1214. }
  1215. }
  1216. break;
  1217. case CX88_BOARD_TEVII_S460:
  1218. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1219. &tevii_s460_config,
  1220. &core->i2c_adap);
  1221. if (fe0->dvb.frontend != NULL)
  1222. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1223. break;
  1224. case CX88_BOARD_OMICOM_SS4_PCI:
  1225. case CX88_BOARD_TBS_8920:
  1226. case CX88_BOARD_PROF_7300:
  1227. case CX88_BOARD_SATTRADE_ST4200:
  1228. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1229. &hauppauge_hvr4000_config,
  1230. &core->i2c_adap);
  1231. if (fe0->dvb.frontend != NULL)
  1232. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1233. break;
  1234. case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
  1235. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1236. &cx88_terratec_cinergy_ht_pci_mkii_config,
  1237. &core->i2c_adap);
  1238. if (fe0->dvb.frontend) {
  1239. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1240. if (attach_xc3028(0x61, dev) < 0)
  1241. goto frontend_detach;
  1242. }
  1243. break;
  1244. case CX88_BOARD_PROF_7301:{
  1245. struct dvb_tuner_ops *tuner_ops = NULL;
  1246. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  1247. &prof_7301_stv0900_config,
  1248. &core->i2c_adap, 0);
  1249. if (fe0->dvb.frontend != NULL) {
  1250. if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
  1251. &prof_7301_stb6100_config,
  1252. &core->i2c_adap))
  1253. goto frontend_detach;
  1254. tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
  1255. tuner_ops->set_frequency = stb6100_set_freq;
  1256. tuner_ops->get_frequency = stb6100_get_freq;
  1257. tuner_ops->set_bandwidth = stb6100_set_bandw;
  1258. tuner_ops->get_bandwidth = stb6100_get_bandw;
  1259. core->prev_set_voltage =
  1260. fe0->dvb.frontend->ops.set_voltage;
  1261. fe0->dvb.frontend->ops.set_voltage =
  1262. tevii_dvbs_set_voltage;
  1263. }
  1264. break;
  1265. }
  1266. case CX88_BOARD_SAMSUNG_SMT_7020:
  1267. dev->ts_gen_cntrl = 0x08;
  1268. cx_set(MO_GP0_IO, 0x0101);
  1269. cx_clear(MO_GP0_IO, 0x01);
  1270. mdelay(100);
  1271. cx_set(MO_GP0_IO, 0x01);
  1272. mdelay(200);
  1273. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1274. &samsung_stv0299_config,
  1275. &dev->core->i2c_adap);
  1276. if (fe0->dvb.frontend) {
  1277. fe0->dvb.frontend->ops.tuner_ops.set_params =
  1278. samsung_smt_7020_tuner_set_params;
  1279. fe0->dvb.frontend->tuner_priv =
  1280. &dev->core->i2c_adap;
  1281. fe0->dvb.frontend->ops.set_voltage =
  1282. samsung_smt_7020_set_voltage;
  1283. fe0->dvb.frontend->ops.set_tone =
  1284. samsung_smt_7020_set_tone;
  1285. }
  1286. break;
  1287. case CX88_BOARD_TWINHAN_VP1027_DVBS:
  1288. dev->ts_gen_cntrl = 0x00;
  1289. fe0->dvb.frontend = dvb_attach(mb86a16_attach,
  1290. &twinhan_vp1027,
  1291. &core->i2c_adap);
  1292. if (fe0->dvb.frontend) {
  1293. core->prev_set_voltage =
  1294. fe0->dvb.frontend->ops.set_voltage;
  1295. fe0->dvb.frontend->ops.set_voltage =
  1296. vp1027_set_voltage;
  1297. }
  1298. break;
  1299. default:
  1300. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  1301. core->name);
  1302. break;
  1303. }
  1304. if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
  1305. printk(KERN_ERR
  1306. "%s/2: frontend initialization failed\n",
  1307. core->name);
  1308. goto frontend_detach;
  1309. }
  1310. /* define general-purpose callback pointer */
  1311. fe0->dvb.frontend->callback = cx88_tuner_callback;
  1312. /* Ensure all frontends negotiate bus access */
  1313. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1314. if (fe1)
  1315. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1316. /* Put the analog decoder in standby to keep it quiet */
  1317. call_all(core, core, s_power, 0);
  1318. /* register everything */
  1319. return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  1320. &dev->pci->dev, adapter_nr, mfe_shared, NULL);
  1321. frontend_detach:
  1322. core->gate_ctrl = NULL;
  1323. videobuf_dvb_dealloc_frontends(&dev->frontends);
  1324. return -EINVAL;
  1325. }
  1326. /* ----------------------------------------------------------- */
  1327. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1328. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1329. {
  1330. struct cx88_core *core = drv->core;
  1331. int err = 0;
  1332. dprintk( 1, "%s\n", __func__);
  1333. switch (core->boardnr) {
  1334. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1335. /* We arrive here with either the cx23416 or the cx22702
  1336. * on the bus. Take the bus from the cx23416 and enable the
  1337. * cx22702 demod
  1338. */
  1339. /* Toggle reset on cx22702 leaving i2c active */
  1340. cx_set(MO_GP0_IO, 0x00000080);
  1341. udelay(1000);
  1342. cx_clear(MO_GP0_IO, 0x00000080);
  1343. udelay(50);
  1344. cx_set(MO_GP0_IO, 0x00000080);
  1345. udelay(1000);
  1346. /* enable the cx22702 pins */
  1347. cx_clear(MO_GP0_IO, 0x00000004);
  1348. udelay(1000);
  1349. break;
  1350. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1351. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1352. /* Toggle reset on cx22702 leaving i2c active */
  1353. cx_set(MO_GP0_IO, 0x00000080);
  1354. udelay(1000);
  1355. cx_clear(MO_GP0_IO, 0x00000080);
  1356. udelay(50);
  1357. cx_set(MO_GP0_IO, 0x00000080);
  1358. udelay(1000);
  1359. switch (core->dvbdev->frontends.active_fe_id) {
  1360. case 1: /* DVB-S/S2 Enabled */
  1361. /* tri-state the cx22702 pins */
  1362. cx_set(MO_GP0_IO, 0x00000004);
  1363. /* Take the cx24116/cx24123 out of reset */
  1364. cx_write(MO_SRST_IO, 1);
  1365. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1366. break;
  1367. case 2: /* DVB-T Enabled */
  1368. /* Put the cx24116/cx24123 into reset */
  1369. cx_write(MO_SRST_IO, 0);
  1370. /* enable the cx22702 pins */
  1371. cx_clear(MO_GP0_IO, 0x00000004);
  1372. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1373. break;
  1374. }
  1375. udelay(1000);
  1376. break;
  1377. default:
  1378. err = -ENODEV;
  1379. }
  1380. return err;
  1381. }
  1382. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1383. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1384. {
  1385. struct cx88_core *core = drv->core;
  1386. int err = 0;
  1387. dprintk( 1, "%s\n", __func__);
  1388. switch (core->boardnr) {
  1389. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1390. /* Do Nothing, leave the cx22702 on the bus. */
  1391. break;
  1392. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1393. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1394. break;
  1395. default:
  1396. err = -ENODEV;
  1397. }
  1398. return err;
  1399. }
  1400. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1401. {
  1402. struct cx88_core *core = drv->core;
  1403. struct cx8802_dev *dev = drv->core->dvbdev;
  1404. int err;
  1405. struct videobuf_dvb_frontend *fe;
  1406. int i;
  1407. dprintk( 1, "%s\n", __func__);
  1408. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1409. core->boardnr,
  1410. core->name,
  1411. core->pci_bus,
  1412. core->pci_slot);
  1413. err = -ENODEV;
  1414. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1415. goto fail_core;
  1416. /* If vp3054 isn't enabled, a stub will just return 0 */
  1417. err = vp3054_i2c_probe(dev);
  1418. if (0 != err)
  1419. goto fail_core;
  1420. /* dvb stuff */
  1421. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  1422. dev->ts_gen_cntrl = 0x0c;
  1423. err = cx8802_alloc_frontends(dev);
  1424. if (err)
  1425. goto fail_core;
  1426. err = -ENODEV;
  1427. for (i = 1; i <= core->board.num_frontends; i++) {
  1428. fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
  1429. if (fe == NULL) {
  1430. printk(KERN_ERR "%s() failed to get frontend(%d)\n",
  1431. __func__, i);
  1432. goto fail_probe;
  1433. }
  1434. videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
  1435. &dev->pci->dev, &dev->slock,
  1436. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  1437. V4L2_FIELD_TOP,
  1438. sizeof(struct cx88_buffer),
  1439. dev, NULL);
  1440. /* init struct videobuf_dvb */
  1441. fe->dvb.name = dev->core->name;
  1442. }
  1443. err = dvb_register(dev);
  1444. if (err)
  1445. /* frontends/adapter de-allocated in dvb_register */
  1446. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  1447. core->name, err);
  1448. return err;
  1449. fail_probe:
  1450. videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends);
  1451. fail_core:
  1452. return err;
  1453. }
  1454. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1455. {
  1456. struct cx88_core *core = drv->core;
  1457. struct cx8802_dev *dev = drv->core->dvbdev;
  1458. dprintk( 1, "%s\n", __func__);
  1459. videobuf_dvb_unregister_bus(&dev->frontends);
  1460. vp3054_i2c_remove(dev);
  1461. core->gate_ctrl = NULL;
  1462. return 0;
  1463. }
  1464. static struct cx8802_driver cx8802_dvb_driver = {
  1465. .type_id = CX88_MPEG_DVB,
  1466. .hw_access = CX8802_DRVCTL_SHARED,
  1467. .probe = cx8802_dvb_probe,
  1468. .remove = cx8802_dvb_remove,
  1469. .advise_acquire = cx8802_dvb_advise_acquire,
  1470. .advise_release = cx8802_dvb_advise_release,
  1471. };
  1472. static int __init dvb_init(void)
  1473. {
  1474. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  1475. (CX88_VERSION_CODE >> 16) & 0xff,
  1476. (CX88_VERSION_CODE >> 8) & 0xff,
  1477. CX88_VERSION_CODE & 0xff);
  1478. #ifdef SNAPSHOT
  1479. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  1480. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  1481. #endif
  1482. return cx8802_register_driver(&cx8802_dvb_driver);
  1483. }
  1484. static void __exit dvb_fini(void)
  1485. {
  1486. cx8802_unregister_driver(&cx8802_dvb_driver);
  1487. }
  1488. module_init(dvb_init);
  1489. module_exit(dvb_fini);
  1490. /*
  1491. * Local variables:
  1492. * c-basic-offset: 8
  1493. * compile-command: "make DVB=1"
  1494. * End:
  1495. */