qdio_main.c 40 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689
  1. /*
  2. * linux/drivers/s390/cio/qdio_main.c
  3. *
  4. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  5. *
  6. * Copyright 2000,2008 IBM Corp.
  7. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  8. * Jan Glauber <jang@linux.vnet.ibm.com>
  9. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/timer.h>
  15. #include <linux/delay.h>
  16. #include <linux/gfp.h>
  17. #include <linux/kernel_stat.h>
  18. #include <asm/atomic.h>
  19. #include <asm/debug.h>
  20. #include <asm/qdio.h>
  21. #include "cio.h"
  22. #include "css.h"
  23. #include "device.h"
  24. #include "qdio.h"
  25. #include "qdio_debug.h"
  26. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  27. "Jan Glauber <jang@linux.vnet.ibm.com>");
  28. MODULE_DESCRIPTION("QDIO base support");
  29. MODULE_LICENSE("GPL");
  30. static inline int do_siga_sync(unsigned long schid,
  31. unsigned int out_mask, unsigned int in_mask,
  32. unsigned int fc)
  33. {
  34. register unsigned long __fc asm ("0") = fc;
  35. register unsigned long __schid asm ("1") = schid;
  36. register unsigned long out asm ("2") = out_mask;
  37. register unsigned long in asm ("3") = in_mask;
  38. int cc;
  39. asm volatile(
  40. " siga 0\n"
  41. " ipm %0\n"
  42. " srl %0,28\n"
  43. : "=d" (cc)
  44. : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
  45. return cc;
  46. }
  47. static inline int do_siga_input(unsigned long schid, unsigned int mask,
  48. unsigned int fc)
  49. {
  50. register unsigned long __fc asm ("0") = fc;
  51. register unsigned long __schid asm ("1") = schid;
  52. register unsigned long __mask asm ("2") = mask;
  53. int cc;
  54. asm volatile(
  55. " siga 0\n"
  56. " ipm %0\n"
  57. " srl %0,28\n"
  58. : "=d" (cc)
  59. : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory");
  60. return cc;
  61. }
  62. /**
  63. * do_siga_output - perform SIGA-w/wt function
  64. * @schid: subchannel id or in case of QEBSM the subchannel token
  65. * @mask: which output queues to process
  66. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  67. * @fc: function code to perform
  68. *
  69. * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION.
  70. * Note: For IQDC unicast queues only the highest priority queue is processed.
  71. */
  72. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  73. unsigned int *bb, unsigned int fc)
  74. {
  75. register unsigned long __fc asm("0") = fc;
  76. register unsigned long __schid asm("1") = schid;
  77. register unsigned long __mask asm("2") = mask;
  78. int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION;
  79. asm volatile(
  80. " siga 0\n"
  81. "0: ipm %0\n"
  82. " srl %0,28\n"
  83. "1:\n"
  84. EX_TABLE(0b, 1b)
  85. : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask)
  86. : : "cc", "memory");
  87. *bb = ((unsigned int) __fc) >> 31;
  88. return cc;
  89. }
  90. static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
  91. {
  92. /* all done or next buffer state different */
  93. if (ccq == 0 || ccq == 32)
  94. return 0;
  95. /* not all buffers processed */
  96. if (ccq == 96 || ccq == 97)
  97. return 1;
  98. /* notify devices immediately */
  99. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  100. return -EIO;
  101. }
  102. /**
  103. * qdio_do_eqbs - extract buffer states for QEBSM
  104. * @q: queue to manipulate
  105. * @state: state of the extracted buffers
  106. * @start: buffer number to start at
  107. * @count: count of buffers to examine
  108. * @auto_ack: automatically acknowledge buffers
  109. *
  110. * Returns the number of successfully extracted equal buffer states.
  111. * Stops processing if a state is different from the last buffers state.
  112. */
  113. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  114. int start, int count, int auto_ack)
  115. {
  116. unsigned int ccq = 0;
  117. int tmp_count = count, tmp_start = start;
  118. int nr = q->nr;
  119. int rc;
  120. BUG_ON(!q->irq_ptr->sch_token);
  121. qperf_inc(q, eqbs);
  122. if (!q->is_input_q)
  123. nr += q->irq_ptr->nr_input_qs;
  124. again:
  125. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  126. auto_ack);
  127. rc = qdio_check_ccq(q, ccq);
  128. /* At least one buffer was processed, return and extract the remaining
  129. * buffers later.
  130. */
  131. if ((ccq == 96) && (count != tmp_count)) {
  132. qperf_inc(q, eqbs_partial);
  133. return (count - tmp_count);
  134. }
  135. if (rc == 1) {
  136. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  137. goto again;
  138. }
  139. if (rc < 0) {
  140. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  141. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  142. q->handler(q->irq_ptr->cdev,
  143. QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  144. 0, -1, -1, q->irq_ptr->int_parm);
  145. return 0;
  146. }
  147. return count - tmp_count;
  148. }
  149. /**
  150. * qdio_do_sqbs - set buffer states for QEBSM
  151. * @q: queue to manipulate
  152. * @state: new state of the buffers
  153. * @start: first buffer number to change
  154. * @count: how many buffers to change
  155. *
  156. * Returns the number of successfully changed buffers.
  157. * Does retrying until the specified count of buffer states is set or an
  158. * error occurs.
  159. */
  160. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  161. int count)
  162. {
  163. unsigned int ccq = 0;
  164. int tmp_count = count, tmp_start = start;
  165. int nr = q->nr;
  166. int rc;
  167. if (!count)
  168. return 0;
  169. BUG_ON(!q->irq_ptr->sch_token);
  170. qperf_inc(q, sqbs);
  171. if (!q->is_input_q)
  172. nr += q->irq_ptr->nr_input_qs;
  173. again:
  174. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  175. rc = qdio_check_ccq(q, ccq);
  176. if (rc == 1) {
  177. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  178. qperf_inc(q, sqbs_partial);
  179. goto again;
  180. }
  181. if (rc < 0) {
  182. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  183. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  184. q->handler(q->irq_ptr->cdev,
  185. QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  186. 0, -1, -1, q->irq_ptr->int_parm);
  187. return 0;
  188. }
  189. WARN_ON(tmp_count);
  190. return count - tmp_count;
  191. }
  192. /* returns number of examined buffers and their common state in *state */
  193. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  194. unsigned char *state, unsigned int count,
  195. int auto_ack)
  196. {
  197. unsigned char __state = 0;
  198. int i;
  199. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  200. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  201. if (is_qebsm(q))
  202. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  203. for (i = 0; i < count; i++) {
  204. if (!__state)
  205. __state = q->slsb.val[bufnr];
  206. else if (q->slsb.val[bufnr] != __state)
  207. break;
  208. bufnr = next_buf(bufnr);
  209. }
  210. *state = __state;
  211. return i;
  212. }
  213. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  214. unsigned char *state, int auto_ack)
  215. {
  216. return get_buf_states(q, bufnr, state, 1, auto_ack);
  217. }
  218. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  219. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  220. unsigned char state, int count)
  221. {
  222. int i;
  223. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  224. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  225. if (is_qebsm(q))
  226. return qdio_do_sqbs(q, state, bufnr, count);
  227. for (i = 0; i < count; i++) {
  228. xchg(&q->slsb.val[bufnr], state);
  229. bufnr = next_buf(bufnr);
  230. }
  231. return count;
  232. }
  233. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  234. unsigned char state)
  235. {
  236. return set_buf_states(q, bufnr, state, 1);
  237. }
  238. /* set slsb states to initial state */
  239. void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  240. {
  241. struct qdio_q *q;
  242. int i;
  243. for_each_input_queue(irq_ptr, q, i)
  244. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  245. QDIO_MAX_BUFFERS_PER_Q);
  246. for_each_output_queue(irq_ptr, q, i)
  247. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  248. QDIO_MAX_BUFFERS_PER_Q);
  249. }
  250. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  251. unsigned int input)
  252. {
  253. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  254. unsigned int fc = QDIO_SIGA_SYNC;
  255. int cc;
  256. if (!need_siga_sync(q))
  257. return 0;
  258. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  259. qperf_inc(q, siga_sync);
  260. if (is_qebsm(q)) {
  261. schid = q->irq_ptr->sch_token;
  262. fc |= QDIO_SIGA_QEBSM_FLAG;
  263. }
  264. cc = do_siga_sync(schid, output, input, fc);
  265. if (unlikely(cc))
  266. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  267. return cc;
  268. }
  269. static inline int qdio_siga_sync_q(struct qdio_q *q)
  270. {
  271. if (q->is_input_q)
  272. return qdio_siga_sync(q, 0, q->mask);
  273. else
  274. return qdio_siga_sync(q, q->mask, 0);
  275. }
  276. static inline int qdio_siga_sync_out(struct qdio_q *q)
  277. {
  278. return qdio_siga_sync(q, ~0U, 0);
  279. }
  280. static inline int qdio_siga_sync_all(struct qdio_q *q)
  281. {
  282. return qdio_siga_sync(q, ~0U, ~0U);
  283. }
  284. static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit)
  285. {
  286. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  287. unsigned int fc = QDIO_SIGA_WRITE;
  288. u64 start_time = 0;
  289. int cc;
  290. if (is_qebsm(q)) {
  291. schid = q->irq_ptr->sch_token;
  292. fc |= QDIO_SIGA_QEBSM_FLAG;
  293. }
  294. again:
  295. cc = do_siga_output(schid, q->mask, busy_bit, fc);
  296. /* hipersocket busy condition */
  297. if (unlikely(*busy_bit)) {
  298. WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2);
  299. if (!start_time) {
  300. start_time = get_clock();
  301. goto again;
  302. }
  303. if ((get_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE)
  304. goto again;
  305. }
  306. return cc;
  307. }
  308. static inline int qdio_siga_input(struct qdio_q *q)
  309. {
  310. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  311. unsigned int fc = QDIO_SIGA_READ;
  312. int cc;
  313. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  314. qperf_inc(q, siga_read);
  315. if (is_qebsm(q)) {
  316. schid = q->irq_ptr->sch_token;
  317. fc |= QDIO_SIGA_QEBSM_FLAG;
  318. }
  319. cc = do_siga_input(schid, q->mask, fc);
  320. if (unlikely(cc))
  321. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  322. return cc;
  323. }
  324. static inline void qdio_sync_after_thinint(struct qdio_q *q)
  325. {
  326. if (pci_out_supported(q)) {
  327. if (need_siga_sync_thinint(q))
  328. qdio_siga_sync_all(q);
  329. else if (need_siga_sync_out_thinint(q))
  330. qdio_siga_sync_out(q);
  331. } else
  332. qdio_siga_sync_q(q);
  333. }
  334. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  335. unsigned char *state)
  336. {
  337. qdio_siga_sync_q(q);
  338. return get_buf_states(q, bufnr, state, 1, 0);
  339. }
  340. static inline void qdio_stop_polling(struct qdio_q *q)
  341. {
  342. if (!q->u.in.polling)
  343. return;
  344. q->u.in.polling = 0;
  345. qperf_inc(q, stop_polling);
  346. /* show the card that we are not polling anymore */
  347. if (is_qebsm(q)) {
  348. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  349. q->u.in.ack_count);
  350. q->u.in.ack_count = 0;
  351. } else
  352. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  353. }
  354. static inline void account_sbals(struct qdio_q *q, int count)
  355. {
  356. int pos = 0;
  357. q->q_stats.nr_sbal_total += count;
  358. if (count == QDIO_MAX_BUFFERS_MASK) {
  359. q->q_stats.nr_sbals[7]++;
  360. return;
  361. }
  362. while (count >>= 1)
  363. pos++;
  364. q->q_stats.nr_sbals[pos]++;
  365. }
  366. static void announce_buffer_error(struct qdio_q *q, int count)
  367. {
  368. q->qdio_error |= QDIO_ERROR_SLSB_STATE;
  369. /* special handling for no target buffer empty */
  370. if ((!q->is_input_q &&
  371. (q->sbal[q->first_to_check]->element[15].flags & 0xff) == 0x10)) {
  372. qperf_inc(q, target_full);
  373. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
  374. q->first_to_check);
  375. return;
  376. }
  377. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  378. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  379. DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
  380. DBF_ERROR("F14:%2x F15:%2x",
  381. q->sbal[q->first_to_check]->element[14].flags & 0xff,
  382. q->sbal[q->first_to_check]->element[15].flags & 0xff);
  383. }
  384. static inline void inbound_primed(struct qdio_q *q, int count)
  385. {
  386. int new;
  387. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count);
  388. /* for QEBSM the ACK was already set by EQBS */
  389. if (is_qebsm(q)) {
  390. if (!q->u.in.polling) {
  391. q->u.in.polling = 1;
  392. q->u.in.ack_count = count;
  393. q->u.in.ack_start = q->first_to_check;
  394. return;
  395. }
  396. /* delete the previous ACK's */
  397. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  398. q->u.in.ack_count);
  399. q->u.in.ack_count = count;
  400. q->u.in.ack_start = q->first_to_check;
  401. return;
  402. }
  403. /*
  404. * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
  405. * or by the next inbound run.
  406. */
  407. new = add_buf(q->first_to_check, count - 1);
  408. if (q->u.in.polling) {
  409. /* reset the previous ACK but first set the new one */
  410. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  411. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  412. } else {
  413. q->u.in.polling = 1;
  414. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  415. }
  416. q->u.in.ack_start = new;
  417. count--;
  418. if (!count)
  419. return;
  420. /* need to change ALL buffers to get more interrupts */
  421. set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
  422. }
  423. static int get_inbound_buffer_frontier(struct qdio_q *q)
  424. {
  425. int count, stop;
  426. unsigned char state;
  427. /*
  428. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  429. * would return 0.
  430. */
  431. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  432. stop = add_buf(q->first_to_check, count);
  433. if (q->first_to_check == stop)
  434. goto out;
  435. /*
  436. * No siga sync here, as a PCI or we after a thin interrupt
  437. * already sync'ed the queues.
  438. */
  439. count = get_buf_states(q, q->first_to_check, &state, count, 1);
  440. if (!count)
  441. goto out;
  442. switch (state) {
  443. case SLSB_P_INPUT_PRIMED:
  444. inbound_primed(q, count);
  445. q->first_to_check = add_buf(q->first_to_check, count);
  446. if (atomic_sub(count, &q->nr_buf_used) == 0)
  447. qperf_inc(q, inbound_queue_full);
  448. if (q->irq_ptr->perf_stat_enabled)
  449. account_sbals(q, count);
  450. break;
  451. case SLSB_P_INPUT_ERROR:
  452. announce_buffer_error(q, count);
  453. /* process the buffer, the upper layer will take care of it */
  454. q->first_to_check = add_buf(q->first_to_check, count);
  455. atomic_sub(count, &q->nr_buf_used);
  456. if (q->irq_ptr->perf_stat_enabled)
  457. account_sbals_error(q, count);
  458. break;
  459. case SLSB_CU_INPUT_EMPTY:
  460. case SLSB_P_INPUT_NOT_INIT:
  461. case SLSB_P_INPUT_ACK:
  462. if (q->irq_ptr->perf_stat_enabled)
  463. q->q_stats.nr_sbal_nop++;
  464. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
  465. break;
  466. default:
  467. BUG();
  468. }
  469. out:
  470. return q->first_to_check;
  471. }
  472. static int qdio_inbound_q_moved(struct qdio_q *q)
  473. {
  474. int bufnr;
  475. bufnr = get_inbound_buffer_frontier(q);
  476. if ((bufnr != q->last_move) || q->qdio_error) {
  477. q->last_move = bufnr;
  478. if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
  479. q->u.in.timestamp = get_clock();
  480. return 1;
  481. } else
  482. return 0;
  483. }
  484. static inline int qdio_inbound_q_done(struct qdio_q *q)
  485. {
  486. unsigned char state = 0;
  487. if (!atomic_read(&q->nr_buf_used))
  488. return 1;
  489. qdio_siga_sync_q(q);
  490. get_buf_state(q, q->first_to_check, &state, 0);
  491. if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
  492. /* more work coming */
  493. return 0;
  494. if (is_thinint_irq(q->irq_ptr))
  495. return 1;
  496. /* don't poll under z/VM */
  497. if (MACHINE_IS_VM)
  498. return 1;
  499. /*
  500. * At this point we know, that inbound first_to_check
  501. * has (probably) not moved (see qdio_inbound_processing).
  502. */
  503. if (get_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
  504. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
  505. q->first_to_check);
  506. return 1;
  507. } else
  508. return 0;
  509. }
  510. static void qdio_kick_handler(struct qdio_q *q)
  511. {
  512. int start = q->first_to_kick;
  513. int end = q->first_to_check;
  514. int count;
  515. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  516. return;
  517. count = sub_buf(end, start);
  518. if (q->is_input_q) {
  519. qperf_inc(q, inbound_handler);
  520. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
  521. } else {
  522. qperf_inc(q, outbound_handler);
  523. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
  524. start, count);
  525. }
  526. q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
  527. q->irq_ptr->int_parm);
  528. /* for the next time */
  529. q->first_to_kick = end;
  530. q->qdio_error = 0;
  531. }
  532. static void __qdio_inbound_processing(struct qdio_q *q)
  533. {
  534. qperf_inc(q, tasklet_inbound);
  535. if (!qdio_inbound_q_moved(q))
  536. return;
  537. qdio_kick_handler(q);
  538. if (!qdio_inbound_q_done(q)) {
  539. /* means poll time is not yet over */
  540. qperf_inc(q, tasklet_inbound_resched);
  541. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  542. tasklet_schedule(&q->tasklet);
  543. return;
  544. }
  545. }
  546. qdio_stop_polling(q);
  547. /*
  548. * We need to check again to not lose initiative after
  549. * resetting the ACK state.
  550. */
  551. if (!qdio_inbound_q_done(q)) {
  552. qperf_inc(q, tasklet_inbound_resched2);
  553. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  554. tasklet_schedule(&q->tasklet);
  555. }
  556. }
  557. void qdio_inbound_processing(unsigned long data)
  558. {
  559. struct qdio_q *q = (struct qdio_q *)data;
  560. __qdio_inbound_processing(q);
  561. }
  562. static int get_outbound_buffer_frontier(struct qdio_q *q)
  563. {
  564. int count, stop;
  565. unsigned char state;
  566. if (((queue_type(q) != QDIO_IQDIO_QFMT) && !pci_out_supported(q)) ||
  567. (queue_type(q) == QDIO_IQDIO_QFMT && multicast_outbound(q)))
  568. qdio_siga_sync_q(q);
  569. /*
  570. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  571. * would return 0.
  572. */
  573. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  574. stop = add_buf(q->first_to_check, count);
  575. if (q->first_to_check == stop)
  576. return q->first_to_check;
  577. count = get_buf_states(q, q->first_to_check, &state, count, 0);
  578. if (!count)
  579. return q->first_to_check;
  580. switch (state) {
  581. case SLSB_P_OUTPUT_EMPTY:
  582. /* the adapter got it */
  583. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out empty:%1d %02x", q->nr, count);
  584. atomic_sub(count, &q->nr_buf_used);
  585. q->first_to_check = add_buf(q->first_to_check, count);
  586. if (q->irq_ptr->perf_stat_enabled)
  587. account_sbals(q, count);
  588. break;
  589. case SLSB_P_OUTPUT_ERROR:
  590. announce_buffer_error(q, count);
  591. /* process the buffer, the upper layer will take care of it */
  592. q->first_to_check = add_buf(q->first_to_check, count);
  593. atomic_sub(count, &q->nr_buf_used);
  594. if (q->irq_ptr->perf_stat_enabled)
  595. account_sbals_error(q, count);
  596. break;
  597. case SLSB_CU_OUTPUT_PRIMED:
  598. /* the adapter has not fetched the output yet */
  599. if (q->irq_ptr->perf_stat_enabled)
  600. q->q_stats.nr_sbal_nop++;
  601. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d", q->nr);
  602. break;
  603. case SLSB_P_OUTPUT_NOT_INIT:
  604. case SLSB_P_OUTPUT_HALTED:
  605. break;
  606. default:
  607. BUG();
  608. }
  609. return q->first_to_check;
  610. }
  611. /* all buffers processed? */
  612. static inline int qdio_outbound_q_done(struct qdio_q *q)
  613. {
  614. return atomic_read(&q->nr_buf_used) == 0;
  615. }
  616. static inline int qdio_outbound_q_moved(struct qdio_q *q)
  617. {
  618. int bufnr;
  619. bufnr = get_outbound_buffer_frontier(q);
  620. if ((bufnr != q->last_move) || q->qdio_error) {
  621. q->last_move = bufnr;
  622. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
  623. return 1;
  624. } else
  625. return 0;
  626. }
  627. static int qdio_kick_outbound_q(struct qdio_q *q)
  628. {
  629. unsigned int busy_bit;
  630. int cc;
  631. if (!need_siga_out(q))
  632. return 0;
  633. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  634. qperf_inc(q, siga_write);
  635. cc = qdio_siga_output(q, &busy_bit);
  636. switch (cc) {
  637. case 0:
  638. break;
  639. case 2:
  640. if (busy_bit) {
  641. DBF_ERROR("%4x cc2 REP:%1d", SCH_NO(q), q->nr);
  642. cc |= QDIO_ERROR_SIGA_BUSY;
  643. } else
  644. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  645. break;
  646. case 1:
  647. case 3:
  648. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  649. break;
  650. }
  651. return cc;
  652. }
  653. static void __qdio_outbound_processing(struct qdio_q *q)
  654. {
  655. qperf_inc(q, tasklet_outbound);
  656. BUG_ON(atomic_read(&q->nr_buf_used) < 0);
  657. if (qdio_outbound_q_moved(q))
  658. qdio_kick_handler(q);
  659. if (queue_type(q) == QDIO_ZFCP_QFMT)
  660. if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
  661. goto sched;
  662. /* bail out for HiperSockets unicast queues */
  663. if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q))
  664. return;
  665. if ((queue_type(q) == QDIO_IQDIO_QFMT) &&
  666. (atomic_read(&q->nr_buf_used)) > QDIO_IQDIO_POLL_LVL)
  667. goto sched;
  668. if (q->u.out.pci_out_enabled)
  669. return;
  670. /*
  671. * Now we know that queue type is either qeth without pci enabled
  672. * or HiperSockets multicast. Make sure buffer switch from PRIMED to
  673. * EMPTY is noticed and outbound_handler is called after some time.
  674. */
  675. if (qdio_outbound_q_done(q))
  676. del_timer(&q->u.out.timer);
  677. else
  678. if (!timer_pending(&q->u.out.timer))
  679. mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
  680. return;
  681. sched:
  682. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  683. return;
  684. tasklet_schedule(&q->tasklet);
  685. }
  686. /* outbound tasklet */
  687. void qdio_outbound_processing(unsigned long data)
  688. {
  689. struct qdio_q *q = (struct qdio_q *)data;
  690. __qdio_outbound_processing(q);
  691. }
  692. void qdio_outbound_timer(unsigned long data)
  693. {
  694. struct qdio_q *q = (struct qdio_q *)data;
  695. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  696. return;
  697. tasklet_schedule(&q->tasklet);
  698. }
  699. static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
  700. {
  701. struct qdio_q *out;
  702. int i;
  703. if (!pci_out_supported(q))
  704. return;
  705. for_each_output_queue(q->irq_ptr, out, i)
  706. if (!qdio_outbound_q_done(out))
  707. tasklet_schedule(&out->tasklet);
  708. }
  709. static void __tiqdio_inbound_processing(struct qdio_q *q)
  710. {
  711. qperf_inc(q, tasklet_inbound);
  712. qdio_sync_after_thinint(q);
  713. /*
  714. * The interrupt could be caused by a PCI request. Check the
  715. * PCI capable outbound queues.
  716. */
  717. qdio_check_outbound_after_thinint(q);
  718. if (!qdio_inbound_q_moved(q))
  719. return;
  720. qdio_kick_handler(q);
  721. if (!qdio_inbound_q_done(q)) {
  722. qperf_inc(q, tasklet_inbound_resched);
  723. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  724. tasklet_schedule(&q->tasklet);
  725. return;
  726. }
  727. }
  728. qdio_stop_polling(q);
  729. /*
  730. * We need to check again to not lose initiative after
  731. * resetting the ACK state.
  732. */
  733. if (!qdio_inbound_q_done(q)) {
  734. qperf_inc(q, tasklet_inbound_resched2);
  735. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  736. tasklet_schedule(&q->tasklet);
  737. }
  738. }
  739. void tiqdio_inbound_processing(unsigned long data)
  740. {
  741. struct qdio_q *q = (struct qdio_q *)data;
  742. __tiqdio_inbound_processing(q);
  743. }
  744. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  745. enum qdio_irq_states state)
  746. {
  747. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  748. irq_ptr->state = state;
  749. mb();
  750. }
  751. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  752. {
  753. if (irb->esw.esw0.erw.cons) {
  754. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  755. DBF_ERROR_HEX(irb, 64);
  756. DBF_ERROR_HEX(irb->ecw, 64);
  757. }
  758. }
  759. /* PCI interrupt handler */
  760. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  761. {
  762. int i;
  763. struct qdio_q *q;
  764. if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  765. return;
  766. for_each_input_queue(irq_ptr, q, i) {
  767. if (q->u.in.queue_start_poll) {
  768. /* skip if polling is enabled or already in work */
  769. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  770. &q->u.in.queue_irq_state)) {
  771. qperf_inc(q, int_discarded);
  772. continue;
  773. }
  774. q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
  775. q->irq_ptr->int_parm);
  776. } else
  777. tasklet_schedule(&q->tasklet);
  778. }
  779. if (!(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED))
  780. return;
  781. for_each_output_queue(irq_ptr, q, i) {
  782. if (qdio_outbound_q_done(q))
  783. continue;
  784. if (!siga_syncs_out_pci(q))
  785. qdio_siga_sync_q(q);
  786. tasklet_schedule(&q->tasklet);
  787. }
  788. }
  789. static void qdio_handle_activate_check(struct ccw_device *cdev,
  790. unsigned long intparm, int cstat, int dstat)
  791. {
  792. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  793. struct qdio_q *q;
  794. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  795. DBF_ERROR("intp :%lx", intparm);
  796. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  797. if (irq_ptr->nr_input_qs) {
  798. q = irq_ptr->input_qs[0];
  799. } else if (irq_ptr->nr_output_qs) {
  800. q = irq_ptr->output_qs[0];
  801. } else {
  802. dump_stack();
  803. goto no_handler;
  804. }
  805. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  806. 0, -1, -1, irq_ptr->int_parm);
  807. no_handler:
  808. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  809. }
  810. static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
  811. int dstat)
  812. {
  813. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  814. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  815. if (cstat)
  816. goto error;
  817. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  818. goto error;
  819. if (!(dstat & DEV_STAT_DEV_END))
  820. goto error;
  821. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  822. return;
  823. error:
  824. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  825. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  826. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  827. }
  828. /* qdio interrupt handler */
  829. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  830. struct irb *irb)
  831. {
  832. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  833. int cstat, dstat;
  834. if (!intparm || !irq_ptr) {
  835. DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
  836. return;
  837. }
  838. kstat_cpu(smp_processor_id()).irqs[IOINT_QDI]++;
  839. if (irq_ptr->perf_stat_enabled)
  840. irq_ptr->perf_stat.qdio_int++;
  841. if (IS_ERR(irb)) {
  842. switch (PTR_ERR(irb)) {
  843. case -EIO:
  844. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  845. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  846. wake_up(&cdev->private->wait_q);
  847. return;
  848. default:
  849. WARN_ON(1);
  850. return;
  851. }
  852. }
  853. qdio_irq_check_sense(irq_ptr, irb);
  854. cstat = irb->scsw.cmd.cstat;
  855. dstat = irb->scsw.cmd.dstat;
  856. switch (irq_ptr->state) {
  857. case QDIO_IRQ_STATE_INACTIVE:
  858. qdio_establish_handle_irq(cdev, cstat, dstat);
  859. break;
  860. case QDIO_IRQ_STATE_CLEANUP:
  861. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  862. break;
  863. case QDIO_IRQ_STATE_ESTABLISHED:
  864. case QDIO_IRQ_STATE_ACTIVE:
  865. if (cstat & SCHN_STAT_PCI) {
  866. qdio_int_handler_pci(irq_ptr);
  867. return;
  868. }
  869. if (cstat || dstat)
  870. qdio_handle_activate_check(cdev, intparm, cstat,
  871. dstat);
  872. break;
  873. case QDIO_IRQ_STATE_STOPPED:
  874. break;
  875. default:
  876. WARN_ON(1);
  877. }
  878. wake_up(&cdev->private->wait_q);
  879. }
  880. /**
  881. * qdio_get_ssqd_desc - get qdio subchannel description
  882. * @cdev: ccw device to get description for
  883. * @data: where to store the ssqd
  884. *
  885. * Returns 0 or an error code. The results of the chsc are stored in the
  886. * specified structure.
  887. */
  888. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  889. struct qdio_ssqd_desc *data)
  890. {
  891. if (!cdev || !cdev->private)
  892. return -EINVAL;
  893. DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
  894. return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
  895. }
  896. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  897. static void qdio_shutdown_queues(struct ccw_device *cdev)
  898. {
  899. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  900. struct qdio_q *q;
  901. int i;
  902. for_each_input_queue(irq_ptr, q, i)
  903. tasklet_kill(&q->tasklet);
  904. for_each_output_queue(irq_ptr, q, i) {
  905. del_timer(&q->u.out.timer);
  906. tasklet_kill(&q->tasklet);
  907. }
  908. }
  909. /**
  910. * qdio_shutdown - shut down a qdio subchannel
  911. * @cdev: associated ccw device
  912. * @how: use halt or clear to shutdown
  913. */
  914. int qdio_shutdown(struct ccw_device *cdev, int how)
  915. {
  916. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  917. int rc;
  918. unsigned long flags;
  919. if (!irq_ptr)
  920. return -ENODEV;
  921. BUG_ON(irqs_disabled());
  922. DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
  923. mutex_lock(&irq_ptr->setup_mutex);
  924. /*
  925. * Subchannel was already shot down. We cannot prevent being called
  926. * twice since cio may trigger a shutdown asynchronously.
  927. */
  928. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  929. mutex_unlock(&irq_ptr->setup_mutex);
  930. return 0;
  931. }
  932. /*
  933. * Indicate that the device is going down. Scheduling the queue
  934. * tasklets is forbidden from here on.
  935. */
  936. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  937. tiqdio_remove_input_queues(irq_ptr);
  938. qdio_shutdown_queues(cdev);
  939. qdio_shutdown_debug_entries(irq_ptr, cdev);
  940. /* cleanup subchannel */
  941. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  942. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  943. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  944. else
  945. /* default behaviour is halt */
  946. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  947. if (rc) {
  948. DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
  949. DBF_ERROR("rc:%4d", rc);
  950. goto no_cleanup;
  951. }
  952. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
  953. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  954. wait_event_interruptible_timeout(cdev->private->wait_q,
  955. irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
  956. irq_ptr->state == QDIO_IRQ_STATE_ERR,
  957. 10 * HZ);
  958. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  959. no_cleanup:
  960. qdio_shutdown_thinint(irq_ptr);
  961. /* restore interrupt handler */
  962. if ((void *)cdev->handler == (void *)qdio_int_handler)
  963. cdev->handler = irq_ptr->orig_handler;
  964. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  965. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  966. mutex_unlock(&irq_ptr->setup_mutex);
  967. if (rc)
  968. return rc;
  969. return 0;
  970. }
  971. EXPORT_SYMBOL_GPL(qdio_shutdown);
  972. /**
  973. * qdio_free - free data structures for a qdio subchannel
  974. * @cdev: associated ccw device
  975. */
  976. int qdio_free(struct ccw_device *cdev)
  977. {
  978. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  979. if (!irq_ptr)
  980. return -ENODEV;
  981. DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
  982. mutex_lock(&irq_ptr->setup_mutex);
  983. if (irq_ptr->debug_area != NULL) {
  984. debug_unregister(irq_ptr->debug_area);
  985. irq_ptr->debug_area = NULL;
  986. }
  987. cdev->private->qdio_data = NULL;
  988. mutex_unlock(&irq_ptr->setup_mutex);
  989. qdio_release_memory(irq_ptr);
  990. return 0;
  991. }
  992. EXPORT_SYMBOL_GPL(qdio_free);
  993. /**
  994. * qdio_allocate - allocate qdio queues and associated data
  995. * @init_data: initialization data
  996. */
  997. int qdio_allocate(struct qdio_initialize *init_data)
  998. {
  999. struct qdio_irq *irq_ptr;
  1000. DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
  1001. if ((init_data->no_input_qs && !init_data->input_handler) ||
  1002. (init_data->no_output_qs && !init_data->output_handler))
  1003. return -EINVAL;
  1004. if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
  1005. (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
  1006. return -EINVAL;
  1007. if ((!init_data->input_sbal_addr_array) ||
  1008. (!init_data->output_sbal_addr_array))
  1009. return -EINVAL;
  1010. /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
  1011. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1012. if (!irq_ptr)
  1013. goto out_err;
  1014. mutex_init(&irq_ptr->setup_mutex);
  1015. qdio_allocate_dbf(init_data, irq_ptr);
  1016. /*
  1017. * Allocate a page for the chsc calls in qdio_establish.
  1018. * Must be pre-allocated since a zfcp recovery will call
  1019. * qdio_establish. In case of low memory and swap on a zfcp disk
  1020. * we may not be able to allocate memory otherwise.
  1021. */
  1022. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  1023. if (!irq_ptr->chsc_page)
  1024. goto out_rel;
  1025. /* qdr is used in ccw1.cda which is u32 */
  1026. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1027. if (!irq_ptr->qdr)
  1028. goto out_rel;
  1029. WARN_ON((unsigned long)irq_ptr->qdr & 0xfff);
  1030. if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
  1031. init_data->no_output_qs))
  1032. goto out_rel;
  1033. init_data->cdev->private->qdio_data = irq_ptr;
  1034. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1035. return 0;
  1036. out_rel:
  1037. qdio_release_memory(irq_ptr);
  1038. out_err:
  1039. return -ENOMEM;
  1040. }
  1041. EXPORT_SYMBOL_GPL(qdio_allocate);
  1042. /**
  1043. * qdio_establish - establish queues on a qdio subchannel
  1044. * @init_data: initialization data
  1045. */
  1046. int qdio_establish(struct qdio_initialize *init_data)
  1047. {
  1048. struct qdio_irq *irq_ptr;
  1049. struct ccw_device *cdev = init_data->cdev;
  1050. unsigned long saveflags;
  1051. int rc;
  1052. DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
  1053. irq_ptr = cdev->private->qdio_data;
  1054. if (!irq_ptr)
  1055. return -ENODEV;
  1056. if (cdev->private->state != DEV_STATE_ONLINE)
  1057. return -EINVAL;
  1058. mutex_lock(&irq_ptr->setup_mutex);
  1059. qdio_setup_irq(init_data);
  1060. rc = qdio_establish_thinint(irq_ptr);
  1061. if (rc) {
  1062. mutex_unlock(&irq_ptr->setup_mutex);
  1063. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1064. return rc;
  1065. }
  1066. /* establish q */
  1067. irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
  1068. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1069. irq_ptr->ccw.count = irq_ptr->equeue.count;
  1070. irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
  1071. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1072. ccw_device_set_options_mask(cdev, 0);
  1073. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  1074. if (rc) {
  1075. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  1076. DBF_ERROR("rc:%4x", rc);
  1077. }
  1078. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1079. if (rc) {
  1080. mutex_unlock(&irq_ptr->setup_mutex);
  1081. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1082. return rc;
  1083. }
  1084. wait_event_interruptible_timeout(cdev->private->wait_q,
  1085. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  1086. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  1087. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  1088. mutex_unlock(&irq_ptr->setup_mutex);
  1089. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1090. return -EIO;
  1091. }
  1092. qdio_setup_ssqd_info(irq_ptr);
  1093. DBF_EVENT("qib ac:%4x", irq_ptr->qib.ac);
  1094. /* qebsm is now setup if available, initialize buffer states */
  1095. qdio_init_buf_states(irq_ptr);
  1096. mutex_unlock(&irq_ptr->setup_mutex);
  1097. qdio_print_subchannel_info(irq_ptr, cdev);
  1098. qdio_setup_debug_entries(irq_ptr, cdev);
  1099. return 0;
  1100. }
  1101. EXPORT_SYMBOL_GPL(qdio_establish);
  1102. /**
  1103. * qdio_activate - activate queues on a qdio subchannel
  1104. * @cdev: associated cdev
  1105. */
  1106. int qdio_activate(struct ccw_device *cdev)
  1107. {
  1108. struct qdio_irq *irq_ptr;
  1109. int rc;
  1110. unsigned long saveflags;
  1111. DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
  1112. irq_ptr = cdev->private->qdio_data;
  1113. if (!irq_ptr)
  1114. return -ENODEV;
  1115. if (cdev->private->state != DEV_STATE_ONLINE)
  1116. return -EINVAL;
  1117. mutex_lock(&irq_ptr->setup_mutex);
  1118. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1119. rc = -EBUSY;
  1120. goto out;
  1121. }
  1122. irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
  1123. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1124. irq_ptr->ccw.count = irq_ptr->aqueue.count;
  1125. irq_ptr->ccw.cda = 0;
  1126. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1127. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1128. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1129. 0, DOIO_DENY_PREFETCH);
  1130. if (rc) {
  1131. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1132. DBF_ERROR("rc:%4x", rc);
  1133. }
  1134. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1135. if (rc)
  1136. goto out;
  1137. if (is_thinint_irq(irq_ptr))
  1138. tiqdio_add_input_queues(irq_ptr);
  1139. /* wait for subchannel to become active */
  1140. msleep(5);
  1141. switch (irq_ptr->state) {
  1142. case QDIO_IRQ_STATE_STOPPED:
  1143. case QDIO_IRQ_STATE_ERR:
  1144. rc = -EIO;
  1145. break;
  1146. default:
  1147. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1148. rc = 0;
  1149. }
  1150. out:
  1151. mutex_unlock(&irq_ptr->setup_mutex);
  1152. return rc;
  1153. }
  1154. EXPORT_SYMBOL_GPL(qdio_activate);
  1155. static inline int buf_in_between(int bufnr, int start, int count)
  1156. {
  1157. int end = add_buf(start, count);
  1158. if (end > start) {
  1159. if (bufnr >= start && bufnr < end)
  1160. return 1;
  1161. else
  1162. return 0;
  1163. }
  1164. /* wrap-around case */
  1165. if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
  1166. (bufnr < end))
  1167. return 1;
  1168. else
  1169. return 0;
  1170. }
  1171. /**
  1172. * handle_inbound - reset processed input buffers
  1173. * @q: queue containing the buffers
  1174. * @callflags: flags
  1175. * @bufnr: first buffer to process
  1176. * @count: how many buffers are emptied
  1177. */
  1178. static int handle_inbound(struct qdio_q *q, unsigned int callflags,
  1179. int bufnr, int count)
  1180. {
  1181. int used, diff;
  1182. qperf_inc(q, inbound_call);
  1183. if (!q->u.in.polling)
  1184. goto set;
  1185. /* protect against stop polling setting an ACK for an emptied slsb */
  1186. if (count == QDIO_MAX_BUFFERS_PER_Q) {
  1187. /* overwriting everything, just delete polling status */
  1188. q->u.in.polling = 0;
  1189. q->u.in.ack_count = 0;
  1190. goto set;
  1191. } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
  1192. if (is_qebsm(q)) {
  1193. /* partial overwrite, just update ack_start */
  1194. diff = add_buf(bufnr, count);
  1195. diff = sub_buf(diff, q->u.in.ack_start);
  1196. q->u.in.ack_count -= diff;
  1197. if (q->u.in.ack_count <= 0) {
  1198. q->u.in.polling = 0;
  1199. q->u.in.ack_count = 0;
  1200. goto set;
  1201. }
  1202. q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
  1203. }
  1204. else
  1205. /* the only ACK will be deleted, so stop polling */
  1206. q->u.in.polling = 0;
  1207. }
  1208. set:
  1209. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1210. used = atomic_add_return(count, &q->nr_buf_used) - count;
  1211. BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q);
  1212. /* no need to signal as long as the adapter had free buffers */
  1213. if (used)
  1214. return 0;
  1215. if (need_siga_in(q))
  1216. return qdio_siga_input(q);
  1217. return 0;
  1218. }
  1219. /**
  1220. * handle_outbound - process filled outbound buffers
  1221. * @q: queue containing the buffers
  1222. * @callflags: flags
  1223. * @bufnr: first buffer to process
  1224. * @count: how many buffers are filled
  1225. */
  1226. static int handle_outbound(struct qdio_q *q, unsigned int callflags,
  1227. int bufnr, int count)
  1228. {
  1229. unsigned char state;
  1230. int used, rc = 0;
  1231. qperf_inc(q, outbound_call);
  1232. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1233. used = atomic_add_return(count, &q->nr_buf_used);
  1234. BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q);
  1235. if (used == QDIO_MAX_BUFFERS_PER_Q)
  1236. qperf_inc(q, outbound_queue_full);
  1237. if (callflags & QDIO_FLAG_PCI_OUT) {
  1238. q->u.out.pci_out_enabled = 1;
  1239. qperf_inc(q, pci_request_int);
  1240. } else
  1241. q->u.out.pci_out_enabled = 0;
  1242. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1243. /* One SIGA-W per buffer required for unicast HiperSockets. */
  1244. WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
  1245. rc = qdio_kick_outbound_q(q);
  1246. } else if (unlikely(need_siga_sync(q))) {
  1247. rc = qdio_siga_sync_q(q);
  1248. } else {
  1249. /* try to fast requeue buffers */
  1250. get_buf_state(q, prev_buf(bufnr), &state, 0);
  1251. if (state != SLSB_CU_OUTPUT_PRIMED)
  1252. rc = qdio_kick_outbound_q(q);
  1253. else
  1254. qperf_inc(q, fast_requeue);
  1255. }
  1256. /* in case of SIGA errors we must process the error immediately */
  1257. if (used >= q->u.out.scan_threshold || rc)
  1258. tasklet_schedule(&q->tasklet);
  1259. else
  1260. /* free the SBALs in case of no further traffic */
  1261. if (!timer_pending(&q->u.out.timer))
  1262. mod_timer(&q->u.out.timer, jiffies + HZ);
  1263. return rc;
  1264. }
  1265. /**
  1266. * do_QDIO - process input or output buffers
  1267. * @cdev: associated ccw_device for the qdio subchannel
  1268. * @callflags: input or output and special flags from the program
  1269. * @q_nr: queue number
  1270. * @bufnr: buffer number
  1271. * @count: how many buffers to process
  1272. */
  1273. int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
  1274. int q_nr, unsigned int bufnr, unsigned int count)
  1275. {
  1276. struct qdio_irq *irq_ptr;
  1277. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1278. return -EINVAL;
  1279. irq_ptr = cdev->private->qdio_data;
  1280. if (!irq_ptr)
  1281. return -ENODEV;
  1282. DBF_DEV_EVENT(DBF_INFO, irq_ptr,
  1283. "do%02x b:%02x c:%02x", callflags, bufnr, count);
  1284. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1285. return -EBUSY;
  1286. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1287. return handle_inbound(irq_ptr->input_qs[q_nr],
  1288. callflags, bufnr, count);
  1289. else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
  1290. return handle_outbound(irq_ptr->output_qs[q_nr],
  1291. callflags, bufnr, count);
  1292. return -EINVAL;
  1293. }
  1294. EXPORT_SYMBOL_GPL(do_QDIO);
  1295. /**
  1296. * qdio_start_irq - process input buffers
  1297. * @cdev: associated ccw_device for the qdio subchannel
  1298. * @nr: input queue number
  1299. *
  1300. * Return codes
  1301. * 0 - success
  1302. * 1 - irqs not started since new data is available
  1303. */
  1304. int qdio_start_irq(struct ccw_device *cdev, int nr)
  1305. {
  1306. struct qdio_q *q;
  1307. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1308. if (!irq_ptr)
  1309. return -ENODEV;
  1310. q = irq_ptr->input_qs[nr];
  1311. WARN_ON(queue_irqs_enabled(q));
  1312. if (!shared_ind(q->irq_ptr->dsci))
  1313. xchg(q->irq_ptr->dsci, 0);
  1314. qdio_stop_polling(q);
  1315. clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
  1316. /*
  1317. * We need to check again to not lose initiative after
  1318. * resetting the ACK state.
  1319. */
  1320. if (!shared_ind(q->irq_ptr->dsci) && *q->irq_ptr->dsci)
  1321. goto rescan;
  1322. if (!qdio_inbound_q_done(q))
  1323. goto rescan;
  1324. return 0;
  1325. rescan:
  1326. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1327. &q->u.in.queue_irq_state))
  1328. return 0;
  1329. else
  1330. return 1;
  1331. }
  1332. EXPORT_SYMBOL(qdio_start_irq);
  1333. /**
  1334. * qdio_get_next_buffers - process input buffers
  1335. * @cdev: associated ccw_device for the qdio subchannel
  1336. * @nr: input queue number
  1337. * @bufnr: first filled buffer number
  1338. * @error: buffers are in error state
  1339. *
  1340. * Return codes
  1341. * < 0 - error
  1342. * = 0 - no new buffers found
  1343. * > 0 - number of processed buffers
  1344. */
  1345. int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
  1346. int *error)
  1347. {
  1348. struct qdio_q *q;
  1349. int start, end;
  1350. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1351. if (!irq_ptr)
  1352. return -ENODEV;
  1353. q = irq_ptr->input_qs[nr];
  1354. WARN_ON(queue_irqs_enabled(q));
  1355. qdio_sync_after_thinint(q);
  1356. /*
  1357. * The interrupt could be caused by a PCI request. Check the
  1358. * PCI capable outbound queues.
  1359. */
  1360. qdio_check_outbound_after_thinint(q);
  1361. if (!qdio_inbound_q_moved(q))
  1362. return 0;
  1363. /* Note: upper-layer MUST stop processing immediately here ... */
  1364. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  1365. return -EIO;
  1366. start = q->first_to_kick;
  1367. end = q->first_to_check;
  1368. *bufnr = start;
  1369. *error = q->qdio_error;
  1370. /* for the next time */
  1371. q->first_to_kick = end;
  1372. q->qdio_error = 0;
  1373. return sub_buf(end, start);
  1374. }
  1375. EXPORT_SYMBOL(qdio_get_next_buffers);
  1376. /**
  1377. * qdio_stop_irq - disable interrupt processing for the device
  1378. * @cdev: associated ccw_device for the qdio subchannel
  1379. * @nr: input queue number
  1380. *
  1381. * Return codes
  1382. * 0 - interrupts were already disabled
  1383. * 1 - interrupts successfully disabled
  1384. */
  1385. int qdio_stop_irq(struct ccw_device *cdev, int nr)
  1386. {
  1387. struct qdio_q *q;
  1388. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1389. if (!irq_ptr)
  1390. return -ENODEV;
  1391. q = irq_ptr->input_qs[nr];
  1392. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1393. &q->u.in.queue_irq_state))
  1394. return 0;
  1395. else
  1396. return 1;
  1397. }
  1398. EXPORT_SYMBOL(qdio_stop_irq);
  1399. static int __init init_QDIO(void)
  1400. {
  1401. int rc;
  1402. rc = qdio_setup_init();
  1403. if (rc)
  1404. return rc;
  1405. rc = tiqdio_allocate_memory();
  1406. if (rc)
  1407. goto out_cache;
  1408. rc = qdio_debug_init();
  1409. if (rc)
  1410. goto out_ti;
  1411. rc = tiqdio_register_thinints();
  1412. if (rc)
  1413. goto out_debug;
  1414. return 0;
  1415. out_debug:
  1416. qdio_debug_exit();
  1417. out_ti:
  1418. tiqdio_free_memory();
  1419. out_cache:
  1420. qdio_setup_exit();
  1421. return rc;
  1422. }
  1423. static void __exit exit_QDIO(void)
  1424. {
  1425. tiqdio_unregister_thinints();
  1426. tiqdio_free_memory();
  1427. qdio_debug_exit();
  1428. qdio_setup_exit();
  1429. }
  1430. module_init(init_QDIO);
  1431. module_exit(exit_QDIO);