sysfs.c 16 KB

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  1. #include <linux/device.h>
  2. #include <linux/cpu.h>
  3. #include <linux/smp.h>
  4. #include <linux/percpu.h>
  5. #include <linux/init.h>
  6. #include <linux/sched.h>
  7. #include <linux/export.h>
  8. #include <linux/nodemask.h>
  9. #include <linux/cpumask.h>
  10. #include <linux/notifier.h>
  11. #include <asm/current.h>
  12. #include <asm/processor.h>
  13. #include <asm/cputable.h>
  14. #include <asm/firmware.h>
  15. #include <asm/hvcall.h>
  16. #include <asm/prom.h>
  17. #include <asm/machdep.h>
  18. #include <asm/smp.h>
  19. #include <asm/pmc.h>
  20. #include "cacheinfo.h"
  21. #ifdef CONFIG_PPC64
  22. #include <asm/paca.h>
  23. #include <asm/lppaca.h>
  24. #endif
  25. static DEFINE_PER_CPU(struct cpu, cpu_devices);
  26. /*
  27. * SMT snooze delay stuff, 64-bit only for now
  28. */
  29. #ifdef CONFIG_PPC64
  30. /* Time in microseconds we delay before sleeping in the idle loop */
  31. DEFINE_PER_CPU(long, smt_snooze_delay) = { 100 };
  32. static ssize_t store_smt_snooze_delay(struct device *dev,
  33. struct device_attribute *attr,
  34. const char *buf,
  35. size_t count)
  36. {
  37. struct cpu *cpu = container_of(dev, struct cpu, dev);
  38. ssize_t ret;
  39. long snooze;
  40. ret = sscanf(buf, "%ld", &snooze);
  41. if (ret != 1)
  42. return -EINVAL;
  43. per_cpu(smt_snooze_delay, cpu->dev.id) = snooze;
  44. return count;
  45. }
  46. static ssize_t show_smt_snooze_delay(struct device *dev,
  47. struct device_attribute *attr,
  48. char *buf)
  49. {
  50. struct cpu *cpu = container_of(dev, struct cpu, dev);
  51. return sprintf(buf, "%ld\n", per_cpu(smt_snooze_delay, cpu->dev.id));
  52. }
  53. static DEVICE_ATTR(smt_snooze_delay, 0644, show_smt_snooze_delay,
  54. store_smt_snooze_delay);
  55. static int __init setup_smt_snooze_delay(char *str)
  56. {
  57. unsigned int cpu;
  58. long snooze;
  59. if (!cpu_has_feature(CPU_FTR_SMT))
  60. return 1;
  61. snooze = simple_strtol(str, NULL, 10);
  62. for_each_possible_cpu(cpu)
  63. per_cpu(smt_snooze_delay, cpu) = snooze;
  64. return 1;
  65. }
  66. __setup("smt-snooze-delay=", setup_smt_snooze_delay);
  67. #endif /* CONFIG_PPC64 */
  68. /*
  69. * Enabling PMCs will slow partition context switch times so we only do
  70. * it the first time we write to the PMCs.
  71. */
  72. static DEFINE_PER_CPU(char, pmcs_enabled);
  73. void ppc_enable_pmcs(void)
  74. {
  75. ppc_set_pmu_inuse(1);
  76. /* Only need to enable them once */
  77. if (__get_cpu_var(pmcs_enabled))
  78. return;
  79. __get_cpu_var(pmcs_enabled) = 1;
  80. if (ppc_md.enable_pmcs)
  81. ppc_md.enable_pmcs();
  82. }
  83. EXPORT_SYMBOL(ppc_enable_pmcs);
  84. #define SYSFS_PMCSETUP(NAME, ADDRESS) \
  85. static void read_##NAME(void *val) \
  86. { \
  87. *(unsigned long *)val = mfspr(ADDRESS); \
  88. } \
  89. static void write_##NAME(void *val) \
  90. { \
  91. ppc_enable_pmcs(); \
  92. mtspr(ADDRESS, *(unsigned long *)val); \
  93. } \
  94. static ssize_t show_##NAME(struct device *dev, \
  95. struct device_attribute *attr, \
  96. char *buf) \
  97. { \
  98. struct cpu *cpu = container_of(dev, struct cpu, dev); \
  99. unsigned long val; \
  100. smp_call_function_single(cpu->dev.id, read_##NAME, &val, 1); \
  101. return sprintf(buf, "%lx\n", val); \
  102. } \
  103. static ssize_t __used \
  104. store_##NAME(struct device *dev, struct device_attribute *attr, \
  105. const char *buf, size_t count) \
  106. { \
  107. struct cpu *cpu = container_of(dev, struct cpu, dev); \
  108. unsigned long val; \
  109. int ret = sscanf(buf, "%lx", &val); \
  110. if (ret != 1) \
  111. return -EINVAL; \
  112. smp_call_function_single(cpu->dev.id, write_##NAME, &val, 1); \
  113. return count; \
  114. }
  115. /* Let's define all possible registers, we'll only hook up the ones
  116. * that are implemented on the current processor
  117. */
  118. #if defined(CONFIG_PPC64)
  119. #define HAS_PPC_PMC_CLASSIC 1
  120. #define HAS_PPC_PMC_IBM 1
  121. #define HAS_PPC_PMC_PA6T 1
  122. #elif defined(CONFIG_6xx)
  123. #define HAS_PPC_PMC_CLASSIC 1
  124. #define HAS_PPC_PMC_IBM 1
  125. #define HAS_PPC_PMC_G4 1
  126. #endif
  127. #ifdef HAS_PPC_PMC_CLASSIC
  128. SYSFS_PMCSETUP(mmcr0, SPRN_MMCR0);
  129. SYSFS_PMCSETUP(mmcr1, SPRN_MMCR1);
  130. SYSFS_PMCSETUP(pmc1, SPRN_PMC1);
  131. SYSFS_PMCSETUP(pmc2, SPRN_PMC2);
  132. SYSFS_PMCSETUP(pmc3, SPRN_PMC3);
  133. SYSFS_PMCSETUP(pmc4, SPRN_PMC4);
  134. SYSFS_PMCSETUP(pmc5, SPRN_PMC5);
  135. SYSFS_PMCSETUP(pmc6, SPRN_PMC6);
  136. #ifdef HAS_PPC_PMC_G4
  137. SYSFS_PMCSETUP(mmcr2, SPRN_MMCR2);
  138. #endif
  139. #ifdef CONFIG_PPC64
  140. SYSFS_PMCSETUP(pmc7, SPRN_PMC7);
  141. SYSFS_PMCSETUP(pmc8, SPRN_PMC8);
  142. SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
  143. SYSFS_PMCSETUP(purr, SPRN_PURR);
  144. SYSFS_PMCSETUP(spurr, SPRN_SPURR);
  145. SYSFS_PMCSETUP(dscr, SPRN_DSCR);
  146. static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
  147. static DEVICE_ATTR(spurr, 0600, show_spurr, NULL);
  148. static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr);
  149. static DEVICE_ATTR(purr, 0600, show_purr, store_purr);
  150. unsigned long dscr_default = 0;
  151. EXPORT_SYMBOL(dscr_default);
  152. static ssize_t show_dscr_default(struct device *dev,
  153. struct device_attribute *attr, char *buf)
  154. {
  155. return sprintf(buf, "%lx\n", dscr_default);
  156. }
  157. static ssize_t __used store_dscr_default(struct device *dev,
  158. struct device_attribute *attr, const char *buf,
  159. size_t count)
  160. {
  161. unsigned long val;
  162. int ret = 0;
  163. ret = sscanf(buf, "%lx", &val);
  164. if (ret != 1)
  165. return -EINVAL;
  166. dscr_default = val;
  167. return count;
  168. }
  169. static DEVICE_ATTR(dscr_default, 0600,
  170. show_dscr_default, store_dscr_default);
  171. static void sysfs_create_dscr_default(void)
  172. {
  173. int err = 0;
  174. if (cpu_has_feature(CPU_FTR_DSCR))
  175. err = device_create_file(cpu_subsys.dev_root, &dev_attr_dscr_default);
  176. }
  177. #endif /* CONFIG_PPC64 */
  178. #ifdef HAS_PPC_PMC_PA6T
  179. SYSFS_PMCSETUP(pa6t_pmc0, SPRN_PA6T_PMC0);
  180. SYSFS_PMCSETUP(pa6t_pmc1, SPRN_PA6T_PMC1);
  181. SYSFS_PMCSETUP(pa6t_pmc2, SPRN_PA6T_PMC2);
  182. SYSFS_PMCSETUP(pa6t_pmc3, SPRN_PA6T_PMC3);
  183. SYSFS_PMCSETUP(pa6t_pmc4, SPRN_PA6T_PMC4);
  184. SYSFS_PMCSETUP(pa6t_pmc5, SPRN_PA6T_PMC5);
  185. #ifdef CONFIG_DEBUG_KERNEL
  186. SYSFS_PMCSETUP(hid0, SPRN_HID0);
  187. SYSFS_PMCSETUP(hid1, SPRN_HID1);
  188. SYSFS_PMCSETUP(hid4, SPRN_HID4);
  189. SYSFS_PMCSETUP(hid5, SPRN_HID5);
  190. SYSFS_PMCSETUP(ima0, SPRN_PA6T_IMA0);
  191. SYSFS_PMCSETUP(ima1, SPRN_PA6T_IMA1);
  192. SYSFS_PMCSETUP(ima2, SPRN_PA6T_IMA2);
  193. SYSFS_PMCSETUP(ima3, SPRN_PA6T_IMA3);
  194. SYSFS_PMCSETUP(ima4, SPRN_PA6T_IMA4);
  195. SYSFS_PMCSETUP(ima5, SPRN_PA6T_IMA5);
  196. SYSFS_PMCSETUP(ima6, SPRN_PA6T_IMA6);
  197. SYSFS_PMCSETUP(ima7, SPRN_PA6T_IMA7);
  198. SYSFS_PMCSETUP(ima8, SPRN_PA6T_IMA8);
  199. SYSFS_PMCSETUP(ima9, SPRN_PA6T_IMA9);
  200. SYSFS_PMCSETUP(imaat, SPRN_PA6T_IMAAT);
  201. SYSFS_PMCSETUP(btcr, SPRN_PA6T_BTCR);
  202. SYSFS_PMCSETUP(pccr, SPRN_PA6T_PCCR);
  203. SYSFS_PMCSETUP(rpccr, SPRN_PA6T_RPCCR);
  204. SYSFS_PMCSETUP(der, SPRN_PA6T_DER);
  205. SYSFS_PMCSETUP(mer, SPRN_PA6T_MER);
  206. SYSFS_PMCSETUP(ber, SPRN_PA6T_BER);
  207. SYSFS_PMCSETUP(ier, SPRN_PA6T_IER);
  208. SYSFS_PMCSETUP(sier, SPRN_PA6T_SIER);
  209. SYSFS_PMCSETUP(siar, SPRN_PA6T_SIAR);
  210. SYSFS_PMCSETUP(tsr0, SPRN_PA6T_TSR0);
  211. SYSFS_PMCSETUP(tsr1, SPRN_PA6T_TSR1);
  212. SYSFS_PMCSETUP(tsr2, SPRN_PA6T_TSR2);
  213. SYSFS_PMCSETUP(tsr3, SPRN_PA6T_TSR3);
  214. #endif /* CONFIG_DEBUG_KERNEL */
  215. #endif /* HAS_PPC_PMC_PA6T */
  216. #ifdef HAS_PPC_PMC_IBM
  217. static struct device_attribute ibm_common_attrs[] = {
  218. __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
  219. __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
  220. };
  221. #endif /* HAS_PPC_PMC_G4 */
  222. #ifdef HAS_PPC_PMC_G4
  223. static struct device_attribute g4_common_attrs[] = {
  224. __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
  225. __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
  226. __ATTR(mmcr2, 0600, show_mmcr2, store_mmcr2),
  227. };
  228. #endif /* HAS_PPC_PMC_G4 */
  229. static struct device_attribute classic_pmc_attrs[] = {
  230. __ATTR(pmc1, 0600, show_pmc1, store_pmc1),
  231. __ATTR(pmc2, 0600, show_pmc2, store_pmc2),
  232. __ATTR(pmc3, 0600, show_pmc3, store_pmc3),
  233. __ATTR(pmc4, 0600, show_pmc4, store_pmc4),
  234. __ATTR(pmc5, 0600, show_pmc5, store_pmc5),
  235. __ATTR(pmc6, 0600, show_pmc6, store_pmc6),
  236. #ifdef CONFIG_PPC64
  237. __ATTR(pmc7, 0600, show_pmc7, store_pmc7),
  238. __ATTR(pmc8, 0600, show_pmc8, store_pmc8),
  239. #endif
  240. };
  241. #ifdef HAS_PPC_PMC_PA6T
  242. static struct device_attribute pa6t_attrs[] = {
  243. __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
  244. __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
  245. __ATTR(pmc0, 0600, show_pa6t_pmc0, store_pa6t_pmc0),
  246. __ATTR(pmc1, 0600, show_pa6t_pmc1, store_pa6t_pmc1),
  247. __ATTR(pmc2, 0600, show_pa6t_pmc2, store_pa6t_pmc2),
  248. __ATTR(pmc3, 0600, show_pa6t_pmc3, store_pa6t_pmc3),
  249. __ATTR(pmc4, 0600, show_pa6t_pmc4, store_pa6t_pmc4),
  250. __ATTR(pmc5, 0600, show_pa6t_pmc5, store_pa6t_pmc5),
  251. #ifdef CONFIG_DEBUG_KERNEL
  252. __ATTR(hid0, 0600, show_hid0, store_hid0),
  253. __ATTR(hid1, 0600, show_hid1, store_hid1),
  254. __ATTR(hid4, 0600, show_hid4, store_hid4),
  255. __ATTR(hid5, 0600, show_hid5, store_hid5),
  256. __ATTR(ima0, 0600, show_ima0, store_ima0),
  257. __ATTR(ima1, 0600, show_ima1, store_ima1),
  258. __ATTR(ima2, 0600, show_ima2, store_ima2),
  259. __ATTR(ima3, 0600, show_ima3, store_ima3),
  260. __ATTR(ima4, 0600, show_ima4, store_ima4),
  261. __ATTR(ima5, 0600, show_ima5, store_ima5),
  262. __ATTR(ima6, 0600, show_ima6, store_ima6),
  263. __ATTR(ima7, 0600, show_ima7, store_ima7),
  264. __ATTR(ima8, 0600, show_ima8, store_ima8),
  265. __ATTR(ima9, 0600, show_ima9, store_ima9),
  266. __ATTR(imaat, 0600, show_imaat, store_imaat),
  267. __ATTR(btcr, 0600, show_btcr, store_btcr),
  268. __ATTR(pccr, 0600, show_pccr, store_pccr),
  269. __ATTR(rpccr, 0600, show_rpccr, store_rpccr),
  270. __ATTR(der, 0600, show_der, store_der),
  271. __ATTR(mer, 0600, show_mer, store_mer),
  272. __ATTR(ber, 0600, show_ber, store_ber),
  273. __ATTR(ier, 0600, show_ier, store_ier),
  274. __ATTR(sier, 0600, show_sier, store_sier),
  275. __ATTR(siar, 0600, show_siar, store_siar),
  276. __ATTR(tsr0, 0600, show_tsr0, store_tsr0),
  277. __ATTR(tsr1, 0600, show_tsr1, store_tsr1),
  278. __ATTR(tsr2, 0600, show_tsr2, store_tsr2),
  279. __ATTR(tsr3, 0600, show_tsr3, store_tsr3),
  280. #endif /* CONFIG_DEBUG_KERNEL */
  281. };
  282. #endif /* HAS_PPC_PMC_PA6T */
  283. #endif /* HAS_PPC_PMC_CLASSIC */
  284. static void __cpuinit register_cpu_online(unsigned int cpu)
  285. {
  286. struct cpu *c = &per_cpu(cpu_devices, cpu);
  287. struct device *s = &c->dev;
  288. struct device_attribute *attrs, *pmc_attrs;
  289. int i, nattrs;
  290. #ifdef CONFIG_PPC64
  291. if (!firmware_has_feature(FW_FEATURE_ISERIES) &&
  292. cpu_has_feature(CPU_FTR_SMT))
  293. device_create_file(s, &dev_attr_smt_snooze_delay);
  294. #endif
  295. /* PMC stuff */
  296. switch (cur_cpu_spec->pmc_type) {
  297. #ifdef HAS_PPC_PMC_IBM
  298. case PPC_PMC_IBM:
  299. attrs = ibm_common_attrs;
  300. nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
  301. pmc_attrs = classic_pmc_attrs;
  302. break;
  303. #endif /* HAS_PPC_PMC_IBM */
  304. #ifdef HAS_PPC_PMC_G4
  305. case PPC_PMC_G4:
  306. attrs = g4_common_attrs;
  307. nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
  308. pmc_attrs = classic_pmc_attrs;
  309. break;
  310. #endif /* HAS_PPC_PMC_G4 */
  311. #ifdef HAS_PPC_PMC_PA6T
  312. case PPC_PMC_PA6T:
  313. /* PA Semi starts counting at PMC0 */
  314. attrs = pa6t_attrs;
  315. nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
  316. pmc_attrs = NULL;
  317. break;
  318. #endif /* HAS_PPC_PMC_PA6T */
  319. default:
  320. attrs = NULL;
  321. nattrs = 0;
  322. pmc_attrs = NULL;
  323. }
  324. for (i = 0; i < nattrs; i++)
  325. device_create_file(s, &attrs[i]);
  326. if (pmc_attrs)
  327. for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
  328. device_create_file(s, &pmc_attrs[i]);
  329. #ifdef CONFIG_PPC64
  330. if (cpu_has_feature(CPU_FTR_MMCRA))
  331. device_create_file(s, &dev_attr_mmcra);
  332. if (cpu_has_feature(CPU_FTR_PURR))
  333. device_create_file(s, &dev_attr_purr);
  334. if (cpu_has_feature(CPU_FTR_SPURR))
  335. device_create_file(s, &dev_attr_spurr);
  336. if (cpu_has_feature(CPU_FTR_DSCR))
  337. device_create_file(s, &dev_attr_dscr);
  338. #endif /* CONFIG_PPC64 */
  339. cacheinfo_cpu_online(cpu);
  340. }
  341. #ifdef CONFIG_HOTPLUG_CPU
  342. static void unregister_cpu_online(unsigned int cpu)
  343. {
  344. struct cpu *c = &per_cpu(cpu_devices, cpu);
  345. struct device *s = &c->dev;
  346. struct device_attribute *attrs, *pmc_attrs;
  347. int i, nattrs;
  348. BUG_ON(!c->hotpluggable);
  349. #ifdef CONFIG_PPC64
  350. if (!firmware_has_feature(FW_FEATURE_ISERIES) &&
  351. cpu_has_feature(CPU_FTR_SMT))
  352. device_remove_file(s, &dev_attr_smt_snooze_delay);
  353. #endif
  354. /* PMC stuff */
  355. switch (cur_cpu_spec->pmc_type) {
  356. #ifdef HAS_PPC_PMC_IBM
  357. case PPC_PMC_IBM:
  358. attrs = ibm_common_attrs;
  359. nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
  360. pmc_attrs = classic_pmc_attrs;
  361. break;
  362. #endif /* HAS_PPC_PMC_IBM */
  363. #ifdef HAS_PPC_PMC_G4
  364. case PPC_PMC_G4:
  365. attrs = g4_common_attrs;
  366. nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
  367. pmc_attrs = classic_pmc_attrs;
  368. break;
  369. #endif /* HAS_PPC_PMC_G4 */
  370. #ifdef HAS_PPC_PMC_PA6T
  371. case PPC_PMC_PA6T:
  372. /* PA Semi starts counting at PMC0 */
  373. attrs = pa6t_attrs;
  374. nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
  375. pmc_attrs = NULL;
  376. break;
  377. #endif /* HAS_PPC_PMC_PA6T */
  378. default:
  379. attrs = NULL;
  380. nattrs = 0;
  381. pmc_attrs = NULL;
  382. }
  383. for (i = 0; i < nattrs; i++)
  384. device_remove_file(s, &attrs[i]);
  385. if (pmc_attrs)
  386. for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
  387. device_remove_file(s, &pmc_attrs[i]);
  388. #ifdef CONFIG_PPC64
  389. if (cpu_has_feature(CPU_FTR_MMCRA))
  390. device_remove_file(s, &dev_attr_mmcra);
  391. if (cpu_has_feature(CPU_FTR_PURR))
  392. device_remove_file(s, &dev_attr_purr);
  393. if (cpu_has_feature(CPU_FTR_SPURR))
  394. device_remove_file(s, &dev_attr_spurr);
  395. if (cpu_has_feature(CPU_FTR_DSCR))
  396. device_remove_file(s, &dev_attr_dscr);
  397. #endif /* CONFIG_PPC64 */
  398. cacheinfo_cpu_offline(cpu);
  399. }
  400. #ifdef CONFIG_ARCH_CPU_PROBE_RELEASE
  401. ssize_t arch_cpu_probe(const char *buf, size_t count)
  402. {
  403. if (ppc_md.cpu_probe)
  404. return ppc_md.cpu_probe(buf, count);
  405. return -EINVAL;
  406. }
  407. ssize_t arch_cpu_release(const char *buf, size_t count)
  408. {
  409. if (ppc_md.cpu_release)
  410. return ppc_md.cpu_release(buf, count);
  411. return -EINVAL;
  412. }
  413. #endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
  414. #endif /* CONFIG_HOTPLUG_CPU */
  415. static int __cpuinit sysfs_cpu_notify(struct notifier_block *self,
  416. unsigned long action, void *hcpu)
  417. {
  418. unsigned int cpu = (unsigned int)(long)hcpu;
  419. switch (action) {
  420. case CPU_ONLINE:
  421. case CPU_ONLINE_FROZEN:
  422. register_cpu_online(cpu);
  423. break;
  424. #ifdef CONFIG_HOTPLUG_CPU
  425. case CPU_DEAD:
  426. case CPU_DEAD_FROZEN:
  427. unregister_cpu_online(cpu);
  428. break;
  429. #endif
  430. }
  431. return NOTIFY_OK;
  432. }
  433. static struct notifier_block __cpuinitdata sysfs_cpu_nb = {
  434. .notifier_call = sysfs_cpu_notify,
  435. };
  436. static DEFINE_MUTEX(cpu_mutex);
  437. int cpu_add_dev_attr(struct device_attribute *attr)
  438. {
  439. int cpu;
  440. mutex_lock(&cpu_mutex);
  441. for_each_possible_cpu(cpu) {
  442. device_create_file(get_cpu_device(cpu), attr);
  443. }
  444. mutex_unlock(&cpu_mutex);
  445. return 0;
  446. }
  447. EXPORT_SYMBOL_GPL(cpu_add_dev_attr);
  448. int cpu_add_dev_attr_group(struct attribute_group *attrs)
  449. {
  450. int cpu;
  451. struct device *dev;
  452. int ret;
  453. mutex_lock(&cpu_mutex);
  454. for_each_possible_cpu(cpu) {
  455. dev = get_cpu_device(cpu);
  456. ret = sysfs_create_group(&dev->kobj, attrs);
  457. WARN_ON(ret != 0);
  458. }
  459. mutex_unlock(&cpu_mutex);
  460. return 0;
  461. }
  462. EXPORT_SYMBOL_GPL(cpu_add_dev_attr_group);
  463. void cpu_remove_dev_attr(struct device_attribute *attr)
  464. {
  465. int cpu;
  466. mutex_lock(&cpu_mutex);
  467. for_each_possible_cpu(cpu) {
  468. device_remove_file(get_cpu_device(cpu), attr);
  469. }
  470. mutex_unlock(&cpu_mutex);
  471. }
  472. EXPORT_SYMBOL_GPL(cpu_remove_dev_attr);
  473. void cpu_remove_dev_attr_group(struct attribute_group *attrs)
  474. {
  475. int cpu;
  476. struct device *dev;
  477. mutex_lock(&cpu_mutex);
  478. for_each_possible_cpu(cpu) {
  479. dev = get_cpu_device(cpu);
  480. sysfs_remove_group(&dev->kobj, attrs);
  481. }
  482. mutex_unlock(&cpu_mutex);
  483. }
  484. EXPORT_SYMBOL_GPL(cpu_remove_dev_attr_group);
  485. /* NUMA stuff */
  486. #ifdef CONFIG_NUMA
  487. static void register_nodes(void)
  488. {
  489. int i;
  490. for (i = 0; i < MAX_NUMNODES; i++)
  491. register_one_node(i);
  492. }
  493. int sysfs_add_device_to_node(struct device *dev, int nid)
  494. {
  495. struct node *node = &node_devices[nid];
  496. return sysfs_create_link(&node->dev.kobj, &dev->kobj,
  497. kobject_name(&dev->kobj));
  498. }
  499. EXPORT_SYMBOL_GPL(sysfs_add_device_to_node);
  500. void sysfs_remove_device_from_node(struct device *dev, int nid)
  501. {
  502. struct node *node = &node_devices[nid];
  503. sysfs_remove_link(&node->dev.kobj, kobject_name(&dev->kobj));
  504. }
  505. EXPORT_SYMBOL_GPL(sysfs_remove_device_from_node);
  506. #else
  507. static void register_nodes(void)
  508. {
  509. return;
  510. }
  511. #endif
  512. /* Only valid if CPU is present. */
  513. static ssize_t show_physical_id(struct device *dev,
  514. struct device_attribute *attr, char *buf)
  515. {
  516. struct cpu *cpu = container_of(dev, struct cpu, dev);
  517. return sprintf(buf, "%d\n", get_hard_smp_processor_id(cpu->dev.id));
  518. }
  519. static DEVICE_ATTR(physical_id, 0444, show_physical_id, NULL);
  520. static int __init topology_init(void)
  521. {
  522. int cpu;
  523. register_nodes();
  524. register_cpu_notifier(&sysfs_cpu_nb);
  525. for_each_possible_cpu(cpu) {
  526. struct cpu *c = &per_cpu(cpu_devices, cpu);
  527. /*
  528. * For now, we just see if the system supports making
  529. * the RTAS calls for CPU hotplug. But, there may be a
  530. * more comprehensive way to do this for an individual
  531. * CPU. For instance, the boot cpu might never be valid
  532. * for hotplugging.
  533. */
  534. if (ppc_md.cpu_die)
  535. c->hotpluggable = 1;
  536. if (cpu_online(cpu) || c->hotpluggable) {
  537. register_cpu(c, cpu);
  538. device_create_file(&c->dev, &dev_attr_physical_id);
  539. }
  540. if (cpu_online(cpu))
  541. register_cpu_online(cpu);
  542. }
  543. #ifdef CONFIG_PPC64
  544. sysfs_create_dscr_default();
  545. #endif /* CONFIG_PPC64 */
  546. return 0;
  547. }
  548. subsys_initcall(topology_init);