rt2x00queue.c 30 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187
  1. /*
  2. Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
  3. Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
  4. Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
  5. <http://rt2x00.serialmonkey.com>
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the
  16. Free Software Foundation, Inc.,
  17. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18. */
  19. /*
  20. Module: rt2x00lib
  21. Abstract: rt2x00 queue specific routines.
  22. */
  23. #include <linux/slab.h>
  24. #include <linux/kernel.h>
  25. #include <linux/module.h>
  26. #include <linux/dma-mapping.h>
  27. #include "rt2x00.h"
  28. #include "rt2x00lib.h"
  29. struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry)
  30. {
  31. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  32. struct sk_buff *skb;
  33. struct skb_frame_desc *skbdesc;
  34. unsigned int frame_size;
  35. unsigned int head_size = 0;
  36. unsigned int tail_size = 0;
  37. /*
  38. * The frame size includes descriptor size, because the
  39. * hardware directly receive the frame into the skbuffer.
  40. */
  41. frame_size = entry->queue->data_size + entry->queue->desc_size;
  42. /*
  43. * The payload should be aligned to a 4-byte boundary,
  44. * this means we need at least 3 bytes for moving the frame
  45. * into the correct offset.
  46. */
  47. head_size = 4;
  48. /*
  49. * For IV/EIV/ICV assembly we must make sure there is
  50. * at least 8 bytes bytes available in headroom for IV/EIV
  51. * and 8 bytes for ICV data as tailroon.
  52. */
  53. if (test_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags)) {
  54. head_size += 8;
  55. tail_size += 8;
  56. }
  57. /*
  58. * Allocate skbuffer.
  59. */
  60. skb = dev_alloc_skb(frame_size + head_size + tail_size);
  61. if (!skb)
  62. return NULL;
  63. /*
  64. * Make sure we not have a frame with the requested bytes
  65. * available in the head and tail.
  66. */
  67. skb_reserve(skb, head_size);
  68. skb_put(skb, frame_size);
  69. /*
  70. * Populate skbdesc.
  71. */
  72. skbdesc = get_skb_frame_desc(skb);
  73. memset(skbdesc, 0, sizeof(*skbdesc));
  74. skbdesc->entry = entry;
  75. if (test_bit(REQUIRE_DMA, &rt2x00dev->cap_flags)) {
  76. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
  77. skb->data,
  78. skb->len,
  79. DMA_FROM_DEVICE);
  80. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  81. }
  82. return skb;
  83. }
  84. void rt2x00queue_map_txskb(struct queue_entry *entry)
  85. {
  86. struct device *dev = entry->queue->rt2x00dev->dev;
  87. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  88. skbdesc->skb_dma =
  89. dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
  90. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  91. }
  92. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  93. void rt2x00queue_unmap_skb(struct queue_entry *entry)
  94. {
  95. struct device *dev = entry->queue->rt2x00dev->dev;
  96. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  97. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  98. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  99. DMA_FROM_DEVICE);
  100. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  101. } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  102. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  103. DMA_TO_DEVICE);
  104. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  105. }
  106. }
  107. EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
  108. void rt2x00queue_free_skb(struct queue_entry *entry)
  109. {
  110. if (!entry->skb)
  111. return;
  112. rt2x00queue_unmap_skb(entry);
  113. dev_kfree_skb_any(entry->skb);
  114. entry->skb = NULL;
  115. }
  116. void rt2x00queue_align_frame(struct sk_buff *skb)
  117. {
  118. unsigned int frame_length = skb->len;
  119. unsigned int align = ALIGN_SIZE(skb, 0);
  120. if (!align)
  121. return;
  122. skb_push(skb, align);
  123. memmove(skb->data, skb->data + align, frame_length);
  124. skb_trim(skb, frame_length);
  125. }
  126. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
  127. {
  128. unsigned int payload_length = skb->len - header_length;
  129. unsigned int header_align = ALIGN_SIZE(skb, 0);
  130. unsigned int payload_align = ALIGN_SIZE(skb, header_length);
  131. unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
  132. /*
  133. * Adjust the header alignment if the payload needs to be moved more
  134. * than the header.
  135. */
  136. if (payload_align > header_align)
  137. header_align += 4;
  138. /* There is nothing to do if no alignment is needed */
  139. if (!header_align)
  140. return;
  141. /* Reserve the amount of space needed in front of the frame */
  142. skb_push(skb, header_align);
  143. /*
  144. * Move the header.
  145. */
  146. memmove(skb->data, skb->data + header_align, header_length);
  147. /* Move the payload, if present and if required */
  148. if (payload_length && payload_align)
  149. memmove(skb->data + header_length + l2pad,
  150. skb->data + header_length + l2pad + payload_align,
  151. payload_length);
  152. /* Trim the skb to the correct size */
  153. skb_trim(skb, header_length + l2pad + payload_length);
  154. }
  155. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
  156. {
  157. /*
  158. * L2 padding is only present if the skb contains more than just the
  159. * IEEE 802.11 header.
  160. */
  161. unsigned int l2pad = (skb->len > header_length) ?
  162. L2PAD_SIZE(header_length) : 0;
  163. if (!l2pad)
  164. return;
  165. memmove(skb->data + l2pad, skb->data, header_length);
  166. skb_pull(skb, l2pad);
  167. }
  168. static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
  169. struct txentry_desc *txdesc)
  170. {
  171. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  172. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  173. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  174. unsigned long irqflags;
  175. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
  176. return;
  177. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  178. if (!test_bit(REQUIRE_SW_SEQNO, &entry->queue->rt2x00dev->cap_flags))
  179. return;
  180. /*
  181. * The hardware is not able to insert a sequence number. Assign a
  182. * software generated one here.
  183. *
  184. * This is wrong because beacons are not getting sequence
  185. * numbers assigned properly.
  186. *
  187. * A secondary problem exists for drivers that cannot toggle
  188. * sequence counting per-frame, since those will override the
  189. * sequence counter given by mac80211.
  190. */
  191. spin_lock_irqsave(&intf->seqlock, irqflags);
  192. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  193. intf->seqno += 0x10;
  194. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  195. hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
  196. spin_unlock_irqrestore(&intf->seqlock, irqflags);
  197. }
  198. static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
  199. struct txentry_desc *txdesc,
  200. const struct rt2x00_rate *hwrate)
  201. {
  202. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  203. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  204. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  205. unsigned int data_length;
  206. unsigned int duration;
  207. unsigned int residual;
  208. /*
  209. * Determine with what IFS priority this frame should be send.
  210. * Set ifs to IFS_SIFS when the this is not the first fragment,
  211. * or this fragment came after RTS/CTS.
  212. */
  213. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  214. txdesc->u.plcp.ifs = IFS_BACKOFF;
  215. else
  216. txdesc->u.plcp.ifs = IFS_SIFS;
  217. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  218. data_length = entry->skb->len + 4;
  219. data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
  220. /*
  221. * PLCP setup
  222. * Length calculation depends on OFDM/CCK rate.
  223. */
  224. txdesc->u.plcp.signal = hwrate->plcp;
  225. txdesc->u.plcp.service = 0x04;
  226. if (hwrate->flags & DEV_RATE_OFDM) {
  227. txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f;
  228. txdesc->u.plcp.length_low = data_length & 0x3f;
  229. } else {
  230. /*
  231. * Convert length to microseconds.
  232. */
  233. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  234. duration = GET_DURATION(data_length, hwrate->bitrate);
  235. if (residual != 0) {
  236. duration++;
  237. /*
  238. * Check if we need to set the Length Extension
  239. */
  240. if (hwrate->bitrate == 110 && residual <= 30)
  241. txdesc->u.plcp.service |= 0x80;
  242. }
  243. txdesc->u.plcp.length_high = (duration >> 8) & 0xff;
  244. txdesc->u.plcp.length_low = duration & 0xff;
  245. /*
  246. * When preamble is enabled we should set the
  247. * preamble bit for the signal.
  248. */
  249. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  250. txdesc->u.plcp.signal |= 0x08;
  251. }
  252. }
  253. static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
  254. struct txentry_desc *txdesc)
  255. {
  256. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  257. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  258. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  259. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  260. struct ieee80211_rate *rate;
  261. const struct rt2x00_rate *hwrate = NULL;
  262. memset(txdesc, 0, sizeof(*txdesc));
  263. /*
  264. * Header and frame information.
  265. */
  266. txdesc->length = entry->skb->len;
  267. txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
  268. /*
  269. * Check whether this frame is to be acked.
  270. */
  271. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  272. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  273. /*
  274. * Check if this is a RTS/CTS frame
  275. */
  276. if (ieee80211_is_rts(hdr->frame_control) ||
  277. ieee80211_is_cts(hdr->frame_control)) {
  278. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  279. if (ieee80211_is_rts(hdr->frame_control))
  280. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  281. else
  282. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  283. if (tx_info->control.rts_cts_rate_idx >= 0)
  284. rate =
  285. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  286. }
  287. /*
  288. * Determine retry information.
  289. */
  290. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  291. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  292. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  293. /*
  294. * Check if more fragments are pending
  295. */
  296. if (ieee80211_has_morefrags(hdr->frame_control)) {
  297. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  298. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  299. }
  300. /*
  301. * Check if more frames (!= fragments) are pending
  302. */
  303. if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
  304. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  305. /*
  306. * Beacons and probe responses require the tsf timestamp
  307. * to be inserted into the frame.
  308. */
  309. if (ieee80211_is_beacon(hdr->frame_control) ||
  310. ieee80211_is_probe_resp(hdr->frame_control))
  311. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  312. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  313. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags))
  314. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  315. /*
  316. * Determine rate modulation.
  317. */
  318. if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD)
  319. txdesc->rate_mode = RATE_MODE_HT_GREENFIELD;
  320. else if (txrate->flags & IEEE80211_TX_RC_MCS)
  321. txdesc->rate_mode = RATE_MODE_HT_MIX;
  322. else {
  323. rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  324. hwrate = rt2x00_get_rate(rate->hw_value);
  325. if (hwrate->flags & DEV_RATE_OFDM)
  326. txdesc->rate_mode = RATE_MODE_OFDM;
  327. else
  328. txdesc->rate_mode = RATE_MODE_CCK;
  329. }
  330. /*
  331. * Apply TX descriptor handling by components
  332. */
  333. rt2x00crypto_create_tx_descriptor(entry, txdesc);
  334. rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
  335. if (test_bit(REQUIRE_HT_TX_DESC, &rt2x00dev->cap_flags))
  336. rt2x00ht_create_tx_descriptor(entry, txdesc, hwrate);
  337. else
  338. rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
  339. }
  340. static int rt2x00queue_write_tx_data(struct queue_entry *entry,
  341. struct txentry_desc *txdesc)
  342. {
  343. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  344. /*
  345. * This should not happen, we already checked the entry
  346. * was ours. When the hardware disagrees there has been
  347. * a queue corruption!
  348. */
  349. if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
  350. rt2x00dev->ops->lib->get_entry_state(entry))) {
  351. ERROR(rt2x00dev,
  352. "Corrupt queue %d, accessing entry which is not ours.\n"
  353. "Please file bug report to %s.\n",
  354. entry->queue->qid, DRV_PROJECT);
  355. return -EINVAL;
  356. }
  357. /*
  358. * Add the requested extra tx headroom in front of the skb.
  359. */
  360. skb_push(entry->skb, rt2x00dev->ops->extra_tx_headroom);
  361. memset(entry->skb->data, 0, rt2x00dev->ops->extra_tx_headroom);
  362. /*
  363. * Call the driver's write_tx_data function, if it exists.
  364. */
  365. if (rt2x00dev->ops->lib->write_tx_data)
  366. rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
  367. /*
  368. * Map the skb to DMA.
  369. */
  370. if (test_bit(REQUIRE_DMA, &rt2x00dev->cap_flags))
  371. rt2x00queue_map_txskb(entry);
  372. return 0;
  373. }
  374. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  375. struct txentry_desc *txdesc)
  376. {
  377. struct data_queue *queue = entry->queue;
  378. queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
  379. /*
  380. * All processing on the frame has been completed, this means
  381. * it is now ready to be dumped to userspace through debugfs.
  382. */
  383. rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry->skb);
  384. }
  385. static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
  386. struct txentry_desc *txdesc)
  387. {
  388. /*
  389. * Check if we need to kick the queue, there are however a few rules
  390. * 1) Don't kick unless this is the last in frame in a burst.
  391. * When the burst flag is set, this frame is always followed
  392. * by another frame which in some way are related to eachother.
  393. * This is true for fragments, RTS or CTS-to-self frames.
  394. * 2) Rule 1 can be broken when the available entries
  395. * in the queue are less then a certain threshold.
  396. */
  397. if (rt2x00queue_threshold(queue) ||
  398. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  399. queue->rt2x00dev->ops->lib->kick_queue(queue);
  400. }
  401. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  402. bool local)
  403. {
  404. struct ieee80211_tx_info *tx_info;
  405. struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
  406. struct txentry_desc txdesc;
  407. struct skb_frame_desc *skbdesc;
  408. u8 rate_idx, rate_flags;
  409. if (unlikely(rt2x00queue_full(queue))) {
  410. ERROR(queue->rt2x00dev,
  411. "Dropping frame due to full tx queue %d.\n", queue->qid);
  412. return -ENOBUFS;
  413. }
  414. if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
  415. &entry->flags))) {
  416. ERROR(queue->rt2x00dev,
  417. "Arrived at non-free entry in the non-full queue %d.\n"
  418. "Please file bug report to %s.\n",
  419. queue->qid, DRV_PROJECT);
  420. return -EINVAL;
  421. }
  422. /*
  423. * Copy all TX descriptor information into txdesc,
  424. * after that we are free to use the skb->cb array
  425. * for our information.
  426. */
  427. entry->skb = skb;
  428. rt2x00queue_create_tx_descriptor(entry, &txdesc);
  429. /*
  430. * All information is retrieved from the skb->cb array,
  431. * now we should claim ownership of the driver part of that
  432. * array, preserving the bitrate index and flags.
  433. */
  434. tx_info = IEEE80211_SKB_CB(skb);
  435. rate_idx = tx_info->control.rates[0].idx;
  436. rate_flags = tx_info->control.rates[0].flags;
  437. skbdesc = get_skb_frame_desc(skb);
  438. memset(skbdesc, 0, sizeof(*skbdesc));
  439. skbdesc->entry = entry;
  440. skbdesc->tx_rate_idx = rate_idx;
  441. skbdesc->tx_rate_flags = rate_flags;
  442. if (local)
  443. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  444. /*
  445. * When hardware encryption is supported, and this frame
  446. * is to be encrypted, we should strip the IV/EIV data from
  447. * the frame so we can provide it to the driver separately.
  448. */
  449. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  450. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  451. if (test_bit(REQUIRE_COPY_IV, &queue->rt2x00dev->cap_flags))
  452. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  453. else
  454. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  455. }
  456. /*
  457. * When DMA allocation is required we should guarentee to the
  458. * driver that the DMA is aligned to a 4-byte boundary.
  459. * However some drivers require L2 padding to pad the payload
  460. * rather then the header. This could be a requirement for
  461. * PCI and USB devices, while header alignment only is valid
  462. * for PCI devices.
  463. */
  464. if (test_bit(REQUIRE_L2PAD, &queue->rt2x00dev->cap_flags))
  465. rt2x00queue_insert_l2pad(entry->skb, txdesc.header_length);
  466. else if (test_bit(REQUIRE_DMA, &queue->rt2x00dev->cap_flags))
  467. rt2x00queue_align_frame(entry->skb);
  468. /*
  469. * It could be possible that the queue was corrupted and this
  470. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  471. * this frame will simply be dropped.
  472. */
  473. if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
  474. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  475. entry->skb = NULL;
  476. return -EIO;
  477. }
  478. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  479. rt2x00queue_index_inc(queue, Q_INDEX);
  480. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  481. rt2x00queue_kick_tx_queue(queue, &txdesc);
  482. return 0;
  483. }
  484. int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
  485. struct ieee80211_vif *vif)
  486. {
  487. struct rt2x00_intf *intf = vif_to_intf(vif);
  488. if (unlikely(!intf->beacon))
  489. return -ENOBUFS;
  490. mutex_lock(&intf->beacon_skb_mutex);
  491. /*
  492. * Clean up the beacon skb.
  493. */
  494. rt2x00queue_free_skb(intf->beacon);
  495. /*
  496. * Clear beacon (single bssid devices don't need to clear the beacon
  497. * since the beacon queue will get stopped anyway).
  498. */
  499. if (rt2x00dev->ops->lib->clear_beacon)
  500. rt2x00dev->ops->lib->clear_beacon(intf->beacon);
  501. mutex_unlock(&intf->beacon_skb_mutex);
  502. return 0;
  503. }
  504. int rt2x00queue_update_beacon_locked(struct rt2x00_dev *rt2x00dev,
  505. struct ieee80211_vif *vif)
  506. {
  507. struct rt2x00_intf *intf = vif_to_intf(vif);
  508. struct skb_frame_desc *skbdesc;
  509. struct txentry_desc txdesc;
  510. if (unlikely(!intf->beacon))
  511. return -ENOBUFS;
  512. /*
  513. * Clean up the beacon skb.
  514. */
  515. rt2x00queue_free_skb(intf->beacon);
  516. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  517. if (!intf->beacon->skb)
  518. return -ENOMEM;
  519. /*
  520. * Copy all TX descriptor information into txdesc,
  521. * after that we are free to use the skb->cb array
  522. * for our information.
  523. */
  524. rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
  525. /*
  526. * Fill in skb descriptor
  527. */
  528. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  529. memset(skbdesc, 0, sizeof(*skbdesc));
  530. skbdesc->entry = intf->beacon;
  531. /*
  532. * Send beacon to hardware.
  533. */
  534. rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
  535. return 0;
  536. }
  537. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  538. struct ieee80211_vif *vif)
  539. {
  540. struct rt2x00_intf *intf = vif_to_intf(vif);
  541. int ret;
  542. mutex_lock(&intf->beacon_skb_mutex);
  543. ret = rt2x00queue_update_beacon_locked(rt2x00dev, vif);
  544. mutex_unlock(&intf->beacon_skb_mutex);
  545. return ret;
  546. }
  547. bool rt2x00queue_for_each_entry(struct data_queue *queue,
  548. enum queue_index start,
  549. enum queue_index end,
  550. void *data,
  551. bool (*fn)(struct queue_entry *entry,
  552. void *data))
  553. {
  554. unsigned long irqflags;
  555. unsigned int index_start;
  556. unsigned int index_end;
  557. unsigned int i;
  558. if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
  559. ERROR(queue->rt2x00dev,
  560. "Entry requested from invalid index range (%d - %d)\n",
  561. start, end);
  562. return true;
  563. }
  564. /*
  565. * Only protect the range we are going to loop over,
  566. * if during our loop a extra entry is set to pending
  567. * it should not be kicked during this run, since it
  568. * is part of another TX operation.
  569. */
  570. spin_lock_irqsave(&queue->index_lock, irqflags);
  571. index_start = queue->index[start];
  572. index_end = queue->index[end];
  573. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  574. /*
  575. * Start from the TX done pointer, this guarentees that we will
  576. * send out all frames in the correct order.
  577. */
  578. if (index_start < index_end) {
  579. for (i = index_start; i < index_end; i++) {
  580. if (fn(&queue->entries[i], data))
  581. return true;
  582. }
  583. } else {
  584. for (i = index_start; i < queue->limit; i++) {
  585. if (fn(&queue->entries[i], data))
  586. return true;
  587. }
  588. for (i = 0; i < index_end; i++) {
  589. if (fn(&queue->entries[i], data))
  590. return true;
  591. }
  592. }
  593. return false;
  594. }
  595. EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
  596. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  597. enum queue_index index)
  598. {
  599. struct queue_entry *entry;
  600. unsigned long irqflags;
  601. if (unlikely(index >= Q_INDEX_MAX)) {
  602. ERROR(queue->rt2x00dev,
  603. "Entry requested from invalid index type (%d)\n", index);
  604. return NULL;
  605. }
  606. spin_lock_irqsave(&queue->index_lock, irqflags);
  607. entry = &queue->entries[queue->index[index]];
  608. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  609. return entry;
  610. }
  611. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  612. void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
  613. {
  614. unsigned long irqflags;
  615. if (unlikely(index >= Q_INDEX_MAX)) {
  616. ERROR(queue->rt2x00dev,
  617. "Index change on invalid index type (%d)\n", index);
  618. return;
  619. }
  620. spin_lock_irqsave(&queue->index_lock, irqflags);
  621. queue->index[index]++;
  622. if (queue->index[index] >= queue->limit)
  623. queue->index[index] = 0;
  624. queue->last_action[index] = jiffies;
  625. if (index == Q_INDEX) {
  626. queue->length++;
  627. } else if (index == Q_INDEX_DONE) {
  628. queue->length--;
  629. queue->count++;
  630. }
  631. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  632. }
  633. void rt2x00queue_pause_queue(struct data_queue *queue)
  634. {
  635. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  636. !test_bit(QUEUE_STARTED, &queue->flags) ||
  637. test_and_set_bit(QUEUE_PAUSED, &queue->flags))
  638. return;
  639. switch (queue->qid) {
  640. case QID_AC_VO:
  641. case QID_AC_VI:
  642. case QID_AC_BE:
  643. case QID_AC_BK:
  644. /*
  645. * For TX queues, we have to disable the queue
  646. * inside mac80211.
  647. */
  648. ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
  649. break;
  650. default:
  651. break;
  652. }
  653. }
  654. EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
  655. void rt2x00queue_unpause_queue(struct data_queue *queue)
  656. {
  657. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  658. !test_bit(QUEUE_STARTED, &queue->flags) ||
  659. !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
  660. return;
  661. switch (queue->qid) {
  662. case QID_AC_VO:
  663. case QID_AC_VI:
  664. case QID_AC_BE:
  665. case QID_AC_BK:
  666. /*
  667. * For TX queues, we have to enable the queue
  668. * inside mac80211.
  669. */
  670. ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
  671. break;
  672. case QID_RX:
  673. /*
  674. * For RX we need to kick the queue now in order to
  675. * receive frames.
  676. */
  677. queue->rt2x00dev->ops->lib->kick_queue(queue);
  678. default:
  679. break;
  680. }
  681. }
  682. EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
  683. void rt2x00queue_start_queue(struct data_queue *queue)
  684. {
  685. mutex_lock(&queue->status_lock);
  686. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  687. test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
  688. mutex_unlock(&queue->status_lock);
  689. return;
  690. }
  691. set_bit(QUEUE_PAUSED, &queue->flags);
  692. queue->rt2x00dev->ops->lib->start_queue(queue);
  693. rt2x00queue_unpause_queue(queue);
  694. mutex_unlock(&queue->status_lock);
  695. }
  696. EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
  697. void rt2x00queue_stop_queue(struct data_queue *queue)
  698. {
  699. mutex_lock(&queue->status_lock);
  700. if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
  701. mutex_unlock(&queue->status_lock);
  702. return;
  703. }
  704. rt2x00queue_pause_queue(queue);
  705. queue->rt2x00dev->ops->lib->stop_queue(queue);
  706. mutex_unlock(&queue->status_lock);
  707. }
  708. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
  709. void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
  710. {
  711. unsigned int i;
  712. bool started;
  713. bool tx_queue =
  714. (queue->qid == QID_AC_VO) ||
  715. (queue->qid == QID_AC_VI) ||
  716. (queue->qid == QID_AC_BE) ||
  717. (queue->qid == QID_AC_BK);
  718. mutex_lock(&queue->status_lock);
  719. /*
  720. * If the queue has been started, we must stop it temporarily
  721. * to prevent any new frames to be queued on the device. If
  722. * we are not dropping the pending frames, the queue must
  723. * only be stopped in the software and not the hardware,
  724. * otherwise the queue will never become empty on its own.
  725. */
  726. started = test_bit(QUEUE_STARTED, &queue->flags);
  727. if (started) {
  728. /*
  729. * Pause the queue
  730. */
  731. rt2x00queue_pause_queue(queue);
  732. /*
  733. * If we are not supposed to drop any pending
  734. * frames, this means we must force a start (=kick)
  735. * to the queue to make sure the hardware will
  736. * start transmitting.
  737. */
  738. if (!drop && tx_queue)
  739. queue->rt2x00dev->ops->lib->kick_queue(queue);
  740. }
  741. /*
  742. * Check if driver supports flushing, we can only guarentee
  743. * full support for flushing if the driver is able
  744. * to cancel all pending frames (drop = true).
  745. */
  746. if (drop && queue->rt2x00dev->ops->lib->flush_queue)
  747. queue->rt2x00dev->ops->lib->flush_queue(queue);
  748. /*
  749. * When we don't want to drop any frames, or when
  750. * the driver doesn't fully flush the queue correcly,
  751. * we must wait for the queue to become empty.
  752. */
  753. for (i = 0; !rt2x00queue_empty(queue) && i < 100; i++)
  754. msleep(10);
  755. /*
  756. * The queue flush has failed...
  757. */
  758. if (unlikely(!rt2x00queue_empty(queue)))
  759. WARNING(queue->rt2x00dev, "Queue %d failed to flush\n", queue->qid);
  760. /*
  761. * Restore the queue to the previous status
  762. */
  763. if (started)
  764. rt2x00queue_unpause_queue(queue);
  765. mutex_unlock(&queue->status_lock);
  766. }
  767. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
  768. void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
  769. {
  770. struct data_queue *queue;
  771. /*
  772. * rt2x00queue_start_queue will call ieee80211_wake_queue
  773. * for each queue after is has been properly initialized.
  774. */
  775. tx_queue_for_each(rt2x00dev, queue)
  776. rt2x00queue_start_queue(queue);
  777. rt2x00queue_start_queue(rt2x00dev->rx);
  778. }
  779. EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
  780. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  781. {
  782. struct data_queue *queue;
  783. /*
  784. * rt2x00queue_stop_queue will call ieee80211_stop_queue
  785. * as well, but we are completely shutting doing everything
  786. * now, so it is much safer to stop all TX queues at once,
  787. * and use rt2x00queue_stop_queue for cleaning up.
  788. */
  789. ieee80211_stop_queues(rt2x00dev->hw);
  790. tx_queue_for_each(rt2x00dev, queue)
  791. rt2x00queue_stop_queue(queue);
  792. rt2x00queue_stop_queue(rt2x00dev->rx);
  793. }
  794. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
  795. void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
  796. {
  797. struct data_queue *queue;
  798. tx_queue_for_each(rt2x00dev, queue)
  799. rt2x00queue_flush_queue(queue, drop);
  800. rt2x00queue_flush_queue(rt2x00dev->rx, drop);
  801. }
  802. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
  803. static void rt2x00queue_reset(struct data_queue *queue)
  804. {
  805. unsigned long irqflags;
  806. unsigned int i;
  807. spin_lock_irqsave(&queue->index_lock, irqflags);
  808. queue->count = 0;
  809. queue->length = 0;
  810. for (i = 0; i < Q_INDEX_MAX; i++) {
  811. queue->index[i] = 0;
  812. queue->last_action[i] = jiffies;
  813. }
  814. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  815. }
  816. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  817. {
  818. struct data_queue *queue;
  819. unsigned int i;
  820. queue_for_each(rt2x00dev, queue) {
  821. rt2x00queue_reset(queue);
  822. for (i = 0; i < queue->limit; i++)
  823. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  824. }
  825. }
  826. static int rt2x00queue_alloc_entries(struct data_queue *queue,
  827. const struct data_queue_desc *qdesc)
  828. {
  829. struct queue_entry *entries;
  830. unsigned int entry_size;
  831. unsigned int i;
  832. rt2x00queue_reset(queue);
  833. queue->limit = qdesc->entry_num;
  834. queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
  835. queue->data_size = qdesc->data_size;
  836. queue->desc_size = qdesc->desc_size;
  837. /*
  838. * Allocate all queue entries.
  839. */
  840. entry_size = sizeof(*entries) + qdesc->priv_size;
  841. entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
  842. if (!entries)
  843. return -ENOMEM;
  844. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  845. (((char *)(__base)) + ((__limit) * (__esize)) + \
  846. ((__index) * (__psize)))
  847. for (i = 0; i < queue->limit; i++) {
  848. entries[i].flags = 0;
  849. entries[i].queue = queue;
  850. entries[i].skb = NULL;
  851. entries[i].entry_idx = i;
  852. entries[i].priv_data =
  853. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  854. sizeof(*entries), qdesc->priv_size);
  855. }
  856. #undef QUEUE_ENTRY_PRIV_OFFSET
  857. queue->entries = entries;
  858. return 0;
  859. }
  860. static void rt2x00queue_free_skbs(struct data_queue *queue)
  861. {
  862. unsigned int i;
  863. if (!queue->entries)
  864. return;
  865. for (i = 0; i < queue->limit; i++) {
  866. rt2x00queue_free_skb(&queue->entries[i]);
  867. }
  868. }
  869. static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
  870. {
  871. unsigned int i;
  872. struct sk_buff *skb;
  873. for (i = 0; i < queue->limit; i++) {
  874. skb = rt2x00queue_alloc_rxskb(&queue->entries[i]);
  875. if (!skb)
  876. return -ENOMEM;
  877. queue->entries[i].skb = skb;
  878. }
  879. return 0;
  880. }
  881. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  882. {
  883. struct data_queue *queue;
  884. int status;
  885. status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
  886. if (status)
  887. goto exit;
  888. tx_queue_for_each(rt2x00dev, queue) {
  889. status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
  890. if (status)
  891. goto exit;
  892. }
  893. status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
  894. if (status)
  895. goto exit;
  896. if (test_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags)) {
  897. status = rt2x00queue_alloc_entries(rt2x00dev->atim,
  898. rt2x00dev->ops->atim);
  899. if (status)
  900. goto exit;
  901. }
  902. status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
  903. if (status)
  904. goto exit;
  905. return 0;
  906. exit:
  907. ERROR(rt2x00dev, "Queue entries allocation failed.\n");
  908. rt2x00queue_uninitialize(rt2x00dev);
  909. return status;
  910. }
  911. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  912. {
  913. struct data_queue *queue;
  914. rt2x00queue_free_skbs(rt2x00dev->rx);
  915. queue_for_each(rt2x00dev, queue) {
  916. kfree(queue->entries);
  917. queue->entries = NULL;
  918. }
  919. }
  920. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  921. struct data_queue *queue, enum data_queue_qid qid)
  922. {
  923. mutex_init(&queue->status_lock);
  924. spin_lock_init(&queue->index_lock);
  925. queue->rt2x00dev = rt2x00dev;
  926. queue->qid = qid;
  927. queue->txop = 0;
  928. queue->aifs = 2;
  929. queue->cw_min = 5;
  930. queue->cw_max = 10;
  931. }
  932. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  933. {
  934. struct data_queue *queue;
  935. enum data_queue_qid qid;
  936. unsigned int req_atim =
  937. !!test_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags);
  938. /*
  939. * We need the following queues:
  940. * RX: 1
  941. * TX: ops->tx_queues
  942. * Beacon: 1
  943. * Atim: 1 (if required)
  944. */
  945. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  946. queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
  947. if (!queue) {
  948. ERROR(rt2x00dev, "Queue allocation failed.\n");
  949. return -ENOMEM;
  950. }
  951. /*
  952. * Initialize pointers
  953. */
  954. rt2x00dev->rx = queue;
  955. rt2x00dev->tx = &queue[1];
  956. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  957. rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL;
  958. /*
  959. * Initialize queue parameters.
  960. * RX: qid = QID_RX
  961. * TX: qid = QID_AC_VO + index
  962. * TX: cw_min: 2^5 = 32.
  963. * TX: cw_max: 2^10 = 1024.
  964. * BCN: qid = QID_BEACON
  965. * ATIM: qid = QID_ATIM
  966. */
  967. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  968. qid = QID_AC_VO;
  969. tx_queue_for_each(rt2x00dev, queue)
  970. rt2x00queue_init(rt2x00dev, queue, qid++);
  971. rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON);
  972. if (req_atim)
  973. rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM);
  974. return 0;
  975. }
  976. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  977. {
  978. kfree(rt2x00dev->rx);
  979. rt2x00dev->rx = NULL;
  980. rt2x00dev->tx = NULL;
  981. rt2x00dev->bcn = NULL;
  982. }