vmwgfx_kms.c 55 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_kms.h"
  28. /* Might need a hrtimer here? */
  29. #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
  30. struct vmw_clip_rect {
  31. int x1, x2, y1, y2;
  32. };
  33. /**
  34. * Clip @num_rects number of @rects against @clip storing the
  35. * results in @out_rects and the number of passed rects in @out_num.
  36. */
  37. void vmw_clip_cliprects(struct drm_clip_rect *rects,
  38. int num_rects,
  39. struct vmw_clip_rect clip,
  40. SVGASignedRect *out_rects,
  41. int *out_num)
  42. {
  43. int i, k;
  44. for (i = 0, k = 0; i < num_rects; i++) {
  45. int x1 = max_t(int, clip.x1, rects[i].x1);
  46. int y1 = max_t(int, clip.y1, rects[i].y1);
  47. int x2 = min_t(int, clip.x2, rects[i].x2);
  48. int y2 = min_t(int, clip.y2, rects[i].y2);
  49. if (x1 >= x2)
  50. continue;
  51. if (y1 >= y2)
  52. continue;
  53. out_rects[k].left = x1;
  54. out_rects[k].top = y1;
  55. out_rects[k].right = x2;
  56. out_rects[k].bottom = y2;
  57. k++;
  58. }
  59. *out_num = k;
  60. }
  61. void vmw_display_unit_cleanup(struct vmw_display_unit *du)
  62. {
  63. if (du->cursor_surface)
  64. vmw_surface_unreference(&du->cursor_surface);
  65. if (du->cursor_dmabuf)
  66. vmw_dmabuf_unreference(&du->cursor_dmabuf);
  67. drm_sysfs_connector_remove(&du->connector);
  68. drm_crtc_cleanup(&du->crtc);
  69. drm_encoder_cleanup(&du->encoder);
  70. drm_connector_cleanup(&du->connector);
  71. }
  72. /*
  73. * Display Unit Cursor functions
  74. */
  75. int vmw_cursor_update_image(struct vmw_private *dev_priv,
  76. u32 *image, u32 width, u32 height,
  77. u32 hotspotX, u32 hotspotY)
  78. {
  79. struct {
  80. u32 cmd;
  81. SVGAFifoCmdDefineAlphaCursor cursor;
  82. } *cmd;
  83. u32 image_size = width * height * 4;
  84. u32 cmd_size = sizeof(*cmd) + image_size;
  85. if (!image)
  86. return -EINVAL;
  87. cmd = vmw_fifo_reserve(dev_priv, cmd_size);
  88. if (unlikely(cmd == NULL)) {
  89. DRM_ERROR("Fifo reserve failed.\n");
  90. return -ENOMEM;
  91. }
  92. memset(cmd, 0, sizeof(*cmd));
  93. memcpy(&cmd[1], image, image_size);
  94. cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
  95. cmd->cursor.id = cpu_to_le32(0);
  96. cmd->cursor.width = cpu_to_le32(width);
  97. cmd->cursor.height = cpu_to_le32(height);
  98. cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
  99. cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
  100. vmw_fifo_commit(dev_priv, cmd_size);
  101. return 0;
  102. }
  103. int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
  104. struct vmw_dma_buffer *dmabuf,
  105. u32 width, u32 height,
  106. u32 hotspotX, u32 hotspotY)
  107. {
  108. struct ttm_bo_kmap_obj map;
  109. unsigned long kmap_offset;
  110. unsigned long kmap_num;
  111. void *virtual;
  112. bool dummy;
  113. int ret;
  114. kmap_offset = 0;
  115. kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
  116. ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
  117. if (unlikely(ret != 0)) {
  118. DRM_ERROR("reserve failed\n");
  119. return -EINVAL;
  120. }
  121. ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
  122. if (unlikely(ret != 0))
  123. goto err_unreserve;
  124. virtual = ttm_kmap_obj_virtual(&map, &dummy);
  125. ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
  126. hotspotX, hotspotY);
  127. ttm_bo_kunmap(&map);
  128. err_unreserve:
  129. ttm_bo_unreserve(&dmabuf->base);
  130. return ret;
  131. }
  132. void vmw_cursor_update_position(struct vmw_private *dev_priv,
  133. bool show, int x, int y)
  134. {
  135. __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
  136. uint32_t count;
  137. iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
  138. iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
  139. iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
  140. count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  141. iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  142. }
  143. int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
  144. uint32_t handle, uint32_t width, uint32_t height)
  145. {
  146. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  147. struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
  148. struct vmw_surface *surface = NULL;
  149. struct vmw_dma_buffer *dmabuf = NULL;
  150. int ret;
  151. /*
  152. * FIXME: Unclear whether there's any global state touched by the
  153. * cursor_set function, especially vmw_cursor_update_position looks
  154. * suspicious. For now take the easy route and reacquire all locks. We
  155. * can do this since the caller in the drm core doesn't check anything
  156. * which is protected by any looks.
  157. */
  158. mutex_unlock(&crtc->mutex);
  159. drm_modeset_lock_all(dev_priv->dev);
  160. /* A lot of the code assumes this */
  161. if (handle && (width != 64 || height != 64)) {
  162. ret = -EINVAL;
  163. goto out;
  164. }
  165. if (handle) {
  166. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  167. ret = vmw_user_lookup_handle(dev_priv, tfile,
  168. handle, &surface, &dmabuf);
  169. if (ret) {
  170. DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
  171. ret = -EINVAL;
  172. goto out;
  173. }
  174. }
  175. /* need to do this before taking down old image */
  176. if (surface && !surface->snooper.image) {
  177. DRM_ERROR("surface not suitable for cursor\n");
  178. vmw_surface_unreference(&surface);
  179. ret = -EINVAL;
  180. goto out;
  181. }
  182. /* takedown old cursor */
  183. if (du->cursor_surface) {
  184. du->cursor_surface->snooper.crtc = NULL;
  185. vmw_surface_unreference(&du->cursor_surface);
  186. }
  187. if (du->cursor_dmabuf)
  188. vmw_dmabuf_unreference(&du->cursor_dmabuf);
  189. /* setup new image */
  190. if (surface) {
  191. /* vmw_user_surface_lookup takes one reference */
  192. du->cursor_surface = surface;
  193. du->cursor_surface->snooper.crtc = crtc;
  194. du->cursor_age = du->cursor_surface->snooper.age;
  195. vmw_cursor_update_image(dev_priv, surface->snooper.image,
  196. 64, 64, du->hotspot_x, du->hotspot_y);
  197. } else if (dmabuf) {
  198. /* vmw_user_surface_lookup takes one reference */
  199. du->cursor_dmabuf = dmabuf;
  200. ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
  201. du->hotspot_x, du->hotspot_y);
  202. } else {
  203. vmw_cursor_update_position(dev_priv, false, 0, 0);
  204. ret = 0;
  205. goto out;
  206. }
  207. vmw_cursor_update_position(dev_priv, true,
  208. du->cursor_x + du->hotspot_x,
  209. du->cursor_y + du->hotspot_y);
  210. ret = 0;
  211. out:
  212. drm_modeset_unlock_all(dev_priv->dev);
  213. mutex_lock(&crtc->mutex);
  214. return ret;
  215. }
  216. int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
  217. {
  218. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  219. struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
  220. bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
  221. du->cursor_x = x + crtc->x;
  222. du->cursor_y = y + crtc->y;
  223. /*
  224. * FIXME: Unclear whether there's any global state touched by the
  225. * cursor_set function, especially vmw_cursor_update_position looks
  226. * suspicious. For now take the easy route and reacquire all locks. We
  227. * can do this since the caller in the drm core doesn't check anything
  228. * which is protected by any looks.
  229. */
  230. mutex_unlock(&crtc->mutex);
  231. drm_modeset_lock_all(dev_priv->dev);
  232. vmw_cursor_update_position(dev_priv, shown,
  233. du->cursor_x + du->hotspot_x,
  234. du->cursor_y + du->hotspot_y);
  235. drm_modeset_unlock_all(dev_priv->dev);
  236. mutex_lock(&crtc->mutex);
  237. return 0;
  238. }
  239. void vmw_kms_cursor_snoop(struct vmw_surface *srf,
  240. struct ttm_object_file *tfile,
  241. struct ttm_buffer_object *bo,
  242. SVGA3dCmdHeader *header)
  243. {
  244. struct ttm_bo_kmap_obj map;
  245. unsigned long kmap_offset;
  246. unsigned long kmap_num;
  247. SVGA3dCopyBox *box;
  248. unsigned box_count;
  249. void *virtual;
  250. bool dummy;
  251. struct vmw_dma_cmd {
  252. SVGA3dCmdHeader header;
  253. SVGA3dCmdSurfaceDMA dma;
  254. } *cmd;
  255. int i, ret;
  256. cmd = container_of(header, struct vmw_dma_cmd, header);
  257. /* No snooper installed */
  258. if (!srf->snooper.image)
  259. return;
  260. if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
  261. DRM_ERROR("face and mipmap for cursors should never != 0\n");
  262. return;
  263. }
  264. if (cmd->header.size < 64) {
  265. DRM_ERROR("at least one full copy box must be given\n");
  266. return;
  267. }
  268. box = (SVGA3dCopyBox *)&cmd[1];
  269. box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
  270. sizeof(SVGA3dCopyBox);
  271. if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
  272. box->x != 0 || box->y != 0 || box->z != 0 ||
  273. box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
  274. box->d != 1 || box_count != 1) {
  275. /* TODO handle none page aligned offsets */
  276. /* TODO handle more dst & src != 0 */
  277. /* TODO handle more then one copy */
  278. DRM_ERROR("Cant snoop dma request for cursor!\n");
  279. DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
  280. box->srcx, box->srcy, box->srcz,
  281. box->x, box->y, box->z,
  282. box->w, box->h, box->d, box_count,
  283. cmd->dma.guest.ptr.offset);
  284. return;
  285. }
  286. kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
  287. kmap_num = (64*64*4) >> PAGE_SHIFT;
  288. ret = ttm_bo_reserve(bo, true, false, false, 0);
  289. if (unlikely(ret != 0)) {
  290. DRM_ERROR("reserve failed\n");
  291. return;
  292. }
  293. ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
  294. if (unlikely(ret != 0))
  295. goto err_unreserve;
  296. virtual = ttm_kmap_obj_virtual(&map, &dummy);
  297. if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
  298. memcpy(srf->snooper.image, virtual, 64*64*4);
  299. } else {
  300. /* Image is unsigned pointer. */
  301. for (i = 0; i < box->h; i++)
  302. memcpy(srf->snooper.image + i * 64,
  303. virtual + i * cmd->dma.guest.pitch,
  304. box->w * 4);
  305. }
  306. srf->snooper.age++;
  307. /* we can't call this function from this function since execbuf has
  308. * reserved fifo space.
  309. *
  310. * if (srf->snooper.crtc)
  311. * vmw_ldu_crtc_cursor_update_image(dev_priv,
  312. * srf->snooper.image, 64, 64,
  313. * du->hotspot_x, du->hotspot_y);
  314. */
  315. ttm_bo_kunmap(&map);
  316. err_unreserve:
  317. ttm_bo_unreserve(bo);
  318. }
  319. void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
  320. {
  321. struct drm_device *dev = dev_priv->dev;
  322. struct vmw_display_unit *du;
  323. struct drm_crtc *crtc;
  324. mutex_lock(&dev->mode_config.mutex);
  325. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  326. du = vmw_crtc_to_du(crtc);
  327. if (!du->cursor_surface ||
  328. du->cursor_age == du->cursor_surface->snooper.age)
  329. continue;
  330. du->cursor_age = du->cursor_surface->snooper.age;
  331. vmw_cursor_update_image(dev_priv,
  332. du->cursor_surface->snooper.image,
  333. 64, 64, du->hotspot_x, du->hotspot_y);
  334. }
  335. mutex_unlock(&dev->mode_config.mutex);
  336. }
  337. /*
  338. * Generic framebuffer code
  339. */
  340. /*
  341. * Surface framebuffer code
  342. */
  343. #define vmw_framebuffer_to_vfbs(x) \
  344. container_of(x, struct vmw_framebuffer_surface, base.base)
  345. struct vmw_framebuffer_surface {
  346. struct vmw_framebuffer base;
  347. struct vmw_surface *surface;
  348. struct vmw_dma_buffer *buffer;
  349. struct list_head head;
  350. struct drm_master *master;
  351. };
  352. void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
  353. {
  354. struct vmw_framebuffer_surface *vfbs =
  355. vmw_framebuffer_to_vfbs(framebuffer);
  356. struct vmw_master *vmaster = vmw_master(vfbs->master);
  357. mutex_lock(&vmaster->fb_surf_mutex);
  358. list_del(&vfbs->head);
  359. mutex_unlock(&vmaster->fb_surf_mutex);
  360. drm_master_put(&vfbs->master);
  361. drm_framebuffer_cleanup(framebuffer);
  362. vmw_surface_unreference(&vfbs->surface);
  363. ttm_base_object_unref(&vfbs->base.user_obj);
  364. kfree(vfbs);
  365. }
  366. static int do_surface_dirty_sou(struct vmw_private *dev_priv,
  367. struct drm_file *file_priv,
  368. struct vmw_framebuffer *framebuffer,
  369. unsigned flags, unsigned color,
  370. struct drm_clip_rect *clips,
  371. unsigned num_clips, int inc,
  372. struct vmw_fence_obj **out_fence)
  373. {
  374. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  375. struct drm_clip_rect *clips_ptr;
  376. struct drm_clip_rect *tmp;
  377. struct drm_crtc *crtc;
  378. size_t fifo_size;
  379. int i, num_units;
  380. int ret = 0; /* silence warning */
  381. int left, right, top, bottom;
  382. struct {
  383. SVGA3dCmdHeader header;
  384. SVGA3dCmdBlitSurfaceToScreen body;
  385. } *cmd;
  386. SVGASignedRect *blits;
  387. num_units = 0;
  388. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
  389. head) {
  390. if (crtc->fb != &framebuffer->base)
  391. continue;
  392. units[num_units++] = vmw_crtc_to_du(crtc);
  393. }
  394. BUG_ON(!clips || !num_clips);
  395. tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
  396. if (unlikely(tmp == NULL)) {
  397. DRM_ERROR("Temporary cliprect memory alloc failed.\n");
  398. return -ENOMEM;
  399. }
  400. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
  401. cmd = kzalloc(fifo_size, GFP_KERNEL);
  402. if (unlikely(cmd == NULL)) {
  403. DRM_ERROR("Temporary fifo memory alloc failed.\n");
  404. ret = -ENOMEM;
  405. goto out_free_tmp;
  406. }
  407. /* setup blits pointer */
  408. blits = (SVGASignedRect *)&cmd[1];
  409. /* initial clip region */
  410. left = clips->x1;
  411. right = clips->x2;
  412. top = clips->y1;
  413. bottom = clips->y2;
  414. /* skip the first clip rect */
  415. for (i = 1, clips_ptr = clips + inc;
  416. i < num_clips; i++, clips_ptr += inc) {
  417. left = min_t(int, left, (int)clips_ptr->x1);
  418. right = max_t(int, right, (int)clips_ptr->x2);
  419. top = min_t(int, top, (int)clips_ptr->y1);
  420. bottom = max_t(int, bottom, (int)clips_ptr->y2);
  421. }
  422. /* only need to do this once */
  423. cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
  424. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  425. cmd->body.srcRect.left = left;
  426. cmd->body.srcRect.right = right;
  427. cmd->body.srcRect.top = top;
  428. cmd->body.srcRect.bottom = bottom;
  429. clips_ptr = clips;
  430. for (i = 0; i < num_clips; i++, clips_ptr += inc) {
  431. tmp[i].x1 = clips_ptr->x1 - left;
  432. tmp[i].x2 = clips_ptr->x2 - left;
  433. tmp[i].y1 = clips_ptr->y1 - top;
  434. tmp[i].y2 = clips_ptr->y2 - top;
  435. }
  436. /* do per unit writing, reuse fifo for each */
  437. for (i = 0; i < num_units; i++) {
  438. struct vmw_display_unit *unit = units[i];
  439. struct vmw_clip_rect clip;
  440. int num;
  441. clip.x1 = left - unit->crtc.x;
  442. clip.y1 = top - unit->crtc.y;
  443. clip.x2 = right - unit->crtc.x;
  444. clip.y2 = bottom - unit->crtc.y;
  445. /* skip any crtcs that misses the clip region */
  446. if (clip.x1 >= unit->crtc.mode.hdisplay ||
  447. clip.y1 >= unit->crtc.mode.vdisplay ||
  448. clip.x2 <= 0 || clip.y2 <= 0)
  449. continue;
  450. /*
  451. * In order for the clip rects to be correctly scaled
  452. * the src and dest rects needs to be the same size.
  453. */
  454. cmd->body.destRect.left = clip.x1;
  455. cmd->body.destRect.right = clip.x2;
  456. cmd->body.destRect.top = clip.y1;
  457. cmd->body.destRect.bottom = clip.y2;
  458. /* create a clip rect of the crtc in dest coords */
  459. clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
  460. clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
  461. clip.x1 = 0 - clip.x1;
  462. clip.y1 = 0 - clip.y1;
  463. /* need to reset sid as it is changed by execbuf */
  464. cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
  465. cmd->body.destScreenId = unit->unit;
  466. /* clip and write blits to cmd stream */
  467. vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
  468. /* if no cliprects hit skip this */
  469. if (num == 0)
  470. continue;
  471. /* only return the last fence */
  472. if (out_fence && *out_fence)
  473. vmw_fence_obj_unreference(out_fence);
  474. /* recalculate package length */
  475. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
  476. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  477. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  478. fifo_size, 0, NULL, out_fence);
  479. if (unlikely(ret != 0))
  480. break;
  481. }
  482. kfree(cmd);
  483. out_free_tmp:
  484. kfree(tmp);
  485. return ret;
  486. }
  487. int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
  488. struct drm_file *file_priv,
  489. unsigned flags, unsigned color,
  490. struct drm_clip_rect *clips,
  491. unsigned num_clips)
  492. {
  493. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  494. struct vmw_master *vmaster = vmw_master(file_priv->master);
  495. struct vmw_framebuffer_surface *vfbs =
  496. vmw_framebuffer_to_vfbs(framebuffer);
  497. struct drm_clip_rect norect;
  498. int ret, inc = 1;
  499. if (unlikely(vfbs->master != file_priv->master))
  500. return -EINVAL;
  501. /* Require ScreenObject support for 3D */
  502. if (!dev_priv->sou_priv)
  503. return -EINVAL;
  504. ret = ttm_read_lock(&vmaster->lock, true);
  505. if (unlikely(ret != 0))
  506. return ret;
  507. if (!num_clips) {
  508. num_clips = 1;
  509. clips = &norect;
  510. norect.x1 = norect.y1 = 0;
  511. norect.x2 = framebuffer->width;
  512. norect.y2 = framebuffer->height;
  513. } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
  514. num_clips /= 2;
  515. inc = 2; /* skip source rects */
  516. }
  517. ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
  518. flags, color,
  519. clips, num_clips, inc, NULL);
  520. ttm_read_unlock(&vmaster->lock);
  521. return 0;
  522. }
  523. static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
  524. .destroy = vmw_framebuffer_surface_destroy,
  525. .dirty = vmw_framebuffer_surface_dirty,
  526. };
  527. static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
  528. struct drm_file *file_priv,
  529. struct vmw_surface *surface,
  530. struct vmw_framebuffer **out,
  531. const struct drm_mode_fb_cmd
  532. *mode_cmd)
  533. {
  534. struct drm_device *dev = dev_priv->dev;
  535. struct vmw_framebuffer_surface *vfbs;
  536. enum SVGA3dSurfaceFormat format;
  537. struct vmw_master *vmaster = vmw_master(file_priv->master);
  538. int ret;
  539. /* 3D is only supported on HWv8 hosts which supports screen objects */
  540. if (!dev_priv->sou_priv)
  541. return -ENOSYS;
  542. /*
  543. * Sanity checks.
  544. */
  545. /* Surface must be marked as a scanout. */
  546. if (unlikely(!surface->scanout))
  547. return -EINVAL;
  548. if (unlikely(surface->mip_levels[0] != 1 ||
  549. surface->num_sizes != 1 ||
  550. surface->sizes[0].width < mode_cmd->width ||
  551. surface->sizes[0].height < mode_cmd->height ||
  552. surface->sizes[0].depth != 1)) {
  553. DRM_ERROR("Incompatible surface dimensions "
  554. "for requested mode.\n");
  555. return -EINVAL;
  556. }
  557. switch (mode_cmd->depth) {
  558. case 32:
  559. format = SVGA3D_A8R8G8B8;
  560. break;
  561. case 24:
  562. format = SVGA3D_X8R8G8B8;
  563. break;
  564. case 16:
  565. format = SVGA3D_R5G6B5;
  566. break;
  567. case 15:
  568. format = SVGA3D_A1R5G5B5;
  569. break;
  570. case 8:
  571. format = SVGA3D_LUMINANCE8;
  572. break;
  573. default:
  574. DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
  575. return -EINVAL;
  576. }
  577. if (unlikely(format != surface->format)) {
  578. DRM_ERROR("Invalid surface format for requested mode.\n");
  579. return -EINVAL;
  580. }
  581. vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
  582. if (!vfbs) {
  583. ret = -ENOMEM;
  584. goto out_err1;
  585. }
  586. if (!vmw_surface_reference(surface)) {
  587. DRM_ERROR("failed to reference surface %p\n", surface);
  588. ret = -EINVAL;
  589. goto out_err2;
  590. }
  591. /* XXX get the first 3 from the surface info */
  592. vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
  593. vfbs->base.base.pitches[0] = mode_cmd->pitch;
  594. vfbs->base.base.depth = mode_cmd->depth;
  595. vfbs->base.base.width = mode_cmd->width;
  596. vfbs->base.base.height = mode_cmd->height;
  597. vfbs->surface = surface;
  598. vfbs->base.user_handle = mode_cmd->handle;
  599. vfbs->master = drm_master_get(file_priv->master);
  600. mutex_lock(&vmaster->fb_surf_mutex);
  601. list_add_tail(&vfbs->head, &vmaster->fb_surf);
  602. mutex_unlock(&vmaster->fb_surf_mutex);
  603. *out = &vfbs->base;
  604. ret = drm_framebuffer_init(dev, &vfbs->base.base,
  605. &vmw_framebuffer_surface_funcs);
  606. if (ret)
  607. goto out_err3;
  608. return 0;
  609. out_err3:
  610. vmw_surface_unreference(&surface);
  611. out_err2:
  612. kfree(vfbs);
  613. out_err1:
  614. return ret;
  615. }
  616. /*
  617. * Dmabuf framebuffer code
  618. */
  619. #define vmw_framebuffer_to_vfbd(x) \
  620. container_of(x, struct vmw_framebuffer_dmabuf, base.base)
  621. struct vmw_framebuffer_dmabuf {
  622. struct vmw_framebuffer base;
  623. struct vmw_dma_buffer *buffer;
  624. };
  625. void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
  626. {
  627. struct vmw_framebuffer_dmabuf *vfbd =
  628. vmw_framebuffer_to_vfbd(framebuffer);
  629. drm_framebuffer_cleanup(framebuffer);
  630. vmw_dmabuf_unreference(&vfbd->buffer);
  631. ttm_base_object_unref(&vfbd->base.user_obj);
  632. kfree(vfbd);
  633. }
  634. static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
  635. struct vmw_framebuffer *framebuffer,
  636. unsigned flags, unsigned color,
  637. struct drm_clip_rect *clips,
  638. unsigned num_clips, int increment)
  639. {
  640. size_t fifo_size;
  641. int i;
  642. struct {
  643. uint32_t header;
  644. SVGAFifoCmdUpdate body;
  645. } *cmd;
  646. fifo_size = sizeof(*cmd) * num_clips;
  647. cmd = vmw_fifo_reserve(dev_priv, fifo_size);
  648. if (unlikely(cmd == NULL)) {
  649. DRM_ERROR("Fifo reserve failed.\n");
  650. return -ENOMEM;
  651. }
  652. memset(cmd, 0, fifo_size);
  653. for (i = 0; i < num_clips; i++, clips += increment) {
  654. cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
  655. cmd[i].body.x = cpu_to_le32(clips->x1);
  656. cmd[i].body.y = cpu_to_le32(clips->y1);
  657. cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
  658. cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
  659. }
  660. vmw_fifo_commit(dev_priv, fifo_size);
  661. return 0;
  662. }
  663. static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
  664. struct vmw_private *dev_priv,
  665. struct vmw_framebuffer *framebuffer)
  666. {
  667. int depth = framebuffer->base.depth;
  668. size_t fifo_size;
  669. int ret;
  670. struct {
  671. uint32_t header;
  672. SVGAFifoCmdDefineGMRFB body;
  673. } *cmd;
  674. /* Emulate RGBA support, contrary to svga_reg.h this is not
  675. * supported by hosts. This is only a problem if we are reading
  676. * this value later and expecting what we uploaded back.
  677. */
  678. if (depth == 32)
  679. depth = 24;
  680. fifo_size = sizeof(*cmd);
  681. cmd = kmalloc(fifo_size, GFP_KERNEL);
  682. if (unlikely(cmd == NULL)) {
  683. DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
  684. return -ENOMEM;
  685. }
  686. memset(cmd, 0, fifo_size);
  687. cmd->header = SVGA_CMD_DEFINE_GMRFB;
  688. cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
  689. cmd->body.format.colorDepth = depth;
  690. cmd->body.format.reserved = 0;
  691. cmd->body.bytesPerLine = framebuffer->base.pitches[0];
  692. cmd->body.ptr.gmrId = framebuffer->user_handle;
  693. cmd->body.ptr.offset = 0;
  694. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  695. fifo_size, 0, NULL, NULL);
  696. kfree(cmd);
  697. return ret;
  698. }
  699. static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
  700. struct vmw_private *dev_priv,
  701. struct vmw_framebuffer *framebuffer,
  702. unsigned flags, unsigned color,
  703. struct drm_clip_rect *clips,
  704. unsigned num_clips, int increment,
  705. struct vmw_fence_obj **out_fence)
  706. {
  707. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  708. struct drm_clip_rect *clips_ptr;
  709. int i, k, num_units, ret;
  710. struct drm_crtc *crtc;
  711. size_t fifo_size;
  712. struct {
  713. uint32_t header;
  714. SVGAFifoCmdBlitGMRFBToScreen body;
  715. } *blits;
  716. ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
  717. if (unlikely(ret != 0))
  718. return ret; /* define_gmrfb prints warnings */
  719. fifo_size = sizeof(*blits) * num_clips;
  720. blits = kmalloc(fifo_size, GFP_KERNEL);
  721. if (unlikely(blits == NULL)) {
  722. DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
  723. return -ENOMEM;
  724. }
  725. num_units = 0;
  726. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  727. if (crtc->fb != &framebuffer->base)
  728. continue;
  729. units[num_units++] = vmw_crtc_to_du(crtc);
  730. }
  731. for (k = 0; k < num_units; k++) {
  732. struct vmw_display_unit *unit = units[k];
  733. int hit_num = 0;
  734. clips_ptr = clips;
  735. for (i = 0; i < num_clips; i++, clips_ptr += increment) {
  736. int clip_x1 = clips_ptr->x1 - unit->crtc.x;
  737. int clip_y1 = clips_ptr->y1 - unit->crtc.y;
  738. int clip_x2 = clips_ptr->x2 - unit->crtc.x;
  739. int clip_y2 = clips_ptr->y2 - unit->crtc.y;
  740. int move_x, move_y;
  741. /* skip any crtcs that misses the clip region */
  742. if (clip_x1 >= unit->crtc.mode.hdisplay ||
  743. clip_y1 >= unit->crtc.mode.vdisplay ||
  744. clip_x2 <= 0 || clip_y2 <= 0)
  745. continue;
  746. /* clip size to crtc size */
  747. clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay);
  748. clip_y2 = min_t(int, clip_y2, unit->crtc.mode.vdisplay);
  749. /* translate both src and dest to bring clip into screen */
  750. move_x = min_t(int, clip_x1, 0);
  751. move_y = min_t(int, clip_y1, 0);
  752. /* actual translate done here */
  753. blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
  754. blits[hit_num].body.destScreenId = unit->unit;
  755. blits[hit_num].body.srcOrigin.x = clips_ptr->x1 - move_x;
  756. blits[hit_num].body.srcOrigin.y = clips_ptr->y1 - move_y;
  757. blits[hit_num].body.destRect.left = clip_x1 - move_x;
  758. blits[hit_num].body.destRect.top = clip_y1 - move_y;
  759. blits[hit_num].body.destRect.right = clip_x2;
  760. blits[hit_num].body.destRect.bottom = clip_y2;
  761. hit_num++;
  762. }
  763. /* no clips hit the crtc */
  764. if (hit_num == 0)
  765. continue;
  766. /* only return the last fence */
  767. if (out_fence && *out_fence)
  768. vmw_fence_obj_unreference(out_fence);
  769. fifo_size = sizeof(*blits) * hit_num;
  770. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
  771. fifo_size, 0, NULL, out_fence);
  772. if (unlikely(ret != 0))
  773. break;
  774. }
  775. kfree(blits);
  776. return ret;
  777. }
  778. int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
  779. struct drm_file *file_priv,
  780. unsigned flags, unsigned color,
  781. struct drm_clip_rect *clips,
  782. unsigned num_clips)
  783. {
  784. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  785. struct vmw_master *vmaster = vmw_master(file_priv->master);
  786. struct vmw_framebuffer_dmabuf *vfbd =
  787. vmw_framebuffer_to_vfbd(framebuffer);
  788. struct drm_clip_rect norect;
  789. int ret, increment = 1;
  790. ret = ttm_read_lock(&vmaster->lock, true);
  791. if (unlikely(ret != 0))
  792. return ret;
  793. if (!num_clips) {
  794. num_clips = 1;
  795. clips = &norect;
  796. norect.x1 = norect.y1 = 0;
  797. norect.x2 = framebuffer->width;
  798. norect.y2 = framebuffer->height;
  799. } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
  800. num_clips /= 2;
  801. increment = 2;
  802. }
  803. if (dev_priv->ldu_priv) {
  804. ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
  805. flags, color,
  806. clips, num_clips, increment);
  807. } else {
  808. ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
  809. flags, color,
  810. clips, num_clips, increment, NULL);
  811. }
  812. ttm_read_unlock(&vmaster->lock);
  813. return ret;
  814. }
  815. static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
  816. .destroy = vmw_framebuffer_dmabuf_destroy,
  817. .dirty = vmw_framebuffer_dmabuf_dirty,
  818. };
  819. /**
  820. * Pin the dmabuffer to the start of vram.
  821. */
  822. static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
  823. {
  824. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  825. struct vmw_framebuffer_dmabuf *vfbd =
  826. vmw_framebuffer_to_vfbd(&vfb->base);
  827. int ret;
  828. /* This code should not be used with screen objects */
  829. BUG_ON(dev_priv->sou_priv);
  830. vmw_overlay_pause_all(dev_priv);
  831. ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
  832. vmw_overlay_resume_all(dev_priv);
  833. WARN_ON(ret != 0);
  834. return 0;
  835. }
  836. static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
  837. {
  838. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  839. struct vmw_framebuffer_dmabuf *vfbd =
  840. vmw_framebuffer_to_vfbd(&vfb->base);
  841. if (!vfbd->buffer) {
  842. WARN_ON(!vfbd->buffer);
  843. return 0;
  844. }
  845. return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
  846. }
  847. static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
  848. struct vmw_dma_buffer *dmabuf,
  849. struct vmw_framebuffer **out,
  850. const struct drm_mode_fb_cmd
  851. *mode_cmd)
  852. {
  853. struct drm_device *dev = dev_priv->dev;
  854. struct vmw_framebuffer_dmabuf *vfbd;
  855. unsigned int requested_size;
  856. int ret;
  857. requested_size = mode_cmd->height * mode_cmd->pitch;
  858. if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
  859. DRM_ERROR("Screen buffer object size is too small "
  860. "for requested mode.\n");
  861. return -EINVAL;
  862. }
  863. /* Limited framebuffer color depth support for screen objects */
  864. if (dev_priv->sou_priv) {
  865. switch (mode_cmd->depth) {
  866. case 32:
  867. case 24:
  868. /* Only support 32 bpp for 32 and 24 depth fbs */
  869. if (mode_cmd->bpp == 32)
  870. break;
  871. DRM_ERROR("Invalid color depth/bbp: %d %d\n",
  872. mode_cmd->depth, mode_cmd->bpp);
  873. return -EINVAL;
  874. case 16:
  875. case 15:
  876. /* Only support 16 bpp for 16 and 15 depth fbs */
  877. if (mode_cmd->bpp == 16)
  878. break;
  879. DRM_ERROR("Invalid color depth/bbp: %d %d\n",
  880. mode_cmd->depth, mode_cmd->bpp);
  881. return -EINVAL;
  882. default:
  883. DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
  884. return -EINVAL;
  885. }
  886. }
  887. vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
  888. if (!vfbd) {
  889. ret = -ENOMEM;
  890. goto out_err1;
  891. }
  892. if (!vmw_dmabuf_reference(dmabuf)) {
  893. DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
  894. ret = -EINVAL;
  895. goto out_err2;
  896. }
  897. vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
  898. vfbd->base.base.pitches[0] = mode_cmd->pitch;
  899. vfbd->base.base.depth = mode_cmd->depth;
  900. vfbd->base.base.width = mode_cmd->width;
  901. vfbd->base.base.height = mode_cmd->height;
  902. if (!dev_priv->sou_priv) {
  903. vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
  904. vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
  905. }
  906. vfbd->base.dmabuf = true;
  907. vfbd->buffer = dmabuf;
  908. vfbd->base.user_handle = mode_cmd->handle;
  909. *out = &vfbd->base;
  910. ret = drm_framebuffer_init(dev, &vfbd->base.base,
  911. &vmw_framebuffer_dmabuf_funcs);
  912. if (ret)
  913. goto out_err3;
  914. return 0;
  915. out_err3:
  916. vmw_dmabuf_unreference(&dmabuf);
  917. out_err2:
  918. kfree(vfbd);
  919. out_err1:
  920. return ret;
  921. }
  922. /*
  923. * Generic Kernel modesetting functions
  924. */
  925. static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
  926. struct drm_file *file_priv,
  927. struct drm_mode_fb_cmd2 *mode_cmd2)
  928. {
  929. struct vmw_private *dev_priv = vmw_priv(dev);
  930. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  931. struct vmw_framebuffer *vfb = NULL;
  932. struct vmw_surface *surface = NULL;
  933. struct vmw_dma_buffer *bo = NULL;
  934. struct ttm_base_object *user_obj;
  935. struct drm_mode_fb_cmd mode_cmd;
  936. int ret;
  937. mode_cmd.width = mode_cmd2->width;
  938. mode_cmd.height = mode_cmd2->height;
  939. mode_cmd.pitch = mode_cmd2->pitches[0];
  940. mode_cmd.handle = mode_cmd2->handles[0];
  941. drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
  942. &mode_cmd.bpp);
  943. /**
  944. * This code should be conditioned on Screen Objects not being used.
  945. * If screen objects are used, we can allocate a GMR to hold the
  946. * requested framebuffer.
  947. */
  948. if (!vmw_kms_validate_mode_vram(dev_priv,
  949. mode_cmd.pitch,
  950. mode_cmd.height)) {
  951. DRM_ERROR("VRAM size is too small for requested mode.\n");
  952. return ERR_PTR(-ENOMEM);
  953. }
  954. /*
  955. * Take a reference on the user object of the resource
  956. * backing the kms fb. This ensures that user-space handle
  957. * lookups on that resource will always work as long as
  958. * it's registered with a kms framebuffer. This is important,
  959. * since vmw_execbuf_process identifies resources in the
  960. * command stream using user-space handles.
  961. */
  962. user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
  963. if (unlikely(user_obj == NULL)) {
  964. DRM_ERROR("Could not locate requested kms frame buffer.\n");
  965. return ERR_PTR(-ENOENT);
  966. }
  967. /**
  968. * End conditioned code.
  969. */
  970. /* returns either a dmabuf or surface */
  971. ret = vmw_user_lookup_handle(dev_priv, tfile,
  972. mode_cmd.handle,
  973. &surface, &bo);
  974. if (ret)
  975. goto err_out;
  976. /* Create the new framebuffer depending one what we got back */
  977. if (bo)
  978. ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
  979. &mode_cmd);
  980. else if (surface)
  981. ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv,
  982. surface, &vfb, &mode_cmd);
  983. else
  984. BUG();
  985. err_out:
  986. /* vmw_user_lookup_handle takes one ref so does new_fb */
  987. if (bo)
  988. vmw_dmabuf_unreference(&bo);
  989. if (surface)
  990. vmw_surface_unreference(&surface);
  991. if (ret) {
  992. DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
  993. ttm_base_object_unref(&user_obj);
  994. return ERR_PTR(ret);
  995. } else
  996. vfb->user_obj = user_obj;
  997. return &vfb->base;
  998. }
  999. static const struct drm_mode_config_funcs vmw_kms_funcs = {
  1000. .fb_create = vmw_kms_fb_create,
  1001. };
  1002. int vmw_kms_present(struct vmw_private *dev_priv,
  1003. struct drm_file *file_priv,
  1004. struct vmw_framebuffer *vfb,
  1005. struct vmw_surface *surface,
  1006. uint32_t sid,
  1007. int32_t destX, int32_t destY,
  1008. struct drm_vmw_rect *clips,
  1009. uint32_t num_clips)
  1010. {
  1011. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  1012. struct drm_clip_rect *tmp;
  1013. struct drm_crtc *crtc;
  1014. size_t fifo_size;
  1015. int i, k, num_units;
  1016. int ret = 0; /* silence warning */
  1017. int left, right, top, bottom;
  1018. struct {
  1019. SVGA3dCmdHeader header;
  1020. SVGA3dCmdBlitSurfaceToScreen body;
  1021. } *cmd;
  1022. SVGASignedRect *blits;
  1023. num_units = 0;
  1024. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  1025. if (crtc->fb != &vfb->base)
  1026. continue;
  1027. units[num_units++] = vmw_crtc_to_du(crtc);
  1028. }
  1029. BUG_ON(surface == NULL);
  1030. BUG_ON(!clips || !num_clips);
  1031. tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
  1032. if (unlikely(tmp == NULL)) {
  1033. DRM_ERROR("Temporary cliprect memory alloc failed.\n");
  1034. return -ENOMEM;
  1035. }
  1036. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
  1037. cmd = kmalloc(fifo_size, GFP_KERNEL);
  1038. if (unlikely(cmd == NULL)) {
  1039. DRM_ERROR("Failed to allocate temporary fifo memory.\n");
  1040. ret = -ENOMEM;
  1041. goto out_free_tmp;
  1042. }
  1043. left = clips->x;
  1044. right = clips->x + clips->w;
  1045. top = clips->y;
  1046. bottom = clips->y + clips->h;
  1047. for (i = 1; i < num_clips; i++) {
  1048. left = min_t(int, left, (int)clips[i].x);
  1049. right = max_t(int, right, (int)clips[i].x + clips[i].w);
  1050. top = min_t(int, top, (int)clips[i].y);
  1051. bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h);
  1052. }
  1053. /* only need to do this once */
  1054. memset(cmd, 0, fifo_size);
  1055. cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
  1056. blits = (SVGASignedRect *)&cmd[1];
  1057. cmd->body.srcRect.left = left;
  1058. cmd->body.srcRect.right = right;
  1059. cmd->body.srcRect.top = top;
  1060. cmd->body.srcRect.bottom = bottom;
  1061. for (i = 0; i < num_clips; i++) {
  1062. tmp[i].x1 = clips[i].x - left;
  1063. tmp[i].x2 = clips[i].x + clips[i].w - left;
  1064. tmp[i].y1 = clips[i].y - top;
  1065. tmp[i].y2 = clips[i].y + clips[i].h - top;
  1066. }
  1067. for (k = 0; k < num_units; k++) {
  1068. struct vmw_display_unit *unit = units[k];
  1069. struct vmw_clip_rect clip;
  1070. int num;
  1071. clip.x1 = left + destX - unit->crtc.x;
  1072. clip.y1 = top + destY - unit->crtc.y;
  1073. clip.x2 = right + destX - unit->crtc.x;
  1074. clip.y2 = bottom + destY - unit->crtc.y;
  1075. /* skip any crtcs that misses the clip region */
  1076. if (clip.x1 >= unit->crtc.mode.hdisplay ||
  1077. clip.y1 >= unit->crtc.mode.vdisplay ||
  1078. clip.x2 <= 0 || clip.y2 <= 0)
  1079. continue;
  1080. /*
  1081. * In order for the clip rects to be correctly scaled
  1082. * the src and dest rects needs to be the same size.
  1083. */
  1084. cmd->body.destRect.left = clip.x1;
  1085. cmd->body.destRect.right = clip.x2;
  1086. cmd->body.destRect.top = clip.y1;
  1087. cmd->body.destRect.bottom = clip.y2;
  1088. /* create a clip rect of the crtc in dest coords */
  1089. clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
  1090. clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
  1091. clip.x1 = 0 - clip.x1;
  1092. clip.y1 = 0 - clip.y1;
  1093. /* need to reset sid as it is changed by execbuf */
  1094. cmd->body.srcImage.sid = sid;
  1095. cmd->body.destScreenId = unit->unit;
  1096. /* clip and write blits to cmd stream */
  1097. vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
  1098. /* if no cliprects hit skip this */
  1099. if (num == 0)
  1100. continue;
  1101. /* recalculate package length */
  1102. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
  1103. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  1104. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  1105. fifo_size, 0, NULL, NULL);
  1106. if (unlikely(ret != 0))
  1107. break;
  1108. }
  1109. kfree(cmd);
  1110. out_free_tmp:
  1111. kfree(tmp);
  1112. return ret;
  1113. }
  1114. int vmw_kms_readback(struct vmw_private *dev_priv,
  1115. struct drm_file *file_priv,
  1116. struct vmw_framebuffer *vfb,
  1117. struct drm_vmw_fence_rep __user *user_fence_rep,
  1118. struct drm_vmw_rect *clips,
  1119. uint32_t num_clips)
  1120. {
  1121. struct vmw_framebuffer_dmabuf *vfbd =
  1122. vmw_framebuffer_to_vfbd(&vfb->base);
  1123. struct vmw_dma_buffer *dmabuf = vfbd->buffer;
  1124. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  1125. struct drm_crtc *crtc;
  1126. size_t fifo_size;
  1127. int i, k, ret, num_units, blits_pos;
  1128. struct {
  1129. uint32_t header;
  1130. SVGAFifoCmdDefineGMRFB body;
  1131. } *cmd;
  1132. struct {
  1133. uint32_t header;
  1134. SVGAFifoCmdBlitScreenToGMRFB body;
  1135. } *blits;
  1136. num_units = 0;
  1137. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  1138. if (crtc->fb != &vfb->base)
  1139. continue;
  1140. units[num_units++] = vmw_crtc_to_du(crtc);
  1141. }
  1142. BUG_ON(dmabuf == NULL);
  1143. BUG_ON(!clips || !num_clips);
  1144. /* take a safe guess at fifo size */
  1145. fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
  1146. cmd = kmalloc(fifo_size, GFP_KERNEL);
  1147. if (unlikely(cmd == NULL)) {
  1148. DRM_ERROR("Failed to allocate temporary fifo memory.\n");
  1149. return -ENOMEM;
  1150. }
  1151. memset(cmd, 0, fifo_size);
  1152. cmd->header = SVGA_CMD_DEFINE_GMRFB;
  1153. cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
  1154. cmd->body.format.colorDepth = vfb->base.depth;
  1155. cmd->body.format.reserved = 0;
  1156. cmd->body.bytesPerLine = vfb->base.pitches[0];
  1157. cmd->body.ptr.gmrId = vfb->user_handle;
  1158. cmd->body.ptr.offset = 0;
  1159. blits = (void *)&cmd[1];
  1160. blits_pos = 0;
  1161. for (i = 0; i < num_units; i++) {
  1162. struct drm_vmw_rect *c = clips;
  1163. for (k = 0; k < num_clips; k++, c++) {
  1164. /* transform clip coords to crtc origin based coords */
  1165. int clip_x1 = c->x - units[i]->crtc.x;
  1166. int clip_x2 = c->x - units[i]->crtc.x + c->w;
  1167. int clip_y1 = c->y - units[i]->crtc.y;
  1168. int clip_y2 = c->y - units[i]->crtc.y + c->h;
  1169. int dest_x = c->x;
  1170. int dest_y = c->y;
  1171. /* compensate for clipping, we negate
  1172. * a negative number and add that.
  1173. */
  1174. if (clip_x1 < 0)
  1175. dest_x += -clip_x1;
  1176. if (clip_y1 < 0)
  1177. dest_y += -clip_y1;
  1178. /* clip */
  1179. clip_x1 = max(clip_x1, 0);
  1180. clip_y1 = max(clip_y1, 0);
  1181. clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
  1182. clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
  1183. /* and cull any rects that misses the crtc */
  1184. if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
  1185. clip_y1 >= units[i]->crtc.mode.vdisplay ||
  1186. clip_x2 <= 0 || clip_y2 <= 0)
  1187. continue;
  1188. blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
  1189. blits[blits_pos].body.srcScreenId = units[i]->unit;
  1190. blits[blits_pos].body.destOrigin.x = dest_x;
  1191. blits[blits_pos].body.destOrigin.y = dest_y;
  1192. blits[blits_pos].body.srcRect.left = clip_x1;
  1193. blits[blits_pos].body.srcRect.top = clip_y1;
  1194. blits[blits_pos].body.srcRect.right = clip_x2;
  1195. blits[blits_pos].body.srcRect.bottom = clip_y2;
  1196. blits_pos++;
  1197. }
  1198. }
  1199. /* reset size here and use calculated exact size from loops */
  1200. fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
  1201. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
  1202. 0, user_fence_rep, NULL);
  1203. kfree(cmd);
  1204. return ret;
  1205. }
  1206. int vmw_kms_init(struct vmw_private *dev_priv)
  1207. {
  1208. struct drm_device *dev = dev_priv->dev;
  1209. int ret;
  1210. drm_mode_config_init(dev);
  1211. dev->mode_config.funcs = &vmw_kms_funcs;
  1212. dev->mode_config.min_width = 1;
  1213. dev->mode_config.min_height = 1;
  1214. /* assumed largest fb size */
  1215. dev->mode_config.max_width = 8192;
  1216. dev->mode_config.max_height = 8192;
  1217. ret = vmw_kms_init_screen_object_display(dev_priv);
  1218. if (ret) /* Fallback */
  1219. (void)vmw_kms_init_legacy_display_system(dev_priv);
  1220. return 0;
  1221. }
  1222. int vmw_kms_close(struct vmw_private *dev_priv)
  1223. {
  1224. /*
  1225. * Docs says we should take the lock before calling this function
  1226. * but since it destroys encoders and our destructor calls
  1227. * drm_encoder_cleanup which takes the lock we deadlock.
  1228. */
  1229. drm_mode_config_cleanup(dev_priv->dev);
  1230. if (dev_priv->sou_priv)
  1231. vmw_kms_close_screen_object_display(dev_priv);
  1232. else
  1233. vmw_kms_close_legacy_display_system(dev_priv);
  1234. return 0;
  1235. }
  1236. int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
  1237. struct drm_file *file_priv)
  1238. {
  1239. struct drm_vmw_cursor_bypass_arg *arg = data;
  1240. struct vmw_display_unit *du;
  1241. struct drm_mode_object *obj;
  1242. struct drm_crtc *crtc;
  1243. int ret = 0;
  1244. mutex_lock(&dev->mode_config.mutex);
  1245. if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
  1246. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  1247. du = vmw_crtc_to_du(crtc);
  1248. du->hotspot_x = arg->xhot;
  1249. du->hotspot_y = arg->yhot;
  1250. }
  1251. mutex_unlock(&dev->mode_config.mutex);
  1252. return 0;
  1253. }
  1254. obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
  1255. if (!obj) {
  1256. ret = -ENOENT;
  1257. goto out;
  1258. }
  1259. crtc = obj_to_crtc(obj);
  1260. du = vmw_crtc_to_du(crtc);
  1261. du->hotspot_x = arg->xhot;
  1262. du->hotspot_y = arg->yhot;
  1263. out:
  1264. mutex_unlock(&dev->mode_config.mutex);
  1265. return ret;
  1266. }
  1267. int vmw_kms_write_svga(struct vmw_private *vmw_priv,
  1268. unsigned width, unsigned height, unsigned pitch,
  1269. unsigned bpp, unsigned depth)
  1270. {
  1271. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1272. vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
  1273. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1274. iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
  1275. vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
  1276. vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
  1277. vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
  1278. if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
  1279. DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
  1280. depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
  1281. return -EINVAL;
  1282. }
  1283. return 0;
  1284. }
  1285. int vmw_kms_save_vga(struct vmw_private *vmw_priv)
  1286. {
  1287. struct vmw_vga_topology_state *save;
  1288. uint32_t i;
  1289. vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
  1290. vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
  1291. vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
  1292. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1293. vmw_priv->vga_pitchlock =
  1294. vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
  1295. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1296. vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
  1297. SVGA_FIFO_PITCHLOCK);
  1298. if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
  1299. return 0;
  1300. vmw_priv->num_displays = vmw_read(vmw_priv,
  1301. SVGA_REG_NUM_GUEST_DISPLAYS);
  1302. if (vmw_priv->num_displays == 0)
  1303. vmw_priv->num_displays = 1;
  1304. for (i = 0; i < vmw_priv->num_displays; ++i) {
  1305. save = &vmw_priv->vga_save[i];
  1306. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
  1307. save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
  1308. save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
  1309. save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
  1310. save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
  1311. save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
  1312. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
  1313. if (i == 0 && vmw_priv->num_displays == 1 &&
  1314. save->width == 0 && save->height == 0) {
  1315. /*
  1316. * It should be fairly safe to assume that these
  1317. * values are uninitialized.
  1318. */
  1319. save->width = vmw_priv->vga_width - save->pos_x;
  1320. save->height = vmw_priv->vga_height - save->pos_y;
  1321. }
  1322. }
  1323. return 0;
  1324. }
  1325. int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
  1326. {
  1327. struct vmw_vga_topology_state *save;
  1328. uint32_t i;
  1329. vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
  1330. vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
  1331. vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
  1332. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1333. vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
  1334. vmw_priv->vga_pitchlock);
  1335. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1336. iowrite32(vmw_priv->vga_pitchlock,
  1337. vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
  1338. if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
  1339. return 0;
  1340. for (i = 0; i < vmw_priv->num_displays; ++i) {
  1341. save = &vmw_priv->vga_save[i];
  1342. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
  1343. vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
  1344. vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
  1345. vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
  1346. vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
  1347. vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
  1348. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
  1349. }
  1350. return 0;
  1351. }
  1352. bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
  1353. uint32_t pitch,
  1354. uint32_t height)
  1355. {
  1356. return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
  1357. }
  1358. /**
  1359. * Function called by DRM code called with vbl_lock held.
  1360. */
  1361. u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
  1362. {
  1363. return 0;
  1364. }
  1365. /**
  1366. * Function called by DRM code called with vbl_lock held.
  1367. */
  1368. int vmw_enable_vblank(struct drm_device *dev, int crtc)
  1369. {
  1370. return -ENOSYS;
  1371. }
  1372. /**
  1373. * Function called by DRM code called with vbl_lock held.
  1374. */
  1375. void vmw_disable_vblank(struct drm_device *dev, int crtc)
  1376. {
  1377. }
  1378. /*
  1379. * Small shared kms functions.
  1380. */
  1381. int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
  1382. struct drm_vmw_rect *rects)
  1383. {
  1384. struct drm_device *dev = dev_priv->dev;
  1385. struct vmw_display_unit *du;
  1386. struct drm_connector *con;
  1387. mutex_lock(&dev->mode_config.mutex);
  1388. #if 0
  1389. {
  1390. unsigned int i;
  1391. DRM_INFO("%s: new layout ", __func__);
  1392. for (i = 0; i < num; i++)
  1393. DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
  1394. rects[i].w, rects[i].h);
  1395. DRM_INFO("\n");
  1396. }
  1397. #endif
  1398. list_for_each_entry(con, &dev->mode_config.connector_list, head) {
  1399. du = vmw_connector_to_du(con);
  1400. if (num > du->unit) {
  1401. du->pref_width = rects[du->unit].w;
  1402. du->pref_height = rects[du->unit].h;
  1403. du->pref_active = true;
  1404. du->gui_x = rects[du->unit].x;
  1405. du->gui_y = rects[du->unit].y;
  1406. } else {
  1407. du->pref_width = 800;
  1408. du->pref_height = 600;
  1409. du->pref_active = false;
  1410. }
  1411. con->status = vmw_du_connector_detect(con, true);
  1412. }
  1413. mutex_unlock(&dev->mode_config.mutex);
  1414. return 0;
  1415. }
  1416. int vmw_du_page_flip(struct drm_crtc *crtc,
  1417. struct drm_framebuffer *fb,
  1418. struct drm_pending_vblank_event *event,
  1419. uint32_t page_flip_flags)
  1420. {
  1421. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  1422. struct drm_framebuffer *old_fb = crtc->fb;
  1423. struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(fb);
  1424. struct drm_file *file_priv ;
  1425. struct vmw_fence_obj *fence = NULL;
  1426. struct drm_clip_rect clips;
  1427. int ret;
  1428. if (event == NULL)
  1429. return -EINVAL;
  1430. /* require ScreenObject support for page flipping */
  1431. if (!dev_priv->sou_priv)
  1432. return -ENOSYS;
  1433. file_priv = event->base.file_priv;
  1434. if (!vmw_kms_screen_object_flippable(dev_priv, crtc))
  1435. return -EINVAL;
  1436. crtc->fb = fb;
  1437. /* do a full screen dirty update */
  1438. clips.x1 = clips.y1 = 0;
  1439. clips.x2 = fb->width;
  1440. clips.y2 = fb->height;
  1441. if (vfb->dmabuf)
  1442. ret = do_dmabuf_dirty_sou(file_priv, dev_priv, vfb,
  1443. 0, 0, &clips, 1, 1, &fence);
  1444. else
  1445. ret = do_surface_dirty_sou(dev_priv, file_priv, vfb,
  1446. 0, 0, &clips, 1, 1, &fence);
  1447. if (ret != 0)
  1448. goto out_no_fence;
  1449. if (!fence) {
  1450. ret = -EINVAL;
  1451. goto out_no_fence;
  1452. }
  1453. ret = vmw_event_fence_action_queue(file_priv, fence,
  1454. &event->base,
  1455. &event->event.tv_sec,
  1456. &event->event.tv_usec,
  1457. true);
  1458. /*
  1459. * No need to hold on to this now. The only cleanup
  1460. * we need to do if we fail is unref the fence.
  1461. */
  1462. vmw_fence_obj_unreference(&fence);
  1463. if (vmw_crtc_to_du(crtc)->is_implicit)
  1464. vmw_kms_screen_object_update_implicit_fb(dev_priv, crtc);
  1465. return ret;
  1466. out_no_fence:
  1467. crtc->fb = old_fb;
  1468. return ret;
  1469. }
  1470. void vmw_du_crtc_save(struct drm_crtc *crtc)
  1471. {
  1472. }
  1473. void vmw_du_crtc_restore(struct drm_crtc *crtc)
  1474. {
  1475. }
  1476. void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
  1477. u16 *r, u16 *g, u16 *b,
  1478. uint32_t start, uint32_t size)
  1479. {
  1480. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  1481. int i;
  1482. for (i = 0; i < size; i++) {
  1483. DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
  1484. r[i], g[i], b[i]);
  1485. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
  1486. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
  1487. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
  1488. }
  1489. }
  1490. void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
  1491. {
  1492. }
  1493. void vmw_du_connector_save(struct drm_connector *connector)
  1494. {
  1495. }
  1496. void vmw_du_connector_restore(struct drm_connector *connector)
  1497. {
  1498. }
  1499. enum drm_connector_status
  1500. vmw_du_connector_detect(struct drm_connector *connector, bool force)
  1501. {
  1502. uint32_t num_displays;
  1503. struct drm_device *dev = connector->dev;
  1504. struct vmw_private *dev_priv = vmw_priv(dev);
  1505. struct vmw_display_unit *du = vmw_connector_to_du(connector);
  1506. mutex_lock(&dev_priv->hw_mutex);
  1507. num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
  1508. mutex_unlock(&dev_priv->hw_mutex);
  1509. return ((vmw_connector_to_du(connector)->unit < num_displays &&
  1510. du->pref_active) ?
  1511. connector_status_connected : connector_status_disconnected);
  1512. }
  1513. static struct drm_display_mode vmw_kms_connector_builtin[] = {
  1514. /* 640x480@60Hz */
  1515. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
  1516. 752, 800, 0, 480, 489, 492, 525, 0,
  1517. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1518. /* 800x600@60Hz */
  1519. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  1520. 968, 1056, 0, 600, 601, 605, 628, 0,
  1521. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1522. /* 1024x768@60Hz */
  1523. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  1524. 1184, 1344, 0, 768, 771, 777, 806, 0,
  1525. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1526. /* 1152x864@75Hz */
  1527. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  1528. 1344, 1600, 0, 864, 865, 868, 900, 0,
  1529. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1530. /* 1280x768@60Hz */
  1531. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
  1532. 1472, 1664, 0, 768, 771, 778, 798, 0,
  1533. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1534. /* 1280x800@60Hz */
  1535. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
  1536. 1480, 1680, 0, 800, 803, 809, 831, 0,
  1537. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1538. /* 1280x960@60Hz */
  1539. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
  1540. 1488, 1800, 0, 960, 961, 964, 1000, 0,
  1541. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1542. /* 1280x1024@60Hz */
  1543. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
  1544. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  1545. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1546. /* 1360x768@60Hz */
  1547. { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
  1548. 1536, 1792, 0, 768, 771, 777, 795, 0,
  1549. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1550. /* 1440x1050@60Hz */
  1551. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
  1552. 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
  1553. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1554. /* 1440x900@60Hz */
  1555. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
  1556. 1672, 1904, 0, 900, 903, 909, 934, 0,
  1557. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1558. /* 1600x1200@60Hz */
  1559. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
  1560. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  1561. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1562. /* 1680x1050@60Hz */
  1563. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
  1564. 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
  1565. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1566. /* 1792x1344@60Hz */
  1567. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
  1568. 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
  1569. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1570. /* 1853x1392@60Hz */
  1571. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
  1572. 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
  1573. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1574. /* 1920x1200@60Hz */
  1575. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
  1576. 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
  1577. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1578. /* 1920x1440@60Hz */
  1579. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
  1580. 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
  1581. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1582. /* 2560x1600@60Hz */
  1583. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
  1584. 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
  1585. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1586. /* Terminate */
  1587. { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
  1588. };
  1589. /**
  1590. * vmw_guess_mode_timing - Provide fake timings for a
  1591. * 60Hz vrefresh mode.
  1592. *
  1593. * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
  1594. * members filled in.
  1595. */
  1596. static void vmw_guess_mode_timing(struct drm_display_mode *mode)
  1597. {
  1598. mode->hsync_start = mode->hdisplay + 50;
  1599. mode->hsync_end = mode->hsync_start + 50;
  1600. mode->htotal = mode->hsync_end + 50;
  1601. mode->vsync_start = mode->vdisplay + 50;
  1602. mode->vsync_end = mode->vsync_start + 50;
  1603. mode->vtotal = mode->vsync_end + 50;
  1604. mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
  1605. mode->vrefresh = drm_mode_vrefresh(mode);
  1606. }
  1607. int vmw_du_connector_fill_modes(struct drm_connector *connector,
  1608. uint32_t max_width, uint32_t max_height)
  1609. {
  1610. struct vmw_display_unit *du = vmw_connector_to_du(connector);
  1611. struct drm_device *dev = connector->dev;
  1612. struct vmw_private *dev_priv = vmw_priv(dev);
  1613. struct drm_display_mode *mode = NULL;
  1614. struct drm_display_mode *bmode;
  1615. struct drm_display_mode prefmode = { DRM_MODE("preferred",
  1616. DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
  1617. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  1618. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
  1619. };
  1620. int i;
  1621. /* Add preferred mode */
  1622. {
  1623. mode = drm_mode_duplicate(dev, &prefmode);
  1624. if (!mode)
  1625. return 0;
  1626. mode->hdisplay = du->pref_width;
  1627. mode->vdisplay = du->pref_height;
  1628. vmw_guess_mode_timing(mode);
  1629. if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
  1630. mode->vdisplay)) {
  1631. drm_mode_probed_add(connector, mode);
  1632. } else {
  1633. drm_mode_destroy(dev, mode);
  1634. mode = NULL;
  1635. }
  1636. if (du->pref_mode) {
  1637. list_del_init(&du->pref_mode->head);
  1638. drm_mode_destroy(dev, du->pref_mode);
  1639. }
  1640. /* mode might be null here, this is intended */
  1641. du->pref_mode = mode;
  1642. }
  1643. for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
  1644. bmode = &vmw_kms_connector_builtin[i];
  1645. if (bmode->hdisplay > max_width ||
  1646. bmode->vdisplay > max_height)
  1647. continue;
  1648. if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
  1649. bmode->vdisplay))
  1650. continue;
  1651. mode = drm_mode_duplicate(dev, bmode);
  1652. if (!mode)
  1653. return 0;
  1654. mode->vrefresh = drm_mode_vrefresh(mode);
  1655. drm_mode_probed_add(connector, mode);
  1656. }
  1657. /* Move the prefered mode first, help apps pick the right mode. */
  1658. if (du->pref_mode)
  1659. list_move(&du->pref_mode->head, &connector->probed_modes);
  1660. drm_mode_connector_list_update(connector);
  1661. return 1;
  1662. }
  1663. int vmw_du_connector_set_property(struct drm_connector *connector,
  1664. struct drm_property *property,
  1665. uint64_t val)
  1666. {
  1667. return 0;
  1668. }
  1669. int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
  1670. struct drm_file *file_priv)
  1671. {
  1672. struct vmw_private *dev_priv = vmw_priv(dev);
  1673. struct drm_vmw_update_layout_arg *arg =
  1674. (struct drm_vmw_update_layout_arg *)data;
  1675. struct vmw_master *vmaster = vmw_master(file_priv->master);
  1676. void __user *user_rects;
  1677. struct drm_vmw_rect *rects;
  1678. unsigned rects_size;
  1679. int ret;
  1680. int i;
  1681. struct drm_mode_config *mode_config = &dev->mode_config;
  1682. ret = ttm_read_lock(&vmaster->lock, true);
  1683. if (unlikely(ret != 0))
  1684. return ret;
  1685. if (!arg->num_outputs) {
  1686. struct drm_vmw_rect def_rect = {0, 0, 800, 600};
  1687. vmw_du_update_layout(dev_priv, 1, &def_rect);
  1688. goto out_unlock;
  1689. }
  1690. rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
  1691. rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
  1692. GFP_KERNEL);
  1693. if (unlikely(!rects)) {
  1694. ret = -ENOMEM;
  1695. goto out_unlock;
  1696. }
  1697. user_rects = (void __user *)(unsigned long)arg->rects;
  1698. ret = copy_from_user(rects, user_rects, rects_size);
  1699. if (unlikely(ret != 0)) {
  1700. DRM_ERROR("Failed to get rects.\n");
  1701. ret = -EFAULT;
  1702. goto out_free;
  1703. }
  1704. for (i = 0; i < arg->num_outputs; ++i) {
  1705. if (rects[i].x < 0 ||
  1706. rects[i].y < 0 ||
  1707. rects[i].x + rects[i].w > mode_config->max_width ||
  1708. rects[i].y + rects[i].h > mode_config->max_height) {
  1709. DRM_ERROR("Invalid GUI layout.\n");
  1710. ret = -EINVAL;
  1711. goto out_free;
  1712. }
  1713. }
  1714. vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
  1715. out_free:
  1716. kfree(rects);
  1717. out_unlock:
  1718. ttm_read_unlock(&vmaster->lock);
  1719. return ret;
  1720. }