nouveau_agp.c 4.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198
  1. #include <linux/module.h>
  2. #include <core/device.h>
  3. #include "nouveau_drm.h"
  4. #include "nouveau_agp.h"
  5. #include "nouveau_reg.h"
  6. #if __OS_HAS_AGP
  7. MODULE_PARM_DESC(agpmode, "AGP mode (0 to disable AGP)");
  8. static int nouveau_agpmode = -1;
  9. module_param_named(agpmode, nouveau_agpmode, int, 0400);
  10. struct nouveau_agpmode_quirk {
  11. u16 hostbridge_vendor;
  12. u16 hostbridge_device;
  13. u16 chip_vendor;
  14. u16 chip_device;
  15. int mode;
  16. };
  17. static struct nouveau_agpmode_quirk nouveau_agpmode_quirk_list[] = {
  18. /* VIA Apollo PRO133x / GeForce FX 5600 Ultra, max agpmode 2, fdo #20341 */
  19. { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_NVIDIA, 0x0311, 2 },
  20. {},
  21. };
  22. static unsigned long
  23. get_agp_mode(struct nouveau_drm *drm, const struct drm_agp_info *info)
  24. {
  25. struct nouveau_device *device = nv_device(drm->device);
  26. struct nouveau_agpmode_quirk *quirk = nouveau_agpmode_quirk_list;
  27. int agpmode = nouveau_agpmode;
  28. unsigned long mode = info->mode;
  29. /*
  30. * FW seems to be broken on nv18, it makes the card lock up
  31. * randomly.
  32. */
  33. if (device->chipset == 0x18)
  34. mode &= ~PCI_AGP_COMMAND_FW;
  35. /*
  36. * Go through the quirks list and adjust the agpmode accordingly.
  37. */
  38. while (agpmode == -1 && quirk->hostbridge_vendor) {
  39. if (info->id_vendor == quirk->hostbridge_vendor &&
  40. info->id_device == quirk->hostbridge_device &&
  41. device->pdev->vendor == quirk->chip_vendor &&
  42. device->pdev->device == quirk->chip_device) {
  43. agpmode = quirk->mode;
  44. nv_info(device, "Forcing agp mode to %dX. Use agpmode to override.\n",
  45. agpmode);
  46. break;
  47. }
  48. ++quirk;
  49. }
  50. /*
  51. * AGP mode set in the command line.
  52. */
  53. if (agpmode > 0) {
  54. bool agpv3 = mode & 0x8;
  55. int rate = agpv3 ? agpmode / 4 : agpmode;
  56. mode = (mode & ~0x7) | (rate & 0x7);
  57. }
  58. return mode;
  59. }
  60. static bool
  61. nouveau_agp_enabled(struct nouveau_drm *drm)
  62. {
  63. struct drm_device *dev = drm->dev;
  64. if (!drm_pci_device_is_agp(dev) || !dev->agp)
  65. return false;
  66. if (drm->agp.stat == UNKNOWN) {
  67. if (!nouveau_agpmode)
  68. return false;
  69. #ifdef __powerpc__
  70. /* Disable AGP by default on all PowerPC machines for
  71. * now -- At least some UniNorth-2 AGP bridges are
  72. * known to be broken: DMA from the host to the card
  73. * works just fine, but writeback from the card to the
  74. * host goes straight to memory untranslated bypassing
  75. * the GATT somehow, making them quite painful to deal
  76. * with...
  77. */
  78. if (nouveau_agpmode == -1)
  79. return false;
  80. #endif
  81. return true;
  82. }
  83. return (drm->agp.stat == ENABLED);
  84. }
  85. #endif
  86. void
  87. nouveau_agp_reset(struct nouveau_drm *drm)
  88. {
  89. #if __OS_HAS_AGP
  90. struct nouveau_device *device = nv_device(drm->device);
  91. struct drm_device *dev = drm->dev;
  92. u32 save[2];
  93. int ret;
  94. if (!nouveau_agp_enabled(drm))
  95. return;
  96. /* First of all, disable fast writes, otherwise if it's
  97. * already enabled in the AGP bridge and we disable the card's
  98. * AGP controller we might be locking ourselves out of it. */
  99. if ((nv_rd32(device, NV04_PBUS_PCI_NV_19) |
  100. dev->agp->mode) & PCI_AGP_COMMAND_FW) {
  101. struct drm_agp_info info;
  102. struct drm_agp_mode mode;
  103. ret = drm_agp_info(dev, &info);
  104. if (ret)
  105. return;
  106. mode.mode = get_agp_mode(drm, &info);
  107. mode.mode &= ~PCI_AGP_COMMAND_FW;
  108. ret = drm_agp_enable(dev, mode);
  109. if (ret)
  110. return;
  111. }
  112. /* clear busmaster bit, and disable AGP */
  113. save[0] = nv_mask(device, NV04_PBUS_PCI_NV_1, 0x00000004, 0x00000000);
  114. nv_wr32(device, NV04_PBUS_PCI_NV_19, 0);
  115. /* reset PGRAPH, PFIFO and PTIMER */
  116. save[1] = nv_mask(device, 0x000200, 0x00011100, 0x00000000);
  117. nv_mask(device, 0x000200, 0x00011100, save[1]);
  118. /* and restore bustmaster bit (gives effect of resetting AGP) */
  119. nv_wr32(device, NV04_PBUS_PCI_NV_1, save[0]);
  120. #endif
  121. }
  122. void
  123. nouveau_agp_init(struct nouveau_drm *drm)
  124. {
  125. #if __OS_HAS_AGP
  126. struct nouveau_device *device = nv_device(drm->device);
  127. struct drm_device *dev = drm->dev;
  128. struct drm_agp_info info;
  129. struct drm_agp_mode mode;
  130. int ret;
  131. if (!nouveau_agp_enabled(drm))
  132. return;
  133. drm->agp.stat = DISABLE;
  134. ret = drm_agp_acquire(dev);
  135. if (ret) {
  136. nv_error(device, "unable to acquire AGP: %d\n", ret);
  137. return;
  138. }
  139. ret = drm_agp_info(dev, &info);
  140. if (ret) {
  141. nv_error(device, "unable to get AGP info: %d\n", ret);
  142. return;
  143. }
  144. /* see agp.h for the AGPSTAT_* modes available */
  145. mode.mode = get_agp_mode(drm, &info);
  146. ret = drm_agp_enable(dev, mode);
  147. if (ret) {
  148. nv_error(device, "unable to enable AGP: %d\n", ret);
  149. return;
  150. }
  151. drm->agp.stat = ENABLED;
  152. drm->agp.base = info.aperture_base;
  153. drm->agp.size = info.aperture_size;
  154. #endif
  155. }
  156. void
  157. nouveau_agp_fini(struct nouveau_drm *drm)
  158. {
  159. #if __OS_HAS_AGP
  160. struct drm_device *dev = drm->dev;
  161. if (dev->agp && dev->agp->acquired)
  162. drm_agp_release(dev);
  163. #endif
  164. }