iwl3945-base.c 121 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/sched.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/ieee80211_radiotap.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-sta.h"
  50. #include "iwl-3945.h"
  51. #include "iwl-helpers.h"
  52. #include "iwl-core.h"
  53. #include "iwl-dev.h"
  54. #include "iwl-spectrum.h"
  55. /*
  56. * module name, copyright, version, etc.
  57. */
  58. #define DRV_DESCRIPTION \
  59. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  60. #ifdef CONFIG_IWLWIFI_DEBUG
  61. #define VD "d"
  62. #else
  63. #define VD
  64. #endif
  65. /*
  66. * add "s" to indicate spectrum measurement included.
  67. * we add it here to be consistent with previous releases in which
  68. * this was configurable.
  69. */
  70. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  71. #define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation"
  72. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  76. MODULE_LICENSE("GPL");
  77. /* module parameters */
  78. struct iwl_mod_params iwl3945_mod_params = {
  79. .sw_crypto = 1,
  80. .restart_fw = 1,
  81. /* the rest are 0 by default */
  82. };
  83. /**
  84. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  85. * @priv: eeprom and antenna fields are used to determine antenna flags
  86. *
  87. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  88. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  89. *
  90. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  91. * IWL_ANTENNA_MAIN - Force MAIN antenna
  92. * IWL_ANTENNA_AUX - Force AUX antenna
  93. */
  94. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  95. {
  96. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  97. switch (iwl3945_mod_params.antenna) {
  98. case IWL_ANTENNA_DIVERSITY:
  99. return 0;
  100. case IWL_ANTENNA_MAIN:
  101. if (eeprom->antenna_switch_type)
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  103. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  104. case IWL_ANTENNA_AUX:
  105. if (eeprom->antenna_switch_type)
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  107. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  108. }
  109. /* bad antenna selector value */
  110. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  111. iwl3945_mod_params.antenna);
  112. return 0; /* "diversity" is default if error */
  113. }
  114. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  115. struct ieee80211_key_conf *keyconf,
  116. u8 sta_id)
  117. {
  118. unsigned long flags;
  119. __le16 key_flags = 0;
  120. int ret;
  121. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  122. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  123. if (sta_id == priv->hw_params.bcast_sta_id)
  124. key_flags |= STA_KEY_MULTICAST_MSK;
  125. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  126. keyconf->hw_key_idx = keyconf->keyidx;
  127. key_flags &= ~STA_KEY_FLG_INVALID;
  128. spin_lock_irqsave(&priv->sta_lock, flags);
  129. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  130. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  131. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  132. keyconf->keylen);
  133. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  134. keyconf->keylen);
  135. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  136. == STA_KEY_FLG_NO_ENC)
  137. priv->stations[sta_id].sta.key.key_offset =
  138. iwl_get_free_ucode_key_index(priv);
  139. /* else, we are overriding an existing key => no need to allocated room
  140. * in uCode. */
  141. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  142. "no space for a new key");
  143. priv->stations[sta_id].sta.key.key_flags = key_flags;
  144. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  145. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  146. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  147. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  148. spin_unlock_irqrestore(&priv->sta_lock, flags);
  149. return ret;
  150. }
  151. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  152. struct ieee80211_key_conf *keyconf,
  153. u8 sta_id)
  154. {
  155. return -EOPNOTSUPP;
  156. }
  157. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  158. struct ieee80211_key_conf *keyconf,
  159. u8 sta_id)
  160. {
  161. return -EOPNOTSUPP;
  162. }
  163. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  164. {
  165. unsigned long flags;
  166. spin_lock_irqsave(&priv->sta_lock, flags);
  167. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  168. memset(&priv->stations[sta_id].sta.key, 0,
  169. sizeof(struct iwl4965_keyinfo));
  170. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  171. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  172. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  173. spin_unlock_irqrestore(&priv->sta_lock, flags);
  174. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  175. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
  176. return 0;
  177. }
  178. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  179. struct ieee80211_key_conf *keyconf, u8 sta_id)
  180. {
  181. int ret = 0;
  182. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  183. switch (keyconf->alg) {
  184. case ALG_CCMP:
  185. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  186. break;
  187. case ALG_TKIP:
  188. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  189. break;
  190. case ALG_WEP:
  191. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  192. break;
  193. default:
  194. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  195. ret = -EINVAL;
  196. }
  197. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  198. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  199. sta_id, ret);
  200. return ret;
  201. }
  202. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  203. {
  204. int ret = -EOPNOTSUPP;
  205. return ret;
  206. }
  207. static int iwl3945_set_static_key(struct iwl_priv *priv,
  208. struct ieee80211_key_conf *key)
  209. {
  210. if (key->alg == ALG_WEP)
  211. return -EOPNOTSUPP;
  212. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  213. return -EINVAL;
  214. }
  215. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  216. {
  217. struct list_head *element;
  218. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  219. priv->frames_count);
  220. while (!list_empty(&priv->free_frames)) {
  221. element = priv->free_frames.next;
  222. list_del(element);
  223. kfree(list_entry(element, struct iwl3945_frame, list));
  224. priv->frames_count--;
  225. }
  226. if (priv->frames_count) {
  227. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  228. priv->frames_count);
  229. priv->frames_count = 0;
  230. }
  231. }
  232. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  233. {
  234. struct iwl3945_frame *frame;
  235. struct list_head *element;
  236. if (list_empty(&priv->free_frames)) {
  237. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  238. if (!frame) {
  239. IWL_ERR(priv, "Could not allocate frame!\n");
  240. return NULL;
  241. }
  242. priv->frames_count++;
  243. return frame;
  244. }
  245. element = priv->free_frames.next;
  246. list_del(element);
  247. return list_entry(element, struct iwl3945_frame, list);
  248. }
  249. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  250. {
  251. memset(frame, 0, sizeof(*frame));
  252. list_add(&frame->list, &priv->free_frames);
  253. }
  254. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  255. struct ieee80211_hdr *hdr,
  256. int left)
  257. {
  258. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  259. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  260. (priv->iw_mode != NL80211_IFTYPE_AP)))
  261. return 0;
  262. if (priv->ibss_beacon->len > left)
  263. return 0;
  264. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  265. return priv->ibss_beacon->len;
  266. }
  267. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  268. {
  269. struct iwl3945_frame *frame;
  270. unsigned int frame_size;
  271. int rc;
  272. u8 rate;
  273. frame = iwl3945_get_free_frame(priv);
  274. if (!frame) {
  275. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  276. "command.\n");
  277. return -ENOMEM;
  278. }
  279. rate = iwl_rate_get_lowest_plcp(priv);
  280. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  281. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  282. &frame->u.cmd[0]);
  283. iwl3945_free_frame(priv, frame);
  284. return rc;
  285. }
  286. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  287. {
  288. if (priv->shared_virt)
  289. pci_free_consistent(priv->pci_dev,
  290. sizeof(struct iwl3945_shared),
  291. priv->shared_virt,
  292. priv->shared_phys);
  293. }
  294. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  295. struct ieee80211_tx_info *info,
  296. struct iwl_device_cmd *cmd,
  297. struct sk_buff *skb_frag,
  298. int sta_id)
  299. {
  300. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  301. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  302. switch (keyinfo->alg) {
  303. case ALG_CCMP:
  304. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  305. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  306. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  307. break;
  308. case ALG_TKIP:
  309. break;
  310. case ALG_WEP:
  311. tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
  312. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  313. if (keyinfo->keylen == 13)
  314. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  315. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  316. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  317. "with key %d\n", info->control.hw_key->hw_key_idx);
  318. break;
  319. default:
  320. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  321. break;
  322. }
  323. }
  324. /*
  325. * handle build REPLY_TX command notification.
  326. */
  327. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  328. struct iwl_device_cmd *cmd,
  329. struct ieee80211_tx_info *info,
  330. struct ieee80211_hdr *hdr, u8 std_id)
  331. {
  332. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  333. __le32 tx_flags = tx_cmd->tx_flags;
  334. __le16 fc = hdr->frame_control;
  335. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  336. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  337. tx_flags |= TX_CMD_FLG_ACK_MSK;
  338. if (ieee80211_is_mgmt(fc))
  339. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  340. if (ieee80211_is_probe_resp(fc) &&
  341. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  342. tx_flags |= TX_CMD_FLG_TSF_MSK;
  343. } else {
  344. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  345. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  346. }
  347. tx_cmd->sta_id = std_id;
  348. if (ieee80211_has_morefrags(fc))
  349. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  350. if (ieee80211_is_data_qos(fc)) {
  351. u8 *qc = ieee80211_get_qos_ctl(hdr);
  352. tx_cmd->tid_tspec = qc[0] & 0xf;
  353. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  354. } else {
  355. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  356. }
  357. priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
  358. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  359. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  360. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  361. if (ieee80211_is_mgmt(fc)) {
  362. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  363. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  364. else
  365. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  366. } else {
  367. tx_cmd->timeout.pm_frame_timeout = 0;
  368. }
  369. tx_cmd->driver_txop = 0;
  370. tx_cmd->tx_flags = tx_flags;
  371. tx_cmd->next_frame_len = 0;
  372. }
  373. /*
  374. * start REPLY_TX command process
  375. */
  376. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  377. {
  378. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  379. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  380. struct iwl3945_tx_cmd *tx_cmd;
  381. struct iwl_tx_queue *txq = NULL;
  382. struct iwl_queue *q = NULL;
  383. struct iwl_device_cmd *out_cmd;
  384. struct iwl_cmd_meta *out_meta;
  385. dma_addr_t phys_addr;
  386. dma_addr_t txcmd_phys;
  387. int txq_id = skb_get_queue_mapping(skb);
  388. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  389. u8 id;
  390. u8 unicast;
  391. u8 sta_id;
  392. u8 tid = 0;
  393. u16 seq_number = 0;
  394. __le16 fc;
  395. u8 wait_write_ptr = 0;
  396. u8 *qc = NULL;
  397. unsigned long flags;
  398. int rc;
  399. spin_lock_irqsave(&priv->lock, flags);
  400. if (iwl_is_rfkill(priv)) {
  401. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  402. goto drop_unlock;
  403. }
  404. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  405. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  406. goto drop_unlock;
  407. }
  408. unicast = !is_multicast_ether_addr(hdr->addr1);
  409. id = 0;
  410. fc = hdr->frame_control;
  411. #ifdef CONFIG_IWLWIFI_DEBUG
  412. if (ieee80211_is_auth(fc))
  413. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  414. else if (ieee80211_is_assoc_req(fc))
  415. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  416. else if (ieee80211_is_reassoc_req(fc))
  417. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  418. #endif
  419. /* drop all non-injected data frame if we are not associated */
  420. if (ieee80211_is_data(fc) &&
  421. !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
  422. (!iwl_is_associated(priv) ||
  423. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  424. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  425. goto drop_unlock;
  426. }
  427. spin_unlock_irqrestore(&priv->lock, flags);
  428. hdr_len = ieee80211_hdrlen(fc);
  429. /* Find (or create) index into station table for destination station */
  430. if (info->flags & IEEE80211_TX_CTL_INJECTED)
  431. sta_id = priv->hw_params.bcast_sta_id;
  432. else
  433. sta_id = iwl_get_sta_id(priv, hdr);
  434. if (sta_id == IWL_INVALID_STATION) {
  435. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  436. hdr->addr1);
  437. goto drop;
  438. }
  439. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  440. if (ieee80211_is_data_qos(fc)) {
  441. qc = ieee80211_get_qos_ctl(hdr);
  442. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  443. if (unlikely(tid >= MAX_TID_COUNT))
  444. goto drop;
  445. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  446. IEEE80211_SCTL_SEQ;
  447. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  448. (hdr->seq_ctrl &
  449. cpu_to_le16(IEEE80211_SCTL_FRAG));
  450. seq_number += 0x10;
  451. }
  452. /* Descriptor for chosen Tx queue */
  453. txq = &priv->txq[txq_id];
  454. q = &txq->q;
  455. if ((iwl_queue_space(q) < q->high_mark))
  456. goto drop;
  457. spin_lock_irqsave(&priv->lock, flags);
  458. idx = get_cmd_index(q, q->write_ptr, 0);
  459. /* Set up driver data for this TFD */
  460. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  461. txq->txb[q->write_ptr].skb[0] = skb;
  462. /* Init first empty entry in queue's array of Tx/cmd buffers */
  463. out_cmd = txq->cmd[idx];
  464. out_meta = &txq->meta[idx];
  465. tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  466. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  467. memset(tx_cmd, 0, sizeof(*tx_cmd));
  468. /*
  469. * Set up the Tx-command (not MAC!) header.
  470. * Store the chosen Tx queue and TFD index within the sequence field;
  471. * after Tx, uCode's Tx response will return this value so driver can
  472. * locate the frame within the tx queue and do post-tx processing.
  473. */
  474. out_cmd->hdr.cmd = REPLY_TX;
  475. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  476. INDEX_TO_SEQ(q->write_ptr)));
  477. /* Copy MAC header from skb into command buffer */
  478. memcpy(tx_cmd->hdr, hdr, hdr_len);
  479. if (info->control.hw_key)
  480. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  481. /* TODO need this for burst mode later on */
  482. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  483. /* set is_hcca to 0; it probably will never be implemented */
  484. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  485. /* Total # bytes to be transmitted */
  486. len = (u16)skb->len;
  487. tx_cmd->len = cpu_to_le16(len);
  488. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  489. iwl_update_stats(priv, true, fc, len);
  490. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  491. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  492. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  493. txq->need_update = 1;
  494. if (qc)
  495. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  496. } else {
  497. wait_write_ptr = 1;
  498. txq->need_update = 0;
  499. }
  500. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  501. le16_to_cpu(out_cmd->hdr.sequence));
  502. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx_cmd->tx_flags));
  503. iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  504. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
  505. ieee80211_hdrlen(fc));
  506. /*
  507. * Use the first empty entry in this queue's command buffer array
  508. * to contain the Tx command and MAC header concatenated together
  509. * (payload data will be in another buffer).
  510. * Size of this varies, due to varying MAC header length.
  511. * If end is not dword aligned, we'll have 2 extra bytes at the end
  512. * of the MAC header (device reads on dword boundaries).
  513. * We'll tell device about this padding later.
  514. */
  515. len = sizeof(struct iwl3945_tx_cmd) +
  516. sizeof(struct iwl_cmd_header) + hdr_len;
  517. len_org = len;
  518. len = (len + 3) & ~3;
  519. if (len_org != len)
  520. len_org = 1;
  521. else
  522. len_org = 0;
  523. /* Physical address of this Tx command's header (not MAC header!),
  524. * within command buffer array. */
  525. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  526. len, PCI_DMA_TODEVICE);
  527. /* we do not map meta data ... so we can safely access address to
  528. * provide to unmap command*/
  529. pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
  530. pci_unmap_len_set(out_meta, len, len);
  531. /* Add buffer containing Tx command and MAC(!) header to TFD's
  532. * first entry */
  533. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  534. txcmd_phys, len, 1, 0);
  535. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  536. * if any (802.11 null frames have no payload). */
  537. len = skb->len - hdr_len;
  538. if (len) {
  539. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  540. len, PCI_DMA_TODEVICE);
  541. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  542. phys_addr, len,
  543. 0, U32_PAD(len));
  544. }
  545. /* Tell device the write index *just past* this latest filled TFD */
  546. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  547. rc = iwl_txq_update_write_ptr(priv, txq);
  548. spin_unlock_irqrestore(&priv->lock, flags);
  549. if (rc)
  550. return rc;
  551. if ((iwl_queue_space(q) < q->high_mark)
  552. && priv->mac80211_registered) {
  553. if (wait_write_ptr) {
  554. spin_lock_irqsave(&priv->lock, flags);
  555. txq->need_update = 1;
  556. iwl_txq_update_write_ptr(priv, txq);
  557. spin_unlock_irqrestore(&priv->lock, flags);
  558. }
  559. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  560. }
  561. return 0;
  562. drop_unlock:
  563. spin_unlock_irqrestore(&priv->lock, flags);
  564. drop:
  565. return -1;
  566. }
  567. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  568. #define BEACON_TIME_MASK_HIGH 0xFF000000
  569. #define TIME_UNIT 1024
  570. /*
  571. * extended beacon time format
  572. * time in usec will be changed into a 32-bit value in 8:24 format
  573. * the high 1 byte is the beacon counts
  574. * the lower 3 bytes is the time in usec within one beacon interval
  575. */
  576. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  577. {
  578. u32 quot;
  579. u32 rem;
  580. u32 interval = beacon_interval * 1024;
  581. if (!interval || !usec)
  582. return 0;
  583. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  584. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  585. return (quot << 24) + rem;
  586. }
  587. /* base is usually what we get from ucode with each received frame,
  588. * the same as HW timer counter counting down
  589. */
  590. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  591. {
  592. u32 base_low = base & BEACON_TIME_MASK_LOW;
  593. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  594. u32 interval = beacon_interval * TIME_UNIT;
  595. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  596. (addon & BEACON_TIME_MASK_HIGH);
  597. if (base_low > addon_low)
  598. res += base_low - addon_low;
  599. else if (base_low < addon_low) {
  600. res += interval + base_low - addon_low;
  601. res += (1 << 24);
  602. } else
  603. res += (1 << 24);
  604. return cpu_to_le32(res);
  605. }
  606. static int iwl3945_get_measurement(struct iwl_priv *priv,
  607. struct ieee80211_measurement_params *params,
  608. u8 type)
  609. {
  610. struct iwl_spectrum_cmd spectrum;
  611. struct iwl_rx_packet *pkt;
  612. struct iwl_host_cmd cmd = {
  613. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  614. .data = (void *)&spectrum,
  615. .flags = CMD_WANT_SKB,
  616. };
  617. u32 add_time = le64_to_cpu(params->start_time);
  618. int rc;
  619. int spectrum_resp_status;
  620. int duration = le16_to_cpu(params->duration);
  621. if (iwl_is_associated(priv))
  622. add_time =
  623. iwl3945_usecs_to_beacons(
  624. le64_to_cpu(params->start_time) - priv->last_tsf,
  625. le16_to_cpu(priv->rxon_timing.beacon_interval));
  626. memset(&spectrum, 0, sizeof(spectrum));
  627. spectrum.channel_count = cpu_to_le16(1);
  628. spectrum.flags =
  629. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  630. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  631. cmd.len = sizeof(spectrum);
  632. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  633. if (iwl_is_associated(priv))
  634. spectrum.start_time =
  635. iwl3945_add_beacon_time(priv->last_beacon_time,
  636. add_time,
  637. le16_to_cpu(priv->rxon_timing.beacon_interval));
  638. else
  639. spectrum.start_time = 0;
  640. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  641. spectrum.channels[0].channel = params->channel;
  642. spectrum.channels[0].type = type;
  643. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  644. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  645. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  646. rc = iwl_send_cmd_sync(priv, &cmd);
  647. if (rc)
  648. return rc;
  649. pkt = (struct iwl_rx_packet *)cmd.reply_page;
  650. if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
  651. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  652. rc = -EIO;
  653. }
  654. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  655. switch (spectrum_resp_status) {
  656. case 0: /* Command will be handled */
  657. if (pkt->u.spectrum.id != 0xff) {
  658. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  659. pkt->u.spectrum.id);
  660. priv->measurement_status &= ~MEASUREMENT_READY;
  661. }
  662. priv->measurement_status |= MEASUREMENT_ACTIVE;
  663. rc = 0;
  664. break;
  665. case 1: /* Command will not be handled */
  666. rc = -EAGAIN;
  667. break;
  668. }
  669. iwl_free_pages(priv, cmd.reply_page);
  670. return rc;
  671. }
  672. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  673. struct iwl_rx_mem_buffer *rxb)
  674. {
  675. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  676. struct iwl_alive_resp *palive;
  677. struct delayed_work *pwork;
  678. palive = &pkt->u.alive_frame;
  679. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  680. "0x%01X 0x%01X\n",
  681. palive->is_valid, palive->ver_type,
  682. palive->ver_subtype);
  683. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  684. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  685. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  686. sizeof(struct iwl_alive_resp));
  687. pwork = &priv->init_alive_start;
  688. } else {
  689. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  690. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  691. sizeof(struct iwl_alive_resp));
  692. pwork = &priv->alive_start;
  693. iwl3945_disable_events(priv);
  694. }
  695. /* We delay the ALIVE response by 5ms to
  696. * give the HW RF Kill time to activate... */
  697. if (palive->is_valid == UCODE_VALID_OK)
  698. queue_delayed_work(priv->workqueue, pwork,
  699. msecs_to_jiffies(5));
  700. else
  701. IWL_WARN(priv, "uCode did not respond OK.\n");
  702. }
  703. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  704. struct iwl_rx_mem_buffer *rxb)
  705. {
  706. #ifdef CONFIG_IWLWIFI_DEBUG
  707. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  708. #endif
  709. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  710. return;
  711. }
  712. static void iwl3945_bg_beacon_update(struct work_struct *work)
  713. {
  714. struct iwl_priv *priv =
  715. container_of(work, struct iwl_priv, beacon_update);
  716. struct sk_buff *beacon;
  717. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  718. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  719. if (!beacon) {
  720. IWL_ERR(priv, "update beacon failed\n");
  721. return;
  722. }
  723. mutex_lock(&priv->mutex);
  724. /* new beacon skb is allocated every time; dispose previous.*/
  725. if (priv->ibss_beacon)
  726. dev_kfree_skb(priv->ibss_beacon);
  727. priv->ibss_beacon = beacon;
  728. mutex_unlock(&priv->mutex);
  729. iwl3945_send_beacon_cmd(priv);
  730. }
  731. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  732. struct iwl_rx_mem_buffer *rxb)
  733. {
  734. #ifdef CONFIG_IWLWIFI_DEBUG
  735. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  736. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  737. u8 rate = beacon->beacon_notify_hdr.rate;
  738. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  739. "tsf %d %d rate %d\n",
  740. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  741. beacon->beacon_notify_hdr.failure_frame,
  742. le32_to_cpu(beacon->ibss_mgr_status),
  743. le32_to_cpu(beacon->high_tsf),
  744. le32_to_cpu(beacon->low_tsf), rate);
  745. #endif
  746. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  747. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  748. queue_work(priv->workqueue, &priv->beacon_update);
  749. }
  750. /* Handle notification from uCode that card's power state is changing
  751. * due to software, hardware, or critical temperature RFKILL */
  752. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  753. struct iwl_rx_mem_buffer *rxb)
  754. {
  755. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  756. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  757. unsigned long status = priv->status;
  758. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  759. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  760. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  761. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  762. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  763. if (flags & HW_CARD_DISABLED)
  764. set_bit(STATUS_RF_KILL_HW, &priv->status);
  765. else
  766. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  767. iwl_scan_cancel(priv);
  768. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  769. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  770. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  771. test_bit(STATUS_RF_KILL_HW, &priv->status));
  772. else
  773. wake_up_interruptible(&priv->wait_command_queue);
  774. }
  775. /**
  776. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  777. *
  778. * Setup the RX handlers for each of the reply types sent from the uCode
  779. * to the host.
  780. *
  781. * This function chains into the hardware specific files for them to setup
  782. * any hardware specific handlers as well.
  783. */
  784. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  785. {
  786. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  787. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  788. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  789. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  790. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  791. iwl_rx_spectrum_measure_notif;
  792. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  793. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  794. iwl_rx_pm_debug_statistics_notif;
  795. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  796. /*
  797. * The same handler is used for both the REPLY to a discrete
  798. * statistics request from the host as well as for the periodic
  799. * statistics notifications (after received beacons) from the uCode.
  800. */
  801. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  802. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  803. iwl_setup_rx_scan_handlers(priv);
  804. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  805. /* Set up hardware specific Rx handlers */
  806. iwl3945_hw_rx_handler_setup(priv);
  807. }
  808. /************************** RX-FUNCTIONS ****************************/
  809. /*
  810. * Rx theory of operation
  811. *
  812. * The host allocates 32 DMA target addresses and passes the host address
  813. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  814. * 0 to 31
  815. *
  816. * Rx Queue Indexes
  817. * The host/firmware share two index registers for managing the Rx buffers.
  818. *
  819. * The READ index maps to the first position that the firmware may be writing
  820. * to -- the driver can read up to (but not including) this position and get
  821. * good data.
  822. * The READ index is managed by the firmware once the card is enabled.
  823. *
  824. * The WRITE index maps to the last position the driver has read from -- the
  825. * position preceding WRITE is the last slot the firmware can place a packet.
  826. *
  827. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  828. * WRITE = READ.
  829. *
  830. * During initialization, the host sets up the READ queue position to the first
  831. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  832. *
  833. * When the firmware places a packet in a buffer, it will advance the READ index
  834. * and fire the RX interrupt. The driver can then query the READ index and
  835. * process as many packets as possible, moving the WRITE index forward as it
  836. * resets the Rx queue buffers with new memory.
  837. *
  838. * The management in the driver is as follows:
  839. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  840. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  841. * to replenish the iwl->rxq->rx_free.
  842. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  843. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  844. * 'processed' and 'read' driver indexes as well)
  845. * + A received packet is processed and handed to the kernel network stack,
  846. * detached from the iwl->rxq. The driver 'processed' index is updated.
  847. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  848. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  849. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  850. * were enough free buffers and RX_STALLED is set it is cleared.
  851. *
  852. *
  853. * Driver sequence:
  854. *
  855. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  856. * iwl3945_rx_queue_restock
  857. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  858. * queue, updates firmware pointers, and updates
  859. * the WRITE index. If insufficient rx_free buffers
  860. * are available, schedules iwl3945_rx_replenish
  861. *
  862. * -- enable interrupts --
  863. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  864. * READ INDEX, detaching the SKB from the pool.
  865. * Moves the packet buffer from queue to rx_used.
  866. * Calls iwl3945_rx_queue_restock to refill any empty
  867. * slots.
  868. * ...
  869. *
  870. */
  871. /**
  872. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  873. */
  874. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  875. dma_addr_t dma_addr)
  876. {
  877. return cpu_to_le32((u32)dma_addr);
  878. }
  879. /**
  880. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  881. *
  882. * If there are slots in the RX queue that need to be restocked,
  883. * and we have free pre-allocated buffers, fill the ranks as much
  884. * as we can, pulling from rx_free.
  885. *
  886. * This moves the 'write' index forward to catch up with 'processed', and
  887. * also updates the memory address in the firmware to reference the new
  888. * target buffer.
  889. */
  890. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  891. {
  892. struct iwl_rx_queue *rxq = &priv->rxq;
  893. struct list_head *element;
  894. struct iwl_rx_mem_buffer *rxb;
  895. unsigned long flags;
  896. int write, rc;
  897. spin_lock_irqsave(&rxq->lock, flags);
  898. write = rxq->write & ~0x7;
  899. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  900. /* Get next free Rx buffer, remove from free list */
  901. element = rxq->rx_free.next;
  902. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  903. list_del(element);
  904. /* Point to Rx buffer via next RBD in circular buffer */
  905. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
  906. rxq->queue[rxq->write] = rxb;
  907. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  908. rxq->free_count--;
  909. }
  910. spin_unlock_irqrestore(&rxq->lock, flags);
  911. /* If the pre-allocated buffer pool is dropping low, schedule to
  912. * refill it */
  913. if (rxq->free_count <= RX_LOW_WATERMARK)
  914. queue_work(priv->workqueue, &priv->rx_replenish);
  915. /* If we've added more space for the firmware to place data, tell it.
  916. * Increment device's write pointer in multiples of 8. */
  917. if ((rxq->write_actual != (rxq->write & ~0x7))
  918. || (abs(rxq->write - rxq->read) > 7)) {
  919. spin_lock_irqsave(&rxq->lock, flags);
  920. rxq->need_update = 1;
  921. spin_unlock_irqrestore(&rxq->lock, flags);
  922. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  923. if (rc)
  924. return rc;
  925. }
  926. return 0;
  927. }
  928. /**
  929. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  930. *
  931. * When moving to rx_free an SKB is allocated for the slot.
  932. *
  933. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  934. * This is called as a scheduled work item (except for during initialization)
  935. */
  936. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  937. {
  938. struct iwl_rx_queue *rxq = &priv->rxq;
  939. struct list_head *element;
  940. struct iwl_rx_mem_buffer *rxb;
  941. struct page *page;
  942. unsigned long flags;
  943. gfp_t gfp_mask = priority;
  944. while (1) {
  945. spin_lock_irqsave(&rxq->lock, flags);
  946. if (list_empty(&rxq->rx_used)) {
  947. spin_unlock_irqrestore(&rxq->lock, flags);
  948. return;
  949. }
  950. spin_unlock_irqrestore(&rxq->lock, flags);
  951. if (rxq->free_count > RX_LOW_WATERMARK)
  952. gfp_mask |= __GFP_NOWARN;
  953. if (priv->hw_params.rx_page_order > 0)
  954. gfp_mask |= __GFP_COMP;
  955. /* Alloc a new receive buffer */
  956. page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
  957. if (!page) {
  958. if (net_ratelimit())
  959. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  960. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  961. net_ratelimit())
  962. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  963. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  964. rxq->free_count);
  965. /* We don't reschedule replenish work here -- we will
  966. * call the restock method and if it still needs
  967. * more buffers it will schedule replenish */
  968. break;
  969. }
  970. spin_lock_irqsave(&rxq->lock, flags);
  971. if (list_empty(&rxq->rx_used)) {
  972. spin_unlock_irqrestore(&rxq->lock, flags);
  973. __free_pages(page, priv->hw_params.rx_page_order);
  974. return;
  975. }
  976. element = rxq->rx_used.next;
  977. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  978. list_del(element);
  979. spin_unlock_irqrestore(&rxq->lock, flags);
  980. rxb->page = page;
  981. /* Get physical address of RB/SKB */
  982. rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
  983. PAGE_SIZE << priv->hw_params.rx_page_order,
  984. PCI_DMA_FROMDEVICE);
  985. spin_lock_irqsave(&rxq->lock, flags);
  986. list_add_tail(&rxb->list, &rxq->rx_free);
  987. rxq->free_count++;
  988. priv->alloc_rxb_page++;
  989. spin_unlock_irqrestore(&rxq->lock, flags);
  990. }
  991. }
  992. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  993. {
  994. unsigned long flags;
  995. int i;
  996. spin_lock_irqsave(&rxq->lock, flags);
  997. INIT_LIST_HEAD(&rxq->rx_free);
  998. INIT_LIST_HEAD(&rxq->rx_used);
  999. /* Fill the rx_used queue with _all_ of the Rx buffers */
  1000. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  1001. /* In the reset function, these buffers may have been allocated
  1002. * to an SKB, so we need to unmap and free potential storage */
  1003. if (rxq->pool[i].page != NULL) {
  1004. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1005. PAGE_SIZE << priv->hw_params.rx_page_order,
  1006. PCI_DMA_FROMDEVICE);
  1007. __iwl_free_pages(priv, rxq->pool[i].page);
  1008. rxq->pool[i].page = NULL;
  1009. }
  1010. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1011. }
  1012. /* Set us so that we have processed and used all buffers, but have
  1013. * not restocked the Rx queue with fresh buffers */
  1014. rxq->read = rxq->write = 0;
  1015. rxq->write_actual = 0;
  1016. rxq->free_count = 0;
  1017. spin_unlock_irqrestore(&rxq->lock, flags);
  1018. }
  1019. void iwl3945_rx_replenish(void *data)
  1020. {
  1021. struct iwl_priv *priv = data;
  1022. unsigned long flags;
  1023. iwl3945_rx_allocate(priv, GFP_KERNEL);
  1024. spin_lock_irqsave(&priv->lock, flags);
  1025. iwl3945_rx_queue_restock(priv);
  1026. spin_unlock_irqrestore(&priv->lock, flags);
  1027. }
  1028. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  1029. {
  1030. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  1031. iwl3945_rx_queue_restock(priv);
  1032. }
  1033. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1034. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1035. * This free routine walks the list of POOL entries and if SKB is set to
  1036. * non NULL it is unmapped and freed
  1037. */
  1038. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1039. {
  1040. int i;
  1041. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1042. if (rxq->pool[i].page != NULL) {
  1043. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1044. PAGE_SIZE << priv->hw_params.rx_page_order,
  1045. PCI_DMA_FROMDEVICE);
  1046. __iwl_free_pages(priv, rxq->pool[i].page);
  1047. rxq->pool[i].page = NULL;
  1048. }
  1049. }
  1050. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1051. rxq->dma_addr);
  1052. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1053. rxq->rb_stts, rxq->rb_stts_dma);
  1054. rxq->bd = NULL;
  1055. rxq->rb_stts = NULL;
  1056. }
  1057. /* Convert linear signal-to-noise ratio into dB */
  1058. static u8 ratio2dB[100] = {
  1059. /* 0 1 2 3 4 5 6 7 8 9 */
  1060. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1061. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1062. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1063. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1064. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1065. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1066. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1067. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1068. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1069. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1070. };
  1071. /* Calculates a relative dB value from a ratio of linear
  1072. * (i.e. not dB) signal levels.
  1073. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1074. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1075. {
  1076. /* 1000:1 or higher just report as 60 dB */
  1077. if (sig_ratio >= 1000)
  1078. return 60;
  1079. /* 100:1 or higher, divide by 10 and use table,
  1080. * add 20 dB to make up for divide by 10 */
  1081. if (sig_ratio >= 100)
  1082. return 20 + (int)ratio2dB[sig_ratio/10];
  1083. /* We shouldn't see this */
  1084. if (sig_ratio < 1)
  1085. return 0;
  1086. /* Use table for ratios 1:1 - 99:1 */
  1087. return (int)ratio2dB[sig_ratio];
  1088. }
  1089. /**
  1090. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1091. *
  1092. * Uses the priv->rx_handlers callback function array to invoke
  1093. * the appropriate handlers, including command responses,
  1094. * frame-received notifications, and other notifications.
  1095. */
  1096. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1097. {
  1098. struct iwl_rx_mem_buffer *rxb;
  1099. struct iwl_rx_packet *pkt;
  1100. struct iwl_rx_queue *rxq = &priv->rxq;
  1101. u32 r, i;
  1102. int reclaim;
  1103. unsigned long flags;
  1104. u8 fill_rx = 0;
  1105. u32 count = 8;
  1106. int total_empty = 0;
  1107. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1108. * buffer that the driver may process (last buffer filled by ucode). */
  1109. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1110. i = rxq->read;
  1111. /* calculate total frames need to be restock after handling RX */
  1112. total_empty = r - rxq->write_actual;
  1113. if (total_empty < 0)
  1114. total_empty += RX_QUEUE_SIZE;
  1115. if (total_empty > (RX_QUEUE_SIZE / 2))
  1116. fill_rx = 1;
  1117. /* Rx interrupt, but nothing sent from uCode */
  1118. if (i == r)
  1119. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1120. while (i != r) {
  1121. rxb = rxq->queue[i];
  1122. /* If an RXB doesn't have a Rx queue slot associated with it,
  1123. * then a bug has been introduced in the queue refilling
  1124. * routines -- catch it here */
  1125. BUG_ON(rxb == NULL);
  1126. rxq->queue[i] = NULL;
  1127. pci_unmap_page(priv->pci_dev, rxb->page_dma,
  1128. PAGE_SIZE << priv->hw_params.rx_page_order,
  1129. PCI_DMA_FROMDEVICE);
  1130. pkt = rxb_addr(rxb);
  1131. trace_iwlwifi_dev_rx(priv, pkt,
  1132. le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
  1133. /* Reclaim a command buffer only if this packet is a response
  1134. * to a (driver-originated) command.
  1135. * If the packet (e.g. Rx frame) originated from uCode,
  1136. * there is no command buffer to reclaim.
  1137. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1138. * but apparently a few don't get set; catch them here. */
  1139. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1140. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1141. (pkt->hdr.cmd != REPLY_TX);
  1142. /* Based on type of command response or notification,
  1143. * handle those that need handling via function in
  1144. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1145. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1146. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1147. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1148. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1149. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1150. } else {
  1151. /* No handling needed */
  1152. IWL_DEBUG_RX(priv,
  1153. "r %d i %d No handler needed for %s, 0x%02x\n",
  1154. r, i, get_cmd_string(pkt->hdr.cmd),
  1155. pkt->hdr.cmd);
  1156. }
  1157. /*
  1158. * XXX: After here, we should always check rxb->page
  1159. * against NULL before touching it or its virtual
  1160. * memory (pkt). Because some rx_handler might have
  1161. * already taken or freed the pages.
  1162. */
  1163. if (reclaim) {
  1164. /* Invoke any callbacks, transfer the buffer to caller,
  1165. * and fire off the (possibly) blocking iwl_send_cmd()
  1166. * as we reclaim the driver command queue */
  1167. if (rxb->page)
  1168. iwl_tx_cmd_complete(priv, rxb);
  1169. else
  1170. IWL_WARN(priv, "Claim null rxb?\n");
  1171. }
  1172. /* Reuse the page if possible. For notification packets and
  1173. * SKBs that fail to Rx correctly, add them back into the
  1174. * rx_free list for reuse later. */
  1175. spin_lock_irqsave(&rxq->lock, flags);
  1176. if (rxb->page != NULL) {
  1177. rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
  1178. 0, PAGE_SIZE << priv->hw_params.rx_page_order,
  1179. PCI_DMA_FROMDEVICE);
  1180. list_add_tail(&rxb->list, &rxq->rx_free);
  1181. rxq->free_count++;
  1182. } else
  1183. list_add_tail(&rxb->list, &rxq->rx_used);
  1184. spin_unlock_irqrestore(&rxq->lock, flags);
  1185. i = (i + 1) & RX_QUEUE_MASK;
  1186. /* If there are a lot of unused frames,
  1187. * restock the Rx queue so ucode won't assert. */
  1188. if (fill_rx) {
  1189. count++;
  1190. if (count >= 8) {
  1191. rxq->read = i;
  1192. iwl3945_rx_replenish_now(priv);
  1193. count = 0;
  1194. }
  1195. }
  1196. }
  1197. /* Backtrack one entry */
  1198. rxq->read = i;
  1199. if (fill_rx)
  1200. iwl3945_rx_replenish_now(priv);
  1201. else
  1202. iwl3945_rx_queue_restock(priv);
  1203. }
  1204. /* call this function to flush any scheduled tasklet */
  1205. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1206. {
  1207. /* wait to make sure we flush pending tasklet*/
  1208. synchronize_irq(priv->pci_dev->irq);
  1209. tasklet_kill(&priv->irq_tasklet);
  1210. }
  1211. static const char *desc_lookup(int i)
  1212. {
  1213. switch (i) {
  1214. case 1:
  1215. return "FAIL";
  1216. case 2:
  1217. return "BAD_PARAM";
  1218. case 3:
  1219. return "BAD_CHECKSUM";
  1220. case 4:
  1221. return "NMI_INTERRUPT";
  1222. case 5:
  1223. return "SYSASSERT";
  1224. case 6:
  1225. return "FATAL_ERROR";
  1226. }
  1227. return "UNKNOWN";
  1228. }
  1229. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1230. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1231. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1232. {
  1233. u32 i;
  1234. u32 desc, time, count, base, data1;
  1235. u32 blink1, blink2, ilink1, ilink2;
  1236. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1237. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1238. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1239. return;
  1240. }
  1241. count = iwl_read_targ_mem(priv, base);
  1242. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1243. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1244. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1245. priv->status, count);
  1246. }
  1247. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1248. "ilink1 nmiPC Line\n");
  1249. for (i = ERROR_START_OFFSET;
  1250. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1251. i += ERROR_ELEM_SIZE) {
  1252. desc = iwl_read_targ_mem(priv, base + i);
  1253. time =
  1254. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1255. blink1 =
  1256. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1257. blink2 =
  1258. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1259. ilink1 =
  1260. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1261. ilink2 =
  1262. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1263. data1 =
  1264. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1265. IWL_ERR(priv,
  1266. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1267. desc_lookup(desc), desc, time, blink1, blink2,
  1268. ilink1, ilink2, data1);
  1269. trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
  1270. 0, blink1, blink2, ilink1, ilink2);
  1271. }
  1272. }
  1273. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1274. /**
  1275. * iwl3945_print_event_log - Dump error event log to syslog
  1276. *
  1277. */
  1278. static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1279. u32 num_events, u32 mode,
  1280. int pos, char **buf, size_t bufsz)
  1281. {
  1282. u32 i;
  1283. u32 base; /* SRAM byte address of event log header */
  1284. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1285. u32 ptr; /* SRAM byte address of log data */
  1286. u32 ev, time, data; /* event log data */
  1287. unsigned long reg_flags;
  1288. if (num_events == 0)
  1289. return pos;
  1290. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1291. if (mode == 0)
  1292. event_size = 2 * sizeof(u32);
  1293. else
  1294. event_size = 3 * sizeof(u32);
  1295. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1296. /* Make sure device is powered up for SRAM reads */
  1297. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  1298. iwl_grab_nic_access(priv);
  1299. /* Set starting address; reads will auto-increment */
  1300. _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
  1301. rmb();
  1302. /* "time" is actually "data" for mode 0 (no timestamp).
  1303. * place event id # at far right for easier visual parsing. */
  1304. for (i = 0; i < num_events; i++) {
  1305. ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1306. time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1307. if (mode == 0) {
  1308. /* data, ev */
  1309. if (bufsz) {
  1310. pos += scnprintf(*buf + pos, bufsz - pos,
  1311. "0x%08x:%04u\n",
  1312. time, ev);
  1313. } else {
  1314. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1315. trace_iwlwifi_dev_ucode_event(priv, 0,
  1316. time, ev);
  1317. }
  1318. } else {
  1319. data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1320. if (bufsz) {
  1321. pos += scnprintf(*buf + pos, bufsz - pos,
  1322. "%010u:0x%08x:%04u\n",
  1323. time, data, ev);
  1324. } else {
  1325. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
  1326. time, data, ev);
  1327. trace_iwlwifi_dev_ucode_event(priv, time,
  1328. data, ev);
  1329. }
  1330. }
  1331. }
  1332. /* Allow device to power down */
  1333. iwl_release_nic_access(priv);
  1334. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  1335. return pos;
  1336. }
  1337. /**
  1338. * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
  1339. */
  1340. static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
  1341. u32 num_wraps, u32 next_entry,
  1342. u32 size, u32 mode,
  1343. int pos, char **buf, size_t bufsz)
  1344. {
  1345. /*
  1346. * display the newest DEFAULT_LOG_ENTRIES entries
  1347. * i.e the entries just before the next ont that uCode would fill.
  1348. */
  1349. if (num_wraps) {
  1350. if (next_entry < size) {
  1351. pos = iwl3945_print_event_log(priv,
  1352. capacity - (size - next_entry),
  1353. size - next_entry, mode,
  1354. pos, buf, bufsz);
  1355. pos = iwl3945_print_event_log(priv, 0,
  1356. next_entry, mode,
  1357. pos, buf, bufsz);
  1358. } else
  1359. pos = iwl3945_print_event_log(priv, next_entry - size,
  1360. size, mode,
  1361. pos, buf, bufsz);
  1362. } else {
  1363. if (next_entry < size)
  1364. pos = iwl3945_print_event_log(priv, 0,
  1365. next_entry, mode,
  1366. pos, buf, bufsz);
  1367. else
  1368. pos = iwl3945_print_event_log(priv, next_entry - size,
  1369. size, mode,
  1370. pos, buf, bufsz);
  1371. }
  1372. return pos;
  1373. }
  1374. /* For sanity check only. Actual size is determined by uCode, typ. 512 */
  1375. #define IWL3945_MAX_EVENT_LOG_SIZE (512)
  1376. #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
  1377. int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
  1378. char **buf, bool display)
  1379. {
  1380. u32 base; /* SRAM byte address of event log header */
  1381. u32 capacity; /* event log capacity in # entries */
  1382. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1383. u32 num_wraps; /* # times uCode wrapped to top of log */
  1384. u32 next_entry; /* index of next entry to be written by uCode */
  1385. u32 size; /* # entries that we'll print */
  1386. int pos = 0;
  1387. size_t bufsz = 0;
  1388. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1389. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1390. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1391. return -EINVAL;
  1392. }
  1393. /* event log header */
  1394. capacity = iwl_read_targ_mem(priv, base);
  1395. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1396. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1397. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1398. if (capacity > IWL3945_MAX_EVENT_LOG_SIZE) {
  1399. IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
  1400. capacity, IWL3945_MAX_EVENT_LOG_SIZE);
  1401. capacity = IWL3945_MAX_EVENT_LOG_SIZE;
  1402. }
  1403. if (next_entry > IWL3945_MAX_EVENT_LOG_SIZE) {
  1404. IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
  1405. next_entry, IWL3945_MAX_EVENT_LOG_SIZE);
  1406. next_entry = IWL3945_MAX_EVENT_LOG_SIZE;
  1407. }
  1408. size = num_wraps ? capacity : next_entry;
  1409. /* bail out if nothing in log */
  1410. if (size == 0) {
  1411. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1412. return pos;
  1413. }
  1414. #ifdef CONFIG_IWLWIFI_DEBUG
  1415. if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
  1416. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1417. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1418. #else
  1419. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1420. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1421. #endif
  1422. IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
  1423. size);
  1424. #ifdef CONFIG_IWLWIFI_DEBUG
  1425. if (display) {
  1426. if (full_log)
  1427. bufsz = capacity * 48;
  1428. else
  1429. bufsz = size * 48;
  1430. *buf = kmalloc(bufsz, GFP_KERNEL);
  1431. if (!*buf)
  1432. return -ENOMEM;
  1433. }
  1434. if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
  1435. /* if uCode has wrapped back to top of log,
  1436. * start at the oldest entry,
  1437. * i.e the next one that uCode would fill.
  1438. */
  1439. if (num_wraps)
  1440. pos = iwl3945_print_event_log(priv, next_entry,
  1441. capacity - next_entry, mode,
  1442. pos, buf, bufsz);
  1443. /* (then/else) start at top of log */
  1444. pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
  1445. pos, buf, bufsz);
  1446. } else
  1447. pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1448. next_entry, size, mode,
  1449. pos, buf, bufsz);
  1450. #else
  1451. pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1452. next_entry, size, mode,
  1453. pos, buf, bufsz);
  1454. #endif
  1455. return pos;
  1456. }
  1457. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1458. {
  1459. u32 inta, handled = 0;
  1460. u32 inta_fh;
  1461. unsigned long flags;
  1462. #ifdef CONFIG_IWLWIFI_DEBUG
  1463. u32 inta_mask;
  1464. #endif
  1465. spin_lock_irqsave(&priv->lock, flags);
  1466. /* Ack/clear/reset pending uCode interrupts.
  1467. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1468. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1469. inta = iwl_read32(priv, CSR_INT);
  1470. iwl_write32(priv, CSR_INT, inta);
  1471. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1472. * Any new interrupts that happen after this, either while we're
  1473. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1474. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1475. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1476. #ifdef CONFIG_IWLWIFI_DEBUG
  1477. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  1478. /* just for debug */
  1479. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1480. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1481. inta, inta_mask, inta_fh);
  1482. }
  1483. #endif
  1484. spin_unlock_irqrestore(&priv->lock, flags);
  1485. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1486. * atomic, make sure that inta covers all the interrupts that
  1487. * we've discovered, even if FH interrupt came in just after
  1488. * reading CSR_INT. */
  1489. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1490. inta |= CSR_INT_BIT_FH_RX;
  1491. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1492. inta |= CSR_INT_BIT_FH_TX;
  1493. /* Now service all interrupt bits discovered above. */
  1494. if (inta & CSR_INT_BIT_HW_ERR) {
  1495. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1496. /* Tell the device to stop sending interrupts */
  1497. iwl_disable_interrupts(priv);
  1498. priv->isr_stats.hw++;
  1499. iwl_irq_handle_error(priv);
  1500. handled |= CSR_INT_BIT_HW_ERR;
  1501. return;
  1502. }
  1503. #ifdef CONFIG_IWLWIFI_DEBUG
  1504. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1505. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1506. if (inta & CSR_INT_BIT_SCD) {
  1507. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1508. "the frame/frames.\n");
  1509. priv->isr_stats.sch++;
  1510. }
  1511. /* Alive notification via Rx interrupt will do the real work */
  1512. if (inta & CSR_INT_BIT_ALIVE) {
  1513. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1514. priv->isr_stats.alive++;
  1515. }
  1516. }
  1517. #endif
  1518. /* Safely ignore these bits for debug checks below */
  1519. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1520. /* Error detected by uCode */
  1521. if (inta & CSR_INT_BIT_SW_ERR) {
  1522. IWL_ERR(priv, "Microcode SW error detected. "
  1523. "Restarting 0x%X.\n", inta);
  1524. priv->isr_stats.sw++;
  1525. priv->isr_stats.sw_err = inta;
  1526. iwl_irq_handle_error(priv);
  1527. handled |= CSR_INT_BIT_SW_ERR;
  1528. }
  1529. /* uCode wakes up after power-down sleep */
  1530. if (inta & CSR_INT_BIT_WAKEUP) {
  1531. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1532. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1533. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1534. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1535. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1536. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1537. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1538. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1539. priv->isr_stats.wakeup++;
  1540. handled |= CSR_INT_BIT_WAKEUP;
  1541. }
  1542. /* All uCode command responses, including Tx command responses,
  1543. * Rx "responses" (frame-received notification), and other
  1544. * notifications from uCode come through here*/
  1545. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1546. iwl3945_rx_handle(priv);
  1547. priv->isr_stats.rx++;
  1548. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1549. }
  1550. if (inta & CSR_INT_BIT_FH_TX) {
  1551. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1552. priv->isr_stats.tx++;
  1553. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1554. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1555. (FH39_SRVC_CHNL), 0x0);
  1556. handled |= CSR_INT_BIT_FH_TX;
  1557. }
  1558. if (inta & ~handled) {
  1559. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1560. priv->isr_stats.unhandled++;
  1561. }
  1562. if (inta & ~priv->inta_mask) {
  1563. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1564. inta & ~priv->inta_mask);
  1565. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1566. }
  1567. /* Re-enable all interrupts */
  1568. /* only Re-enable if disabled by irq */
  1569. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1570. iwl_enable_interrupts(priv);
  1571. #ifdef CONFIG_IWLWIFI_DEBUG
  1572. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1573. inta = iwl_read32(priv, CSR_INT);
  1574. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1575. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1576. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1577. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1578. }
  1579. #endif
  1580. }
  1581. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1582. enum ieee80211_band band,
  1583. u8 is_active, u8 n_probes,
  1584. struct iwl3945_scan_channel *scan_ch)
  1585. {
  1586. struct ieee80211_channel *chan;
  1587. const struct ieee80211_supported_band *sband;
  1588. const struct iwl_channel_info *ch_info;
  1589. u16 passive_dwell = 0;
  1590. u16 active_dwell = 0;
  1591. int added, i;
  1592. sband = iwl_get_hw_mode(priv, band);
  1593. if (!sband)
  1594. return 0;
  1595. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1596. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1597. if (passive_dwell <= active_dwell)
  1598. passive_dwell = active_dwell + 1;
  1599. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1600. chan = priv->scan_request->channels[i];
  1601. if (chan->band != band)
  1602. continue;
  1603. scan_ch->channel = chan->hw_value;
  1604. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1605. if (!is_channel_valid(ch_info)) {
  1606. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1607. scan_ch->channel);
  1608. continue;
  1609. }
  1610. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1611. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1612. /* If passive , set up for auto-switch
  1613. * and use long active_dwell time.
  1614. */
  1615. if (!is_active || is_channel_passive(ch_info) ||
  1616. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1617. scan_ch->type = 0; /* passive */
  1618. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1619. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1620. } else {
  1621. scan_ch->type = 1; /* active */
  1622. }
  1623. /* Set direct probe bits. These may be used both for active
  1624. * scan channels (probes gets sent right away),
  1625. * or for passive channels (probes get se sent only after
  1626. * hearing clear Rx packet).*/
  1627. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1628. if (n_probes)
  1629. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1630. } else {
  1631. /* uCode v1 does not allow setting direct probe bits on
  1632. * passive channel. */
  1633. if ((scan_ch->type & 1) && n_probes)
  1634. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1635. }
  1636. /* Set txpower levels to defaults */
  1637. scan_ch->tpc.dsp_atten = 110;
  1638. /* scan_pwr_info->tpc.dsp_atten; */
  1639. /*scan_pwr_info->tpc.tx_gain; */
  1640. if (band == IEEE80211_BAND_5GHZ)
  1641. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1642. else {
  1643. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1644. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1645. * power level:
  1646. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1647. */
  1648. }
  1649. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1650. scan_ch->channel,
  1651. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1652. (scan_ch->type & 1) ?
  1653. active_dwell : passive_dwell);
  1654. scan_ch++;
  1655. added++;
  1656. }
  1657. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1658. return added;
  1659. }
  1660. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1661. struct ieee80211_rate *rates)
  1662. {
  1663. int i;
  1664. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1665. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1666. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1667. rates[i].hw_value_short = i;
  1668. rates[i].flags = 0;
  1669. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1670. /*
  1671. * If CCK != 1M then set short preamble rate flag.
  1672. */
  1673. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1674. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1675. }
  1676. }
  1677. }
  1678. /******************************************************************************
  1679. *
  1680. * uCode download functions
  1681. *
  1682. ******************************************************************************/
  1683. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1684. {
  1685. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1686. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1687. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1688. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1689. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1690. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1691. }
  1692. /**
  1693. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1694. * looking at all data.
  1695. */
  1696. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1697. {
  1698. u32 val;
  1699. u32 save_len = len;
  1700. int rc = 0;
  1701. u32 errcnt;
  1702. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1703. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1704. IWL39_RTC_INST_LOWER_BOUND);
  1705. errcnt = 0;
  1706. for (; len > 0; len -= sizeof(u32), image++) {
  1707. /* read data comes through single port, auto-incr addr */
  1708. /* NOTE: Use the debugless read so we don't flood kernel log
  1709. * if IWL_DL_IO is set */
  1710. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1711. if (val != le32_to_cpu(*image)) {
  1712. IWL_ERR(priv, "uCode INST section is invalid at "
  1713. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1714. save_len - len, val, le32_to_cpu(*image));
  1715. rc = -EIO;
  1716. errcnt++;
  1717. if (errcnt >= 20)
  1718. break;
  1719. }
  1720. }
  1721. if (!errcnt)
  1722. IWL_DEBUG_INFO(priv,
  1723. "ucode image in INSTRUCTION memory is good\n");
  1724. return rc;
  1725. }
  1726. /**
  1727. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1728. * using sample data 100 bytes apart. If these sample points are good,
  1729. * it's a pretty good bet that everything between them is good, too.
  1730. */
  1731. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1732. {
  1733. u32 val;
  1734. int rc = 0;
  1735. u32 errcnt = 0;
  1736. u32 i;
  1737. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1738. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1739. /* read data comes through single port, auto-incr addr */
  1740. /* NOTE: Use the debugless read so we don't flood kernel log
  1741. * if IWL_DL_IO is set */
  1742. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1743. i + IWL39_RTC_INST_LOWER_BOUND);
  1744. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1745. if (val != le32_to_cpu(*image)) {
  1746. #if 0 /* Enable this if you want to see details */
  1747. IWL_ERR(priv, "uCode INST section is invalid at "
  1748. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1749. i, val, *image);
  1750. #endif
  1751. rc = -EIO;
  1752. errcnt++;
  1753. if (errcnt >= 3)
  1754. break;
  1755. }
  1756. }
  1757. return rc;
  1758. }
  1759. /**
  1760. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1761. * and verify its contents
  1762. */
  1763. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1764. {
  1765. __le32 *image;
  1766. u32 len;
  1767. int rc = 0;
  1768. /* Try bootstrap */
  1769. image = (__le32 *)priv->ucode_boot.v_addr;
  1770. len = priv->ucode_boot.len;
  1771. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1772. if (rc == 0) {
  1773. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1774. return 0;
  1775. }
  1776. /* Try initialize */
  1777. image = (__le32 *)priv->ucode_init.v_addr;
  1778. len = priv->ucode_init.len;
  1779. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1780. if (rc == 0) {
  1781. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1782. return 0;
  1783. }
  1784. /* Try runtime/protocol */
  1785. image = (__le32 *)priv->ucode_code.v_addr;
  1786. len = priv->ucode_code.len;
  1787. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1788. if (rc == 0) {
  1789. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1790. return 0;
  1791. }
  1792. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1793. /* Since nothing seems to match, show first several data entries in
  1794. * instruction SRAM, so maybe visual inspection will give a clue.
  1795. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1796. image = (__le32 *)priv->ucode_boot.v_addr;
  1797. len = priv->ucode_boot.len;
  1798. rc = iwl3945_verify_inst_full(priv, image, len);
  1799. return rc;
  1800. }
  1801. static void iwl3945_nic_start(struct iwl_priv *priv)
  1802. {
  1803. /* Remove all resets to allow NIC to operate */
  1804. iwl_write32(priv, CSR_RESET, 0);
  1805. }
  1806. /**
  1807. * iwl3945_read_ucode - Read uCode images from disk file.
  1808. *
  1809. * Copy into buffers for card to fetch via bus-mastering
  1810. */
  1811. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1812. {
  1813. const struct iwl_ucode_header *ucode;
  1814. int ret = -EINVAL, index;
  1815. const struct firmware *ucode_raw;
  1816. /* firmware file name contains uCode/driver compatibility version */
  1817. const char *name_pre = priv->cfg->fw_name_pre;
  1818. const unsigned int api_max = priv->cfg->ucode_api_max;
  1819. const unsigned int api_min = priv->cfg->ucode_api_min;
  1820. char buf[25];
  1821. u8 *src;
  1822. size_t len;
  1823. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1824. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1825. * request_firmware() is synchronous, file is in memory on return. */
  1826. for (index = api_max; index >= api_min; index--) {
  1827. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1828. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1829. if (ret < 0) {
  1830. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1831. buf, ret);
  1832. if (ret == -ENOENT)
  1833. continue;
  1834. else
  1835. goto error;
  1836. } else {
  1837. if (index < api_max)
  1838. IWL_ERR(priv, "Loaded firmware %s, "
  1839. "which is deprecated. "
  1840. " Please use API v%u instead.\n",
  1841. buf, api_max);
  1842. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1843. "(%zd bytes) from disk\n",
  1844. buf, ucode_raw->size);
  1845. break;
  1846. }
  1847. }
  1848. if (ret < 0)
  1849. goto error;
  1850. /* Make sure that we got at least our header! */
  1851. if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
  1852. IWL_ERR(priv, "File size way too small!\n");
  1853. ret = -EINVAL;
  1854. goto err_release;
  1855. }
  1856. /* Data from ucode file: header followed by uCode images */
  1857. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1858. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1859. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1860. inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
  1861. data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
  1862. init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
  1863. init_data_size =
  1864. priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
  1865. boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
  1866. src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
  1867. /* api_ver should match the api version forming part of the
  1868. * firmware filename ... but we don't check for that and only rely
  1869. * on the API version read from firmware header from here on forward */
  1870. if (api_ver < api_min || api_ver > api_max) {
  1871. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1872. "Driver supports v%u, firmware is v%u.\n",
  1873. api_max, api_ver);
  1874. priv->ucode_ver = 0;
  1875. ret = -EINVAL;
  1876. goto err_release;
  1877. }
  1878. if (api_ver != api_max)
  1879. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1880. "got %u. New firmware can be obtained "
  1881. "from http://www.intellinuxwireless.org.\n",
  1882. api_max, api_ver);
  1883. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1884. IWL_UCODE_MAJOR(priv->ucode_ver),
  1885. IWL_UCODE_MINOR(priv->ucode_ver),
  1886. IWL_UCODE_API(priv->ucode_ver),
  1887. IWL_UCODE_SERIAL(priv->ucode_ver));
  1888. snprintf(priv->hw->wiphy->fw_version,
  1889. sizeof(priv->hw->wiphy->fw_version),
  1890. "%u.%u.%u.%u",
  1891. IWL_UCODE_MAJOR(priv->ucode_ver),
  1892. IWL_UCODE_MINOR(priv->ucode_ver),
  1893. IWL_UCODE_API(priv->ucode_ver),
  1894. IWL_UCODE_SERIAL(priv->ucode_ver));
  1895. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1896. priv->ucode_ver);
  1897. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1898. inst_size);
  1899. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1900. data_size);
  1901. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1902. init_size);
  1903. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1904. init_data_size);
  1905. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1906. boot_size);
  1907. /* Verify size of file vs. image size info in file's header */
  1908. if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
  1909. inst_size + data_size + init_size +
  1910. init_data_size + boot_size) {
  1911. IWL_DEBUG_INFO(priv,
  1912. "uCode file size %zd does not match expected size\n",
  1913. ucode_raw->size);
  1914. ret = -EINVAL;
  1915. goto err_release;
  1916. }
  1917. /* Verify that uCode images will fit in card's SRAM */
  1918. if (inst_size > IWL39_MAX_INST_SIZE) {
  1919. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1920. inst_size);
  1921. ret = -EINVAL;
  1922. goto err_release;
  1923. }
  1924. if (data_size > IWL39_MAX_DATA_SIZE) {
  1925. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1926. data_size);
  1927. ret = -EINVAL;
  1928. goto err_release;
  1929. }
  1930. if (init_size > IWL39_MAX_INST_SIZE) {
  1931. IWL_DEBUG_INFO(priv,
  1932. "uCode init instr len %d too large to fit in\n",
  1933. init_size);
  1934. ret = -EINVAL;
  1935. goto err_release;
  1936. }
  1937. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1938. IWL_DEBUG_INFO(priv,
  1939. "uCode init data len %d too large to fit in\n",
  1940. init_data_size);
  1941. ret = -EINVAL;
  1942. goto err_release;
  1943. }
  1944. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1945. IWL_DEBUG_INFO(priv,
  1946. "uCode boot instr len %d too large to fit in\n",
  1947. boot_size);
  1948. ret = -EINVAL;
  1949. goto err_release;
  1950. }
  1951. /* Allocate ucode buffers for card's bus-master loading ... */
  1952. /* Runtime instructions and 2 copies of data:
  1953. * 1) unmodified from disk
  1954. * 2) backup cache for save/restore during power-downs */
  1955. priv->ucode_code.len = inst_size;
  1956. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1957. priv->ucode_data.len = data_size;
  1958. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1959. priv->ucode_data_backup.len = data_size;
  1960. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1961. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1962. !priv->ucode_data_backup.v_addr)
  1963. goto err_pci_alloc;
  1964. /* Initialization instructions and data */
  1965. if (init_size && init_data_size) {
  1966. priv->ucode_init.len = init_size;
  1967. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1968. priv->ucode_init_data.len = init_data_size;
  1969. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1970. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1971. goto err_pci_alloc;
  1972. }
  1973. /* Bootstrap (instructions only, no data) */
  1974. if (boot_size) {
  1975. priv->ucode_boot.len = boot_size;
  1976. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1977. if (!priv->ucode_boot.v_addr)
  1978. goto err_pci_alloc;
  1979. }
  1980. /* Copy images into buffers for card's bus-master reads ... */
  1981. /* Runtime instructions (first block of data in file) */
  1982. len = inst_size;
  1983. IWL_DEBUG_INFO(priv,
  1984. "Copying (but not loading) uCode instr len %zd\n", len);
  1985. memcpy(priv->ucode_code.v_addr, src, len);
  1986. src += len;
  1987. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1988. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1989. /* Runtime data (2nd block)
  1990. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1991. len = data_size;
  1992. IWL_DEBUG_INFO(priv,
  1993. "Copying (but not loading) uCode data len %zd\n", len);
  1994. memcpy(priv->ucode_data.v_addr, src, len);
  1995. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1996. src += len;
  1997. /* Initialization instructions (3rd block) */
  1998. if (init_size) {
  1999. len = init_size;
  2000. IWL_DEBUG_INFO(priv,
  2001. "Copying (but not loading) init instr len %zd\n", len);
  2002. memcpy(priv->ucode_init.v_addr, src, len);
  2003. src += len;
  2004. }
  2005. /* Initialization data (4th block) */
  2006. if (init_data_size) {
  2007. len = init_data_size;
  2008. IWL_DEBUG_INFO(priv,
  2009. "Copying (but not loading) init data len %zd\n", len);
  2010. memcpy(priv->ucode_init_data.v_addr, src, len);
  2011. src += len;
  2012. }
  2013. /* Bootstrap instructions (5th block) */
  2014. len = boot_size;
  2015. IWL_DEBUG_INFO(priv,
  2016. "Copying (but not loading) boot instr len %zd\n", len);
  2017. memcpy(priv->ucode_boot.v_addr, src, len);
  2018. /* We have our copies now, allow OS release its copies */
  2019. release_firmware(ucode_raw);
  2020. return 0;
  2021. err_pci_alloc:
  2022. IWL_ERR(priv, "failed to allocate pci memory\n");
  2023. ret = -ENOMEM;
  2024. iwl3945_dealloc_ucode_pci(priv);
  2025. err_release:
  2026. release_firmware(ucode_raw);
  2027. error:
  2028. return ret;
  2029. }
  2030. /**
  2031. * iwl3945_set_ucode_ptrs - Set uCode address location
  2032. *
  2033. * Tell initialization uCode where to find runtime uCode.
  2034. *
  2035. * BSM registers initially contain pointers to initialization uCode.
  2036. * We need to replace them to load runtime uCode inst and data,
  2037. * and to save runtime data when powering down.
  2038. */
  2039. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  2040. {
  2041. dma_addr_t pinst;
  2042. dma_addr_t pdata;
  2043. /* bits 31:0 for 3945 */
  2044. pinst = priv->ucode_code.p_addr;
  2045. pdata = priv->ucode_data_backup.p_addr;
  2046. /* Tell bootstrap uCode where to find image to load */
  2047. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  2048. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  2049. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  2050. priv->ucode_data.len);
  2051. /* Inst byte count must be last to set up, bit 31 signals uCode
  2052. * that all new ptr/size info is in place */
  2053. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2054. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2055. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2056. return 0;
  2057. }
  2058. /**
  2059. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2060. *
  2061. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2062. *
  2063. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2064. */
  2065. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2066. {
  2067. /* Check alive response for "valid" sign from uCode */
  2068. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2069. /* We had an error bringing up the hardware, so take it
  2070. * all the way back down so we can try again */
  2071. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2072. goto restart;
  2073. }
  2074. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2075. * This is a paranoid check, because we would not have gotten the
  2076. * "initialize" alive if code weren't properly loaded. */
  2077. if (iwl3945_verify_ucode(priv)) {
  2078. /* Runtime instruction load was bad;
  2079. * take it all the way back down so we can try again */
  2080. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2081. goto restart;
  2082. }
  2083. /* Send pointers to protocol/runtime uCode image ... init code will
  2084. * load and launch runtime uCode, which will send us another "Alive"
  2085. * notification. */
  2086. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2087. if (iwl3945_set_ucode_ptrs(priv)) {
  2088. /* Runtime instruction load won't happen;
  2089. * take it all the way back down so we can try again */
  2090. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2091. goto restart;
  2092. }
  2093. return;
  2094. restart:
  2095. queue_work(priv->workqueue, &priv->restart);
  2096. }
  2097. /**
  2098. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2099. * from protocol/runtime uCode (initialization uCode's
  2100. * Alive gets handled by iwl3945_init_alive_start()).
  2101. */
  2102. static void iwl3945_alive_start(struct iwl_priv *priv)
  2103. {
  2104. int thermal_spin = 0;
  2105. u32 rfkill;
  2106. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2107. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2108. /* We had an error bringing up the hardware, so take it
  2109. * all the way back down so we can try again */
  2110. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2111. goto restart;
  2112. }
  2113. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2114. * This is a paranoid check, because we would not have gotten the
  2115. * "runtime" alive if code weren't properly loaded. */
  2116. if (iwl3945_verify_ucode(priv)) {
  2117. /* Runtime instruction load was bad;
  2118. * take it all the way back down so we can try again */
  2119. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2120. goto restart;
  2121. }
  2122. iwl_clear_stations_table(priv);
  2123. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2124. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2125. if (rfkill & 0x1) {
  2126. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2127. /* if RFKILL is not on, then wait for thermal
  2128. * sensor in adapter to kick in */
  2129. while (iwl3945_hw_get_temperature(priv) == 0) {
  2130. thermal_spin++;
  2131. udelay(10);
  2132. }
  2133. if (thermal_spin)
  2134. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2135. thermal_spin * 10);
  2136. } else
  2137. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2138. /* After the ALIVE response, we can send commands to 3945 uCode */
  2139. set_bit(STATUS_ALIVE, &priv->status);
  2140. if (iwl_is_rfkill(priv))
  2141. return;
  2142. ieee80211_wake_queues(priv->hw);
  2143. priv->active_rate = priv->rates_mask;
  2144. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2145. iwl_power_update_mode(priv, true);
  2146. if (iwl_is_associated(priv)) {
  2147. struct iwl3945_rxon_cmd *active_rxon =
  2148. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2149. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2150. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2151. } else {
  2152. /* Initialize our rx_config data */
  2153. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2154. }
  2155. /* Configure Bluetooth device coexistence support */
  2156. iwl_send_bt_config(priv);
  2157. /* Configure the adapter for unassociated operation */
  2158. iwlcore_commit_rxon(priv);
  2159. iwl3945_reg_txpower_periodic(priv);
  2160. iwl_leds_init(priv);
  2161. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2162. set_bit(STATUS_READY, &priv->status);
  2163. wake_up_interruptible(&priv->wait_command_queue);
  2164. /* reassociate for ADHOC mode */
  2165. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2166. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2167. priv->vif);
  2168. if (beacon)
  2169. iwl_mac_beacon_update(priv->hw, beacon);
  2170. }
  2171. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2172. iwl_set_mode(priv, priv->iw_mode);
  2173. return;
  2174. restart:
  2175. queue_work(priv->workqueue, &priv->restart);
  2176. }
  2177. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2178. static void __iwl3945_down(struct iwl_priv *priv)
  2179. {
  2180. unsigned long flags;
  2181. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2182. struct ieee80211_conf *conf = NULL;
  2183. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2184. conf = ieee80211_get_hw_conf(priv->hw);
  2185. if (!exit_pending)
  2186. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2187. iwl_clear_stations_table(priv);
  2188. /* Unblock any waiting calls */
  2189. wake_up_interruptible_all(&priv->wait_command_queue);
  2190. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2191. * exiting the module */
  2192. if (!exit_pending)
  2193. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2194. /* stop and reset the on-board processor */
  2195. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2196. /* tell the device to stop sending interrupts */
  2197. spin_lock_irqsave(&priv->lock, flags);
  2198. iwl_disable_interrupts(priv);
  2199. spin_unlock_irqrestore(&priv->lock, flags);
  2200. iwl_synchronize_irq(priv);
  2201. if (priv->mac80211_registered)
  2202. ieee80211_stop_queues(priv->hw);
  2203. /* If we have not previously called iwl3945_init() then
  2204. * clear all bits but the RF Kill bits and return */
  2205. if (!iwl_is_init(priv)) {
  2206. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2207. STATUS_RF_KILL_HW |
  2208. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2209. STATUS_GEO_CONFIGURED |
  2210. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2211. STATUS_EXIT_PENDING;
  2212. goto exit;
  2213. }
  2214. /* ...otherwise clear out all the status bits but the RF Kill
  2215. * bit and continue taking the NIC down. */
  2216. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2217. STATUS_RF_KILL_HW |
  2218. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2219. STATUS_GEO_CONFIGURED |
  2220. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2221. STATUS_FW_ERROR |
  2222. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2223. STATUS_EXIT_PENDING;
  2224. iwl3945_hw_txq_ctx_stop(priv);
  2225. iwl3945_hw_rxq_stop(priv);
  2226. /* Power-down device's busmaster DMA clocks */
  2227. iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  2228. udelay(5);
  2229. /* Stop the device, and put it in low power state */
  2230. priv->cfg->ops->lib->apm_ops.stop(priv);
  2231. exit:
  2232. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2233. if (priv->ibss_beacon)
  2234. dev_kfree_skb(priv->ibss_beacon);
  2235. priv->ibss_beacon = NULL;
  2236. /* clear out any free frames */
  2237. iwl3945_clear_free_frames(priv);
  2238. }
  2239. static void iwl3945_down(struct iwl_priv *priv)
  2240. {
  2241. mutex_lock(&priv->mutex);
  2242. __iwl3945_down(priv);
  2243. mutex_unlock(&priv->mutex);
  2244. iwl3945_cancel_deferred_work(priv);
  2245. }
  2246. #define MAX_HW_RESTARTS 5
  2247. static int __iwl3945_up(struct iwl_priv *priv)
  2248. {
  2249. int rc, i;
  2250. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2251. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2252. return -EIO;
  2253. }
  2254. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2255. IWL_ERR(priv, "ucode not available for device bring up\n");
  2256. return -EIO;
  2257. }
  2258. /* If platform's RF_KILL switch is NOT set to KILL */
  2259. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2260. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2261. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2262. else {
  2263. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2264. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2265. return -ENODEV;
  2266. }
  2267. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2268. rc = iwl3945_hw_nic_init(priv);
  2269. if (rc) {
  2270. IWL_ERR(priv, "Unable to int nic\n");
  2271. return rc;
  2272. }
  2273. /* make sure rfkill handshake bits are cleared */
  2274. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2275. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2276. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2277. /* clear (again), then enable host interrupts */
  2278. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2279. iwl_enable_interrupts(priv);
  2280. /* really make sure rfkill handshake bits are cleared */
  2281. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2282. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2283. /* Copy original ucode data image from disk into backup cache.
  2284. * This will be used to initialize the on-board processor's
  2285. * data SRAM for a clean start when the runtime program first loads. */
  2286. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2287. priv->ucode_data.len);
  2288. /* We return success when we resume from suspend and rf_kill is on. */
  2289. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2290. return 0;
  2291. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2292. iwl_clear_stations_table(priv);
  2293. /* load bootstrap state machine,
  2294. * load bootstrap program into processor's memory,
  2295. * prepare to load the "initialize" uCode */
  2296. priv->cfg->ops->lib->load_ucode(priv);
  2297. if (rc) {
  2298. IWL_ERR(priv,
  2299. "Unable to set up bootstrap uCode: %d\n", rc);
  2300. continue;
  2301. }
  2302. /* start card; "initialize" will load runtime ucode */
  2303. iwl3945_nic_start(priv);
  2304. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2305. return 0;
  2306. }
  2307. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2308. __iwl3945_down(priv);
  2309. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2310. /* tried to restart and config the device for as long as our
  2311. * patience could withstand */
  2312. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2313. return -EIO;
  2314. }
  2315. /*****************************************************************************
  2316. *
  2317. * Workqueue callbacks
  2318. *
  2319. *****************************************************************************/
  2320. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2321. {
  2322. struct iwl_priv *priv =
  2323. container_of(data, struct iwl_priv, init_alive_start.work);
  2324. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2325. return;
  2326. mutex_lock(&priv->mutex);
  2327. iwl3945_init_alive_start(priv);
  2328. mutex_unlock(&priv->mutex);
  2329. }
  2330. static void iwl3945_bg_alive_start(struct work_struct *data)
  2331. {
  2332. struct iwl_priv *priv =
  2333. container_of(data, struct iwl_priv, alive_start.work);
  2334. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2335. return;
  2336. mutex_lock(&priv->mutex);
  2337. iwl3945_alive_start(priv);
  2338. mutex_unlock(&priv->mutex);
  2339. }
  2340. /*
  2341. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2342. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2343. * *is* readable even when device has been SW_RESET into low power mode
  2344. * (e.g. during RF KILL).
  2345. */
  2346. static void iwl3945_rfkill_poll(struct work_struct *data)
  2347. {
  2348. struct iwl_priv *priv =
  2349. container_of(data, struct iwl_priv, rfkill_poll.work);
  2350. bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
  2351. bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
  2352. & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2353. if (new_rfkill != old_rfkill) {
  2354. if (new_rfkill)
  2355. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2356. else
  2357. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2358. wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
  2359. IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
  2360. new_rfkill ? "disable radio" : "enable radio");
  2361. }
  2362. /* Keep this running, even if radio now enabled. This will be
  2363. * cancelled in mac_start() if system decides to start again */
  2364. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2365. round_jiffies_relative(2 * HZ));
  2366. }
  2367. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2368. static void iwl3945_bg_request_scan(struct work_struct *data)
  2369. {
  2370. struct iwl_priv *priv =
  2371. container_of(data, struct iwl_priv, request_scan);
  2372. struct iwl_host_cmd cmd = {
  2373. .id = REPLY_SCAN_CMD,
  2374. .len = sizeof(struct iwl3945_scan_cmd),
  2375. .flags = CMD_SIZE_HUGE,
  2376. };
  2377. int rc = 0;
  2378. struct iwl3945_scan_cmd *scan;
  2379. struct ieee80211_conf *conf = NULL;
  2380. u8 n_probes = 0;
  2381. enum ieee80211_band band;
  2382. bool is_active = false;
  2383. conf = ieee80211_get_hw_conf(priv->hw);
  2384. mutex_lock(&priv->mutex);
  2385. cancel_delayed_work(&priv->scan_check);
  2386. if (!iwl_is_ready(priv)) {
  2387. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2388. goto done;
  2389. }
  2390. /* Make sure the scan wasn't canceled before this queued work
  2391. * was given the chance to run... */
  2392. if (!test_bit(STATUS_SCANNING, &priv->status))
  2393. goto done;
  2394. /* This should never be called or scheduled if there is currently
  2395. * a scan active in the hardware. */
  2396. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2397. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2398. "Ignoring second request.\n");
  2399. rc = -EIO;
  2400. goto done;
  2401. }
  2402. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2403. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2404. goto done;
  2405. }
  2406. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2407. IWL_DEBUG_HC(priv,
  2408. "Scan request while abort pending. Queuing.\n");
  2409. goto done;
  2410. }
  2411. if (iwl_is_rfkill(priv)) {
  2412. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2413. goto done;
  2414. }
  2415. if (!test_bit(STATUS_READY, &priv->status)) {
  2416. IWL_DEBUG_HC(priv,
  2417. "Scan request while uninitialized. Queuing.\n");
  2418. goto done;
  2419. }
  2420. if (!priv->scan_bands) {
  2421. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2422. goto done;
  2423. }
  2424. if (!priv->scan) {
  2425. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2426. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2427. if (!priv->scan) {
  2428. rc = -ENOMEM;
  2429. goto done;
  2430. }
  2431. }
  2432. scan = priv->scan;
  2433. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2434. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2435. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2436. if (iwl_is_associated(priv)) {
  2437. u16 interval = 0;
  2438. u32 extra;
  2439. u32 suspend_time = 100;
  2440. u32 scan_suspend_time = 100;
  2441. unsigned long flags;
  2442. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2443. spin_lock_irqsave(&priv->lock, flags);
  2444. interval = priv->beacon_int;
  2445. spin_unlock_irqrestore(&priv->lock, flags);
  2446. scan->suspend_time = 0;
  2447. scan->max_out_time = cpu_to_le32(200 * 1024);
  2448. if (!interval)
  2449. interval = suspend_time;
  2450. /*
  2451. * suspend time format:
  2452. * 0-19: beacon interval in usec (time before exec.)
  2453. * 20-23: 0
  2454. * 24-31: number of beacons (suspend between channels)
  2455. */
  2456. extra = (suspend_time / interval) << 24;
  2457. scan_suspend_time = 0xFF0FFFFF &
  2458. (extra | ((suspend_time % interval) * 1024));
  2459. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2460. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2461. scan_suspend_time, interval);
  2462. }
  2463. if (priv->scan_request->n_ssids) {
  2464. int i, p = 0;
  2465. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2466. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2467. /* always does wildcard anyway */
  2468. if (!priv->scan_request->ssids[i].ssid_len)
  2469. continue;
  2470. scan->direct_scan[p].id = WLAN_EID_SSID;
  2471. scan->direct_scan[p].len =
  2472. priv->scan_request->ssids[i].ssid_len;
  2473. memcpy(scan->direct_scan[p].ssid,
  2474. priv->scan_request->ssids[i].ssid,
  2475. priv->scan_request->ssids[i].ssid_len);
  2476. n_probes++;
  2477. p++;
  2478. }
  2479. is_active = true;
  2480. } else
  2481. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2482. /* We don't build a direct scan probe request; the uCode will do
  2483. * that based on the direct_mask added to each channel entry */
  2484. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2485. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2486. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2487. /* flags + rate selection */
  2488. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2489. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2490. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2491. scan->good_CRC_th = 0;
  2492. band = IEEE80211_BAND_2GHZ;
  2493. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2494. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2495. /*
  2496. * If active scaning is requested but a certain channel
  2497. * is marked passive, we can do active scanning if we
  2498. * detect transmissions.
  2499. */
  2500. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2501. band = IEEE80211_BAND_5GHZ;
  2502. } else {
  2503. IWL_WARN(priv, "Invalid scan band count\n");
  2504. goto done;
  2505. }
  2506. scan->tx_cmd.len = cpu_to_le16(
  2507. iwl_fill_probe_req(priv,
  2508. (struct ieee80211_mgmt *)scan->data,
  2509. priv->scan_request->ie,
  2510. priv->scan_request->ie_len,
  2511. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2512. /* select Rx antennas */
  2513. scan->flags |= iwl3945_get_antenna_flags(priv);
  2514. if (iwl_is_monitor_mode(priv))
  2515. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2516. scan->channel_count =
  2517. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2518. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2519. if (scan->channel_count == 0) {
  2520. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2521. goto done;
  2522. }
  2523. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2524. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2525. cmd.data = scan;
  2526. scan->len = cpu_to_le16(cmd.len);
  2527. set_bit(STATUS_SCAN_HW, &priv->status);
  2528. rc = iwl_send_cmd_sync(priv, &cmd);
  2529. if (rc)
  2530. goto done;
  2531. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2532. IWL_SCAN_CHECK_WATCHDOG);
  2533. mutex_unlock(&priv->mutex);
  2534. return;
  2535. done:
  2536. /* can not perform scan make sure we clear scanning
  2537. * bits from status so next scan request can be performed.
  2538. * if we dont clear scanning status bit here all next scan
  2539. * will fail
  2540. */
  2541. clear_bit(STATUS_SCAN_HW, &priv->status);
  2542. clear_bit(STATUS_SCANNING, &priv->status);
  2543. /* inform mac80211 scan aborted */
  2544. queue_work(priv->workqueue, &priv->scan_completed);
  2545. mutex_unlock(&priv->mutex);
  2546. }
  2547. static void iwl3945_bg_restart(struct work_struct *data)
  2548. {
  2549. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2550. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2551. return;
  2552. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2553. mutex_lock(&priv->mutex);
  2554. priv->vif = NULL;
  2555. priv->is_open = 0;
  2556. mutex_unlock(&priv->mutex);
  2557. iwl3945_down(priv);
  2558. ieee80211_restart_hw(priv->hw);
  2559. } else {
  2560. iwl3945_down(priv);
  2561. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2562. return;
  2563. mutex_lock(&priv->mutex);
  2564. __iwl3945_up(priv);
  2565. mutex_unlock(&priv->mutex);
  2566. }
  2567. }
  2568. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2569. {
  2570. struct iwl_priv *priv =
  2571. container_of(data, struct iwl_priv, rx_replenish);
  2572. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2573. return;
  2574. mutex_lock(&priv->mutex);
  2575. iwl3945_rx_replenish(priv);
  2576. mutex_unlock(&priv->mutex);
  2577. }
  2578. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2579. void iwl3945_post_associate(struct iwl_priv *priv)
  2580. {
  2581. int rc = 0;
  2582. struct ieee80211_conf *conf = NULL;
  2583. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2584. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2585. return;
  2586. }
  2587. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2588. priv->assoc_id, priv->active_rxon.bssid_addr);
  2589. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2590. return;
  2591. if (!priv->vif || !priv->is_open)
  2592. return;
  2593. iwl_scan_cancel_timeout(priv, 200);
  2594. conf = ieee80211_get_hw_conf(priv->hw);
  2595. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2596. iwlcore_commit_rxon(priv);
  2597. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2598. iwl_setup_rxon_timing(priv);
  2599. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2600. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2601. if (rc)
  2602. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2603. "Attempting to continue.\n");
  2604. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2605. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2606. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2607. priv->assoc_id, priv->beacon_int);
  2608. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2609. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2610. else
  2611. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2612. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2613. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2614. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2615. else
  2616. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2617. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2618. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2619. }
  2620. iwlcore_commit_rxon(priv);
  2621. switch (priv->iw_mode) {
  2622. case NL80211_IFTYPE_STATION:
  2623. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2624. break;
  2625. case NL80211_IFTYPE_ADHOC:
  2626. priv->assoc_id = 1;
  2627. iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
  2628. iwl3945_sync_sta(priv, IWL_STA_ID,
  2629. (priv->band == IEEE80211_BAND_5GHZ) ?
  2630. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2631. CMD_ASYNC);
  2632. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2633. iwl3945_send_beacon_cmd(priv);
  2634. break;
  2635. default:
  2636. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2637. __func__, priv->iw_mode);
  2638. break;
  2639. }
  2640. iwl_activate_qos(priv, 0);
  2641. /* we have just associated, don't start scan too early */
  2642. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2643. }
  2644. /*****************************************************************************
  2645. *
  2646. * mac80211 entry point functions
  2647. *
  2648. *****************************************************************************/
  2649. #define UCODE_READY_TIMEOUT (2 * HZ)
  2650. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2651. {
  2652. struct iwl_priv *priv = hw->priv;
  2653. int ret;
  2654. IWL_DEBUG_MAC80211(priv, "enter\n");
  2655. /* we should be verifying the device is ready to be opened */
  2656. mutex_lock(&priv->mutex);
  2657. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2658. * ucode filename and max sizes are card-specific. */
  2659. if (!priv->ucode_code.len) {
  2660. ret = iwl3945_read_ucode(priv);
  2661. if (ret) {
  2662. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2663. mutex_unlock(&priv->mutex);
  2664. goto out_release_irq;
  2665. }
  2666. }
  2667. ret = __iwl3945_up(priv);
  2668. mutex_unlock(&priv->mutex);
  2669. if (ret)
  2670. goto out_release_irq;
  2671. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2672. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2673. * mac80211 will not be run successfully. */
  2674. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2675. test_bit(STATUS_READY, &priv->status),
  2676. UCODE_READY_TIMEOUT);
  2677. if (!ret) {
  2678. if (!test_bit(STATUS_READY, &priv->status)) {
  2679. IWL_ERR(priv,
  2680. "Wait for START_ALIVE timeout after %dms.\n",
  2681. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2682. ret = -ETIMEDOUT;
  2683. goto out_release_irq;
  2684. }
  2685. }
  2686. /* ucode is running and will send rfkill notifications,
  2687. * no need to poll the killswitch state anymore */
  2688. cancel_delayed_work(&priv->rfkill_poll);
  2689. iwl_led_start(priv);
  2690. priv->is_open = 1;
  2691. IWL_DEBUG_MAC80211(priv, "leave\n");
  2692. return 0;
  2693. out_release_irq:
  2694. priv->is_open = 0;
  2695. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2696. return ret;
  2697. }
  2698. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2699. {
  2700. struct iwl_priv *priv = hw->priv;
  2701. IWL_DEBUG_MAC80211(priv, "enter\n");
  2702. if (!priv->is_open) {
  2703. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2704. return;
  2705. }
  2706. priv->is_open = 0;
  2707. if (iwl_is_ready_rf(priv)) {
  2708. /* stop mac, cancel any scan request and clear
  2709. * RXON_FILTER_ASSOC_MSK BIT
  2710. */
  2711. mutex_lock(&priv->mutex);
  2712. iwl_scan_cancel_timeout(priv, 100);
  2713. mutex_unlock(&priv->mutex);
  2714. }
  2715. iwl3945_down(priv);
  2716. flush_workqueue(priv->workqueue);
  2717. /* start polling the killswitch state again */
  2718. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2719. round_jiffies_relative(2 * HZ));
  2720. IWL_DEBUG_MAC80211(priv, "leave\n");
  2721. }
  2722. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2723. {
  2724. struct iwl_priv *priv = hw->priv;
  2725. IWL_DEBUG_MAC80211(priv, "enter\n");
  2726. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2727. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2728. if (iwl3945_tx_skb(priv, skb))
  2729. dev_kfree_skb_any(skb);
  2730. IWL_DEBUG_MAC80211(priv, "leave\n");
  2731. return NETDEV_TX_OK;
  2732. }
  2733. void iwl3945_config_ap(struct iwl_priv *priv)
  2734. {
  2735. int rc = 0;
  2736. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2737. return;
  2738. /* The following should be done only at AP bring up */
  2739. if (!(iwl_is_associated(priv))) {
  2740. /* RXON - unassoc (to set timing command) */
  2741. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2742. iwlcore_commit_rxon(priv);
  2743. /* RXON Timing */
  2744. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2745. iwl_setup_rxon_timing(priv);
  2746. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2747. sizeof(priv->rxon_timing),
  2748. &priv->rxon_timing);
  2749. if (rc)
  2750. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2751. "Attempting to continue.\n");
  2752. /* FIXME: what should be the assoc_id for AP? */
  2753. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2754. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2755. priv->staging_rxon.flags |=
  2756. RXON_FLG_SHORT_PREAMBLE_MSK;
  2757. else
  2758. priv->staging_rxon.flags &=
  2759. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2760. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2761. if (priv->assoc_capability &
  2762. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2763. priv->staging_rxon.flags |=
  2764. RXON_FLG_SHORT_SLOT_MSK;
  2765. else
  2766. priv->staging_rxon.flags &=
  2767. ~RXON_FLG_SHORT_SLOT_MSK;
  2768. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2769. priv->staging_rxon.flags &=
  2770. ~RXON_FLG_SHORT_SLOT_MSK;
  2771. }
  2772. /* restore RXON assoc */
  2773. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2774. iwlcore_commit_rxon(priv);
  2775. iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
  2776. }
  2777. iwl3945_send_beacon_cmd(priv);
  2778. /* FIXME - we need to add code here to detect a totally new
  2779. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2780. * clear sta table, add BCAST sta... */
  2781. }
  2782. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2783. struct ieee80211_vif *vif,
  2784. struct ieee80211_sta *sta,
  2785. struct ieee80211_key_conf *key)
  2786. {
  2787. struct iwl_priv *priv = hw->priv;
  2788. const u8 *addr;
  2789. int ret = 0;
  2790. u8 sta_id = IWL_INVALID_STATION;
  2791. u8 static_key;
  2792. IWL_DEBUG_MAC80211(priv, "enter\n");
  2793. if (iwl3945_mod_params.sw_crypto) {
  2794. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2795. return -EOPNOTSUPP;
  2796. }
  2797. addr = sta ? sta->addr : iwl_bcast_addr;
  2798. static_key = !iwl_is_associated(priv);
  2799. if (!static_key) {
  2800. sta_id = iwl_find_station(priv, addr);
  2801. if (sta_id == IWL_INVALID_STATION) {
  2802. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2803. addr);
  2804. return -EINVAL;
  2805. }
  2806. }
  2807. mutex_lock(&priv->mutex);
  2808. iwl_scan_cancel_timeout(priv, 100);
  2809. mutex_unlock(&priv->mutex);
  2810. switch (cmd) {
  2811. case SET_KEY:
  2812. if (static_key)
  2813. ret = iwl3945_set_static_key(priv, key);
  2814. else
  2815. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2816. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2817. break;
  2818. case DISABLE_KEY:
  2819. if (static_key)
  2820. ret = iwl3945_remove_static_key(priv);
  2821. else
  2822. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2823. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2824. break;
  2825. default:
  2826. ret = -EINVAL;
  2827. }
  2828. IWL_DEBUG_MAC80211(priv, "leave\n");
  2829. return ret;
  2830. }
  2831. /*****************************************************************************
  2832. *
  2833. * sysfs attributes
  2834. *
  2835. *****************************************************************************/
  2836. #ifdef CONFIG_IWLWIFI_DEBUG
  2837. /*
  2838. * The following adds a new attribute to the sysfs representation
  2839. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2840. * used for controlling the debug level.
  2841. *
  2842. * See the level definitions in iwl for details.
  2843. *
  2844. * The debug_level being managed using sysfs below is a per device debug
  2845. * level that is used instead of the global debug level if it (the per
  2846. * device debug level) is set.
  2847. */
  2848. static ssize_t show_debug_level(struct device *d,
  2849. struct device_attribute *attr, char *buf)
  2850. {
  2851. struct iwl_priv *priv = dev_get_drvdata(d);
  2852. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  2853. }
  2854. static ssize_t store_debug_level(struct device *d,
  2855. struct device_attribute *attr,
  2856. const char *buf, size_t count)
  2857. {
  2858. struct iwl_priv *priv = dev_get_drvdata(d);
  2859. unsigned long val;
  2860. int ret;
  2861. ret = strict_strtoul(buf, 0, &val);
  2862. if (ret)
  2863. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2864. else {
  2865. priv->debug_level = val;
  2866. if (iwl_alloc_traffic_mem(priv))
  2867. IWL_ERR(priv,
  2868. "Not enough memory to generate traffic log\n");
  2869. }
  2870. return strnlen(buf, count);
  2871. }
  2872. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2873. show_debug_level, store_debug_level);
  2874. #endif /* CONFIG_IWLWIFI_DEBUG */
  2875. static ssize_t show_temperature(struct device *d,
  2876. struct device_attribute *attr, char *buf)
  2877. {
  2878. struct iwl_priv *priv = dev_get_drvdata(d);
  2879. if (!iwl_is_alive(priv))
  2880. return -EAGAIN;
  2881. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2882. }
  2883. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2884. static ssize_t show_tx_power(struct device *d,
  2885. struct device_attribute *attr, char *buf)
  2886. {
  2887. struct iwl_priv *priv = dev_get_drvdata(d);
  2888. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2889. }
  2890. static ssize_t store_tx_power(struct device *d,
  2891. struct device_attribute *attr,
  2892. const char *buf, size_t count)
  2893. {
  2894. struct iwl_priv *priv = dev_get_drvdata(d);
  2895. char *p = (char *)buf;
  2896. u32 val;
  2897. val = simple_strtoul(p, &p, 10);
  2898. if (p == buf)
  2899. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2900. else
  2901. iwl3945_hw_reg_set_txpower(priv, val);
  2902. return count;
  2903. }
  2904. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2905. static ssize_t show_flags(struct device *d,
  2906. struct device_attribute *attr, char *buf)
  2907. {
  2908. struct iwl_priv *priv = dev_get_drvdata(d);
  2909. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2910. }
  2911. static ssize_t store_flags(struct device *d,
  2912. struct device_attribute *attr,
  2913. const char *buf, size_t count)
  2914. {
  2915. struct iwl_priv *priv = dev_get_drvdata(d);
  2916. u32 flags = simple_strtoul(buf, NULL, 0);
  2917. mutex_lock(&priv->mutex);
  2918. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2919. /* Cancel any currently running scans... */
  2920. if (iwl_scan_cancel_timeout(priv, 100))
  2921. IWL_WARN(priv, "Could not cancel scan.\n");
  2922. else {
  2923. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2924. flags);
  2925. priv->staging_rxon.flags = cpu_to_le32(flags);
  2926. iwlcore_commit_rxon(priv);
  2927. }
  2928. }
  2929. mutex_unlock(&priv->mutex);
  2930. return count;
  2931. }
  2932. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2933. static ssize_t show_filter_flags(struct device *d,
  2934. struct device_attribute *attr, char *buf)
  2935. {
  2936. struct iwl_priv *priv = dev_get_drvdata(d);
  2937. return sprintf(buf, "0x%04X\n",
  2938. le32_to_cpu(priv->active_rxon.filter_flags));
  2939. }
  2940. static ssize_t store_filter_flags(struct device *d,
  2941. struct device_attribute *attr,
  2942. const char *buf, size_t count)
  2943. {
  2944. struct iwl_priv *priv = dev_get_drvdata(d);
  2945. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2946. mutex_lock(&priv->mutex);
  2947. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2948. /* Cancel any currently running scans... */
  2949. if (iwl_scan_cancel_timeout(priv, 100))
  2950. IWL_WARN(priv, "Could not cancel scan.\n");
  2951. else {
  2952. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2953. "0x%04X\n", filter_flags);
  2954. priv->staging_rxon.filter_flags =
  2955. cpu_to_le32(filter_flags);
  2956. iwlcore_commit_rxon(priv);
  2957. }
  2958. }
  2959. mutex_unlock(&priv->mutex);
  2960. return count;
  2961. }
  2962. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2963. store_filter_flags);
  2964. static ssize_t show_measurement(struct device *d,
  2965. struct device_attribute *attr, char *buf)
  2966. {
  2967. struct iwl_priv *priv = dev_get_drvdata(d);
  2968. struct iwl_spectrum_notification measure_report;
  2969. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2970. u8 *data = (u8 *)&measure_report;
  2971. unsigned long flags;
  2972. spin_lock_irqsave(&priv->lock, flags);
  2973. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2974. spin_unlock_irqrestore(&priv->lock, flags);
  2975. return 0;
  2976. }
  2977. memcpy(&measure_report, &priv->measure_report, size);
  2978. priv->measurement_status = 0;
  2979. spin_unlock_irqrestore(&priv->lock, flags);
  2980. while (size && (PAGE_SIZE - len)) {
  2981. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2982. PAGE_SIZE - len, 1);
  2983. len = strlen(buf);
  2984. if (PAGE_SIZE - len)
  2985. buf[len++] = '\n';
  2986. ofs += 16;
  2987. size -= min(size, 16U);
  2988. }
  2989. return len;
  2990. }
  2991. static ssize_t store_measurement(struct device *d,
  2992. struct device_attribute *attr,
  2993. const char *buf, size_t count)
  2994. {
  2995. struct iwl_priv *priv = dev_get_drvdata(d);
  2996. struct ieee80211_measurement_params params = {
  2997. .channel = le16_to_cpu(priv->active_rxon.channel),
  2998. .start_time = cpu_to_le64(priv->last_tsf),
  2999. .duration = cpu_to_le16(1),
  3000. };
  3001. u8 type = IWL_MEASURE_BASIC;
  3002. u8 buffer[32];
  3003. u8 channel;
  3004. if (count) {
  3005. char *p = buffer;
  3006. strncpy(buffer, buf, min(sizeof(buffer), count));
  3007. channel = simple_strtoul(p, NULL, 0);
  3008. if (channel)
  3009. params.channel = channel;
  3010. p = buffer;
  3011. while (*p && *p != ' ')
  3012. p++;
  3013. if (*p)
  3014. type = simple_strtoul(p + 1, NULL, 0);
  3015. }
  3016. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  3017. "channel %d (for '%s')\n", type, params.channel, buf);
  3018. iwl3945_get_measurement(priv, &params, type);
  3019. return count;
  3020. }
  3021. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  3022. show_measurement, store_measurement);
  3023. static ssize_t store_retry_rate(struct device *d,
  3024. struct device_attribute *attr,
  3025. const char *buf, size_t count)
  3026. {
  3027. struct iwl_priv *priv = dev_get_drvdata(d);
  3028. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  3029. if (priv->retry_rate <= 0)
  3030. priv->retry_rate = 1;
  3031. return count;
  3032. }
  3033. static ssize_t show_retry_rate(struct device *d,
  3034. struct device_attribute *attr, char *buf)
  3035. {
  3036. struct iwl_priv *priv = dev_get_drvdata(d);
  3037. return sprintf(buf, "%d", priv->retry_rate);
  3038. }
  3039. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  3040. store_retry_rate);
  3041. static ssize_t show_channels(struct device *d,
  3042. struct device_attribute *attr, char *buf)
  3043. {
  3044. /* all this shit doesn't belong into sysfs anyway */
  3045. return 0;
  3046. }
  3047. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  3048. static ssize_t show_statistics(struct device *d,
  3049. struct device_attribute *attr, char *buf)
  3050. {
  3051. struct iwl_priv *priv = dev_get_drvdata(d);
  3052. u32 size = sizeof(struct iwl3945_notif_statistics);
  3053. u32 len = 0, ofs = 0;
  3054. u8 *data = (u8 *)&priv->statistics_39;
  3055. int rc = 0;
  3056. if (!iwl_is_alive(priv))
  3057. return -EAGAIN;
  3058. mutex_lock(&priv->mutex);
  3059. rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
  3060. mutex_unlock(&priv->mutex);
  3061. if (rc) {
  3062. len = sprintf(buf,
  3063. "Error sending statistics request: 0x%08X\n", rc);
  3064. return len;
  3065. }
  3066. while (size && (PAGE_SIZE - len)) {
  3067. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3068. PAGE_SIZE - len, 1);
  3069. len = strlen(buf);
  3070. if (PAGE_SIZE - len)
  3071. buf[len++] = '\n';
  3072. ofs += 16;
  3073. size -= min(size, 16U);
  3074. }
  3075. return len;
  3076. }
  3077. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3078. static ssize_t show_antenna(struct device *d,
  3079. struct device_attribute *attr, char *buf)
  3080. {
  3081. struct iwl_priv *priv = dev_get_drvdata(d);
  3082. if (!iwl_is_alive(priv))
  3083. return -EAGAIN;
  3084. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3085. }
  3086. static ssize_t store_antenna(struct device *d,
  3087. struct device_attribute *attr,
  3088. const char *buf, size_t count)
  3089. {
  3090. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3091. int ant;
  3092. if (count == 0)
  3093. return 0;
  3094. if (sscanf(buf, "%1i", &ant) != 1) {
  3095. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3096. return count;
  3097. }
  3098. if ((ant >= 0) && (ant <= 2)) {
  3099. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3100. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3101. } else
  3102. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3103. return count;
  3104. }
  3105. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3106. static ssize_t show_status(struct device *d,
  3107. struct device_attribute *attr, char *buf)
  3108. {
  3109. struct iwl_priv *priv = dev_get_drvdata(d);
  3110. if (!iwl_is_alive(priv))
  3111. return -EAGAIN;
  3112. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3113. }
  3114. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3115. static ssize_t dump_error_log(struct device *d,
  3116. struct device_attribute *attr,
  3117. const char *buf, size_t count)
  3118. {
  3119. struct iwl_priv *priv = dev_get_drvdata(d);
  3120. char *p = (char *)buf;
  3121. if (p[0] == '1')
  3122. iwl3945_dump_nic_error_log(priv);
  3123. return strnlen(buf, count);
  3124. }
  3125. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3126. /*****************************************************************************
  3127. *
  3128. * driver setup and tear down
  3129. *
  3130. *****************************************************************************/
  3131. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3132. {
  3133. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3134. init_waitqueue_head(&priv->wait_command_queue);
  3135. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3136. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3137. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3138. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3139. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3140. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3141. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3142. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3143. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3144. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3145. iwl3945_hw_setup_deferred_work(priv);
  3146. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3147. iwl3945_irq_tasklet, (unsigned long)priv);
  3148. }
  3149. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3150. {
  3151. iwl3945_hw_cancel_deferred_work(priv);
  3152. cancel_delayed_work_sync(&priv->init_alive_start);
  3153. cancel_delayed_work(&priv->scan_check);
  3154. cancel_delayed_work(&priv->alive_start);
  3155. cancel_work_sync(&priv->beacon_update);
  3156. }
  3157. static struct attribute *iwl3945_sysfs_entries[] = {
  3158. &dev_attr_antenna.attr,
  3159. &dev_attr_channels.attr,
  3160. &dev_attr_dump_errors.attr,
  3161. &dev_attr_flags.attr,
  3162. &dev_attr_filter_flags.attr,
  3163. &dev_attr_measurement.attr,
  3164. &dev_attr_retry_rate.attr,
  3165. &dev_attr_statistics.attr,
  3166. &dev_attr_status.attr,
  3167. &dev_attr_temperature.attr,
  3168. &dev_attr_tx_power.attr,
  3169. #ifdef CONFIG_IWLWIFI_DEBUG
  3170. &dev_attr_debug_level.attr,
  3171. #endif
  3172. NULL
  3173. };
  3174. static struct attribute_group iwl3945_attribute_group = {
  3175. .name = NULL, /* put in device directory */
  3176. .attrs = iwl3945_sysfs_entries,
  3177. };
  3178. static struct ieee80211_ops iwl3945_hw_ops = {
  3179. .tx = iwl3945_mac_tx,
  3180. .start = iwl3945_mac_start,
  3181. .stop = iwl3945_mac_stop,
  3182. .add_interface = iwl_mac_add_interface,
  3183. .remove_interface = iwl_mac_remove_interface,
  3184. .config = iwl_mac_config,
  3185. .configure_filter = iwl_configure_filter,
  3186. .set_key = iwl3945_mac_set_key,
  3187. .get_tx_stats = iwl_mac_get_tx_stats,
  3188. .conf_tx = iwl_mac_conf_tx,
  3189. .reset_tsf = iwl_mac_reset_tsf,
  3190. .bss_info_changed = iwl_bss_info_changed,
  3191. .hw_scan = iwl_mac_hw_scan
  3192. };
  3193. static int iwl3945_init_drv(struct iwl_priv *priv)
  3194. {
  3195. int ret;
  3196. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3197. priv->retry_rate = 1;
  3198. priv->ibss_beacon = NULL;
  3199. spin_lock_init(&priv->sta_lock);
  3200. spin_lock_init(&priv->hcmd_lock);
  3201. INIT_LIST_HEAD(&priv->free_frames);
  3202. mutex_init(&priv->mutex);
  3203. /* Clear the driver's (not device's) station table */
  3204. iwl_clear_stations_table(priv);
  3205. priv->ieee_channels = NULL;
  3206. priv->ieee_rates = NULL;
  3207. priv->band = IEEE80211_BAND_2GHZ;
  3208. priv->iw_mode = NL80211_IFTYPE_STATION;
  3209. priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
  3210. iwl_reset_qos(priv);
  3211. priv->qos_data.qos_active = 0;
  3212. priv->qos_data.qos_cap.val = 0;
  3213. priv->rates_mask = IWL_RATES_MASK;
  3214. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3215. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3216. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3217. eeprom->version);
  3218. ret = -EINVAL;
  3219. goto err;
  3220. }
  3221. ret = iwl_init_channel_map(priv);
  3222. if (ret) {
  3223. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3224. goto err;
  3225. }
  3226. /* Set up txpower settings in driver for all channels */
  3227. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3228. ret = -EIO;
  3229. goto err_free_channel_map;
  3230. }
  3231. ret = iwlcore_init_geos(priv);
  3232. if (ret) {
  3233. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3234. goto err_free_channel_map;
  3235. }
  3236. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3237. return 0;
  3238. err_free_channel_map:
  3239. iwl_free_channel_map(priv);
  3240. err:
  3241. return ret;
  3242. }
  3243. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3244. {
  3245. int ret;
  3246. struct ieee80211_hw *hw = priv->hw;
  3247. hw->rate_control_algorithm = "iwl-3945-rs";
  3248. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3249. /* Tell mac80211 our characteristics */
  3250. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3251. IEEE80211_HW_NOISE_DBM |
  3252. IEEE80211_HW_SPECTRUM_MGMT;
  3253. if (!priv->cfg->broken_powersave)
  3254. hw->flags |= IEEE80211_HW_SUPPORTS_PS |
  3255. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  3256. hw->wiphy->interface_modes =
  3257. BIT(NL80211_IFTYPE_STATION) |
  3258. BIT(NL80211_IFTYPE_ADHOC);
  3259. hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY |
  3260. WIPHY_FLAG_DISABLE_BEACON_HINTS;
  3261. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3262. /* we create the 802.11 header and a zero-length SSID element */
  3263. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3264. /* Default value; 4 EDCA QOS priorities */
  3265. hw->queues = 4;
  3266. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3267. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3268. &priv->bands[IEEE80211_BAND_2GHZ];
  3269. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3270. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3271. &priv->bands[IEEE80211_BAND_5GHZ];
  3272. ret = ieee80211_register_hw(priv->hw);
  3273. if (ret) {
  3274. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3275. return ret;
  3276. }
  3277. priv->mac80211_registered = 1;
  3278. return 0;
  3279. }
  3280. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3281. {
  3282. int err = 0;
  3283. struct iwl_priv *priv;
  3284. struct ieee80211_hw *hw;
  3285. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3286. struct iwl3945_eeprom *eeprom;
  3287. unsigned long flags;
  3288. /***********************
  3289. * 1. Allocating HW data
  3290. * ********************/
  3291. /* mac80211 allocates memory for this device instance, including
  3292. * space for this driver's private structure */
  3293. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3294. if (hw == NULL) {
  3295. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3296. err = -ENOMEM;
  3297. goto out;
  3298. }
  3299. priv = hw->priv;
  3300. SET_IEEE80211_DEV(hw, &pdev->dev);
  3301. /*
  3302. * Disabling hardware scan means that mac80211 will perform scans
  3303. * "the hard way", rather than using device's scan.
  3304. */
  3305. if (iwl3945_mod_params.disable_hw_scan) {
  3306. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3307. iwl3945_hw_ops.hw_scan = NULL;
  3308. }
  3309. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3310. priv->cfg = cfg;
  3311. priv->pci_dev = pdev;
  3312. priv->inta_mask = CSR_INI_SET_MASK;
  3313. #ifdef CONFIG_IWLWIFI_DEBUG
  3314. atomic_set(&priv->restrict_refcnt, 0);
  3315. #endif
  3316. if (iwl_alloc_traffic_mem(priv))
  3317. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3318. /***************************
  3319. * 2. Initializing PCI bus
  3320. * *************************/
  3321. if (pci_enable_device(pdev)) {
  3322. err = -ENODEV;
  3323. goto out_ieee80211_free_hw;
  3324. }
  3325. pci_set_master(pdev);
  3326. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3327. if (!err)
  3328. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3329. if (err) {
  3330. IWL_WARN(priv, "No suitable DMA available.\n");
  3331. goto out_pci_disable_device;
  3332. }
  3333. pci_set_drvdata(pdev, priv);
  3334. err = pci_request_regions(pdev, DRV_NAME);
  3335. if (err)
  3336. goto out_pci_disable_device;
  3337. /***********************
  3338. * 3. Read REV Register
  3339. * ********************/
  3340. priv->hw_base = pci_iomap(pdev, 0, 0);
  3341. if (!priv->hw_base) {
  3342. err = -ENODEV;
  3343. goto out_pci_release_regions;
  3344. }
  3345. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3346. (unsigned long long) pci_resource_len(pdev, 0));
  3347. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3348. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3349. * PCI Tx retries from interfering with C3 CPU state */
  3350. pci_write_config_byte(pdev, 0x41, 0x00);
  3351. /* these spin locks will be used in apm_ops.init and EEPROM access
  3352. * we should init now
  3353. */
  3354. spin_lock_init(&priv->reg_lock);
  3355. spin_lock_init(&priv->lock);
  3356. /***********************
  3357. * 4. Read EEPROM
  3358. * ********************/
  3359. /* Read the EEPROM */
  3360. err = iwl_eeprom_init(priv);
  3361. if (err) {
  3362. IWL_ERR(priv, "Unable to init EEPROM\n");
  3363. goto out_iounmap;
  3364. }
  3365. /* MAC Address location in EEPROM same for 3945/4965 */
  3366. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3367. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3368. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3369. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3370. /***********************
  3371. * 5. Setup HW Constants
  3372. * ********************/
  3373. /* Device-specific setup */
  3374. if (iwl3945_hw_set_hw_params(priv)) {
  3375. IWL_ERR(priv, "failed to set hw settings\n");
  3376. goto out_eeprom_free;
  3377. }
  3378. /***********************
  3379. * 6. Setup priv
  3380. * ********************/
  3381. err = iwl3945_init_drv(priv);
  3382. if (err) {
  3383. IWL_ERR(priv, "initializing driver failed\n");
  3384. goto out_unset_hw_params;
  3385. }
  3386. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3387. priv->cfg->name);
  3388. /***********************
  3389. * 7. Setup Services
  3390. * ********************/
  3391. spin_lock_irqsave(&priv->lock, flags);
  3392. iwl_disable_interrupts(priv);
  3393. spin_unlock_irqrestore(&priv->lock, flags);
  3394. pci_enable_msi(priv->pci_dev);
  3395. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3396. IRQF_SHARED, DRV_NAME, priv);
  3397. if (err) {
  3398. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3399. goto out_disable_msi;
  3400. }
  3401. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3402. if (err) {
  3403. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3404. goto out_release_irq;
  3405. }
  3406. iwl_set_rxon_channel(priv,
  3407. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3408. iwl3945_setup_deferred_work(priv);
  3409. iwl3945_setup_rx_handlers(priv);
  3410. iwl_power_initialize(priv);
  3411. /*********************************
  3412. * 8. Setup and Register mac80211
  3413. * *******************************/
  3414. iwl_enable_interrupts(priv);
  3415. err = iwl3945_setup_mac(priv);
  3416. if (err)
  3417. goto out_remove_sysfs;
  3418. err = iwl_dbgfs_register(priv, DRV_NAME);
  3419. if (err)
  3420. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3421. /* Start monitoring the killswitch */
  3422. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3423. 2 * HZ);
  3424. return 0;
  3425. out_remove_sysfs:
  3426. destroy_workqueue(priv->workqueue);
  3427. priv->workqueue = NULL;
  3428. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3429. out_release_irq:
  3430. free_irq(priv->pci_dev->irq, priv);
  3431. out_disable_msi:
  3432. pci_disable_msi(priv->pci_dev);
  3433. iwlcore_free_geos(priv);
  3434. iwl_free_channel_map(priv);
  3435. out_unset_hw_params:
  3436. iwl3945_unset_hw_params(priv);
  3437. out_eeprom_free:
  3438. iwl_eeprom_free(priv);
  3439. out_iounmap:
  3440. pci_iounmap(pdev, priv->hw_base);
  3441. out_pci_release_regions:
  3442. pci_release_regions(pdev);
  3443. out_pci_disable_device:
  3444. pci_set_drvdata(pdev, NULL);
  3445. pci_disable_device(pdev);
  3446. out_ieee80211_free_hw:
  3447. iwl_free_traffic_mem(priv);
  3448. ieee80211_free_hw(priv->hw);
  3449. out:
  3450. return err;
  3451. }
  3452. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3453. {
  3454. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3455. unsigned long flags;
  3456. if (!priv)
  3457. return;
  3458. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3459. iwl_dbgfs_unregister(priv);
  3460. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3461. if (priv->mac80211_registered) {
  3462. ieee80211_unregister_hw(priv->hw);
  3463. priv->mac80211_registered = 0;
  3464. } else {
  3465. iwl3945_down(priv);
  3466. }
  3467. /*
  3468. * Make sure device is reset to low power before unloading driver.
  3469. * This may be redundant with iwl_down(), but there are paths to
  3470. * run iwl_down() without calling apm_ops.stop(), and there are
  3471. * paths to avoid running iwl_down() at all before leaving driver.
  3472. * This (inexpensive) call *makes sure* device is reset.
  3473. */
  3474. priv->cfg->ops->lib->apm_ops.stop(priv);
  3475. /* make sure we flush any pending irq or
  3476. * tasklet for the driver
  3477. */
  3478. spin_lock_irqsave(&priv->lock, flags);
  3479. iwl_disable_interrupts(priv);
  3480. spin_unlock_irqrestore(&priv->lock, flags);
  3481. iwl_synchronize_irq(priv);
  3482. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3483. cancel_delayed_work_sync(&priv->rfkill_poll);
  3484. iwl3945_dealloc_ucode_pci(priv);
  3485. if (priv->rxq.bd)
  3486. iwl3945_rx_queue_free(priv, &priv->rxq);
  3487. iwl3945_hw_txq_ctx_free(priv);
  3488. iwl3945_unset_hw_params(priv);
  3489. iwl_clear_stations_table(priv);
  3490. /*netif_stop_queue(dev); */
  3491. flush_workqueue(priv->workqueue);
  3492. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3493. * priv->workqueue... so we can't take down the workqueue
  3494. * until now... */
  3495. destroy_workqueue(priv->workqueue);
  3496. priv->workqueue = NULL;
  3497. iwl_free_traffic_mem(priv);
  3498. free_irq(pdev->irq, priv);
  3499. pci_disable_msi(pdev);
  3500. pci_iounmap(pdev, priv->hw_base);
  3501. pci_release_regions(pdev);
  3502. pci_disable_device(pdev);
  3503. pci_set_drvdata(pdev, NULL);
  3504. iwl_free_channel_map(priv);
  3505. iwlcore_free_geos(priv);
  3506. kfree(priv->scan);
  3507. if (priv->ibss_beacon)
  3508. dev_kfree_skb(priv->ibss_beacon);
  3509. ieee80211_free_hw(priv->hw);
  3510. }
  3511. /*****************************************************************************
  3512. *
  3513. * driver and module entry point
  3514. *
  3515. *****************************************************************************/
  3516. static struct pci_driver iwl3945_driver = {
  3517. .name = DRV_NAME,
  3518. .id_table = iwl3945_hw_card_ids,
  3519. .probe = iwl3945_pci_probe,
  3520. .remove = __devexit_p(iwl3945_pci_remove),
  3521. #ifdef CONFIG_PM
  3522. .suspend = iwl_pci_suspend,
  3523. .resume = iwl_pci_resume,
  3524. #endif
  3525. };
  3526. static int __init iwl3945_init(void)
  3527. {
  3528. int ret;
  3529. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3530. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3531. ret = iwl3945_rate_control_register();
  3532. if (ret) {
  3533. printk(KERN_ERR DRV_NAME
  3534. "Unable to register rate control algorithm: %d\n", ret);
  3535. return ret;
  3536. }
  3537. ret = pci_register_driver(&iwl3945_driver);
  3538. if (ret) {
  3539. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3540. goto error_register;
  3541. }
  3542. return ret;
  3543. error_register:
  3544. iwl3945_rate_control_unregister();
  3545. return ret;
  3546. }
  3547. static void __exit iwl3945_exit(void)
  3548. {
  3549. pci_unregister_driver(&iwl3945_driver);
  3550. iwl3945_rate_control_unregister();
  3551. }
  3552. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3553. module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
  3554. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3555. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
  3556. MODULE_PARM_DESC(swcrypto,
  3557. "using software crypto (default 1 [software])\n");
  3558. #ifdef CONFIG_IWLWIFI_DEBUG
  3559. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3560. MODULE_PARM_DESC(debug, "debug output mask");
  3561. #endif
  3562. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
  3563. int, S_IRUGO);
  3564. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3565. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
  3566. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3567. module_exit(iwl3945_exit);
  3568. module_init(iwl3945_init);