nm256.c 44 KB

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  1. /*
  2. * Driver for NeoMagic 256AV and 256ZX chipsets.
  3. * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de>
  4. *
  5. * Based on nm256_audio.c OSS driver in linux kernel.
  6. * The original author of OSS nm256 driver wishes to remain anonymous,
  7. * so I just put my acknoledgment to him/her here.
  8. * The original author's web page is found at
  9. * http://www.uglx.org/sony.html
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <sound/driver.h>
  27. #include <asm/io.h>
  28. #include <linux/delay.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/init.h>
  31. #include <linux/pci.h>
  32. #include <linux/slab.h>
  33. #include <linux/moduleparam.h>
  34. #include <sound/core.h>
  35. #include <sound/info.h>
  36. #include <sound/control.h>
  37. #include <sound/pcm.h>
  38. #include <sound/ac97_codec.h>
  39. #include <sound/initval.h>
  40. #define CARD_NAME "NeoMagic 256AV/ZX"
  41. #define DRIVER_NAME "NM256"
  42. MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
  43. MODULE_DESCRIPTION("NeoMagic NM256AV/ZX");
  44. MODULE_LICENSE("GPL");
  45. MODULE_SUPPORTED_DEVICE("{{NeoMagic,NM256AV},"
  46. "{NeoMagic,NM256ZX}}");
  47. /*
  48. * some compile conditions.
  49. */
  50. static int index = SNDRV_DEFAULT_IDX1; /* Index */
  51. static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
  52. static int playback_bufsize = 16;
  53. static int capture_bufsize = 16;
  54. static int force_ac97; /* disabled as default */
  55. static int buffer_top; /* not specified */
  56. static int use_cache; /* disabled */
  57. static int vaio_hack; /* disabled */
  58. static int reset_workaround;
  59. static int reset_workaround_2;
  60. module_param(index, int, 0444);
  61. MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
  62. module_param(id, charp, 0444);
  63. MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
  64. module_param(playback_bufsize, int, 0444);
  65. MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard.");
  66. module_param(capture_bufsize, int, 0444);
  67. MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard.");
  68. module_param(force_ac97, bool, 0444);
  69. MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard.");
  70. module_param(buffer_top, int, 0444);
  71. MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard.");
  72. module_param(use_cache, bool, 0444);
  73. MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access.");
  74. module_param(vaio_hack, bool, 0444);
  75. MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks.");
  76. module_param(reset_workaround, bool, 0444);
  77. MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops.");
  78. module_param(reset_workaround_2, bool, 0444);
  79. MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops.");
  80. /* just for backward compatibility */
  81. static int enable;
  82. module_param(enable, bool, 0444);
  83. /*
  84. * hw definitions
  85. */
  86. /* The BIOS signature. */
  87. #define NM_SIGNATURE 0x4e4d0000
  88. /* Signature mask. */
  89. #define NM_SIG_MASK 0xffff0000
  90. /* Size of the second memory area. */
  91. #define NM_PORT2_SIZE 4096
  92. /* The base offset of the mixer in the second memory area. */
  93. #define NM_MIXER_OFFSET 0x600
  94. /* The maximum size of a coefficient entry. */
  95. #define NM_MAX_PLAYBACK_COEF_SIZE 0x5000
  96. #define NM_MAX_RECORD_COEF_SIZE 0x1260
  97. /* The interrupt register. */
  98. #define NM_INT_REG 0xa04
  99. /* And its bits. */
  100. #define NM_PLAYBACK_INT 0x40
  101. #define NM_RECORD_INT 0x100
  102. #define NM_MISC_INT_1 0x4000
  103. #define NM_MISC_INT_2 0x1
  104. #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1)
  105. /* The AV's "mixer ready" status bit and location. */
  106. #define NM_MIXER_STATUS_OFFSET 0xa04
  107. #define NM_MIXER_READY_MASK 0x0800
  108. #define NM_MIXER_PRESENCE 0xa06
  109. #define NM_PRESENCE_MASK 0x0050
  110. #define NM_PRESENCE_VALUE 0x0040
  111. /*
  112. * For the ZX. It uses the same interrupt register, but it holds 32
  113. * bits instead of 16.
  114. */
  115. #define NM2_PLAYBACK_INT 0x10000
  116. #define NM2_RECORD_INT 0x80000
  117. #define NM2_MISC_INT_1 0x8
  118. #define NM2_MISC_INT_2 0x2
  119. #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))
  120. /* The ZX's "mixer ready" status bit and location. */
  121. #define NM2_MIXER_STATUS_OFFSET 0xa06
  122. #define NM2_MIXER_READY_MASK 0x0800
  123. /* The playback registers start from here. */
  124. #define NM_PLAYBACK_REG_OFFSET 0x0
  125. /* The record registers start from here. */
  126. #define NM_RECORD_REG_OFFSET 0x200
  127. /* The rate register is located 2 bytes from the start of the register area. */
  128. #define NM_RATE_REG_OFFSET 2
  129. /* Mono/stereo flag, number of bits on playback, and rate mask. */
  130. #define NM_RATE_STEREO 1
  131. #define NM_RATE_BITS_16 2
  132. #define NM_RATE_MASK 0xf0
  133. /* Playback enable register. */
  134. #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
  135. #define NM_PLAYBACK_ENABLE_FLAG 1
  136. #define NM_PLAYBACK_ONESHOT 2
  137. #define NM_PLAYBACK_FREERUN 4
  138. /* Mutes the audio output. */
  139. #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
  140. #define NM_AUDIO_MUTE_LEFT 0x8000
  141. #define NM_AUDIO_MUTE_RIGHT 0x0080
  142. /* Recording enable register. */
  143. #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
  144. #define NM_RECORD_ENABLE_FLAG 1
  145. #define NM_RECORD_FREERUN 2
  146. /* coefficient buffer pointer */
  147. #define NM_COEFF_START_OFFSET 0x1c
  148. #define NM_COEFF_END_OFFSET 0x20
  149. /* DMA buffer offsets */
  150. #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
  151. #define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10)
  152. #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
  153. #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
  154. #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
  155. #define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14)
  156. #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
  157. #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
  158. struct nm256_stream {
  159. struct nm256 *chip;
  160. struct snd_pcm_substream *substream;
  161. int running;
  162. int suspended;
  163. u32 buf; /* offset from chip->buffer */
  164. int bufsize; /* buffer size in bytes */
  165. void __iomem *bufptr; /* mapped pointer */
  166. unsigned long bufptr_addr; /* physical address of the mapped pointer */
  167. int dma_size; /* buffer size of the substream in bytes */
  168. int period_size; /* period size in bytes */
  169. int periods; /* # of periods */
  170. int shift; /* bit shifts */
  171. int cur_period; /* current period # */
  172. };
  173. struct nm256 {
  174. struct snd_card *card;
  175. void __iomem *cport; /* control port */
  176. struct resource *res_cport; /* its resource */
  177. unsigned long cport_addr; /* physical address */
  178. void __iomem *buffer; /* buffer */
  179. struct resource *res_buffer; /* its resource */
  180. unsigned long buffer_addr; /* buffer phyiscal address */
  181. u32 buffer_start; /* start offset from pci resource 0 */
  182. u32 buffer_end; /* end offset */
  183. u32 buffer_size; /* total buffer size */
  184. u32 all_coeff_buf; /* coefficient buffer */
  185. u32 coeff_buf[2]; /* coefficient buffer for each stream */
  186. unsigned int coeffs_current: 1; /* coeff. table is loaded? */
  187. unsigned int use_cache: 1; /* use one big coef. table */
  188. unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
  189. unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */
  190. int mixer_base; /* register offset of ac97 mixer */
  191. int mixer_status_offset; /* offset of mixer status reg. */
  192. int mixer_status_mask; /* bit mask to test the mixer status */
  193. int irq;
  194. int irq_acks;
  195. irqreturn_t (*interrupt)(int, void *, struct pt_regs *);
  196. int badintrcount; /* counter to check bogus interrupts */
  197. struct semaphore irq_mutex;
  198. struct nm256_stream streams[2];
  199. struct snd_ac97 *ac97;
  200. struct snd_pcm *pcm;
  201. struct pci_dev *pci;
  202. spinlock_t reg_lock;
  203. };
  204. /*
  205. * include coefficient table
  206. */
  207. #include "nm256_coef.c"
  208. /*
  209. * PCI ids
  210. */
  211. static struct pci_device_id snd_nm256_ids[] = {
  212. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  213. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  214. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  215. {0,},
  216. };
  217. MODULE_DEVICE_TABLE(pci, snd_nm256_ids);
  218. /*
  219. * lowlvel stuffs
  220. */
  221. static inline u8
  222. snd_nm256_readb(struct nm256 *chip, int offset)
  223. {
  224. return readb(chip->cport + offset);
  225. }
  226. static inline u16
  227. snd_nm256_readw(struct nm256 *chip, int offset)
  228. {
  229. return readw(chip->cport + offset);
  230. }
  231. static inline u32
  232. snd_nm256_readl(struct nm256 *chip, int offset)
  233. {
  234. return readl(chip->cport + offset);
  235. }
  236. static inline void
  237. snd_nm256_writeb(struct nm256 *chip, int offset, u8 val)
  238. {
  239. writeb(val, chip->cport + offset);
  240. }
  241. static inline void
  242. snd_nm256_writew(struct nm256 *chip, int offset, u16 val)
  243. {
  244. writew(val, chip->cport + offset);
  245. }
  246. static inline void
  247. snd_nm256_writel(struct nm256 *chip, int offset, u32 val)
  248. {
  249. writel(val, chip->cport + offset);
  250. }
  251. static inline void
  252. snd_nm256_write_buffer(struct nm256 *chip, void *src, int offset, int size)
  253. {
  254. offset -= chip->buffer_start;
  255. #ifdef CONFIG_SND_DEBUG
  256. if (offset < 0 || offset >= chip->buffer_size) {
  257. snd_printk(KERN_ERR "write_buffer invalid offset = %d size = %d\n",
  258. offset, size);
  259. return;
  260. }
  261. #endif
  262. memcpy_toio(chip->buffer + offset, src, size);
  263. }
  264. /*
  265. * coefficient handlers -- what a magic!
  266. */
  267. static u16
  268. snd_nm256_get_start_offset(int which)
  269. {
  270. u16 offset = 0;
  271. while (which-- > 0)
  272. offset += coefficient_sizes[which];
  273. return offset;
  274. }
  275. static void
  276. snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which)
  277. {
  278. u32 coeff_buf = chip->coeff_buf[stream];
  279. u16 offset = snd_nm256_get_start_offset(which);
  280. u16 size = coefficient_sizes[which];
  281. snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size);
  282. snd_nm256_writel(chip, port, coeff_buf);
  283. /* ??? Record seems to behave differently than playback. */
  284. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  285. size--;
  286. snd_nm256_writel(chip, port + 4, coeff_buf + size);
  287. }
  288. static void
  289. snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number)
  290. {
  291. /* The enable register for the specified engine. */
  292. u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ?
  293. NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG);
  294. u32 addr = NM_COEFF_START_OFFSET;
  295. addr += (stream == SNDRV_PCM_STREAM_CAPTURE ?
  296. NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET);
  297. if (snd_nm256_readb(chip, poffset) & 1) {
  298. snd_printd("NM256: Engine was enabled while loading coefficients!\n");
  299. return;
  300. }
  301. /* The recording engine uses coefficient values 8-15. */
  302. number &= 7;
  303. if (stream == SNDRV_PCM_STREAM_CAPTURE)
  304. number += 8;
  305. if (! chip->use_cache) {
  306. snd_nm256_load_one_coefficient(chip, stream, addr, number);
  307. return;
  308. }
  309. if (! chip->coeffs_current) {
  310. snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,
  311. NM_TOTAL_COEFF_COUNT * 4);
  312. chip->coeffs_current = 1;
  313. } else {
  314. u32 base = chip->all_coeff_buf;
  315. u32 offset = snd_nm256_get_start_offset(number);
  316. u32 end_offset = offset + coefficient_sizes[number];
  317. snd_nm256_writel(chip, addr, base + offset);
  318. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  319. end_offset--;
  320. snd_nm256_writel(chip, addr + 4, base + end_offset);
  321. }
  322. }
  323. /* The actual rates supported by the card. */
  324. static unsigned int samplerates[8] = {
  325. 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
  326. };
  327. static struct snd_pcm_hw_constraint_list constraints_rates = {
  328. .count = ARRAY_SIZE(samplerates),
  329. .list = samplerates,
  330. .mask = 0,
  331. };
  332. /*
  333. * return the index of the target rate
  334. */
  335. static int
  336. snd_nm256_fixed_rate(unsigned int rate)
  337. {
  338. unsigned int i;
  339. for (i = 0; i < ARRAY_SIZE(samplerates); i++) {
  340. if (rate == samplerates[i])
  341. return i;
  342. }
  343. snd_BUG();
  344. return 0;
  345. }
  346. /*
  347. * set sample rate and format
  348. */
  349. static void
  350. snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s,
  351. struct snd_pcm_substream *substream)
  352. {
  353. struct snd_pcm_runtime *runtime = substream->runtime;
  354. int rate_index = snd_nm256_fixed_rate(runtime->rate);
  355. unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK;
  356. s->shift = 0;
  357. if (snd_pcm_format_width(runtime->format) == 16) {
  358. ratebits |= NM_RATE_BITS_16;
  359. s->shift++;
  360. }
  361. if (runtime->channels > 1) {
  362. ratebits |= NM_RATE_STEREO;
  363. s->shift++;
  364. }
  365. runtime->rate = samplerates[rate_index];
  366. switch (substream->stream) {
  367. case SNDRV_PCM_STREAM_PLAYBACK:
  368. snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */
  369. snd_nm256_writeb(chip,
  370. NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET,
  371. ratebits);
  372. break;
  373. case SNDRV_PCM_STREAM_CAPTURE:
  374. snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */
  375. snd_nm256_writeb(chip,
  376. NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET,
  377. ratebits);
  378. break;
  379. }
  380. }
  381. /* acquire interrupt */
  382. static int snd_nm256_acquire_irq(struct nm256 *chip)
  383. {
  384. down(&chip->irq_mutex);
  385. if (chip->irq < 0) {
  386. if (request_irq(chip->pci->irq, chip->interrupt, SA_INTERRUPT|SA_SHIRQ,
  387. chip->card->driver, chip)) {
  388. snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->pci->irq);
  389. up(&chip->irq_mutex);
  390. return -EBUSY;
  391. }
  392. chip->irq = chip->pci->irq;
  393. }
  394. chip->irq_acks++;
  395. up(&chip->irq_mutex);
  396. return 0;
  397. }
  398. /* release interrupt */
  399. static void snd_nm256_release_irq(struct nm256 *chip)
  400. {
  401. down(&chip->irq_mutex);
  402. if (chip->irq_acks > 0)
  403. chip->irq_acks--;
  404. if (chip->irq_acks == 0 && chip->irq >= 0) {
  405. free_irq(chip->irq, chip);
  406. chip->irq = -1;
  407. }
  408. up(&chip->irq_mutex);
  409. }
  410. /*
  411. * start / stop
  412. */
  413. /* update the watermark (current period) */
  414. static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg)
  415. {
  416. s->cur_period++;
  417. s->cur_period %= s->periods;
  418. snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size);
  419. }
  420. #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK)
  421. #define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK)
  422. static void
  423. snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s,
  424. struct snd_pcm_substream *substream)
  425. {
  426. /* program buffer pointers */
  427. snd_nm256_writel(chip, NM_PBUFFER_START, s->buf);
  428. snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));
  429. snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf);
  430. snd_nm256_playback_mark(chip, s);
  431. /* Enable playback engine and interrupts. */
  432. snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG,
  433. NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN);
  434. /* Enable both channels. */
  435. snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0);
  436. }
  437. static void
  438. snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s,
  439. struct snd_pcm_substream *substream)
  440. {
  441. /* program buffer pointers */
  442. snd_nm256_writel(chip, NM_RBUFFER_START, s->buf);
  443. snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size);
  444. snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf);
  445. snd_nm256_capture_mark(chip, s);
  446. /* Enable playback engine and interrupts. */
  447. snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG,
  448. NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN);
  449. }
  450. /* Stop the play engine. */
  451. static void
  452. snd_nm256_playback_stop(struct nm256 *chip)
  453. {
  454. /* Shut off sound from both channels. */
  455. snd_nm256_writew(chip, NM_AUDIO_MUTE_REG,
  456. NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT);
  457. /* Disable play engine. */
  458. snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0);
  459. }
  460. static void
  461. snd_nm256_capture_stop(struct nm256 *chip)
  462. {
  463. /* Disable recording engine. */
  464. snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0);
  465. }
  466. static int
  467. snd_nm256_playback_trigger(struct snd_pcm_substream *substream, int cmd)
  468. {
  469. struct nm256 *chip = snd_pcm_substream_chip(substream);
  470. struct nm256_stream *s = substream->runtime->private_data;
  471. int err = 0;
  472. snd_assert(s != NULL, return -ENXIO);
  473. spin_lock(&chip->reg_lock);
  474. switch (cmd) {
  475. case SNDRV_PCM_TRIGGER_RESUME:
  476. s->suspended = 0;
  477. /* fallthru */
  478. case SNDRV_PCM_TRIGGER_START:
  479. if (! s->running) {
  480. snd_nm256_playback_start(chip, s, substream);
  481. s->running = 1;
  482. }
  483. break;
  484. case SNDRV_PCM_TRIGGER_SUSPEND:
  485. s->suspended = 1;
  486. /* fallthru */
  487. case SNDRV_PCM_TRIGGER_STOP:
  488. if (s->running) {
  489. snd_nm256_playback_stop(chip);
  490. s->running = 0;
  491. }
  492. break;
  493. default:
  494. err = -EINVAL;
  495. break;
  496. }
  497. spin_unlock(&chip->reg_lock);
  498. return err;
  499. }
  500. static int
  501. snd_nm256_capture_trigger(struct snd_pcm_substream *substream, int cmd)
  502. {
  503. struct nm256 *chip = snd_pcm_substream_chip(substream);
  504. struct nm256_stream *s = substream->runtime->private_data;
  505. int err = 0;
  506. snd_assert(s != NULL, return -ENXIO);
  507. spin_lock(&chip->reg_lock);
  508. switch (cmd) {
  509. case SNDRV_PCM_TRIGGER_START:
  510. case SNDRV_PCM_TRIGGER_RESUME:
  511. if (! s->running) {
  512. snd_nm256_capture_start(chip, s, substream);
  513. s->running = 1;
  514. }
  515. break;
  516. case SNDRV_PCM_TRIGGER_STOP:
  517. case SNDRV_PCM_TRIGGER_SUSPEND:
  518. if (s->running) {
  519. snd_nm256_capture_stop(chip);
  520. s->running = 0;
  521. }
  522. break;
  523. default:
  524. err = -EINVAL;
  525. break;
  526. }
  527. spin_unlock(&chip->reg_lock);
  528. return err;
  529. }
  530. /*
  531. * prepare playback/capture channel
  532. */
  533. static int snd_nm256_pcm_prepare(struct snd_pcm_substream *substream)
  534. {
  535. struct nm256 *chip = snd_pcm_substream_chip(substream);
  536. struct snd_pcm_runtime *runtime = substream->runtime;
  537. struct nm256_stream *s = runtime->private_data;
  538. snd_assert(s, return -ENXIO);
  539. s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size);
  540. s->period_size = frames_to_bytes(runtime, substream->runtime->period_size);
  541. s->periods = substream->runtime->periods;
  542. s->cur_period = 0;
  543. spin_lock_irq(&chip->reg_lock);
  544. s->running = 0;
  545. snd_nm256_set_format(chip, s, substream);
  546. spin_unlock_irq(&chip->reg_lock);
  547. return 0;
  548. }
  549. /*
  550. * get the current pointer
  551. */
  552. static snd_pcm_uframes_t
  553. snd_nm256_playback_pointer(struct snd_pcm_substream *substream)
  554. {
  555. struct nm256 *chip = snd_pcm_substream_chip(substream);
  556. struct nm256_stream *s = substream->runtime->private_data;
  557. unsigned long curp;
  558. snd_assert(s, return 0);
  559. curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf;
  560. curp %= s->dma_size;
  561. return bytes_to_frames(substream->runtime, curp);
  562. }
  563. static snd_pcm_uframes_t
  564. snd_nm256_capture_pointer(struct snd_pcm_substream *substream)
  565. {
  566. struct nm256 *chip = snd_pcm_substream_chip(substream);
  567. struct nm256_stream *s = substream->runtime->private_data;
  568. unsigned long curp;
  569. snd_assert(s != NULL, return 0);
  570. curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf;
  571. curp %= s->dma_size;
  572. return bytes_to_frames(substream->runtime, curp);
  573. }
  574. /* Remapped I/O space can be accessible as pointer on i386 */
  575. /* This might be changed in the future */
  576. #ifndef __i386__
  577. /*
  578. * silence / copy for playback
  579. */
  580. static int
  581. snd_nm256_playback_silence(struct snd_pcm_substream *substream,
  582. int channel, /* not used (interleaved data) */
  583. snd_pcm_uframes_t pos,
  584. snd_pcm_uframes_t count)
  585. {
  586. struct snd_pcm_runtime *runtime = substream->runtime;
  587. struct nm256_stream *s = runtime->private_data;
  588. count = frames_to_bytes(runtime, count);
  589. pos = frames_to_bytes(runtime, pos);
  590. memset_io(s->bufptr + pos, 0, count);
  591. return 0;
  592. }
  593. static int
  594. snd_nm256_playback_copy(struct snd_pcm_substream *substream,
  595. int channel, /* not used (interleaved data) */
  596. snd_pcm_uframes_t pos,
  597. void __user *src,
  598. snd_pcm_uframes_t count)
  599. {
  600. struct snd_pcm_runtime *runtime = substream->runtime;
  601. struct nm256_stream *s = runtime->private_data;
  602. count = frames_to_bytes(runtime, count);
  603. pos = frames_to_bytes(runtime, pos);
  604. if (copy_from_user_toio(s->bufptr + pos, src, count))
  605. return -EFAULT;
  606. return 0;
  607. }
  608. /*
  609. * copy to user
  610. */
  611. static int
  612. snd_nm256_capture_copy(struct snd_pcm_substream *substream,
  613. int channel, /* not used (interleaved data) */
  614. snd_pcm_uframes_t pos,
  615. void __user *dst,
  616. snd_pcm_uframes_t count)
  617. {
  618. struct snd_pcm_runtime *runtime = substream->runtime;
  619. struct nm256_stream *s = runtime->private_data;
  620. count = frames_to_bytes(runtime, count);
  621. pos = frames_to_bytes(runtime, pos);
  622. if (copy_to_user_fromio(dst, s->bufptr + pos, count))
  623. return -EFAULT;
  624. return 0;
  625. }
  626. #endif /* !__i386__ */
  627. /*
  628. * update playback/capture watermarks
  629. */
  630. /* spinlock held! */
  631. static void
  632. snd_nm256_playback_update(struct nm256 *chip)
  633. {
  634. struct nm256_stream *s;
  635. s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK];
  636. if (s->running && s->substream) {
  637. spin_unlock(&chip->reg_lock);
  638. snd_pcm_period_elapsed(s->substream);
  639. spin_lock(&chip->reg_lock);
  640. snd_nm256_playback_mark(chip, s);
  641. }
  642. }
  643. /* spinlock held! */
  644. static void
  645. snd_nm256_capture_update(struct nm256 *chip)
  646. {
  647. struct nm256_stream *s;
  648. s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE];
  649. if (s->running && s->substream) {
  650. spin_unlock(&chip->reg_lock);
  651. snd_pcm_period_elapsed(s->substream);
  652. spin_lock(&chip->reg_lock);
  653. snd_nm256_capture_mark(chip, s);
  654. }
  655. }
  656. /*
  657. * hardware info
  658. */
  659. static struct snd_pcm_hardware snd_nm256_playback =
  660. {
  661. .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID |
  662. SNDRV_PCM_INFO_INTERLEAVED |
  663. /*SNDRV_PCM_INFO_PAUSE |*/
  664. SNDRV_PCM_INFO_RESUME,
  665. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  666. .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
  667. .rate_min = 8000,
  668. .rate_max = 48000,
  669. .channels_min = 1,
  670. .channels_max = 2,
  671. .periods_min = 2,
  672. .periods_max = 1024,
  673. .buffer_bytes_max = 128 * 1024,
  674. .period_bytes_min = 256,
  675. .period_bytes_max = 128 * 1024,
  676. };
  677. static struct snd_pcm_hardware snd_nm256_capture =
  678. {
  679. .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID |
  680. SNDRV_PCM_INFO_INTERLEAVED |
  681. /*SNDRV_PCM_INFO_PAUSE |*/
  682. SNDRV_PCM_INFO_RESUME,
  683. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  684. .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
  685. .rate_min = 8000,
  686. .rate_max = 48000,
  687. .channels_min = 1,
  688. .channels_max = 2,
  689. .periods_min = 2,
  690. .periods_max = 1024,
  691. .buffer_bytes_max = 128 * 1024,
  692. .period_bytes_min = 256,
  693. .period_bytes_max = 128 * 1024,
  694. };
  695. /* set dma transfer size */
  696. static int snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream,
  697. struct snd_pcm_hw_params *hw_params)
  698. {
  699. /* area and addr are already set and unchanged */
  700. substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
  701. return 0;
  702. }
  703. /*
  704. * open
  705. */
  706. static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s,
  707. struct snd_pcm_substream *substream,
  708. struct snd_pcm_hardware *hw_ptr)
  709. {
  710. struct snd_pcm_runtime *runtime = substream->runtime;
  711. s->running = 0;
  712. runtime->hw = *hw_ptr;
  713. runtime->hw.buffer_bytes_max = s->bufsize;
  714. runtime->hw.period_bytes_max = s->bufsize / 2;
  715. runtime->dma_area = (void __force *) s->bufptr;
  716. runtime->dma_addr = s->bufptr_addr;
  717. runtime->dma_bytes = s->bufsize;
  718. runtime->private_data = s;
  719. s->substream = substream;
  720. snd_pcm_set_sync(substream);
  721. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  722. &constraints_rates);
  723. }
  724. static int
  725. snd_nm256_playback_open(struct snd_pcm_substream *substream)
  726. {
  727. struct nm256 *chip = snd_pcm_substream_chip(substream);
  728. if (snd_nm256_acquire_irq(chip) < 0)
  729. return -EBUSY;
  730. snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK],
  731. substream, &snd_nm256_playback);
  732. return 0;
  733. }
  734. static int
  735. snd_nm256_capture_open(struct snd_pcm_substream *substream)
  736. {
  737. struct nm256 *chip = snd_pcm_substream_chip(substream);
  738. if (snd_nm256_acquire_irq(chip) < 0)
  739. return -EBUSY;
  740. snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE],
  741. substream, &snd_nm256_capture);
  742. return 0;
  743. }
  744. /*
  745. * close - we don't have to do special..
  746. */
  747. static int
  748. snd_nm256_playback_close(struct snd_pcm_substream *substream)
  749. {
  750. struct nm256 *chip = snd_pcm_substream_chip(substream);
  751. snd_nm256_release_irq(chip);
  752. return 0;
  753. }
  754. static int
  755. snd_nm256_capture_close(struct snd_pcm_substream *substream)
  756. {
  757. struct nm256 *chip = snd_pcm_substream_chip(substream);
  758. snd_nm256_release_irq(chip);
  759. return 0;
  760. }
  761. /*
  762. * create a pcm instance
  763. */
  764. static struct snd_pcm_ops snd_nm256_playback_ops = {
  765. .open = snd_nm256_playback_open,
  766. .close = snd_nm256_playback_close,
  767. .ioctl = snd_pcm_lib_ioctl,
  768. .hw_params = snd_nm256_pcm_hw_params,
  769. .prepare = snd_nm256_pcm_prepare,
  770. .trigger = snd_nm256_playback_trigger,
  771. .pointer = snd_nm256_playback_pointer,
  772. #ifndef __i386__
  773. .copy = snd_nm256_playback_copy,
  774. .silence = snd_nm256_playback_silence,
  775. #endif
  776. .mmap = snd_pcm_lib_mmap_iomem,
  777. };
  778. static struct snd_pcm_ops snd_nm256_capture_ops = {
  779. .open = snd_nm256_capture_open,
  780. .close = snd_nm256_capture_close,
  781. .ioctl = snd_pcm_lib_ioctl,
  782. .hw_params = snd_nm256_pcm_hw_params,
  783. .prepare = snd_nm256_pcm_prepare,
  784. .trigger = snd_nm256_capture_trigger,
  785. .pointer = snd_nm256_capture_pointer,
  786. #ifndef __i386__
  787. .copy = snd_nm256_capture_copy,
  788. #endif
  789. .mmap = snd_pcm_lib_mmap_iomem,
  790. };
  791. static int __devinit
  792. snd_nm256_pcm(struct nm256 *chip, int device)
  793. {
  794. struct snd_pcm *pcm;
  795. int i, err;
  796. for (i = 0; i < 2; i++) {
  797. struct nm256_stream *s = &chip->streams[i];
  798. s->bufptr = chip->buffer + (s->buf - chip->buffer_start);
  799. s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start);
  800. }
  801. err = snd_pcm_new(chip->card, chip->card->driver, device,
  802. 1, 1, &pcm);
  803. if (err < 0)
  804. return err;
  805. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops);
  806. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops);
  807. pcm->private_data = chip;
  808. pcm->info_flags = 0;
  809. chip->pcm = pcm;
  810. return 0;
  811. }
  812. /*
  813. * Initialize the hardware.
  814. */
  815. static void
  816. snd_nm256_init_chip(struct nm256 *chip)
  817. {
  818. /* Reset everything. */
  819. snd_nm256_writeb(chip, 0x0, 0x11);
  820. snd_nm256_writew(chip, 0x214, 0);
  821. /* stop sounds.. */
  822. //snd_nm256_playback_stop(chip);
  823. //snd_nm256_capture_stop(chip);
  824. }
  825. static irqreturn_t
  826. snd_nm256_intr_check(struct nm256 *chip)
  827. {
  828. if (chip->badintrcount++ > 1000) {
  829. /*
  830. * I'm not sure if the best thing is to stop the card from
  831. * playing or just release the interrupt (after all, we're in
  832. * a bad situation, so doing fancy stuff may not be such a good
  833. * idea).
  834. *
  835. * I worry about the card engine continuing to play noise
  836. * over and over, however--that could become a very
  837. * obnoxious problem. And we know that when this usually
  838. * happens things are fairly safe, it just means the user's
  839. * inserted a PCMCIA card and someone's spamming us with IRQ 9s.
  840. */
  841. if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
  842. snd_nm256_playback_stop(chip);
  843. if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
  844. snd_nm256_capture_stop(chip);
  845. chip->badintrcount = 0;
  846. return IRQ_HANDLED;
  847. }
  848. return IRQ_NONE;
  849. }
  850. /*
  851. * Handle a potential interrupt for the device referred to by DEV_ID.
  852. *
  853. * I don't like the cut-n-paste job here either between the two routines,
  854. * but there are sufficient differences between the two interrupt handlers
  855. * that parameterizing it isn't all that great either. (Could use a macro,
  856. * I suppose...yucky bleah.)
  857. */
  858. static irqreturn_t
  859. snd_nm256_interrupt(int irq, void *dev_id, struct pt_regs *dummy)
  860. {
  861. struct nm256 *chip = dev_id;
  862. u16 status;
  863. u8 cbyte;
  864. status = snd_nm256_readw(chip, NM_INT_REG);
  865. /* Not ours. */
  866. if (status == 0)
  867. return snd_nm256_intr_check(chip);
  868. chip->badintrcount = 0;
  869. /* Rather boring; check for individual interrupts and process them. */
  870. spin_lock(&chip->reg_lock);
  871. if (status & NM_PLAYBACK_INT) {
  872. status &= ~NM_PLAYBACK_INT;
  873. NM_ACK_INT(chip, NM_PLAYBACK_INT);
  874. snd_nm256_playback_update(chip);
  875. }
  876. if (status & NM_RECORD_INT) {
  877. status &= ~NM_RECORD_INT;
  878. NM_ACK_INT(chip, NM_RECORD_INT);
  879. snd_nm256_capture_update(chip);
  880. }
  881. if (status & NM_MISC_INT_1) {
  882. status &= ~NM_MISC_INT_1;
  883. NM_ACK_INT(chip, NM_MISC_INT_1);
  884. snd_printd("NM256: Got misc interrupt #1\n");
  885. snd_nm256_writew(chip, NM_INT_REG, 0x8000);
  886. cbyte = snd_nm256_readb(chip, 0x400);
  887. snd_nm256_writeb(chip, 0x400, cbyte | 2);
  888. }
  889. if (status & NM_MISC_INT_2) {
  890. status &= ~NM_MISC_INT_2;
  891. NM_ACK_INT(chip, NM_MISC_INT_2);
  892. snd_printd("NM256: Got misc interrupt #2\n");
  893. cbyte = snd_nm256_readb(chip, 0x400);
  894. snd_nm256_writeb(chip, 0x400, cbyte & ~2);
  895. }
  896. /* Unknown interrupt. */
  897. if (status) {
  898. snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
  899. status);
  900. /* Pray. */
  901. NM_ACK_INT(chip, status);
  902. }
  903. spin_unlock(&chip->reg_lock);
  904. return IRQ_HANDLED;
  905. }
  906. /*
  907. * Handle a potential interrupt for the device referred to by DEV_ID.
  908. * This handler is for the 256ZX, and is very similar to the non-ZX
  909. * routine.
  910. */
  911. static irqreturn_t
  912. snd_nm256_interrupt_zx(int irq, void *dev_id, struct pt_regs *dummy)
  913. {
  914. struct nm256 *chip = dev_id;
  915. u32 status;
  916. u8 cbyte;
  917. status = snd_nm256_readl(chip, NM_INT_REG);
  918. /* Not ours. */
  919. if (status == 0)
  920. return snd_nm256_intr_check(chip);
  921. chip->badintrcount = 0;
  922. /* Rather boring; check for individual interrupts and process them. */
  923. spin_lock(&chip->reg_lock);
  924. if (status & NM2_PLAYBACK_INT) {
  925. status &= ~NM2_PLAYBACK_INT;
  926. NM2_ACK_INT(chip, NM2_PLAYBACK_INT);
  927. snd_nm256_playback_update(chip);
  928. }
  929. if (status & NM2_RECORD_INT) {
  930. status &= ~NM2_RECORD_INT;
  931. NM2_ACK_INT(chip, NM2_RECORD_INT);
  932. snd_nm256_capture_update(chip);
  933. }
  934. if (status & NM2_MISC_INT_1) {
  935. status &= ~NM2_MISC_INT_1;
  936. NM2_ACK_INT(chip, NM2_MISC_INT_1);
  937. snd_printd("NM256: Got misc interrupt #1\n");
  938. cbyte = snd_nm256_readb(chip, 0x400);
  939. snd_nm256_writeb(chip, 0x400, cbyte | 2);
  940. }
  941. if (status & NM2_MISC_INT_2) {
  942. status &= ~NM2_MISC_INT_2;
  943. NM2_ACK_INT(chip, NM2_MISC_INT_2);
  944. snd_printd("NM256: Got misc interrupt #2\n");
  945. cbyte = snd_nm256_readb(chip, 0x400);
  946. snd_nm256_writeb(chip, 0x400, cbyte & ~2);
  947. }
  948. /* Unknown interrupt. */
  949. if (status) {
  950. snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
  951. status);
  952. /* Pray. */
  953. NM2_ACK_INT(chip, status);
  954. }
  955. spin_unlock(&chip->reg_lock);
  956. return IRQ_HANDLED;
  957. }
  958. /*
  959. * AC97 interface
  960. */
  961. /*
  962. * Waits for the mixer to become ready to be written; returns a zero value
  963. * if it timed out.
  964. */
  965. static int
  966. snd_nm256_ac97_ready(struct nm256 *chip)
  967. {
  968. int timeout = 10;
  969. u32 testaddr;
  970. u16 testb;
  971. testaddr = chip->mixer_status_offset;
  972. testb = chip->mixer_status_mask;
  973. /*
  974. * Loop around waiting for the mixer to become ready.
  975. */
  976. while (timeout-- > 0) {
  977. if ((snd_nm256_readw(chip, testaddr) & testb) == 0)
  978. return 1;
  979. udelay(100);
  980. }
  981. return 0;
  982. }
  983. /*
  984. */
  985. static unsigned short
  986. snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  987. {
  988. struct nm256 *chip = ac97->private_data;
  989. int res;
  990. if (reg >= 128)
  991. return 0;
  992. if (! snd_nm256_ac97_ready(chip))
  993. return 0;
  994. res = snd_nm256_readw(chip, chip->mixer_base + reg);
  995. /* Magic delay. Bleah yucky. */
  996. msleep(1);
  997. return res;
  998. }
  999. /*
  1000. */
  1001. static void
  1002. snd_nm256_ac97_write(struct snd_ac97 *ac97,
  1003. unsigned short reg, unsigned short val)
  1004. {
  1005. struct nm256 *chip = ac97->private_data;
  1006. int tries = 2;
  1007. u32 base;
  1008. base = chip->mixer_base;
  1009. snd_nm256_ac97_ready(chip);
  1010. /* Wait for the write to take, too. */
  1011. while (tries-- > 0) {
  1012. snd_nm256_writew(chip, base + reg, val);
  1013. msleep(1); /* a little delay here seems better.. */
  1014. if (snd_nm256_ac97_ready(chip))
  1015. return;
  1016. }
  1017. snd_printd("nm256: ac97 codec not ready..\n");
  1018. }
  1019. /* initialize the ac97 into a known state */
  1020. static void
  1021. snd_nm256_ac97_reset(struct snd_ac97 *ac97)
  1022. {
  1023. struct nm256 *chip = ac97->private_data;
  1024. /* Reset the mixer. 'Tis magic! */
  1025. snd_nm256_writeb(chip, 0x6c0, 1);
  1026. if (! chip->reset_workaround) {
  1027. /* Dell latitude LS will lock up by this */
  1028. snd_nm256_writeb(chip, 0x6cc, 0x87);
  1029. }
  1030. if (! chip->reset_workaround_2) {
  1031. /* Dell latitude CSx will lock up by this */
  1032. snd_nm256_writeb(chip, 0x6cc, 0x80);
  1033. snd_nm256_writeb(chip, 0x6cc, 0x0);
  1034. }
  1035. }
  1036. /* create an ac97 mixer interface */
  1037. static int __devinit
  1038. snd_nm256_mixer(struct nm256 *chip)
  1039. {
  1040. struct snd_ac97_bus *pbus;
  1041. struct snd_ac97_template ac97;
  1042. int i, err;
  1043. static struct snd_ac97_bus_ops ops = {
  1044. .reset = snd_nm256_ac97_reset,
  1045. .write = snd_nm256_ac97_write,
  1046. .read = snd_nm256_ac97_read,
  1047. };
  1048. /* looks like nm256 hangs up when unexpected registers are touched... */
  1049. static int mixer_regs[] = {
  1050. AC97_MASTER, AC97_HEADPHONE, AC97_MASTER_MONO,
  1051. AC97_PC_BEEP, AC97_PHONE, AC97_MIC, AC97_LINE, AC97_CD,
  1052. AC97_VIDEO, AC97_AUX, AC97_PCM, AC97_REC_SEL,
  1053. AC97_REC_GAIN, AC97_GENERAL_PURPOSE, AC97_3D_CONTROL,
  1054. /*AC97_EXTENDED_ID,*/
  1055. AC97_VENDOR_ID1, AC97_VENDOR_ID2,
  1056. -1
  1057. };
  1058. if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
  1059. return err;
  1060. memset(&ac97, 0, sizeof(ac97));
  1061. ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
  1062. ac97.limited_regs = 1;
  1063. for (i = 0; mixer_regs[i] >= 0; i++)
  1064. set_bit(mixer_regs[i], ac97.reg_accessed);
  1065. ac97.private_data = chip;
  1066. pbus->no_vra = 1;
  1067. err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  1068. if (err < 0)
  1069. return err;
  1070. if (! (chip->ac97->id & (0xf0000000))) {
  1071. /* looks like an invalid id */
  1072. sprintf(chip->card->mixername, "%s AC97", chip->card->driver);
  1073. }
  1074. return 0;
  1075. }
  1076. /*
  1077. * See if the signature left by the NM256 BIOS is intact; if so, we use
  1078. * the associated address as the end of our audio buffer in the video
  1079. * RAM.
  1080. */
  1081. static int __devinit
  1082. snd_nm256_peek_for_sig(struct nm256 *chip)
  1083. {
  1084. /* The signature is located 1K below the end of video RAM. */
  1085. void __iomem *temp;
  1086. /* Default buffer end is 5120 bytes below the top of RAM. */
  1087. unsigned long pointer_found = chip->buffer_end - 0x1400;
  1088. u32 sig;
  1089. temp = ioremap_nocache(chip->buffer_addr + chip->buffer_end - 0x400, 16);
  1090. if (temp == NULL) {
  1091. snd_printk(KERN_ERR "Unable to scan for card signature in video RAM\n");
  1092. return -EBUSY;
  1093. }
  1094. sig = readl(temp);
  1095. if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {
  1096. u32 pointer = readl(temp + 4);
  1097. /*
  1098. * If it's obviously invalid, don't use it
  1099. */
  1100. if (pointer == 0xffffffff ||
  1101. pointer < chip->buffer_size ||
  1102. pointer > chip->buffer_end) {
  1103. snd_printk(KERN_ERR "invalid signature found: 0x%x\n", pointer);
  1104. iounmap(temp);
  1105. return -ENODEV;
  1106. } else {
  1107. pointer_found = pointer;
  1108. printk(KERN_INFO "nm256: found card signature in video RAM: 0x%x\n",
  1109. pointer);
  1110. }
  1111. }
  1112. iounmap(temp);
  1113. chip->buffer_end = pointer_found;
  1114. return 0;
  1115. }
  1116. #ifdef CONFIG_PM
  1117. /*
  1118. * APM event handler, so the card is properly reinitialized after a power
  1119. * event.
  1120. */
  1121. static int nm256_suspend(struct snd_card *card, pm_message_t state)
  1122. {
  1123. struct nm256 *chip = card->pm_private_data;
  1124. snd_pcm_suspend_all(chip->pcm);
  1125. snd_ac97_suspend(chip->ac97);
  1126. chip->coeffs_current = 0;
  1127. pci_disable_device(chip->pci);
  1128. return 0;
  1129. }
  1130. static int nm256_resume(struct snd_card *card)
  1131. {
  1132. struct nm256 *chip = card->pm_private_data;
  1133. int i;
  1134. /* Perform a full reset on the hardware */
  1135. pci_enable_device(chip->pci);
  1136. snd_nm256_init_chip(chip);
  1137. /* restore ac97 */
  1138. snd_ac97_resume(chip->ac97);
  1139. for (i = 0; i < 2; i++) {
  1140. struct nm256_stream *s = &chip->streams[i];
  1141. if (s->substream && s->suspended) {
  1142. spin_lock_irq(&chip->reg_lock);
  1143. snd_nm256_set_format(chip, s, s->substream);
  1144. spin_unlock_irq(&chip->reg_lock);
  1145. }
  1146. }
  1147. return 0;
  1148. }
  1149. #endif /* CONFIG_PM */
  1150. static int snd_nm256_free(struct nm256 *chip)
  1151. {
  1152. if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
  1153. snd_nm256_playback_stop(chip);
  1154. if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
  1155. snd_nm256_capture_stop(chip);
  1156. if (chip->irq >= 0)
  1157. synchronize_irq(chip->irq);
  1158. if (chip->cport)
  1159. iounmap(chip->cport);
  1160. if (chip->buffer)
  1161. iounmap(chip->buffer);
  1162. release_and_free_resource(chip->res_cport);
  1163. release_and_free_resource(chip->res_buffer);
  1164. if (chip->irq >= 0)
  1165. free_irq(chip->irq, chip);
  1166. pci_disable_device(chip->pci);
  1167. kfree(chip);
  1168. return 0;
  1169. }
  1170. static int snd_nm256_dev_free(struct snd_device *device)
  1171. {
  1172. struct nm256 *chip = device->device_data;
  1173. return snd_nm256_free(chip);
  1174. }
  1175. static int __devinit
  1176. snd_nm256_create(struct snd_card *card, struct pci_dev *pci,
  1177. struct nm256 **chip_ret)
  1178. {
  1179. struct nm256 *chip;
  1180. int err, pval;
  1181. static struct snd_device_ops ops = {
  1182. .dev_free = snd_nm256_dev_free,
  1183. };
  1184. u32 addr;
  1185. *chip_ret = NULL;
  1186. if ((err = pci_enable_device(pci)) < 0)
  1187. return err;
  1188. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1189. if (chip == NULL) {
  1190. pci_disable_device(pci);
  1191. return -ENOMEM;
  1192. }
  1193. chip->card = card;
  1194. chip->pci = pci;
  1195. chip->use_cache = use_cache;
  1196. spin_lock_init(&chip->reg_lock);
  1197. chip->irq = -1;
  1198. init_MUTEX(&chip->irq_mutex);
  1199. /* store buffer sizes in bytes */
  1200. chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024;
  1201. chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024;
  1202. /*
  1203. * The NM256 has two memory ports. The first port is nothing
  1204. * more than a chunk of video RAM, which is used as the I/O ring
  1205. * buffer. The second port has the actual juicy stuff (like the
  1206. * mixer and the playback engine control registers).
  1207. */
  1208. chip->buffer_addr = pci_resource_start(pci, 0);
  1209. chip->cport_addr = pci_resource_start(pci, 1);
  1210. /* Init the memory port info. */
  1211. /* remap control port (#2) */
  1212. chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE,
  1213. card->driver);
  1214. if (chip->res_cport == NULL) {
  1215. snd_printk(KERN_ERR "memory region 0x%lx (size 0x%x) busy\n",
  1216. chip->cport_addr, NM_PORT2_SIZE);
  1217. err = -EBUSY;
  1218. goto __error;
  1219. }
  1220. chip->cport = ioremap_nocache(chip->cport_addr, NM_PORT2_SIZE);
  1221. if (chip->cport == NULL) {
  1222. snd_printk(KERN_ERR "unable to map control port %lx\n", chip->cport_addr);
  1223. err = -ENOMEM;
  1224. goto __error;
  1225. }
  1226. if (!strcmp(card->driver, "NM256AV")) {
  1227. /* Ok, try to see if this is a non-AC97 version of the hardware. */
  1228. pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE);
  1229. if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {
  1230. if (! force_ac97) {
  1231. printk(KERN_ERR "nm256: no ac97 is found!\n");
  1232. printk(KERN_ERR " force the driver to load by "
  1233. "passing in the module parameter\n");
  1234. printk(KERN_ERR " force_ac97=1\n");
  1235. printk(KERN_ERR " or try sb16 or cs423x drivers instead.\n");
  1236. err = -ENXIO;
  1237. goto __error;
  1238. }
  1239. }
  1240. chip->buffer_end = 2560 * 1024;
  1241. chip->interrupt = snd_nm256_interrupt;
  1242. chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;
  1243. chip->mixer_status_mask = NM_MIXER_READY_MASK;
  1244. } else {
  1245. /* Not sure if there is any relevant detect for the ZX or not. */
  1246. if (snd_nm256_readb(chip, 0xa0b) != 0)
  1247. chip->buffer_end = 6144 * 1024;
  1248. else
  1249. chip->buffer_end = 4096 * 1024;
  1250. chip->interrupt = snd_nm256_interrupt_zx;
  1251. chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET;
  1252. chip->mixer_status_mask = NM2_MIXER_READY_MASK;
  1253. }
  1254. chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize +
  1255. chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
  1256. if (chip->use_cache)
  1257. chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4;
  1258. else
  1259. chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE;
  1260. if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end)
  1261. chip->buffer_end = buffer_top;
  1262. else {
  1263. /* get buffer end pointer from signature */
  1264. if ((err = snd_nm256_peek_for_sig(chip)) < 0)
  1265. goto __error;
  1266. }
  1267. chip->buffer_start = chip->buffer_end - chip->buffer_size;
  1268. chip->buffer_addr += chip->buffer_start;
  1269. printk(KERN_INFO "nm256: Mapping port 1 from 0x%x - 0x%x\n",
  1270. chip->buffer_start, chip->buffer_end);
  1271. chip->res_buffer = request_mem_region(chip->buffer_addr,
  1272. chip->buffer_size,
  1273. card->driver);
  1274. if (chip->res_buffer == NULL) {
  1275. snd_printk(KERN_ERR "nm256: buffer 0x%lx (size 0x%x) busy\n",
  1276. chip->buffer_addr, chip->buffer_size);
  1277. err = -EBUSY;
  1278. goto __error;
  1279. }
  1280. chip->buffer = ioremap_nocache(chip->buffer_addr, chip->buffer_size);
  1281. if (chip->buffer == NULL) {
  1282. err = -ENOMEM;
  1283. snd_printk(KERN_ERR "unable to map ring buffer at %lx\n", chip->buffer_addr);
  1284. goto __error;
  1285. }
  1286. /* set offsets */
  1287. addr = chip->buffer_start;
  1288. chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr;
  1289. addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize;
  1290. chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr;
  1291. addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
  1292. if (chip->use_cache) {
  1293. chip->all_coeff_buf = addr;
  1294. } else {
  1295. chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr;
  1296. addr += NM_MAX_PLAYBACK_COEF_SIZE;
  1297. chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr;
  1298. }
  1299. /* Fixed setting. */
  1300. chip->mixer_base = NM_MIXER_OFFSET;
  1301. chip->coeffs_current = 0;
  1302. snd_nm256_init_chip(chip);
  1303. // pci_set_master(pci); /* needed? */
  1304. snd_card_set_pm_callback(card, nm256_suspend, nm256_resume, chip);
  1305. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0)
  1306. goto __error;
  1307. snd_card_set_dev(card, &pci->dev);
  1308. *chip_ret = chip;
  1309. return 0;
  1310. __error:
  1311. snd_nm256_free(chip);
  1312. return err;
  1313. }
  1314. struct nm256_quirk {
  1315. unsigned short vendor;
  1316. unsigned short device;
  1317. int type;
  1318. };
  1319. enum { NM_BLACKLISTED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 };
  1320. static struct nm256_quirk nm256_quirks[] __devinitdata = {
  1321. /* HP omnibook 4150 has cs4232 codec internally */
  1322. { .vendor = 0x103c, .device = 0x0007, .type = NM_BLACKLISTED },
  1323. /* Sony PCG-F305 */
  1324. { .vendor = 0x104d, .device = 0x8041, .type = NM_RESET_WORKAROUND },
  1325. /* Dell Latitude LS */
  1326. { .vendor = 0x1028, .device = 0x0080, .type = NM_RESET_WORKAROUND },
  1327. /* Dell Latitude CSx */
  1328. { .vendor = 0x1028, .device = 0x0091, .type = NM_RESET_WORKAROUND_2 },
  1329. { } /* terminator */
  1330. };
  1331. static int __devinit snd_nm256_probe(struct pci_dev *pci,
  1332. const struct pci_device_id *pci_id)
  1333. {
  1334. struct snd_card *card;
  1335. struct nm256 *chip;
  1336. int err;
  1337. struct nm256_quirk *q;
  1338. u16 subsystem_vendor, subsystem_device;
  1339. pci_read_config_word(pci, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vendor);
  1340. pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &subsystem_device);
  1341. for (q = nm256_quirks; q->vendor; q++) {
  1342. if (q->vendor == subsystem_vendor && q->device == subsystem_device) {
  1343. switch (q->type) {
  1344. case NM_BLACKLISTED:
  1345. printk(KERN_INFO "nm256: The device is blacklisted. "
  1346. "Loading stopped\n");
  1347. return -ENODEV;
  1348. case NM_RESET_WORKAROUND_2:
  1349. reset_workaround_2 = 1;
  1350. /* Fall-through */
  1351. case NM_RESET_WORKAROUND:
  1352. reset_workaround = 1;
  1353. break;
  1354. }
  1355. }
  1356. }
  1357. card = snd_card_new(index, id, THIS_MODULE, 0);
  1358. if (card == NULL)
  1359. return -ENOMEM;
  1360. switch (pci->device) {
  1361. case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:
  1362. strcpy(card->driver, "NM256AV");
  1363. break;
  1364. case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO:
  1365. strcpy(card->driver, "NM256ZX");
  1366. break;
  1367. case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO:
  1368. strcpy(card->driver, "NM256XL+");
  1369. break;
  1370. default:
  1371. snd_printk(KERN_ERR "invalid device id 0x%x\n", pci->device);
  1372. snd_card_free(card);
  1373. return -EINVAL;
  1374. }
  1375. if (vaio_hack)
  1376. buffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */
  1377. if (playback_bufsize < 4)
  1378. playback_bufsize = 4;
  1379. if (playback_bufsize > 128)
  1380. playback_bufsize = 128;
  1381. if (capture_bufsize < 4)
  1382. capture_bufsize = 4;
  1383. if (capture_bufsize > 128)
  1384. capture_bufsize = 128;
  1385. if ((err = snd_nm256_create(card, pci, &chip)) < 0) {
  1386. snd_card_free(card);
  1387. return err;
  1388. }
  1389. if (reset_workaround) {
  1390. snd_printdd(KERN_INFO "nm256: reset_workaround activated\n");
  1391. chip->reset_workaround = 1;
  1392. }
  1393. if (reset_workaround_2) {
  1394. snd_printdd(KERN_INFO "nm256: reset_workaround_2 activated\n");
  1395. chip->reset_workaround_2 = 1;
  1396. }
  1397. if ((err = snd_nm256_pcm(chip, 0)) < 0 ||
  1398. (err = snd_nm256_mixer(chip)) < 0) {
  1399. snd_card_free(card);
  1400. return err;
  1401. }
  1402. sprintf(card->shortname, "NeoMagic %s", card->driver);
  1403. sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d",
  1404. card->shortname,
  1405. chip->buffer_addr, chip->cport_addr, chip->irq);
  1406. if ((err = snd_card_register(card)) < 0) {
  1407. snd_card_free(card);
  1408. return err;
  1409. }
  1410. pci_set_drvdata(pci, card);
  1411. return 0;
  1412. }
  1413. static void __devexit snd_nm256_remove(struct pci_dev *pci)
  1414. {
  1415. snd_card_free(pci_get_drvdata(pci));
  1416. pci_set_drvdata(pci, NULL);
  1417. }
  1418. static struct pci_driver driver = {
  1419. .name = "NeoMagic 256",
  1420. .id_table = snd_nm256_ids,
  1421. .probe = snd_nm256_probe,
  1422. .remove = __devexit_p(snd_nm256_remove),
  1423. SND_PCI_PM_CALLBACKS
  1424. };
  1425. static int __init alsa_card_nm256_init(void)
  1426. {
  1427. return pci_register_driver(&driver);
  1428. }
  1429. static void __exit alsa_card_nm256_exit(void)
  1430. {
  1431. pci_unregister_driver(&driver);
  1432. }
  1433. module_init(alsa_card_nm256_init)
  1434. module_exit(alsa_card_nm256_exit)