cputable.c 55 KB

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  1. /*
  2. * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
  3. *
  4. * Modifications for ppc64:
  5. * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/string.h>
  13. #include <linux/sched.h>
  14. #include <linux/threads.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <asm/oprofile_impl.h>
  18. #include <asm/cputable.h>
  19. #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
  20. #include <asm/mmu.h>
  21. struct cpu_spec* cur_cpu_spec = NULL;
  22. EXPORT_SYMBOL(cur_cpu_spec);
  23. /* The platform string corresponding to the real PVR */
  24. const char *powerpc_base_platform;
  25. /* NOTE:
  26. * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
  27. * the responsibility of the appropriate CPU save/restore functions to
  28. * eventually copy these settings over. Those save/restore aren't yet
  29. * part of the cputable though. That has to be fixed for both ppc32
  30. * and ppc64
  31. */
  32. #ifdef CONFIG_PPC32
  33. extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
  34. extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
  35. extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
  36. extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
  37. extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
  38. extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
  39. extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
  40. extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
  41. extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
  42. extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
  43. extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
  44. extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
  45. extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
  46. extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
  47. extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
  48. extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
  49. extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
  50. extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
  51. extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
  52. extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
  53. #endif /* CONFIG_PPC32 */
  54. #ifdef CONFIG_PPC64
  55. extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
  56. extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
  57. extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
  58. extern void __restore_cpu_pa6t(void);
  59. extern void __restore_cpu_ppc970(void);
  60. extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
  61. extern void __restore_cpu_power7(void);
  62. #endif /* CONFIG_PPC64 */
  63. /* This table only contains "desktop" CPUs, it need to be filled with embedded
  64. * ones as well...
  65. */
  66. #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
  67. PPC_FEATURE_HAS_MMU)
  68. #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
  69. #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
  70. #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
  71. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  72. #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
  73. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  74. #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
  75. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  76. PPC_FEATURE_TRUE_LE | \
  77. PPC_FEATURE_PSERIES_PERFMON_COMPAT)
  78. #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
  79. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  80. PPC_FEATURE_TRUE_LE | \
  81. PPC_FEATURE_PSERIES_PERFMON_COMPAT)
  82. #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
  83. PPC_FEATURE_TRUE_LE | \
  84. PPC_FEATURE_HAS_ALTIVEC_COMP)
  85. #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
  86. PPC_FEATURE_BOOKE)
  87. static struct cpu_spec __initdata cpu_specs[] = {
  88. #ifdef CONFIG_PPC64
  89. { /* Power3 */
  90. .pvr_mask = 0xffff0000,
  91. .pvr_value = 0x00400000,
  92. .cpu_name = "POWER3 (630)",
  93. .cpu_features = CPU_FTRS_POWER3,
  94. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  95. .mmu_features = MMU_FTR_HPTE_TABLE,
  96. .icache_bsize = 128,
  97. .dcache_bsize = 128,
  98. .num_pmcs = 8,
  99. .pmc_type = PPC_PMC_IBM,
  100. .oprofile_cpu_type = "ppc64/power3",
  101. .oprofile_type = PPC_OPROFILE_RS64,
  102. .machine_check = machine_check_generic,
  103. .platform = "power3",
  104. },
  105. { /* Power3+ */
  106. .pvr_mask = 0xffff0000,
  107. .pvr_value = 0x00410000,
  108. .cpu_name = "POWER3 (630+)",
  109. .cpu_features = CPU_FTRS_POWER3,
  110. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  111. .mmu_features = MMU_FTR_HPTE_TABLE,
  112. .icache_bsize = 128,
  113. .dcache_bsize = 128,
  114. .num_pmcs = 8,
  115. .pmc_type = PPC_PMC_IBM,
  116. .oprofile_cpu_type = "ppc64/power3",
  117. .oprofile_type = PPC_OPROFILE_RS64,
  118. .machine_check = machine_check_generic,
  119. .platform = "power3",
  120. },
  121. { /* Northstar */
  122. .pvr_mask = 0xffff0000,
  123. .pvr_value = 0x00330000,
  124. .cpu_name = "RS64-II (northstar)",
  125. .cpu_features = CPU_FTRS_RS64,
  126. .cpu_user_features = COMMON_USER_PPC64,
  127. .mmu_features = MMU_FTR_HPTE_TABLE,
  128. .icache_bsize = 128,
  129. .dcache_bsize = 128,
  130. .num_pmcs = 8,
  131. .pmc_type = PPC_PMC_IBM,
  132. .oprofile_cpu_type = "ppc64/rs64",
  133. .oprofile_type = PPC_OPROFILE_RS64,
  134. .machine_check = machine_check_generic,
  135. .platform = "rs64",
  136. },
  137. { /* Pulsar */
  138. .pvr_mask = 0xffff0000,
  139. .pvr_value = 0x00340000,
  140. .cpu_name = "RS64-III (pulsar)",
  141. .cpu_features = CPU_FTRS_RS64,
  142. .cpu_user_features = COMMON_USER_PPC64,
  143. .mmu_features = MMU_FTR_HPTE_TABLE,
  144. .icache_bsize = 128,
  145. .dcache_bsize = 128,
  146. .num_pmcs = 8,
  147. .pmc_type = PPC_PMC_IBM,
  148. .oprofile_cpu_type = "ppc64/rs64",
  149. .oprofile_type = PPC_OPROFILE_RS64,
  150. .machine_check = machine_check_generic,
  151. .platform = "rs64",
  152. },
  153. { /* I-star */
  154. .pvr_mask = 0xffff0000,
  155. .pvr_value = 0x00360000,
  156. .cpu_name = "RS64-III (icestar)",
  157. .cpu_features = CPU_FTRS_RS64,
  158. .cpu_user_features = COMMON_USER_PPC64,
  159. .mmu_features = MMU_FTR_HPTE_TABLE,
  160. .icache_bsize = 128,
  161. .dcache_bsize = 128,
  162. .num_pmcs = 8,
  163. .pmc_type = PPC_PMC_IBM,
  164. .oprofile_cpu_type = "ppc64/rs64",
  165. .oprofile_type = PPC_OPROFILE_RS64,
  166. .machine_check = machine_check_generic,
  167. .platform = "rs64",
  168. },
  169. { /* S-star */
  170. .pvr_mask = 0xffff0000,
  171. .pvr_value = 0x00370000,
  172. .cpu_name = "RS64-IV (sstar)",
  173. .cpu_features = CPU_FTRS_RS64,
  174. .cpu_user_features = COMMON_USER_PPC64,
  175. .mmu_features = MMU_FTR_HPTE_TABLE,
  176. .icache_bsize = 128,
  177. .dcache_bsize = 128,
  178. .num_pmcs = 8,
  179. .pmc_type = PPC_PMC_IBM,
  180. .oprofile_cpu_type = "ppc64/rs64",
  181. .oprofile_type = PPC_OPROFILE_RS64,
  182. .machine_check = machine_check_generic,
  183. .platform = "rs64",
  184. },
  185. { /* Power4 */
  186. .pvr_mask = 0xffff0000,
  187. .pvr_value = 0x00350000,
  188. .cpu_name = "POWER4 (gp)",
  189. .cpu_features = CPU_FTRS_POWER4,
  190. .cpu_user_features = COMMON_USER_POWER4,
  191. .mmu_features = MMU_FTR_HPTE_TABLE,
  192. .icache_bsize = 128,
  193. .dcache_bsize = 128,
  194. .num_pmcs = 8,
  195. .pmc_type = PPC_PMC_IBM,
  196. .oprofile_cpu_type = "ppc64/power4",
  197. .oprofile_type = PPC_OPROFILE_POWER4,
  198. .machine_check = machine_check_generic,
  199. .platform = "power4",
  200. },
  201. { /* Power4+ */
  202. .pvr_mask = 0xffff0000,
  203. .pvr_value = 0x00380000,
  204. .cpu_name = "POWER4+ (gq)",
  205. .cpu_features = CPU_FTRS_POWER4,
  206. .cpu_user_features = COMMON_USER_POWER4,
  207. .mmu_features = MMU_FTR_HPTE_TABLE,
  208. .icache_bsize = 128,
  209. .dcache_bsize = 128,
  210. .num_pmcs = 8,
  211. .pmc_type = PPC_PMC_IBM,
  212. .oprofile_cpu_type = "ppc64/power4",
  213. .oprofile_type = PPC_OPROFILE_POWER4,
  214. .machine_check = machine_check_generic,
  215. .platform = "power4",
  216. },
  217. { /* PPC970 */
  218. .pvr_mask = 0xffff0000,
  219. .pvr_value = 0x00390000,
  220. .cpu_name = "PPC970",
  221. .cpu_features = CPU_FTRS_PPC970,
  222. .cpu_user_features = COMMON_USER_POWER4 |
  223. PPC_FEATURE_HAS_ALTIVEC_COMP,
  224. .mmu_features = MMU_FTR_HPTE_TABLE,
  225. .icache_bsize = 128,
  226. .dcache_bsize = 128,
  227. .num_pmcs = 8,
  228. .pmc_type = PPC_PMC_IBM,
  229. .cpu_setup = __setup_cpu_ppc970,
  230. .cpu_restore = __restore_cpu_ppc970,
  231. .oprofile_cpu_type = "ppc64/970",
  232. .oprofile_type = PPC_OPROFILE_POWER4,
  233. .machine_check = machine_check_generic,
  234. .platform = "ppc970",
  235. },
  236. { /* PPC970FX */
  237. .pvr_mask = 0xffff0000,
  238. .pvr_value = 0x003c0000,
  239. .cpu_name = "PPC970FX",
  240. .cpu_features = CPU_FTRS_PPC970,
  241. .cpu_user_features = COMMON_USER_POWER4 |
  242. PPC_FEATURE_HAS_ALTIVEC_COMP,
  243. .mmu_features = MMU_FTR_HPTE_TABLE,
  244. .icache_bsize = 128,
  245. .dcache_bsize = 128,
  246. .num_pmcs = 8,
  247. .pmc_type = PPC_PMC_IBM,
  248. .cpu_setup = __setup_cpu_ppc970,
  249. .cpu_restore = __restore_cpu_ppc970,
  250. .oprofile_cpu_type = "ppc64/970",
  251. .oprofile_type = PPC_OPROFILE_POWER4,
  252. .machine_check = machine_check_generic,
  253. .platform = "ppc970",
  254. },
  255. { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
  256. .pvr_mask = 0xffffffff,
  257. .pvr_value = 0x00440100,
  258. .cpu_name = "PPC970MP",
  259. .cpu_features = CPU_FTRS_PPC970,
  260. .cpu_user_features = COMMON_USER_POWER4 |
  261. PPC_FEATURE_HAS_ALTIVEC_COMP,
  262. .mmu_features = MMU_FTR_HPTE_TABLE,
  263. .icache_bsize = 128,
  264. .dcache_bsize = 128,
  265. .num_pmcs = 8,
  266. .pmc_type = PPC_PMC_IBM,
  267. .cpu_setup = __setup_cpu_ppc970,
  268. .cpu_restore = __restore_cpu_ppc970,
  269. .oprofile_cpu_type = "ppc64/970MP",
  270. .oprofile_type = PPC_OPROFILE_POWER4,
  271. .machine_check = machine_check_generic,
  272. .platform = "ppc970",
  273. },
  274. { /* PPC970MP */
  275. .pvr_mask = 0xffff0000,
  276. .pvr_value = 0x00440000,
  277. .cpu_name = "PPC970MP",
  278. .cpu_features = CPU_FTRS_PPC970,
  279. .cpu_user_features = COMMON_USER_POWER4 |
  280. PPC_FEATURE_HAS_ALTIVEC_COMP,
  281. .mmu_features = MMU_FTR_HPTE_TABLE,
  282. .icache_bsize = 128,
  283. .dcache_bsize = 128,
  284. .num_pmcs = 8,
  285. .pmc_type = PPC_PMC_IBM,
  286. .cpu_setup = __setup_cpu_ppc970MP,
  287. .cpu_restore = __restore_cpu_ppc970,
  288. .oprofile_cpu_type = "ppc64/970MP",
  289. .oprofile_type = PPC_OPROFILE_POWER4,
  290. .machine_check = machine_check_generic,
  291. .platform = "ppc970",
  292. },
  293. { /* PPC970GX */
  294. .pvr_mask = 0xffff0000,
  295. .pvr_value = 0x00450000,
  296. .cpu_name = "PPC970GX",
  297. .cpu_features = CPU_FTRS_PPC970,
  298. .cpu_user_features = COMMON_USER_POWER4 |
  299. PPC_FEATURE_HAS_ALTIVEC_COMP,
  300. .mmu_features = MMU_FTR_HPTE_TABLE,
  301. .icache_bsize = 128,
  302. .dcache_bsize = 128,
  303. .num_pmcs = 8,
  304. .pmc_type = PPC_PMC_IBM,
  305. .cpu_setup = __setup_cpu_ppc970,
  306. .oprofile_cpu_type = "ppc64/970",
  307. .oprofile_type = PPC_OPROFILE_POWER4,
  308. .machine_check = machine_check_generic,
  309. .platform = "ppc970",
  310. },
  311. { /* Power5 GR */
  312. .pvr_mask = 0xffff0000,
  313. .pvr_value = 0x003a0000,
  314. .cpu_name = "POWER5 (gr)",
  315. .cpu_features = CPU_FTRS_POWER5,
  316. .cpu_user_features = COMMON_USER_POWER5,
  317. .mmu_features = MMU_FTR_HPTE_TABLE,
  318. .icache_bsize = 128,
  319. .dcache_bsize = 128,
  320. .num_pmcs = 6,
  321. .pmc_type = PPC_PMC_IBM,
  322. .oprofile_cpu_type = "ppc64/power5",
  323. .oprofile_type = PPC_OPROFILE_POWER4,
  324. /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
  325. * and above but only works on POWER5 and above
  326. */
  327. .oprofile_mmcra_sihv = MMCRA_SIHV,
  328. .oprofile_mmcra_sipr = MMCRA_SIPR,
  329. .machine_check = machine_check_generic,
  330. .platform = "power5",
  331. },
  332. { /* Power5++ */
  333. .pvr_mask = 0xffffff00,
  334. .pvr_value = 0x003b0300,
  335. .cpu_name = "POWER5+ (gs)",
  336. .cpu_features = CPU_FTRS_POWER5,
  337. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  338. .mmu_features = MMU_FTR_HPTE_TABLE,
  339. .icache_bsize = 128,
  340. .dcache_bsize = 128,
  341. .num_pmcs = 6,
  342. .oprofile_cpu_type = "ppc64/power5++",
  343. .oprofile_type = PPC_OPROFILE_POWER4,
  344. .oprofile_mmcra_sihv = MMCRA_SIHV,
  345. .oprofile_mmcra_sipr = MMCRA_SIPR,
  346. .machine_check = machine_check_generic,
  347. .platform = "power5+",
  348. },
  349. { /* Power5 GS */
  350. .pvr_mask = 0xffff0000,
  351. .pvr_value = 0x003b0000,
  352. .cpu_name = "POWER5+ (gs)",
  353. .cpu_features = CPU_FTRS_POWER5,
  354. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  355. .mmu_features = MMU_FTR_HPTE_TABLE,
  356. .icache_bsize = 128,
  357. .dcache_bsize = 128,
  358. .num_pmcs = 6,
  359. .pmc_type = PPC_PMC_IBM,
  360. .oprofile_cpu_type = "ppc64/power5+",
  361. .oprofile_type = PPC_OPROFILE_POWER4,
  362. .oprofile_mmcra_sihv = MMCRA_SIHV,
  363. .oprofile_mmcra_sipr = MMCRA_SIPR,
  364. .machine_check = machine_check_generic,
  365. .platform = "power5+",
  366. },
  367. { /* POWER6 in P5+ mode; 2.04-compliant processor */
  368. .pvr_mask = 0xffffffff,
  369. .pvr_value = 0x0f000001,
  370. .cpu_name = "POWER5+",
  371. .cpu_features = CPU_FTRS_POWER5,
  372. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  373. .mmu_features = MMU_FTR_HPTE_TABLE,
  374. .icache_bsize = 128,
  375. .dcache_bsize = 128,
  376. .machine_check = machine_check_generic,
  377. .oprofile_cpu_type = "ppc64/compat-power5+",
  378. .platform = "power5+",
  379. },
  380. { /* Power6 */
  381. .pvr_mask = 0xffff0000,
  382. .pvr_value = 0x003e0000,
  383. .cpu_name = "POWER6 (raw)",
  384. .cpu_features = CPU_FTRS_POWER6,
  385. .cpu_user_features = COMMON_USER_POWER6 |
  386. PPC_FEATURE_POWER6_EXT,
  387. .mmu_features = MMU_FTR_HPTE_TABLE,
  388. .icache_bsize = 128,
  389. .dcache_bsize = 128,
  390. .num_pmcs = 6,
  391. .pmc_type = PPC_PMC_IBM,
  392. .oprofile_cpu_type = "ppc64/power6",
  393. .oprofile_type = PPC_OPROFILE_POWER4,
  394. .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
  395. .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
  396. .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
  397. POWER6_MMCRA_OTHER,
  398. .machine_check = machine_check_generic,
  399. .platform = "power6x",
  400. },
  401. { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
  402. .pvr_mask = 0xffffffff,
  403. .pvr_value = 0x0f000002,
  404. .cpu_name = "POWER6 (architected)",
  405. .cpu_features = CPU_FTRS_POWER6,
  406. .cpu_user_features = COMMON_USER_POWER6,
  407. .mmu_features = MMU_FTR_HPTE_TABLE,
  408. .icache_bsize = 128,
  409. .dcache_bsize = 128,
  410. .machine_check = machine_check_generic,
  411. .oprofile_cpu_type = "ppc64/compat-power6",
  412. .platform = "power6",
  413. },
  414. { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
  415. .pvr_mask = 0xffffffff,
  416. .pvr_value = 0x0f000003,
  417. .cpu_name = "POWER7 (architected)",
  418. .cpu_features = CPU_FTRS_POWER7,
  419. .cpu_user_features = COMMON_USER_POWER7,
  420. .mmu_features = MMU_FTR_HPTE_TABLE,
  421. .icache_bsize = 128,
  422. .dcache_bsize = 128,
  423. .machine_check = machine_check_generic,
  424. .oprofile_cpu_type = "ppc64/compat-power7",
  425. .platform = "power7",
  426. },
  427. { /* Power7 */
  428. .pvr_mask = 0xffff0000,
  429. .pvr_value = 0x003f0000,
  430. .cpu_name = "POWER7 (raw)",
  431. .cpu_features = CPU_FTRS_POWER7,
  432. .cpu_user_features = COMMON_USER_POWER7,
  433. .mmu_features = MMU_FTR_HPTE_TABLE,
  434. .icache_bsize = 128,
  435. .dcache_bsize = 128,
  436. .num_pmcs = 6,
  437. .pmc_type = PPC_PMC_IBM,
  438. .cpu_setup = __setup_cpu_power7,
  439. .cpu_restore = __restore_cpu_power7,
  440. .oprofile_cpu_type = "ppc64/power7",
  441. .oprofile_type = PPC_OPROFILE_POWER4,
  442. .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
  443. .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
  444. .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
  445. POWER6_MMCRA_OTHER,
  446. .platform = "power7",
  447. },
  448. { /* Cell Broadband Engine */
  449. .pvr_mask = 0xffff0000,
  450. .pvr_value = 0x00700000,
  451. .cpu_name = "Cell Broadband Engine",
  452. .cpu_features = CPU_FTRS_CELL,
  453. .cpu_user_features = COMMON_USER_PPC64 |
  454. PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
  455. PPC_FEATURE_SMT,
  456. .mmu_features = MMU_FTR_HPTE_TABLE,
  457. .icache_bsize = 128,
  458. .dcache_bsize = 128,
  459. .num_pmcs = 4,
  460. .pmc_type = PPC_PMC_IBM,
  461. .oprofile_cpu_type = "ppc64/cell-be",
  462. .oprofile_type = PPC_OPROFILE_CELL,
  463. .machine_check = machine_check_generic,
  464. .platform = "ppc-cell-be",
  465. },
  466. { /* PA Semi PA6T */
  467. .pvr_mask = 0x7fff0000,
  468. .pvr_value = 0x00900000,
  469. .cpu_name = "PA6T",
  470. .cpu_features = CPU_FTRS_PA6T,
  471. .cpu_user_features = COMMON_USER_PA6T,
  472. .mmu_features = MMU_FTR_HPTE_TABLE,
  473. .icache_bsize = 64,
  474. .dcache_bsize = 64,
  475. .num_pmcs = 6,
  476. .pmc_type = PPC_PMC_PA6T,
  477. .cpu_setup = __setup_cpu_pa6t,
  478. .cpu_restore = __restore_cpu_pa6t,
  479. .oprofile_cpu_type = "ppc64/pa6t",
  480. .oprofile_type = PPC_OPROFILE_PA6T,
  481. .machine_check = machine_check_generic,
  482. .platform = "pa6t",
  483. },
  484. { /* default match */
  485. .pvr_mask = 0x00000000,
  486. .pvr_value = 0x00000000,
  487. .cpu_name = "POWER4 (compatible)",
  488. .cpu_features = CPU_FTRS_COMPATIBLE,
  489. .cpu_user_features = COMMON_USER_PPC64,
  490. .mmu_features = MMU_FTR_HPTE_TABLE,
  491. .icache_bsize = 128,
  492. .dcache_bsize = 128,
  493. .num_pmcs = 6,
  494. .pmc_type = PPC_PMC_IBM,
  495. .machine_check = machine_check_generic,
  496. .platform = "power4",
  497. }
  498. #endif /* CONFIG_PPC64 */
  499. #ifdef CONFIG_PPC32
  500. #if CLASSIC_PPC
  501. { /* 601 */
  502. .pvr_mask = 0xffff0000,
  503. .pvr_value = 0x00010000,
  504. .cpu_name = "601",
  505. .cpu_features = CPU_FTRS_PPC601,
  506. .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
  507. PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
  508. .mmu_features = MMU_FTR_HPTE_TABLE,
  509. .icache_bsize = 32,
  510. .dcache_bsize = 32,
  511. .machine_check = machine_check_generic,
  512. .platform = "ppc601",
  513. },
  514. { /* 603 */
  515. .pvr_mask = 0xffff0000,
  516. .pvr_value = 0x00030000,
  517. .cpu_name = "603",
  518. .cpu_features = CPU_FTRS_603,
  519. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  520. .mmu_features = 0,
  521. .icache_bsize = 32,
  522. .dcache_bsize = 32,
  523. .cpu_setup = __setup_cpu_603,
  524. .machine_check = machine_check_generic,
  525. .platform = "ppc603",
  526. },
  527. { /* 603e */
  528. .pvr_mask = 0xffff0000,
  529. .pvr_value = 0x00060000,
  530. .cpu_name = "603e",
  531. .cpu_features = CPU_FTRS_603,
  532. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  533. .mmu_features = 0,
  534. .icache_bsize = 32,
  535. .dcache_bsize = 32,
  536. .cpu_setup = __setup_cpu_603,
  537. .machine_check = machine_check_generic,
  538. .platform = "ppc603",
  539. },
  540. { /* 603ev */
  541. .pvr_mask = 0xffff0000,
  542. .pvr_value = 0x00070000,
  543. .cpu_name = "603ev",
  544. .cpu_features = CPU_FTRS_603,
  545. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  546. .mmu_features = 0,
  547. .icache_bsize = 32,
  548. .dcache_bsize = 32,
  549. .cpu_setup = __setup_cpu_603,
  550. .machine_check = machine_check_generic,
  551. .platform = "ppc603",
  552. },
  553. { /* 604 */
  554. .pvr_mask = 0xffff0000,
  555. .pvr_value = 0x00040000,
  556. .cpu_name = "604",
  557. .cpu_features = CPU_FTRS_604,
  558. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  559. .mmu_features = MMU_FTR_HPTE_TABLE,
  560. .icache_bsize = 32,
  561. .dcache_bsize = 32,
  562. .num_pmcs = 2,
  563. .cpu_setup = __setup_cpu_604,
  564. .machine_check = machine_check_generic,
  565. .platform = "ppc604",
  566. },
  567. { /* 604e */
  568. .pvr_mask = 0xfffff000,
  569. .pvr_value = 0x00090000,
  570. .cpu_name = "604e",
  571. .cpu_features = CPU_FTRS_604,
  572. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  573. .mmu_features = MMU_FTR_HPTE_TABLE,
  574. .icache_bsize = 32,
  575. .dcache_bsize = 32,
  576. .num_pmcs = 4,
  577. .cpu_setup = __setup_cpu_604,
  578. .machine_check = machine_check_generic,
  579. .platform = "ppc604",
  580. },
  581. { /* 604r */
  582. .pvr_mask = 0xffff0000,
  583. .pvr_value = 0x00090000,
  584. .cpu_name = "604r",
  585. .cpu_features = CPU_FTRS_604,
  586. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  587. .mmu_features = MMU_FTR_HPTE_TABLE,
  588. .icache_bsize = 32,
  589. .dcache_bsize = 32,
  590. .num_pmcs = 4,
  591. .cpu_setup = __setup_cpu_604,
  592. .machine_check = machine_check_generic,
  593. .platform = "ppc604",
  594. },
  595. { /* 604ev */
  596. .pvr_mask = 0xffff0000,
  597. .pvr_value = 0x000a0000,
  598. .cpu_name = "604ev",
  599. .cpu_features = CPU_FTRS_604,
  600. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  601. .mmu_features = MMU_FTR_HPTE_TABLE,
  602. .icache_bsize = 32,
  603. .dcache_bsize = 32,
  604. .num_pmcs = 4,
  605. .cpu_setup = __setup_cpu_604,
  606. .machine_check = machine_check_generic,
  607. .platform = "ppc604",
  608. },
  609. { /* 740/750 (0x4202, don't support TAU ?) */
  610. .pvr_mask = 0xffffffff,
  611. .pvr_value = 0x00084202,
  612. .cpu_name = "740/750",
  613. .cpu_features = CPU_FTRS_740_NOTAU,
  614. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  615. .mmu_features = MMU_FTR_HPTE_TABLE,
  616. .icache_bsize = 32,
  617. .dcache_bsize = 32,
  618. .num_pmcs = 4,
  619. .cpu_setup = __setup_cpu_750,
  620. .machine_check = machine_check_generic,
  621. .platform = "ppc750",
  622. },
  623. { /* 750CX (80100 and 8010x?) */
  624. .pvr_mask = 0xfffffff0,
  625. .pvr_value = 0x00080100,
  626. .cpu_name = "750CX",
  627. .cpu_features = CPU_FTRS_750,
  628. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  629. .mmu_features = MMU_FTR_HPTE_TABLE,
  630. .icache_bsize = 32,
  631. .dcache_bsize = 32,
  632. .num_pmcs = 4,
  633. .cpu_setup = __setup_cpu_750cx,
  634. .machine_check = machine_check_generic,
  635. .platform = "ppc750",
  636. },
  637. { /* 750CX (82201 and 82202) */
  638. .pvr_mask = 0xfffffff0,
  639. .pvr_value = 0x00082200,
  640. .cpu_name = "750CX",
  641. .cpu_features = CPU_FTRS_750,
  642. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  643. .mmu_features = MMU_FTR_HPTE_TABLE,
  644. .icache_bsize = 32,
  645. .dcache_bsize = 32,
  646. .num_pmcs = 4,
  647. .pmc_type = PPC_PMC_IBM,
  648. .cpu_setup = __setup_cpu_750cx,
  649. .machine_check = machine_check_generic,
  650. .platform = "ppc750",
  651. },
  652. { /* 750CXe (82214) */
  653. .pvr_mask = 0xfffffff0,
  654. .pvr_value = 0x00082210,
  655. .cpu_name = "750CXe",
  656. .cpu_features = CPU_FTRS_750,
  657. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  658. .mmu_features = MMU_FTR_HPTE_TABLE,
  659. .icache_bsize = 32,
  660. .dcache_bsize = 32,
  661. .num_pmcs = 4,
  662. .pmc_type = PPC_PMC_IBM,
  663. .cpu_setup = __setup_cpu_750cx,
  664. .machine_check = machine_check_generic,
  665. .platform = "ppc750",
  666. },
  667. { /* 750CXe "Gekko" (83214) */
  668. .pvr_mask = 0xffffffff,
  669. .pvr_value = 0x00083214,
  670. .cpu_name = "750CXe",
  671. .cpu_features = CPU_FTRS_750,
  672. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  673. .mmu_features = MMU_FTR_HPTE_TABLE,
  674. .icache_bsize = 32,
  675. .dcache_bsize = 32,
  676. .num_pmcs = 4,
  677. .pmc_type = PPC_PMC_IBM,
  678. .cpu_setup = __setup_cpu_750cx,
  679. .machine_check = machine_check_generic,
  680. .platform = "ppc750",
  681. },
  682. { /* 750CL */
  683. .pvr_mask = 0xfffff0f0,
  684. .pvr_value = 0x00087010,
  685. .cpu_name = "750CL",
  686. .cpu_features = CPU_FTRS_750CL,
  687. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  688. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  689. .icache_bsize = 32,
  690. .dcache_bsize = 32,
  691. .num_pmcs = 4,
  692. .pmc_type = PPC_PMC_IBM,
  693. .cpu_setup = __setup_cpu_750,
  694. .machine_check = machine_check_generic,
  695. .platform = "ppc750",
  696. },
  697. { /* 745/755 */
  698. .pvr_mask = 0xfffff000,
  699. .pvr_value = 0x00083000,
  700. .cpu_name = "745/755",
  701. .cpu_features = CPU_FTRS_750,
  702. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  703. .mmu_features = MMU_FTR_HPTE_TABLE,
  704. .icache_bsize = 32,
  705. .dcache_bsize = 32,
  706. .num_pmcs = 4,
  707. .pmc_type = PPC_PMC_IBM,
  708. .cpu_setup = __setup_cpu_750,
  709. .machine_check = machine_check_generic,
  710. .platform = "ppc750",
  711. },
  712. { /* 750FX rev 1.x */
  713. .pvr_mask = 0xffffff00,
  714. .pvr_value = 0x70000100,
  715. .cpu_name = "750FX",
  716. .cpu_features = CPU_FTRS_750FX1,
  717. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  718. .mmu_features = MMU_FTR_HPTE_TABLE,
  719. .icache_bsize = 32,
  720. .dcache_bsize = 32,
  721. .num_pmcs = 4,
  722. .pmc_type = PPC_PMC_IBM,
  723. .cpu_setup = __setup_cpu_750,
  724. .machine_check = machine_check_generic,
  725. .platform = "ppc750",
  726. },
  727. { /* 750FX rev 2.0 must disable HID0[DPM] */
  728. .pvr_mask = 0xffffffff,
  729. .pvr_value = 0x70000200,
  730. .cpu_name = "750FX",
  731. .cpu_features = CPU_FTRS_750FX2,
  732. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  733. .mmu_features = MMU_FTR_HPTE_TABLE,
  734. .icache_bsize = 32,
  735. .dcache_bsize = 32,
  736. .num_pmcs = 4,
  737. .pmc_type = PPC_PMC_IBM,
  738. .cpu_setup = __setup_cpu_750,
  739. .machine_check = machine_check_generic,
  740. .platform = "ppc750",
  741. },
  742. { /* 750FX (All revs except 2.0) */
  743. .pvr_mask = 0xffff0000,
  744. .pvr_value = 0x70000000,
  745. .cpu_name = "750FX",
  746. .cpu_features = CPU_FTRS_750FX,
  747. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  748. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  749. .icache_bsize = 32,
  750. .dcache_bsize = 32,
  751. .num_pmcs = 4,
  752. .pmc_type = PPC_PMC_IBM,
  753. .cpu_setup = __setup_cpu_750fx,
  754. .machine_check = machine_check_generic,
  755. .platform = "ppc750",
  756. },
  757. { /* 750GX */
  758. .pvr_mask = 0xffff0000,
  759. .pvr_value = 0x70020000,
  760. .cpu_name = "750GX",
  761. .cpu_features = CPU_FTRS_750GX,
  762. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  763. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  764. .icache_bsize = 32,
  765. .dcache_bsize = 32,
  766. .num_pmcs = 4,
  767. .pmc_type = PPC_PMC_IBM,
  768. .cpu_setup = __setup_cpu_750fx,
  769. .machine_check = machine_check_generic,
  770. .platform = "ppc750",
  771. },
  772. { /* 740/750 (L2CR bit need fixup for 740) */
  773. .pvr_mask = 0xffff0000,
  774. .pvr_value = 0x00080000,
  775. .cpu_name = "740/750",
  776. .cpu_features = CPU_FTRS_740,
  777. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  778. .mmu_features = MMU_FTR_HPTE_TABLE,
  779. .icache_bsize = 32,
  780. .dcache_bsize = 32,
  781. .num_pmcs = 4,
  782. .pmc_type = PPC_PMC_IBM,
  783. .cpu_setup = __setup_cpu_750,
  784. .machine_check = machine_check_generic,
  785. .platform = "ppc750",
  786. },
  787. { /* 7400 rev 1.1 ? (no TAU) */
  788. .pvr_mask = 0xffffffff,
  789. .pvr_value = 0x000c1101,
  790. .cpu_name = "7400 (1.1)",
  791. .cpu_features = CPU_FTRS_7400_NOTAU,
  792. .cpu_user_features = COMMON_USER |
  793. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  794. .mmu_features = MMU_FTR_HPTE_TABLE,
  795. .icache_bsize = 32,
  796. .dcache_bsize = 32,
  797. .num_pmcs = 4,
  798. .pmc_type = PPC_PMC_G4,
  799. .cpu_setup = __setup_cpu_7400,
  800. .machine_check = machine_check_generic,
  801. .platform = "ppc7400",
  802. },
  803. { /* 7400 */
  804. .pvr_mask = 0xffff0000,
  805. .pvr_value = 0x000c0000,
  806. .cpu_name = "7400",
  807. .cpu_features = CPU_FTRS_7400,
  808. .cpu_user_features = COMMON_USER |
  809. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  810. .mmu_features = MMU_FTR_HPTE_TABLE,
  811. .icache_bsize = 32,
  812. .dcache_bsize = 32,
  813. .num_pmcs = 4,
  814. .pmc_type = PPC_PMC_G4,
  815. .cpu_setup = __setup_cpu_7400,
  816. .machine_check = machine_check_generic,
  817. .platform = "ppc7400",
  818. },
  819. { /* 7410 */
  820. .pvr_mask = 0xffff0000,
  821. .pvr_value = 0x800c0000,
  822. .cpu_name = "7410",
  823. .cpu_features = CPU_FTRS_7400,
  824. .cpu_user_features = COMMON_USER |
  825. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  826. .mmu_features = MMU_FTR_HPTE_TABLE,
  827. .icache_bsize = 32,
  828. .dcache_bsize = 32,
  829. .num_pmcs = 4,
  830. .pmc_type = PPC_PMC_G4,
  831. .cpu_setup = __setup_cpu_7410,
  832. .machine_check = machine_check_generic,
  833. .platform = "ppc7400",
  834. },
  835. { /* 7450 2.0 - no doze/nap */
  836. .pvr_mask = 0xffffffff,
  837. .pvr_value = 0x80000200,
  838. .cpu_name = "7450",
  839. .cpu_features = CPU_FTRS_7450_20,
  840. .cpu_user_features = COMMON_USER |
  841. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  842. .mmu_features = MMU_FTR_HPTE_TABLE,
  843. .icache_bsize = 32,
  844. .dcache_bsize = 32,
  845. .num_pmcs = 6,
  846. .pmc_type = PPC_PMC_G4,
  847. .cpu_setup = __setup_cpu_745x,
  848. .oprofile_cpu_type = "ppc/7450",
  849. .oprofile_type = PPC_OPROFILE_G4,
  850. .machine_check = machine_check_generic,
  851. .platform = "ppc7450",
  852. },
  853. { /* 7450 2.1 */
  854. .pvr_mask = 0xffffffff,
  855. .pvr_value = 0x80000201,
  856. .cpu_name = "7450",
  857. .cpu_features = CPU_FTRS_7450_21,
  858. .cpu_user_features = COMMON_USER |
  859. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  860. .mmu_features = MMU_FTR_HPTE_TABLE,
  861. .icache_bsize = 32,
  862. .dcache_bsize = 32,
  863. .num_pmcs = 6,
  864. .pmc_type = PPC_PMC_G4,
  865. .cpu_setup = __setup_cpu_745x,
  866. .oprofile_cpu_type = "ppc/7450",
  867. .oprofile_type = PPC_OPROFILE_G4,
  868. .machine_check = machine_check_generic,
  869. .platform = "ppc7450",
  870. },
  871. { /* 7450 2.3 and newer */
  872. .pvr_mask = 0xffff0000,
  873. .pvr_value = 0x80000000,
  874. .cpu_name = "7450",
  875. .cpu_features = CPU_FTRS_7450_23,
  876. .cpu_user_features = COMMON_USER |
  877. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  878. .mmu_features = MMU_FTR_HPTE_TABLE,
  879. .icache_bsize = 32,
  880. .dcache_bsize = 32,
  881. .num_pmcs = 6,
  882. .pmc_type = PPC_PMC_G4,
  883. .cpu_setup = __setup_cpu_745x,
  884. .oprofile_cpu_type = "ppc/7450",
  885. .oprofile_type = PPC_OPROFILE_G4,
  886. .machine_check = machine_check_generic,
  887. .platform = "ppc7450",
  888. },
  889. { /* 7455 rev 1.x */
  890. .pvr_mask = 0xffffff00,
  891. .pvr_value = 0x80010100,
  892. .cpu_name = "7455",
  893. .cpu_features = CPU_FTRS_7455_1,
  894. .cpu_user_features = COMMON_USER |
  895. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  896. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  897. .icache_bsize = 32,
  898. .dcache_bsize = 32,
  899. .num_pmcs = 6,
  900. .pmc_type = PPC_PMC_G4,
  901. .cpu_setup = __setup_cpu_745x,
  902. .oprofile_cpu_type = "ppc/7450",
  903. .oprofile_type = PPC_OPROFILE_G4,
  904. .machine_check = machine_check_generic,
  905. .platform = "ppc7450",
  906. },
  907. { /* 7455 rev 2.0 */
  908. .pvr_mask = 0xffffffff,
  909. .pvr_value = 0x80010200,
  910. .cpu_name = "7455",
  911. .cpu_features = CPU_FTRS_7455_20,
  912. .cpu_user_features = COMMON_USER |
  913. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  914. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  915. .icache_bsize = 32,
  916. .dcache_bsize = 32,
  917. .num_pmcs = 6,
  918. .pmc_type = PPC_PMC_G4,
  919. .cpu_setup = __setup_cpu_745x,
  920. .oprofile_cpu_type = "ppc/7450",
  921. .oprofile_type = PPC_OPROFILE_G4,
  922. .machine_check = machine_check_generic,
  923. .platform = "ppc7450",
  924. },
  925. { /* 7455 others */
  926. .pvr_mask = 0xffff0000,
  927. .pvr_value = 0x80010000,
  928. .cpu_name = "7455",
  929. .cpu_features = CPU_FTRS_7455,
  930. .cpu_user_features = COMMON_USER |
  931. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  932. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  933. .icache_bsize = 32,
  934. .dcache_bsize = 32,
  935. .num_pmcs = 6,
  936. .pmc_type = PPC_PMC_G4,
  937. .cpu_setup = __setup_cpu_745x,
  938. .oprofile_cpu_type = "ppc/7450",
  939. .oprofile_type = PPC_OPROFILE_G4,
  940. .machine_check = machine_check_generic,
  941. .platform = "ppc7450",
  942. },
  943. { /* 7447/7457 Rev 1.0 */
  944. .pvr_mask = 0xffffffff,
  945. .pvr_value = 0x80020100,
  946. .cpu_name = "7447/7457",
  947. .cpu_features = CPU_FTRS_7447_10,
  948. .cpu_user_features = COMMON_USER |
  949. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  950. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  951. .icache_bsize = 32,
  952. .dcache_bsize = 32,
  953. .num_pmcs = 6,
  954. .pmc_type = PPC_PMC_G4,
  955. .cpu_setup = __setup_cpu_745x,
  956. .oprofile_cpu_type = "ppc/7450",
  957. .oprofile_type = PPC_OPROFILE_G4,
  958. .machine_check = machine_check_generic,
  959. .platform = "ppc7450",
  960. },
  961. { /* 7447/7457 Rev 1.1 */
  962. .pvr_mask = 0xffffffff,
  963. .pvr_value = 0x80020101,
  964. .cpu_name = "7447/7457",
  965. .cpu_features = CPU_FTRS_7447_10,
  966. .cpu_user_features = COMMON_USER |
  967. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  968. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  969. .icache_bsize = 32,
  970. .dcache_bsize = 32,
  971. .num_pmcs = 6,
  972. .pmc_type = PPC_PMC_G4,
  973. .cpu_setup = __setup_cpu_745x,
  974. .oprofile_cpu_type = "ppc/7450",
  975. .oprofile_type = PPC_OPROFILE_G4,
  976. .machine_check = machine_check_generic,
  977. .platform = "ppc7450",
  978. },
  979. { /* 7447/7457 Rev 1.2 and later */
  980. .pvr_mask = 0xffff0000,
  981. .pvr_value = 0x80020000,
  982. .cpu_name = "7447/7457",
  983. .cpu_features = CPU_FTRS_7447,
  984. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  985. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  986. .icache_bsize = 32,
  987. .dcache_bsize = 32,
  988. .num_pmcs = 6,
  989. .pmc_type = PPC_PMC_G4,
  990. .cpu_setup = __setup_cpu_745x,
  991. .oprofile_cpu_type = "ppc/7450",
  992. .oprofile_type = PPC_OPROFILE_G4,
  993. .machine_check = machine_check_generic,
  994. .platform = "ppc7450",
  995. },
  996. { /* 7447A */
  997. .pvr_mask = 0xffff0000,
  998. .pvr_value = 0x80030000,
  999. .cpu_name = "7447A",
  1000. .cpu_features = CPU_FTRS_7447A,
  1001. .cpu_user_features = COMMON_USER |
  1002. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1003. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1004. .icache_bsize = 32,
  1005. .dcache_bsize = 32,
  1006. .num_pmcs = 6,
  1007. .pmc_type = PPC_PMC_G4,
  1008. .cpu_setup = __setup_cpu_745x,
  1009. .oprofile_cpu_type = "ppc/7450",
  1010. .oprofile_type = PPC_OPROFILE_G4,
  1011. .machine_check = machine_check_generic,
  1012. .platform = "ppc7450",
  1013. },
  1014. { /* 7448 */
  1015. .pvr_mask = 0xffff0000,
  1016. .pvr_value = 0x80040000,
  1017. .cpu_name = "7448",
  1018. .cpu_features = CPU_FTRS_7448,
  1019. .cpu_user_features = COMMON_USER |
  1020. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1021. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1022. .icache_bsize = 32,
  1023. .dcache_bsize = 32,
  1024. .num_pmcs = 6,
  1025. .pmc_type = PPC_PMC_G4,
  1026. .cpu_setup = __setup_cpu_745x,
  1027. .oprofile_cpu_type = "ppc/7450",
  1028. .oprofile_type = PPC_OPROFILE_G4,
  1029. .machine_check = machine_check_generic,
  1030. .platform = "ppc7450",
  1031. },
  1032. { /* 82xx (8240, 8245, 8260 are all 603e cores) */
  1033. .pvr_mask = 0x7fff0000,
  1034. .pvr_value = 0x00810000,
  1035. .cpu_name = "82xx",
  1036. .cpu_features = CPU_FTRS_82XX,
  1037. .cpu_user_features = COMMON_USER,
  1038. .mmu_features = 0,
  1039. .icache_bsize = 32,
  1040. .dcache_bsize = 32,
  1041. .cpu_setup = __setup_cpu_603,
  1042. .machine_check = machine_check_generic,
  1043. .platform = "ppc603",
  1044. },
  1045. { /* All G2_LE (603e core, plus some) have the same pvr */
  1046. .pvr_mask = 0x7fff0000,
  1047. .pvr_value = 0x00820000,
  1048. .cpu_name = "G2_LE",
  1049. .cpu_features = CPU_FTRS_G2_LE,
  1050. .cpu_user_features = COMMON_USER,
  1051. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1052. .icache_bsize = 32,
  1053. .dcache_bsize = 32,
  1054. .cpu_setup = __setup_cpu_603,
  1055. .machine_check = machine_check_generic,
  1056. .platform = "ppc603",
  1057. },
  1058. { /* e300c1 (a 603e core, plus some) on 83xx */
  1059. .pvr_mask = 0x7fff0000,
  1060. .pvr_value = 0x00830000,
  1061. .cpu_name = "e300c1",
  1062. .cpu_features = CPU_FTRS_E300,
  1063. .cpu_user_features = COMMON_USER,
  1064. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1065. .icache_bsize = 32,
  1066. .dcache_bsize = 32,
  1067. .cpu_setup = __setup_cpu_603,
  1068. .machine_check = machine_check_generic,
  1069. .platform = "ppc603",
  1070. },
  1071. { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
  1072. .pvr_mask = 0x7fff0000,
  1073. .pvr_value = 0x00840000,
  1074. .cpu_name = "e300c2",
  1075. .cpu_features = CPU_FTRS_E300C2,
  1076. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1077. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1078. .icache_bsize = 32,
  1079. .dcache_bsize = 32,
  1080. .cpu_setup = __setup_cpu_603,
  1081. .machine_check = machine_check_generic,
  1082. .platform = "ppc603",
  1083. },
  1084. { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
  1085. .pvr_mask = 0x7fff0000,
  1086. .pvr_value = 0x00850000,
  1087. .cpu_name = "e300c3",
  1088. .cpu_features = CPU_FTRS_E300,
  1089. .cpu_user_features = COMMON_USER,
  1090. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1091. .icache_bsize = 32,
  1092. .dcache_bsize = 32,
  1093. .cpu_setup = __setup_cpu_603,
  1094. .num_pmcs = 4,
  1095. .oprofile_cpu_type = "ppc/e300",
  1096. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1097. .platform = "ppc603",
  1098. },
  1099. { /* e300c4 (e300c1, plus one IU) */
  1100. .pvr_mask = 0x7fff0000,
  1101. .pvr_value = 0x00860000,
  1102. .cpu_name = "e300c4",
  1103. .cpu_features = CPU_FTRS_E300,
  1104. .cpu_user_features = COMMON_USER,
  1105. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1106. .icache_bsize = 32,
  1107. .dcache_bsize = 32,
  1108. .cpu_setup = __setup_cpu_603,
  1109. .machine_check = machine_check_generic,
  1110. .num_pmcs = 4,
  1111. .oprofile_cpu_type = "ppc/e300",
  1112. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1113. .platform = "ppc603",
  1114. },
  1115. { /* default match, we assume split I/D cache & TB (non-601)... */
  1116. .pvr_mask = 0x00000000,
  1117. .pvr_value = 0x00000000,
  1118. .cpu_name = "(generic PPC)",
  1119. .cpu_features = CPU_FTRS_CLASSIC32,
  1120. .cpu_user_features = COMMON_USER,
  1121. .mmu_features = MMU_FTR_HPTE_TABLE,
  1122. .icache_bsize = 32,
  1123. .dcache_bsize = 32,
  1124. .machine_check = machine_check_generic,
  1125. .platform = "ppc603",
  1126. },
  1127. #endif /* CLASSIC_PPC */
  1128. #ifdef CONFIG_8xx
  1129. { /* 8xx */
  1130. .pvr_mask = 0xffff0000,
  1131. .pvr_value = 0x00500000,
  1132. .cpu_name = "8xx",
  1133. /* CPU_FTR_MAYBE_CAN_DOZE is possible,
  1134. * if the 8xx code is there.... */
  1135. .cpu_features = CPU_FTRS_8XX,
  1136. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1137. .mmu_features = MMU_FTR_TYPE_8xx,
  1138. .icache_bsize = 16,
  1139. .dcache_bsize = 16,
  1140. .platform = "ppc823",
  1141. },
  1142. #endif /* CONFIG_8xx */
  1143. #ifdef CONFIG_40x
  1144. { /* 403GC */
  1145. .pvr_mask = 0xffffff00,
  1146. .pvr_value = 0x00200200,
  1147. .cpu_name = "403GC",
  1148. .cpu_features = CPU_FTRS_40X,
  1149. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1150. .mmu_features = MMU_FTR_TYPE_40x,
  1151. .icache_bsize = 16,
  1152. .dcache_bsize = 16,
  1153. .machine_check = machine_check_4xx,
  1154. .platform = "ppc403",
  1155. },
  1156. { /* 403GCX */
  1157. .pvr_mask = 0xffffff00,
  1158. .pvr_value = 0x00201400,
  1159. .cpu_name = "403GCX",
  1160. .cpu_features = CPU_FTRS_40X,
  1161. .cpu_user_features = PPC_FEATURE_32 |
  1162. PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
  1163. .mmu_features = MMU_FTR_TYPE_40x,
  1164. .icache_bsize = 16,
  1165. .dcache_bsize = 16,
  1166. .machine_check = machine_check_4xx,
  1167. .platform = "ppc403",
  1168. },
  1169. { /* 403G ?? */
  1170. .pvr_mask = 0xffff0000,
  1171. .pvr_value = 0x00200000,
  1172. .cpu_name = "403G ??",
  1173. .cpu_features = CPU_FTRS_40X,
  1174. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1175. .mmu_features = MMU_FTR_TYPE_40x,
  1176. .icache_bsize = 16,
  1177. .dcache_bsize = 16,
  1178. .machine_check = machine_check_4xx,
  1179. .platform = "ppc403",
  1180. },
  1181. { /* 405GP */
  1182. .pvr_mask = 0xffff0000,
  1183. .pvr_value = 0x40110000,
  1184. .cpu_name = "405GP",
  1185. .cpu_features = CPU_FTRS_40X,
  1186. .cpu_user_features = PPC_FEATURE_32 |
  1187. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1188. .mmu_features = MMU_FTR_TYPE_40x,
  1189. .icache_bsize = 32,
  1190. .dcache_bsize = 32,
  1191. .machine_check = machine_check_4xx,
  1192. .platform = "ppc405",
  1193. },
  1194. { /* STB 03xxx */
  1195. .pvr_mask = 0xffff0000,
  1196. .pvr_value = 0x40130000,
  1197. .cpu_name = "STB03xxx",
  1198. .cpu_features = CPU_FTRS_40X,
  1199. .cpu_user_features = PPC_FEATURE_32 |
  1200. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1201. .mmu_features = MMU_FTR_TYPE_40x,
  1202. .icache_bsize = 32,
  1203. .dcache_bsize = 32,
  1204. .machine_check = machine_check_4xx,
  1205. .platform = "ppc405",
  1206. },
  1207. { /* STB 04xxx */
  1208. .pvr_mask = 0xffff0000,
  1209. .pvr_value = 0x41810000,
  1210. .cpu_name = "STB04xxx",
  1211. .cpu_features = CPU_FTRS_40X,
  1212. .cpu_user_features = PPC_FEATURE_32 |
  1213. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1214. .mmu_features = MMU_FTR_TYPE_40x,
  1215. .icache_bsize = 32,
  1216. .dcache_bsize = 32,
  1217. .machine_check = machine_check_4xx,
  1218. .platform = "ppc405",
  1219. },
  1220. { /* NP405L */
  1221. .pvr_mask = 0xffff0000,
  1222. .pvr_value = 0x41610000,
  1223. .cpu_name = "NP405L",
  1224. .cpu_features = CPU_FTRS_40X,
  1225. .cpu_user_features = PPC_FEATURE_32 |
  1226. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1227. .mmu_features = MMU_FTR_TYPE_40x,
  1228. .icache_bsize = 32,
  1229. .dcache_bsize = 32,
  1230. .machine_check = machine_check_4xx,
  1231. .platform = "ppc405",
  1232. },
  1233. { /* NP4GS3 */
  1234. .pvr_mask = 0xffff0000,
  1235. .pvr_value = 0x40B10000,
  1236. .cpu_name = "NP4GS3",
  1237. .cpu_features = CPU_FTRS_40X,
  1238. .cpu_user_features = PPC_FEATURE_32 |
  1239. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1240. .mmu_features = MMU_FTR_TYPE_40x,
  1241. .icache_bsize = 32,
  1242. .dcache_bsize = 32,
  1243. .machine_check = machine_check_4xx,
  1244. .platform = "ppc405",
  1245. },
  1246. { /* NP405H */
  1247. .pvr_mask = 0xffff0000,
  1248. .pvr_value = 0x41410000,
  1249. .cpu_name = "NP405H",
  1250. .cpu_features = CPU_FTRS_40X,
  1251. .cpu_user_features = PPC_FEATURE_32 |
  1252. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1253. .mmu_features = MMU_FTR_TYPE_40x,
  1254. .icache_bsize = 32,
  1255. .dcache_bsize = 32,
  1256. .machine_check = machine_check_4xx,
  1257. .platform = "ppc405",
  1258. },
  1259. { /* 405GPr */
  1260. .pvr_mask = 0xffff0000,
  1261. .pvr_value = 0x50910000,
  1262. .cpu_name = "405GPr",
  1263. .cpu_features = CPU_FTRS_40X,
  1264. .cpu_user_features = PPC_FEATURE_32 |
  1265. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1266. .mmu_features = MMU_FTR_TYPE_40x,
  1267. .icache_bsize = 32,
  1268. .dcache_bsize = 32,
  1269. .machine_check = machine_check_4xx,
  1270. .platform = "ppc405",
  1271. },
  1272. { /* STBx25xx */
  1273. .pvr_mask = 0xffff0000,
  1274. .pvr_value = 0x51510000,
  1275. .cpu_name = "STBx25xx",
  1276. .cpu_features = CPU_FTRS_40X,
  1277. .cpu_user_features = PPC_FEATURE_32 |
  1278. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1279. .mmu_features = MMU_FTR_TYPE_40x,
  1280. .icache_bsize = 32,
  1281. .dcache_bsize = 32,
  1282. .machine_check = machine_check_4xx,
  1283. .platform = "ppc405",
  1284. },
  1285. { /* 405LP */
  1286. .pvr_mask = 0xffff0000,
  1287. .pvr_value = 0x41F10000,
  1288. .cpu_name = "405LP",
  1289. .cpu_features = CPU_FTRS_40X,
  1290. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1291. .mmu_features = MMU_FTR_TYPE_40x,
  1292. .icache_bsize = 32,
  1293. .dcache_bsize = 32,
  1294. .machine_check = machine_check_4xx,
  1295. .platform = "ppc405",
  1296. },
  1297. { /* Xilinx Virtex-II Pro */
  1298. .pvr_mask = 0xfffff000,
  1299. .pvr_value = 0x20010000,
  1300. .cpu_name = "Virtex-II Pro",
  1301. .cpu_features = CPU_FTRS_40X,
  1302. .cpu_user_features = PPC_FEATURE_32 |
  1303. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1304. .mmu_features = MMU_FTR_TYPE_40x,
  1305. .icache_bsize = 32,
  1306. .dcache_bsize = 32,
  1307. .machine_check = machine_check_4xx,
  1308. .platform = "ppc405",
  1309. },
  1310. { /* Xilinx Virtex-4 FX */
  1311. .pvr_mask = 0xfffff000,
  1312. .pvr_value = 0x20011000,
  1313. .cpu_name = "Virtex-4 FX",
  1314. .cpu_features = CPU_FTRS_40X,
  1315. .cpu_user_features = PPC_FEATURE_32 |
  1316. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1317. .mmu_features = MMU_FTR_TYPE_40x,
  1318. .icache_bsize = 32,
  1319. .dcache_bsize = 32,
  1320. .machine_check = machine_check_4xx,
  1321. .platform = "ppc405",
  1322. },
  1323. { /* 405EP */
  1324. .pvr_mask = 0xffff0000,
  1325. .pvr_value = 0x51210000,
  1326. .cpu_name = "405EP",
  1327. .cpu_features = CPU_FTRS_40X,
  1328. .cpu_user_features = PPC_FEATURE_32 |
  1329. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1330. .mmu_features = MMU_FTR_TYPE_40x,
  1331. .icache_bsize = 32,
  1332. .dcache_bsize = 32,
  1333. .machine_check = machine_check_4xx,
  1334. .platform = "ppc405",
  1335. },
  1336. { /* 405EX */
  1337. .pvr_mask = 0xffff0004,
  1338. .pvr_value = 0x12910004,
  1339. .cpu_name = "405EX",
  1340. .cpu_features = CPU_FTRS_40X,
  1341. .cpu_user_features = PPC_FEATURE_32 |
  1342. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1343. .mmu_features = MMU_FTR_TYPE_40x,
  1344. .icache_bsize = 32,
  1345. .dcache_bsize = 32,
  1346. .machine_check = machine_check_4xx,
  1347. .platform = "ppc405",
  1348. },
  1349. { /* 405EXr */
  1350. .pvr_mask = 0xffff0004,
  1351. .pvr_value = 0x12910000,
  1352. .cpu_name = "405EXr",
  1353. .cpu_features = CPU_FTRS_40X,
  1354. .cpu_user_features = PPC_FEATURE_32 |
  1355. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1356. .mmu_features = MMU_FTR_TYPE_40x,
  1357. .icache_bsize = 32,
  1358. .dcache_bsize = 32,
  1359. .machine_check = machine_check_4xx,
  1360. .platform = "ppc405",
  1361. },
  1362. {
  1363. /* 405EZ */
  1364. .pvr_mask = 0xffff0000,
  1365. .pvr_value = 0x41510000,
  1366. .cpu_name = "405EZ",
  1367. .cpu_features = CPU_FTRS_40X,
  1368. .cpu_user_features = PPC_FEATURE_32 |
  1369. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1370. .mmu_features = MMU_FTR_TYPE_40x,
  1371. .icache_bsize = 32,
  1372. .dcache_bsize = 32,
  1373. .machine_check = machine_check_4xx,
  1374. .platform = "ppc405",
  1375. },
  1376. { /* default match */
  1377. .pvr_mask = 0x00000000,
  1378. .pvr_value = 0x00000000,
  1379. .cpu_name = "(generic 40x PPC)",
  1380. .cpu_features = CPU_FTRS_40X,
  1381. .cpu_user_features = PPC_FEATURE_32 |
  1382. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1383. .mmu_features = MMU_FTR_TYPE_40x,
  1384. .icache_bsize = 32,
  1385. .dcache_bsize = 32,
  1386. .machine_check = machine_check_4xx,
  1387. .platform = "ppc405",
  1388. }
  1389. #endif /* CONFIG_40x */
  1390. #ifdef CONFIG_44x
  1391. {
  1392. .pvr_mask = 0xf0000fff,
  1393. .pvr_value = 0x40000850,
  1394. .cpu_name = "440GR Rev. A",
  1395. .cpu_features = CPU_FTRS_44X,
  1396. .cpu_user_features = COMMON_USER_BOOKE,
  1397. .mmu_features = MMU_FTR_TYPE_44x,
  1398. .icache_bsize = 32,
  1399. .dcache_bsize = 32,
  1400. .machine_check = machine_check_4xx,
  1401. .platform = "ppc440",
  1402. },
  1403. { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1404. .pvr_mask = 0xf0000fff,
  1405. .pvr_value = 0x40000858,
  1406. .cpu_name = "440EP Rev. A",
  1407. .cpu_features = CPU_FTRS_44X,
  1408. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1409. .mmu_features = MMU_FTR_TYPE_44x,
  1410. .icache_bsize = 32,
  1411. .dcache_bsize = 32,
  1412. .cpu_setup = __setup_cpu_440ep,
  1413. .machine_check = machine_check_4xx,
  1414. .platform = "ppc440",
  1415. },
  1416. {
  1417. .pvr_mask = 0xf0000fff,
  1418. .pvr_value = 0x400008d3,
  1419. .cpu_name = "440GR Rev. B",
  1420. .cpu_features = CPU_FTRS_44X,
  1421. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1422. .mmu_features = MMU_FTR_TYPE_44x,
  1423. .icache_bsize = 32,
  1424. .dcache_bsize = 32,
  1425. .machine_check = machine_check_4xx,
  1426. .platform = "ppc440",
  1427. },
  1428. { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1429. .pvr_mask = 0xf0000ff7,
  1430. .pvr_value = 0x400008d4,
  1431. .cpu_name = "440EP Rev. C",
  1432. .cpu_features = CPU_FTRS_44X,
  1433. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1434. .mmu_features = MMU_FTR_TYPE_44x,
  1435. .icache_bsize = 32,
  1436. .dcache_bsize = 32,
  1437. .cpu_setup = __setup_cpu_440ep,
  1438. .machine_check = machine_check_4xx,
  1439. .platform = "ppc440",
  1440. },
  1441. { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1442. .pvr_mask = 0xf0000fff,
  1443. .pvr_value = 0x400008db,
  1444. .cpu_name = "440EP Rev. B",
  1445. .cpu_features = CPU_FTRS_44X,
  1446. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1447. .mmu_features = MMU_FTR_TYPE_44x,
  1448. .icache_bsize = 32,
  1449. .dcache_bsize = 32,
  1450. .cpu_setup = __setup_cpu_440ep,
  1451. .machine_check = machine_check_4xx,
  1452. .platform = "ppc440",
  1453. },
  1454. { /* 440GRX */
  1455. .pvr_mask = 0xf0000ffb,
  1456. .pvr_value = 0x200008D0,
  1457. .cpu_name = "440GRX",
  1458. .cpu_features = CPU_FTRS_44X,
  1459. .cpu_user_features = COMMON_USER_BOOKE,
  1460. .mmu_features = MMU_FTR_TYPE_44x,
  1461. .icache_bsize = 32,
  1462. .dcache_bsize = 32,
  1463. .cpu_setup = __setup_cpu_440grx,
  1464. .machine_check = machine_check_440A,
  1465. .platform = "ppc440",
  1466. },
  1467. { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
  1468. .pvr_mask = 0xf0000ffb,
  1469. .pvr_value = 0x200008D8,
  1470. .cpu_name = "440EPX",
  1471. .cpu_features = CPU_FTRS_44X,
  1472. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1473. .mmu_features = MMU_FTR_TYPE_44x,
  1474. .icache_bsize = 32,
  1475. .dcache_bsize = 32,
  1476. .cpu_setup = __setup_cpu_440epx,
  1477. .machine_check = machine_check_440A,
  1478. .platform = "ppc440",
  1479. },
  1480. { /* 440GP Rev. B */
  1481. .pvr_mask = 0xf0000fff,
  1482. .pvr_value = 0x40000440,
  1483. .cpu_name = "440GP Rev. B",
  1484. .cpu_features = CPU_FTRS_44X,
  1485. .cpu_user_features = COMMON_USER_BOOKE,
  1486. .mmu_features = MMU_FTR_TYPE_44x,
  1487. .icache_bsize = 32,
  1488. .dcache_bsize = 32,
  1489. .machine_check = machine_check_4xx,
  1490. .platform = "ppc440gp",
  1491. },
  1492. { /* 440GP Rev. C */
  1493. .pvr_mask = 0xf0000fff,
  1494. .pvr_value = 0x40000481,
  1495. .cpu_name = "440GP Rev. C",
  1496. .cpu_features = CPU_FTRS_44X,
  1497. .cpu_user_features = COMMON_USER_BOOKE,
  1498. .mmu_features = MMU_FTR_TYPE_44x,
  1499. .icache_bsize = 32,
  1500. .dcache_bsize = 32,
  1501. .machine_check = machine_check_4xx,
  1502. .platform = "ppc440gp",
  1503. },
  1504. { /* 440GX Rev. A */
  1505. .pvr_mask = 0xf0000fff,
  1506. .pvr_value = 0x50000850,
  1507. .cpu_name = "440GX Rev. A",
  1508. .cpu_features = CPU_FTRS_44X,
  1509. .cpu_user_features = COMMON_USER_BOOKE,
  1510. .mmu_features = MMU_FTR_TYPE_44x,
  1511. .icache_bsize = 32,
  1512. .dcache_bsize = 32,
  1513. .cpu_setup = __setup_cpu_440gx,
  1514. .machine_check = machine_check_440A,
  1515. .platform = "ppc440",
  1516. },
  1517. { /* 440GX Rev. B */
  1518. .pvr_mask = 0xf0000fff,
  1519. .pvr_value = 0x50000851,
  1520. .cpu_name = "440GX Rev. B",
  1521. .cpu_features = CPU_FTRS_44X,
  1522. .cpu_user_features = COMMON_USER_BOOKE,
  1523. .mmu_features = MMU_FTR_TYPE_44x,
  1524. .icache_bsize = 32,
  1525. .dcache_bsize = 32,
  1526. .cpu_setup = __setup_cpu_440gx,
  1527. .machine_check = machine_check_440A,
  1528. .platform = "ppc440",
  1529. },
  1530. { /* 440GX Rev. C */
  1531. .pvr_mask = 0xf0000fff,
  1532. .pvr_value = 0x50000892,
  1533. .cpu_name = "440GX Rev. C",
  1534. .cpu_features = CPU_FTRS_44X,
  1535. .cpu_user_features = COMMON_USER_BOOKE,
  1536. .mmu_features = MMU_FTR_TYPE_44x,
  1537. .icache_bsize = 32,
  1538. .dcache_bsize = 32,
  1539. .cpu_setup = __setup_cpu_440gx,
  1540. .machine_check = machine_check_440A,
  1541. .platform = "ppc440",
  1542. },
  1543. { /* 440GX Rev. F */
  1544. .pvr_mask = 0xf0000fff,
  1545. .pvr_value = 0x50000894,
  1546. .cpu_name = "440GX Rev. F",
  1547. .cpu_features = CPU_FTRS_44X,
  1548. .cpu_user_features = COMMON_USER_BOOKE,
  1549. .mmu_features = MMU_FTR_TYPE_44x,
  1550. .icache_bsize = 32,
  1551. .dcache_bsize = 32,
  1552. .cpu_setup = __setup_cpu_440gx,
  1553. .machine_check = machine_check_440A,
  1554. .platform = "ppc440",
  1555. },
  1556. { /* 440SP Rev. A */
  1557. .pvr_mask = 0xfff00fff,
  1558. .pvr_value = 0x53200891,
  1559. .cpu_name = "440SP Rev. A",
  1560. .cpu_features = CPU_FTRS_44X,
  1561. .cpu_user_features = COMMON_USER_BOOKE,
  1562. .mmu_features = MMU_FTR_TYPE_44x,
  1563. .icache_bsize = 32,
  1564. .dcache_bsize = 32,
  1565. .machine_check = machine_check_4xx,
  1566. .platform = "ppc440",
  1567. },
  1568. { /* 440SPe Rev. A */
  1569. .pvr_mask = 0xfff00fff,
  1570. .pvr_value = 0x53400890,
  1571. .cpu_name = "440SPe Rev. A",
  1572. .cpu_features = CPU_FTRS_44X,
  1573. .cpu_user_features = COMMON_USER_BOOKE,
  1574. .mmu_features = MMU_FTR_TYPE_44x,
  1575. .icache_bsize = 32,
  1576. .dcache_bsize = 32,
  1577. .cpu_setup = __setup_cpu_440spe,
  1578. .machine_check = machine_check_440A,
  1579. .platform = "ppc440",
  1580. },
  1581. { /* 440SPe Rev. B */
  1582. .pvr_mask = 0xfff00fff,
  1583. .pvr_value = 0x53400891,
  1584. .cpu_name = "440SPe Rev. B",
  1585. .cpu_features = CPU_FTRS_44X,
  1586. .cpu_user_features = COMMON_USER_BOOKE,
  1587. .mmu_features = MMU_FTR_TYPE_44x,
  1588. .icache_bsize = 32,
  1589. .dcache_bsize = 32,
  1590. .cpu_setup = __setup_cpu_440spe,
  1591. .machine_check = machine_check_440A,
  1592. .platform = "ppc440",
  1593. },
  1594. { /* 440 in Xilinx Virtex-5 FXT */
  1595. .pvr_mask = 0xfffffff0,
  1596. .pvr_value = 0x7ff21910,
  1597. .cpu_name = "440 in Virtex-5 FXT",
  1598. .cpu_features = CPU_FTRS_44X,
  1599. .cpu_user_features = COMMON_USER_BOOKE,
  1600. .mmu_features = MMU_FTR_TYPE_44x,
  1601. .icache_bsize = 32,
  1602. .dcache_bsize = 32,
  1603. .cpu_setup = __setup_cpu_440x5,
  1604. .machine_check = machine_check_440A,
  1605. .platform = "ppc440",
  1606. },
  1607. { /* 460EX */
  1608. .pvr_mask = 0xffff0002,
  1609. .pvr_value = 0x13020002,
  1610. .cpu_name = "460EX",
  1611. .cpu_features = CPU_FTRS_440x6,
  1612. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1613. .mmu_features = MMU_FTR_TYPE_44x,
  1614. .icache_bsize = 32,
  1615. .dcache_bsize = 32,
  1616. .cpu_setup = __setup_cpu_460ex,
  1617. .machine_check = machine_check_440A,
  1618. .platform = "ppc440",
  1619. },
  1620. { /* 460GT */
  1621. .pvr_mask = 0xffff0002,
  1622. .pvr_value = 0x13020000,
  1623. .cpu_name = "460GT",
  1624. .cpu_features = CPU_FTRS_440x6,
  1625. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1626. .mmu_features = MMU_FTR_TYPE_44x,
  1627. .icache_bsize = 32,
  1628. .dcache_bsize = 32,
  1629. .cpu_setup = __setup_cpu_460gt,
  1630. .machine_check = machine_check_440A,
  1631. .platform = "ppc440",
  1632. },
  1633. { /* default match */
  1634. .pvr_mask = 0x00000000,
  1635. .pvr_value = 0x00000000,
  1636. .cpu_name = "(generic 44x PPC)",
  1637. .cpu_features = CPU_FTRS_44X,
  1638. .cpu_user_features = COMMON_USER_BOOKE,
  1639. .mmu_features = MMU_FTR_TYPE_44x,
  1640. .icache_bsize = 32,
  1641. .dcache_bsize = 32,
  1642. .machine_check = machine_check_4xx,
  1643. .platform = "ppc440",
  1644. }
  1645. #endif /* CONFIG_44x */
  1646. #ifdef CONFIG_E200
  1647. { /* e200z5 */
  1648. .pvr_mask = 0xfff00000,
  1649. .pvr_value = 0x81000000,
  1650. .cpu_name = "e200z5",
  1651. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1652. .cpu_features = CPU_FTRS_E200,
  1653. .cpu_user_features = COMMON_USER_BOOKE |
  1654. PPC_FEATURE_HAS_EFP_SINGLE |
  1655. PPC_FEATURE_UNIFIED_CACHE,
  1656. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1657. .dcache_bsize = 32,
  1658. .machine_check = machine_check_e200,
  1659. .platform = "ppc5554",
  1660. },
  1661. { /* e200z6 */
  1662. .pvr_mask = 0xfff00000,
  1663. .pvr_value = 0x81100000,
  1664. .cpu_name = "e200z6",
  1665. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1666. .cpu_features = CPU_FTRS_E200,
  1667. .cpu_user_features = COMMON_USER_BOOKE |
  1668. PPC_FEATURE_HAS_SPE_COMP |
  1669. PPC_FEATURE_HAS_EFP_SINGLE_COMP |
  1670. PPC_FEATURE_UNIFIED_CACHE,
  1671. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1672. .dcache_bsize = 32,
  1673. .machine_check = machine_check_e200,
  1674. .platform = "ppc5554",
  1675. },
  1676. { /* default match */
  1677. .pvr_mask = 0x00000000,
  1678. .pvr_value = 0x00000000,
  1679. .cpu_name = "(generic E200 PPC)",
  1680. .cpu_features = CPU_FTRS_E200,
  1681. .cpu_user_features = COMMON_USER_BOOKE |
  1682. PPC_FEATURE_HAS_EFP_SINGLE |
  1683. PPC_FEATURE_UNIFIED_CACHE,
  1684. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1685. .dcache_bsize = 32,
  1686. .cpu_setup = __setup_cpu_e200,
  1687. .machine_check = machine_check_e200,
  1688. .platform = "ppc5554",
  1689. }
  1690. #endif /* CONFIG_E200 */
  1691. #ifdef CONFIG_E500
  1692. { /* e500 */
  1693. .pvr_mask = 0xffff0000,
  1694. .pvr_value = 0x80200000,
  1695. .cpu_name = "e500",
  1696. .cpu_features = CPU_FTRS_E500,
  1697. .cpu_user_features = COMMON_USER_BOOKE |
  1698. PPC_FEATURE_HAS_SPE_COMP |
  1699. PPC_FEATURE_HAS_EFP_SINGLE_COMP,
  1700. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1701. .icache_bsize = 32,
  1702. .dcache_bsize = 32,
  1703. .num_pmcs = 4,
  1704. .oprofile_cpu_type = "ppc/e500",
  1705. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1706. .cpu_setup = __setup_cpu_e500v1,
  1707. .machine_check = machine_check_e500,
  1708. .platform = "ppc8540",
  1709. },
  1710. { /* e500v2 */
  1711. .pvr_mask = 0xffff0000,
  1712. .pvr_value = 0x80210000,
  1713. .cpu_name = "e500v2",
  1714. .cpu_features = CPU_FTRS_E500_2,
  1715. .cpu_user_features = COMMON_USER_BOOKE |
  1716. PPC_FEATURE_HAS_SPE_COMP |
  1717. PPC_FEATURE_HAS_EFP_SINGLE_COMP |
  1718. PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
  1719. .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
  1720. .icache_bsize = 32,
  1721. .dcache_bsize = 32,
  1722. .num_pmcs = 4,
  1723. .oprofile_cpu_type = "ppc/e500",
  1724. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1725. .cpu_setup = __setup_cpu_e500v2,
  1726. .machine_check = machine_check_e500,
  1727. .platform = "ppc8548",
  1728. },
  1729. { /* e500mc */
  1730. .pvr_mask = 0xffff0000,
  1731. .pvr_value = 0x80230000,
  1732. .cpu_name = "e500mc",
  1733. .cpu_features = CPU_FTRS_E500MC,
  1734. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1735. .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
  1736. .icache_bsize = 64,
  1737. .dcache_bsize = 64,
  1738. .num_pmcs = 4,
  1739. .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */
  1740. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1741. .cpu_setup = __setup_cpu_e500mc,
  1742. .machine_check = machine_check_e500,
  1743. .platform = "ppce500mc",
  1744. },
  1745. { /* default match */
  1746. .pvr_mask = 0x00000000,
  1747. .pvr_value = 0x00000000,
  1748. .cpu_name = "(generic E500 PPC)",
  1749. .cpu_features = CPU_FTRS_E500,
  1750. .cpu_user_features = COMMON_USER_BOOKE |
  1751. PPC_FEATURE_HAS_SPE_COMP |
  1752. PPC_FEATURE_HAS_EFP_SINGLE_COMP,
  1753. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1754. .icache_bsize = 32,
  1755. .dcache_bsize = 32,
  1756. .machine_check = machine_check_e500,
  1757. .platform = "powerpc",
  1758. }
  1759. #endif /* CONFIG_E500 */
  1760. #endif /* CONFIG_PPC32 */
  1761. };
  1762. static struct cpu_spec the_cpu_spec;
  1763. struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
  1764. {
  1765. struct cpu_spec *s = cpu_specs;
  1766. struct cpu_spec *t = &the_cpu_spec;
  1767. int i;
  1768. s = PTRRELOC(s);
  1769. t = PTRRELOC(t);
  1770. for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
  1771. if ((pvr & s->pvr_mask) == s->pvr_value) {
  1772. /*
  1773. * If we are overriding a previous value derived
  1774. * from the real PVR with a new value obtained
  1775. * using a logical PVR value, don't modify the
  1776. * performance monitor fields.
  1777. */
  1778. if (t->num_pmcs && !s->num_pmcs) {
  1779. t->cpu_name = s->cpu_name;
  1780. t->cpu_features = s->cpu_features;
  1781. t->cpu_user_features = s->cpu_user_features;
  1782. t->icache_bsize = s->icache_bsize;
  1783. t->dcache_bsize = s->dcache_bsize;
  1784. t->cpu_setup = s->cpu_setup;
  1785. t->cpu_restore = s->cpu_restore;
  1786. t->platform = s->platform;
  1787. /*
  1788. * If we have passed through this logic once
  1789. * before and have pulled the default case
  1790. * because the real PVR was not found inside
  1791. * cpu_specs[], then we are possibly running in
  1792. * compatibility mode. In that case, let the
  1793. * oprofiler know which set of compatibility
  1794. * counters to pull from by making sure the
  1795. * oprofile_cpu_type string is set to that of
  1796. * compatibility mode. If the oprofile_cpu_type
  1797. * already has a value, then we are possibly
  1798. * overriding a real PVR with a logical one, and,
  1799. * in that case, keep the current value for
  1800. * oprofile_cpu_type.
  1801. */
  1802. if (t->oprofile_cpu_type == NULL)
  1803. t->oprofile_cpu_type = s->oprofile_cpu_type;
  1804. } else
  1805. *t = *s;
  1806. *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
  1807. /*
  1808. * Set the base platform string once; assumes
  1809. * we're called with real pvr first.
  1810. */
  1811. if (*PTRRELOC(&powerpc_base_platform) == NULL)
  1812. *PTRRELOC(&powerpc_base_platform) = t->platform;
  1813. #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
  1814. /* ppc64 and booke expect identify_cpu to also call
  1815. * setup_cpu for that processor. I will consolidate
  1816. * that at a later time, for now, just use #ifdef.
  1817. * we also don't need to PTRRELOC the function pointer
  1818. * on ppc64 and booke as we are running at 0 in real
  1819. * mode on ppc64 and reloc_offset is always 0 on booke.
  1820. */
  1821. if (s->cpu_setup) {
  1822. s->cpu_setup(offset, s);
  1823. }
  1824. #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
  1825. return s;
  1826. }
  1827. BUG();
  1828. return NULL;
  1829. }