qdio_main.c 45 KB

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  1. /*
  2. * linux/drivers/s390/cio/qdio_main.c
  3. *
  4. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  5. *
  6. * Copyright 2000,2008 IBM Corp.
  7. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  8. * Jan Glauber <jang@linux.vnet.ibm.com>
  9. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/timer.h>
  15. #include <linux/delay.h>
  16. #include <linux/gfp.h>
  17. #include <linux/io.h>
  18. #include <linux/kernel_stat.h>
  19. #include <linux/atomic.h>
  20. #include <asm/debug.h>
  21. #include <asm/qdio.h>
  22. #include "cio.h"
  23. #include "css.h"
  24. #include "device.h"
  25. #include "qdio.h"
  26. #include "qdio_debug.h"
  27. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  28. "Jan Glauber <jang@linux.vnet.ibm.com>");
  29. MODULE_DESCRIPTION("QDIO base support");
  30. MODULE_LICENSE("GPL");
  31. static inline int do_siga_sync(unsigned long schid,
  32. unsigned int out_mask, unsigned int in_mask,
  33. unsigned int fc)
  34. {
  35. register unsigned long __fc asm ("0") = fc;
  36. register unsigned long __schid asm ("1") = schid;
  37. register unsigned long out asm ("2") = out_mask;
  38. register unsigned long in asm ("3") = in_mask;
  39. int cc;
  40. asm volatile(
  41. " siga 0\n"
  42. " ipm %0\n"
  43. " srl %0,28\n"
  44. : "=d" (cc)
  45. : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
  46. return cc;
  47. }
  48. static inline int do_siga_input(unsigned long schid, unsigned int mask,
  49. unsigned int fc)
  50. {
  51. register unsigned long __fc asm ("0") = fc;
  52. register unsigned long __schid asm ("1") = schid;
  53. register unsigned long __mask asm ("2") = mask;
  54. int cc;
  55. asm volatile(
  56. " siga 0\n"
  57. " ipm %0\n"
  58. " srl %0,28\n"
  59. : "=d" (cc)
  60. : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory");
  61. return cc;
  62. }
  63. /**
  64. * do_siga_output - perform SIGA-w/wt function
  65. * @schid: subchannel id or in case of QEBSM the subchannel token
  66. * @mask: which output queues to process
  67. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  68. * @fc: function code to perform
  69. *
  70. * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION.
  71. * Note: For IQDC unicast queues only the highest priority queue is processed.
  72. */
  73. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  74. unsigned int *bb, unsigned int fc,
  75. unsigned long aob)
  76. {
  77. register unsigned long __fc asm("0") = fc;
  78. register unsigned long __schid asm("1") = schid;
  79. register unsigned long __mask asm("2") = mask;
  80. register unsigned long __aob asm("3") = aob;
  81. int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION;
  82. asm volatile(
  83. " siga 0\n"
  84. "0: ipm %0\n"
  85. " srl %0,28\n"
  86. "1:\n"
  87. EX_TABLE(0b, 1b)
  88. : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask),
  89. "+d" (__aob)
  90. : : "cc", "memory");
  91. *bb = ((unsigned int) __fc) >> 31;
  92. return cc;
  93. }
  94. static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
  95. {
  96. /* all done or next buffer state different */
  97. if (ccq == 0 || ccq == 32)
  98. return 0;
  99. /* not all buffers processed */
  100. if (ccq == 96 || ccq == 97)
  101. return 1;
  102. /* notify devices immediately */
  103. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  104. return -EIO;
  105. }
  106. /**
  107. * qdio_do_eqbs - extract buffer states for QEBSM
  108. * @q: queue to manipulate
  109. * @state: state of the extracted buffers
  110. * @start: buffer number to start at
  111. * @count: count of buffers to examine
  112. * @auto_ack: automatically acknowledge buffers
  113. *
  114. * Returns the number of successfully extracted equal buffer states.
  115. * Stops processing if a state is different from the last buffers state.
  116. */
  117. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  118. int start, int count, int auto_ack)
  119. {
  120. unsigned int ccq = 0;
  121. int tmp_count = count, tmp_start = start;
  122. int nr = q->nr;
  123. int rc;
  124. BUG_ON(!q->irq_ptr->sch_token);
  125. qperf_inc(q, eqbs);
  126. if (!q->is_input_q)
  127. nr += q->irq_ptr->nr_input_qs;
  128. again:
  129. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  130. auto_ack);
  131. rc = qdio_check_ccq(q, ccq);
  132. /* At least one buffer was processed, return and extract the remaining
  133. * buffers later.
  134. */
  135. if ((ccq == 96) && (count != tmp_count)) {
  136. qperf_inc(q, eqbs_partial);
  137. return (count - tmp_count);
  138. }
  139. if (rc == 1) {
  140. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  141. goto again;
  142. }
  143. if (rc < 0) {
  144. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  145. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  146. q->handler(q->irq_ptr->cdev,
  147. QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  148. 0, -1, -1, q->irq_ptr->int_parm);
  149. return 0;
  150. }
  151. return count - tmp_count;
  152. }
  153. /**
  154. * qdio_do_sqbs - set buffer states for QEBSM
  155. * @q: queue to manipulate
  156. * @state: new state of the buffers
  157. * @start: first buffer number to change
  158. * @count: how many buffers to change
  159. *
  160. * Returns the number of successfully changed buffers.
  161. * Does retrying until the specified count of buffer states is set or an
  162. * error occurs.
  163. */
  164. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  165. int count)
  166. {
  167. unsigned int ccq = 0;
  168. int tmp_count = count, tmp_start = start;
  169. int nr = q->nr;
  170. int rc;
  171. if (!count)
  172. return 0;
  173. BUG_ON(!q->irq_ptr->sch_token);
  174. qperf_inc(q, sqbs);
  175. if (!q->is_input_q)
  176. nr += q->irq_ptr->nr_input_qs;
  177. again:
  178. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  179. rc = qdio_check_ccq(q, ccq);
  180. if (rc == 1) {
  181. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  182. qperf_inc(q, sqbs_partial);
  183. goto again;
  184. }
  185. if (rc < 0) {
  186. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  187. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  188. q->handler(q->irq_ptr->cdev,
  189. QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  190. 0, -1, -1, q->irq_ptr->int_parm);
  191. return 0;
  192. }
  193. WARN_ON(tmp_count);
  194. return count - tmp_count;
  195. }
  196. /* returns number of examined buffers and their common state in *state */
  197. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  198. unsigned char *state, unsigned int count,
  199. int auto_ack, int merge_pending)
  200. {
  201. unsigned char __state = 0;
  202. int i;
  203. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  204. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  205. if (is_qebsm(q))
  206. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  207. for (i = 0; i < count; i++) {
  208. if (!__state) {
  209. __state = q->slsb.val[bufnr];
  210. if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
  211. __state = SLSB_P_OUTPUT_EMPTY;
  212. } else if (merge_pending) {
  213. if ((q->slsb.val[bufnr] & __state) != __state)
  214. break;
  215. } else if (q->slsb.val[bufnr] != __state)
  216. break;
  217. bufnr = next_buf(bufnr);
  218. }
  219. *state = __state;
  220. return i;
  221. }
  222. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  223. unsigned char *state, int auto_ack)
  224. {
  225. return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
  226. }
  227. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  228. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  229. unsigned char state, int count)
  230. {
  231. int i;
  232. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  233. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  234. if (is_qebsm(q))
  235. return qdio_do_sqbs(q, state, bufnr, count);
  236. for (i = 0; i < count; i++) {
  237. xchg(&q->slsb.val[bufnr], state);
  238. bufnr = next_buf(bufnr);
  239. }
  240. return count;
  241. }
  242. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  243. unsigned char state)
  244. {
  245. return set_buf_states(q, bufnr, state, 1);
  246. }
  247. /* set slsb states to initial state */
  248. void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  249. {
  250. struct qdio_q *q;
  251. int i;
  252. for_each_input_queue(irq_ptr, q, i)
  253. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  254. QDIO_MAX_BUFFERS_PER_Q);
  255. for_each_output_queue(irq_ptr, q, i)
  256. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  257. QDIO_MAX_BUFFERS_PER_Q);
  258. }
  259. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  260. unsigned int input)
  261. {
  262. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  263. unsigned int fc = QDIO_SIGA_SYNC;
  264. int cc;
  265. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  266. qperf_inc(q, siga_sync);
  267. if (is_qebsm(q)) {
  268. schid = q->irq_ptr->sch_token;
  269. fc |= QDIO_SIGA_QEBSM_FLAG;
  270. }
  271. cc = do_siga_sync(schid, output, input, fc);
  272. if (unlikely(cc))
  273. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  274. return cc;
  275. }
  276. static inline int qdio_siga_sync_q(struct qdio_q *q)
  277. {
  278. if (q->is_input_q)
  279. return qdio_siga_sync(q, 0, q->mask);
  280. else
  281. return qdio_siga_sync(q, q->mask, 0);
  282. }
  283. static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit,
  284. unsigned long aob)
  285. {
  286. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  287. unsigned int fc = QDIO_SIGA_WRITE;
  288. u64 start_time = 0;
  289. int retries = 0, cc;
  290. unsigned long laob = 0;
  291. if (q->u.out.use_cq && aob != 0) {
  292. fc = QDIO_SIGA_WRITEQ;
  293. laob = aob;
  294. }
  295. if (is_qebsm(q)) {
  296. schid = q->irq_ptr->sch_token;
  297. fc |= QDIO_SIGA_QEBSM_FLAG;
  298. }
  299. again:
  300. WARN_ON_ONCE((aob && queue_type(q) != QDIO_IQDIO_QFMT) ||
  301. (aob && fc != QDIO_SIGA_WRITEQ));
  302. cc = do_siga_output(schid, q->mask, busy_bit, fc, laob);
  303. /* hipersocket busy condition */
  304. if (unlikely(*busy_bit)) {
  305. WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2);
  306. retries++;
  307. if (!start_time) {
  308. start_time = get_clock();
  309. goto again;
  310. }
  311. if ((get_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE)
  312. goto again;
  313. }
  314. if (retries) {
  315. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
  316. "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
  317. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
  318. }
  319. return cc;
  320. }
  321. static inline int qdio_siga_input(struct qdio_q *q)
  322. {
  323. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  324. unsigned int fc = QDIO_SIGA_READ;
  325. int cc;
  326. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  327. qperf_inc(q, siga_read);
  328. if (is_qebsm(q)) {
  329. schid = q->irq_ptr->sch_token;
  330. fc |= QDIO_SIGA_QEBSM_FLAG;
  331. }
  332. cc = do_siga_input(schid, q->mask, fc);
  333. if (unlikely(cc))
  334. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  335. return cc;
  336. }
  337. #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
  338. #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
  339. static inline void qdio_sync_queues(struct qdio_q *q)
  340. {
  341. /* PCI capable outbound queues will also be scanned so sync them too */
  342. if (pci_out_supported(q))
  343. qdio_siga_sync_all(q);
  344. else
  345. qdio_siga_sync_q(q);
  346. }
  347. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  348. unsigned char *state)
  349. {
  350. if (need_siga_sync(q))
  351. qdio_siga_sync_q(q);
  352. return get_buf_states(q, bufnr, state, 1, 0, 0);
  353. }
  354. static inline void qdio_stop_polling(struct qdio_q *q)
  355. {
  356. if (!q->u.in.polling)
  357. return;
  358. q->u.in.polling = 0;
  359. qperf_inc(q, stop_polling);
  360. /* show the card that we are not polling anymore */
  361. if (is_qebsm(q)) {
  362. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  363. q->u.in.ack_count);
  364. q->u.in.ack_count = 0;
  365. } else
  366. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  367. }
  368. static inline void account_sbals(struct qdio_q *q, int count)
  369. {
  370. int pos = 0;
  371. q->q_stats.nr_sbal_total += count;
  372. if (count == QDIO_MAX_BUFFERS_MASK) {
  373. q->q_stats.nr_sbals[7]++;
  374. return;
  375. }
  376. while (count >>= 1)
  377. pos++;
  378. q->q_stats.nr_sbals[pos]++;
  379. }
  380. static void process_buffer_error(struct qdio_q *q, int count)
  381. {
  382. unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
  383. SLSB_P_OUTPUT_NOT_INIT;
  384. q->qdio_error |= QDIO_ERROR_SLSB_STATE;
  385. /* special handling for no target buffer empty */
  386. if ((!q->is_input_q &&
  387. (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) {
  388. qperf_inc(q, target_full);
  389. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
  390. q->first_to_check);
  391. return;
  392. }
  393. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  394. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  395. DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
  396. DBF_ERROR("F14:%2x F15:%2x",
  397. q->sbal[q->first_to_check]->element[14].sflags,
  398. q->sbal[q->first_to_check]->element[15].sflags);
  399. /*
  400. * Interrupts may be avoided as long as the error is present
  401. * so change the buffer state immediately to avoid starvation.
  402. */
  403. set_buf_states(q, q->first_to_check, state, count);
  404. }
  405. static inline void inbound_primed(struct qdio_q *q, int count)
  406. {
  407. int new;
  408. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count);
  409. /* for QEBSM the ACK was already set by EQBS */
  410. if (is_qebsm(q)) {
  411. if (!q->u.in.polling) {
  412. q->u.in.polling = 1;
  413. q->u.in.ack_count = count;
  414. q->u.in.ack_start = q->first_to_check;
  415. return;
  416. }
  417. /* delete the previous ACK's */
  418. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  419. q->u.in.ack_count);
  420. q->u.in.ack_count = count;
  421. q->u.in.ack_start = q->first_to_check;
  422. return;
  423. }
  424. /*
  425. * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
  426. * or by the next inbound run.
  427. */
  428. new = add_buf(q->first_to_check, count - 1);
  429. if (q->u.in.polling) {
  430. /* reset the previous ACK but first set the new one */
  431. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  432. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  433. } else {
  434. q->u.in.polling = 1;
  435. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  436. }
  437. q->u.in.ack_start = new;
  438. count--;
  439. if (!count)
  440. return;
  441. /* need to change ALL buffers to get more interrupts */
  442. set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
  443. }
  444. static int get_inbound_buffer_frontier(struct qdio_q *q)
  445. {
  446. int count, stop;
  447. unsigned char state = 0;
  448. /*
  449. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  450. * would return 0.
  451. */
  452. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  453. stop = add_buf(q->first_to_check, count);
  454. if (q->first_to_check == stop)
  455. goto out;
  456. /*
  457. * No siga sync here, as a PCI or we after a thin interrupt
  458. * already sync'ed the queues.
  459. */
  460. count = get_buf_states(q, q->first_to_check, &state, count, 1, 0);
  461. if (!count)
  462. goto out;
  463. switch (state) {
  464. case SLSB_P_INPUT_PRIMED:
  465. inbound_primed(q, count);
  466. q->first_to_check = add_buf(q->first_to_check, count);
  467. if (atomic_sub(count, &q->nr_buf_used) == 0)
  468. qperf_inc(q, inbound_queue_full);
  469. if (q->irq_ptr->perf_stat_enabled)
  470. account_sbals(q, count);
  471. break;
  472. case SLSB_P_INPUT_ERROR:
  473. process_buffer_error(q, count);
  474. q->first_to_check = add_buf(q->first_to_check, count);
  475. atomic_sub(count, &q->nr_buf_used);
  476. if (q->irq_ptr->perf_stat_enabled)
  477. account_sbals_error(q, count);
  478. break;
  479. case SLSB_CU_INPUT_EMPTY:
  480. case SLSB_P_INPUT_NOT_INIT:
  481. case SLSB_P_INPUT_ACK:
  482. if (q->irq_ptr->perf_stat_enabled)
  483. q->q_stats.nr_sbal_nop++;
  484. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
  485. break;
  486. default:
  487. BUG();
  488. }
  489. out:
  490. return q->first_to_check;
  491. }
  492. static int qdio_inbound_q_moved(struct qdio_q *q)
  493. {
  494. int bufnr;
  495. bufnr = get_inbound_buffer_frontier(q);
  496. if ((bufnr != q->last_move) || q->qdio_error) {
  497. q->last_move = bufnr;
  498. if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
  499. q->u.in.timestamp = get_clock();
  500. return 1;
  501. } else
  502. return 0;
  503. }
  504. static inline int qdio_inbound_q_done(struct qdio_q *q)
  505. {
  506. unsigned char state = 0;
  507. if (!atomic_read(&q->nr_buf_used))
  508. return 1;
  509. if (need_siga_sync(q))
  510. qdio_siga_sync_q(q);
  511. get_buf_state(q, q->first_to_check, &state, 0);
  512. if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
  513. /* more work coming */
  514. return 0;
  515. if (is_thinint_irq(q->irq_ptr))
  516. return 1;
  517. /* don't poll under z/VM */
  518. if (MACHINE_IS_VM)
  519. return 1;
  520. /*
  521. * At this point we know, that inbound first_to_check
  522. * has (probably) not moved (see qdio_inbound_processing).
  523. */
  524. if (get_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
  525. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
  526. q->first_to_check);
  527. return 1;
  528. } else
  529. return 0;
  530. }
  531. static inline int contains_aobs(struct qdio_q *q)
  532. {
  533. return !q->is_input_q && q->u.out.use_cq;
  534. }
  535. static inline void qdio_trace_aob(struct qdio_irq *irq, struct qdio_q *q,
  536. int i, struct qaob *aob)
  537. {
  538. int tmp;
  539. DBF_DEV_EVENT(DBF_INFO, irq, "AOB%d:%lx", i,
  540. (unsigned long) virt_to_phys(aob));
  541. DBF_DEV_EVENT(DBF_INFO, irq, "RES00:%lx",
  542. (unsigned long) aob->res0[0]);
  543. DBF_DEV_EVENT(DBF_INFO, irq, "RES01:%lx",
  544. (unsigned long) aob->res0[1]);
  545. DBF_DEV_EVENT(DBF_INFO, irq, "RES02:%lx",
  546. (unsigned long) aob->res0[2]);
  547. DBF_DEV_EVENT(DBF_INFO, irq, "RES03:%lx",
  548. (unsigned long) aob->res0[3]);
  549. DBF_DEV_EVENT(DBF_INFO, irq, "RES04:%lx",
  550. (unsigned long) aob->res0[4]);
  551. DBF_DEV_EVENT(DBF_INFO, irq, "RES05:%lx",
  552. (unsigned long) aob->res0[5]);
  553. DBF_DEV_EVENT(DBF_INFO, irq, "RES1:%x", aob->res1);
  554. DBF_DEV_EVENT(DBF_INFO, irq, "RES2:%x", aob->res2);
  555. DBF_DEV_EVENT(DBF_INFO, irq, "RES3:%x", aob->res3);
  556. DBF_DEV_EVENT(DBF_INFO, irq, "AORC:%u", aob->aorc);
  557. DBF_DEV_EVENT(DBF_INFO, irq, "FLAGS:%u", aob->flags);
  558. DBF_DEV_EVENT(DBF_INFO, irq, "CBTBS:%u", aob->cbtbs);
  559. DBF_DEV_EVENT(DBF_INFO, irq, "SBC:%u", aob->sb_count);
  560. for (tmp = 0; tmp < QDIO_MAX_ELEMENTS_PER_BUFFER; ++tmp) {
  561. DBF_DEV_EVENT(DBF_INFO, irq, "SBA%d:%lx", tmp,
  562. (unsigned long) aob->sba[tmp]);
  563. DBF_DEV_EVENT(DBF_INFO, irq, "rSBA%d:%lx", tmp,
  564. (unsigned long) q->sbal[i]->element[tmp].addr);
  565. DBF_DEV_EVENT(DBF_INFO, irq, "DC%d:%u", tmp, aob->dcount[tmp]);
  566. DBF_DEV_EVENT(DBF_INFO, irq, "rDC%d:%u", tmp,
  567. q->sbal[i]->element[tmp].length);
  568. }
  569. DBF_DEV_EVENT(DBF_INFO, irq, "USER0:%lx", (unsigned long) aob->user0);
  570. for (tmp = 0; tmp < 2; ++tmp) {
  571. DBF_DEV_EVENT(DBF_INFO, irq, "RES4%d:%lx", tmp,
  572. (unsigned long) aob->res4[tmp]);
  573. }
  574. DBF_DEV_EVENT(DBF_INFO, irq, "USER1:%lx", (unsigned long) aob->user1);
  575. DBF_DEV_EVENT(DBF_INFO, irq, "USER2:%lx", (unsigned long) aob->user2);
  576. }
  577. static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count)
  578. {
  579. unsigned char state = 0;
  580. int j, b = start;
  581. if (!contains_aobs(q))
  582. return;
  583. for (j = 0; j < count; ++j) {
  584. get_buf_state(q, b, &state, 0);
  585. if (state == SLSB_P_OUTPUT_PENDING) {
  586. struct qaob *aob = q->u.out.aobs[b];
  587. if (aob == NULL)
  588. continue;
  589. BUG_ON(q->u.out.sbal_state == NULL);
  590. q->u.out.sbal_state[b].flags |=
  591. QDIO_OUTBUF_STATE_FLAG_PENDING;
  592. q->u.out.aobs[b] = NULL;
  593. } else if (state == SLSB_P_OUTPUT_EMPTY) {
  594. BUG_ON(q->u.out.sbal_state == NULL);
  595. q->u.out.sbal_state[b].aob = NULL;
  596. }
  597. b = next_buf(b);
  598. }
  599. }
  600. static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
  601. int bufnr)
  602. {
  603. unsigned long phys_aob = 0;
  604. if (!q->use_cq)
  605. goto out;
  606. if (!q->aobs[bufnr]) {
  607. struct qaob *aob = qdio_allocate_aob();
  608. q->aobs[bufnr] = aob;
  609. }
  610. if (q->aobs[bufnr]) {
  611. BUG_ON(q->sbal_state == NULL);
  612. q->sbal_state[bufnr].flags = QDIO_OUTBUF_STATE_FLAG_NONE;
  613. q->sbal_state[bufnr].aob = q->aobs[bufnr];
  614. q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
  615. phys_aob = virt_to_phys(q->aobs[bufnr]);
  616. BUG_ON(phys_aob & 0xFF);
  617. }
  618. out:
  619. return phys_aob;
  620. }
  621. static void qdio_kick_handler(struct qdio_q *q)
  622. {
  623. int start = q->first_to_kick;
  624. int end = q->first_to_check;
  625. int count;
  626. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  627. return;
  628. count = sub_buf(end, start);
  629. if (q->is_input_q) {
  630. qperf_inc(q, inbound_handler);
  631. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
  632. } else {
  633. qperf_inc(q, outbound_handler);
  634. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
  635. start, count);
  636. }
  637. qdio_handle_aobs(q, start, count);
  638. q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
  639. q->irq_ptr->int_parm);
  640. /* for the next time */
  641. q->first_to_kick = end;
  642. q->qdio_error = 0;
  643. }
  644. static void __qdio_inbound_processing(struct qdio_q *q)
  645. {
  646. qperf_inc(q, tasklet_inbound);
  647. if (!qdio_inbound_q_moved(q))
  648. return;
  649. qdio_kick_handler(q);
  650. if (!qdio_inbound_q_done(q)) {
  651. /* means poll time is not yet over */
  652. qperf_inc(q, tasklet_inbound_resched);
  653. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  654. tasklet_schedule(&q->tasklet);
  655. return;
  656. }
  657. }
  658. qdio_stop_polling(q);
  659. /*
  660. * We need to check again to not lose initiative after
  661. * resetting the ACK state.
  662. */
  663. if (!qdio_inbound_q_done(q)) {
  664. qperf_inc(q, tasklet_inbound_resched2);
  665. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  666. tasklet_schedule(&q->tasklet);
  667. }
  668. }
  669. void qdio_inbound_processing(unsigned long data)
  670. {
  671. struct qdio_q *q = (struct qdio_q *)data;
  672. __qdio_inbound_processing(q);
  673. }
  674. static int get_outbound_buffer_frontier(struct qdio_q *q)
  675. {
  676. int count, stop;
  677. unsigned char state = 0;
  678. if (need_siga_sync(q))
  679. if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
  680. !pci_out_supported(q)) ||
  681. (queue_type(q) == QDIO_IQDIO_QFMT &&
  682. multicast_outbound(q)))
  683. qdio_siga_sync_q(q);
  684. /*
  685. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  686. * would return 0.
  687. */
  688. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  689. stop = add_buf(q->first_to_check, count);
  690. if (q->first_to_check == stop)
  691. goto out;
  692. count = get_buf_states(q, q->first_to_check, &state, count, 0, 1);
  693. if (!count)
  694. goto out;
  695. switch (state) {
  696. case SLSB_P_OUTPUT_PENDING:
  697. BUG();
  698. case SLSB_P_OUTPUT_EMPTY:
  699. /* the adapter got it */
  700. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
  701. "out empty:%1d %02x", q->nr, count);
  702. atomic_sub(count, &q->nr_buf_used);
  703. q->first_to_check = add_buf(q->first_to_check, count);
  704. if (q->irq_ptr->perf_stat_enabled)
  705. account_sbals(q, count);
  706. break;
  707. case SLSB_P_OUTPUT_ERROR:
  708. process_buffer_error(q, count);
  709. q->first_to_check = add_buf(q->first_to_check, count);
  710. atomic_sub(count, &q->nr_buf_used);
  711. if (q->irq_ptr->perf_stat_enabled)
  712. account_sbals_error(q, count);
  713. break;
  714. case SLSB_CU_OUTPUT_PRIMED:
  715. /* the adapter has not fetched the output yet */
  716. if (q->irq_ptr->perf_stat_enabled)
  717. q->q_stats.nr_sbal_nop++;
  718. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
  719. q->nr);
  720. break;
  721. case SLSB_P_OUTPUT_NOT_INIT:
  722. case SLSB_P_OUTPUT_HALTED:
  723. break;
  724. default:
  725. BUG();
  726. }
  727. out:
  728. return q->first_to_check;
  729. }
  730. /* all buffers processed? */
  731. static inline int qdio_outbound_q_done(struct qdio_q *q)
  732. {
  733. return atomic_read(&q->nr_buf_used) == 0;
  734. }
  735. static inline int qdio_outbound_q_moved(struct qdio_q *q)
  736. {
  737. int bufnr;
  738. bufnr = get_outbound_buffer_frontier(q);
  739. if ((bufnr != q->last_move) || q->qdio_error) {
  740. q->last_move = bufnr;
  741. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
  742. return 1;
  743. } else
  744. return 0;
  745. }
  746. static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob)
  747. {
  748. int retries = 0, cc;
  749. unsigned int busy_bit;
  750. if (!need_siga_out(q))
  751. return 0;
  752. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  753. retry:
  754. qperf_inc(q, siga_write);
  755. cc = qdio_siga_output(q, &busy_bit, aob);
  756. switch (cc) {
  757. case 0:
  758. break;
  759. case 2:
  760. if (busy_bit) {
  761. while (++retries < QDIO_BUSY_BIT_RETRIES) {
  762. mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
  763. goto retry;
  764. }
  765. DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
  766. cc |= QDIO_ERROR_SIGA_BUSY;
  767. } else
  768. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  769. break;
  770. case 1:
  771. case 3:
  772. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  773. break;
  774. }
  775. if (retries) {
  776. DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
  777. DBF_ERROR("count:%u", retries);
  778. }
  779. return cc;
  780. }
  781. static void __qdio_outbound_processing(struct qdio_q *q)
  782. {
  783. qperf_inc(q, tasklet_outbound);
  784. BUG_ON(atomic_read(&q->nr_buf_used) < 0);
  785. if (qdio_outbound_q_moved(q))
  786. qdio_kick_handler(q);
  787. if (queue_type(q) == QDIO_ZFCP_QFMT)
  788. if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
  789. goto sched;
  790. /* bail out for HiperSockets unicast queues */
  791. if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q))
  792. return;
  793. if ((queue_type(q) == QDIO_IQDIO_QFMT) &&
  794. (atomic_read(&q->nr_buf_used)) > QDIO_IQDIO_POLL_LVL)
  795. goto sched;
  796. if (q->u.out.pci_out_enabled)
  797. return;
  798. /*
  799. * Now we know that queue type is either qeth without pci enabled
  800. * or HiperSockets multicast. Make sure buffer switch from PRIMED to
  801. * EMPTY is noticed and outbound_handler is called after some time.
  802. */
  803. if (qdio_outbound_q_done(q))
  804. del_timer(&q->u.out.timer);
  805. else
  806. if (!timer_pending(&q->u.out.timer))
  807. mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
  808. return;
  809. sched:
  810. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  811. return;
  812. tasklet_schedule(&q->tasklet);
  813. }
  814. /* outbound tasklet */
  815. void qdio_outbound_processing(unsigned long data)
  816. {
  817. struct qdio_q *q = (struct qdio_q *)data;
  818. __qdio_outbound_processing(q);
  819. }
  820. void qdio_outbound_timer(unsigned long data)
  821. {
  822. struct qdio_q *q = (struct qdio_q *)data;
  823. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  824. return;
  825. tasklet_schedule(&q->tasklet);
  826. }
  827. static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
  828. {
  829. struct qdio_q *out;
  830. int i;
  831. if (!pci_out_supported(q))
  832. return;
  833. for_each_output_queue(q->irq_ptr, out, i)
  834. if (!qdio_outbound_q_done(out))
  835. tasklet_schedule(&out->tasklet);
  836. }
  837. static void __tiqdio_inbound_processing(struct qdio_q *q)
  838. {
  839. qperf_inc(q, tasklet_inbound);
  840. if (need_siga_sync(q) && need_siga_sync_after_ai(q))
  841. qdio_sync_queues(q);
  842. /*
  843. * The interrupt could be caused by a PCI request. Check the
  844. * PCI capable outbound queues.
  845. */
  846. qdio_check_outbound_after_thinint(q);
  847. if (!qdio_inbound_q_moved(q))
  848. return;
  849. qdio_kick_handler(q);
  850. if (!qdio_inbound_q_done(q)) {
  851. qperf_inc(q, tasklet_inbound_resched);
  852. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  853. tasklet_schedule(&q->tasklet);
  854. return;
  855. }
  856. }
  857. qdio_stop_polling(q);
  858. /*
  859. * We need to check again to not lose initiative after
  860. * resetting the ACK state.
  861. */
  862. if (!qdio_inbound_q_done(q)) {
  863. qperf_inc(q, tasklet_inbound_resched2);
  864. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  865. tasklet_schedule(&q->tasklet);
  866. }
  867. }
  868. void tiqdio_inbound_processing(unsigned long data)
  869. {
  870. struct qdio_q *q = (struct qdio_q *)data;
  871. __tiqdio_inbound_processing(q);
  872. }
  873. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  874. enum qdio_irq_states state)
  875. {
  876. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  877. irq_ptr->state = state;
  878. mb();
  879. }
  880. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  881. {
  882. if (irb->esw.esw0.erw.cons) {
  883. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  884. DBF_ERROR_HEX(irb, 64);
  885. DBF_ERROR_HEX(irb->ecw, 64);
  886. }
  887. }
  888. /* PCI interrupt handler */
  889. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  890. {
  891. int i;
  892. struct qdio_q *q;
  893. if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  894. return;
  895. for_each_input_queue(irq_ptr, q, i) {
  896. if (q->u.in.queue_start_poll) {
  897. /* skip if polling is enabled or already in work */
  898. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  899. &q->u.in.queue_irq_state)) {
  900. qperf_inc(q, int_discarded);
  901. continue;
  902. }
  903. q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
  904. q->irq_ptr->int_parm);
  905. } else {
  906. tasklet_schedule(&q->tasklet);
  907. }
  908. }
  909. if (!pci_out_supported(q))
  910. return;
  911. for_each_output_queue(irq_ptr, q, i) {
  912. if (qdio_outbound_q_done(q))
  913. continue;
  914. if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
  915. qdio_siga_sync_q(q);
  916. tasklet_schedule(&q->tasklet);
  917. }
  918. }
  919. static void qdio_handle_activate_check(struct ccw_device *cdev,
  920. unsigned long intparm, int cstat, int dstat)
  921. {
  922. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  923. struct qdio_q *q;
  924. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  925. DBF_ERROR("intp :%lx", intparm);
  926. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  927. if (irq_ptr->nr_input_qs) {
  928. q = irq_ptr->input_qs[0];
  929. } else if (irq_ptr->nr_output_qs) {
  930. q = irq_ptr->output_qs[0];
  931. } else {
  932. dump_stack();
  933. goto no_handler;
  934. }
  935. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  936. 0, -1, -1, irq_ptr->int_parm);
  937. no_handler:
  938. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  939. }
  940. static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
  941. int dstat)
  942. {
  943. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  944. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  945. if (cstat)
  946. goto error;
  947. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  948. goto error;
  949. if (!(dstat & DEV_STAT_DEV_END))
  950. goto error;
  951. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  952. return;
  953. error:
  954. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  955. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  956. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  957. }
  958. /* qdio interrupt handler */
  959. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  960. struct irb *irb)
  961. {
  962. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  963. int cstat, dstat;
  964. if (!intparm || !irq_ptr) {
  965. DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
  966. return;
  967. }
  968. kstat_cpu(smp_processor_id()).irqs[IOINT_QDI]++;
  969. if (irq_ptr->perf_stat_enabled)
  970. irq_ptr->perf_stat.qdio_int++;
  971. if (IS_ERR(irb)) {
  972. switch (PTR_ERR(irb)) {
  973. case -EIO:
  974. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  975. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  976. wake_up(&cdev->private->wait_q);
  977. return;
  978. default:
  979. WARN_ON(1);
  980. return;
  981. }
  982. }
  983. qdio_irq_check_sense(irq_ptr, irb);
  984. cstat = irb->scsw.cmd.cstat;
  985. dstat = irb->scsw.cmd.dstat;
  986. switch (irq_ptr->state) {
  987. case QDIO_IRQ_STATE_INACTIVE:
  988. qdio_establish_handle_irq(cdev, cstat, dstat);
  989. break;
  990. case QDIO_IRQ_STATE_CLEANUP:
  991. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  992. break;
  993. case QDIO_IRQ_STATE_ESTABLISHED:
  994. case QDIO_IRQ_STATE_ACTIVE:
  995. if (cstat & SCHN_STAT_PCI) {
  996. qdio_int_handler_pci(irq_ptr);
  997. return;
  998. }
  999. if (cstat || dstat)
  1000. qdio_handle_activate_check(cdev, intparm, cstat,
  1001. dstat);
  1002. break;
  1003. case QDIO_IRQ_STATE_STOPPED:
  1004. break;
  1005. default:
  1006. WARN_ON(1);
  1007. }
  1008. wake_up(&cdev->private->wait_q);
  1009. }
  1010. /**
  1011. * qdio_get_ssqd_desc - get qdio subchannel description
  1012. * @cdev: ccw device to get description for
  1013. * @data: where to store the ssqd
  1014. *
  1015. * Returns 0 or an error code. The results of the chsc are stored in the
  1016. * specified structure.
  1017. */
  1018. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  1019. struct qdio_ssqd_desc *data)
  1020. {
  1021. if (!cdev || !cdev->private)
  1022. return -EINVAL;
  1023. DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
  1024. return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
  1025. }
  1026. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  1027. static void qdio_shutdown_queues(struct ccw_device *cdev)
  1028. {
  1029. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1030. struct qdio_q *q;
  1031. int i;
  1032. for_each_input_queue(irq_ptr, q, i)
  1033. tasklet_kill(&q->tasklet);
  1034. for_each_output_queue(irq_ptr, q, i) {
  1035. del_timer(&q->u.out.timer);
  1036. tasklet_kill(&q->tasklet);
  1037. }
  1038. }
  1039. /**
  1040. * qdio_shutdown - shut down a qdio subchannel
  1041. * @cdev: associated ccw device
  1042. * @how: use halt or clear to shutdown
  1043. */
  1044. int qdio_shutdown(struct ccw_device *cdev, int how)
  1045. {
  1046. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1047. int rc;
  1048. unsigned long flags;
  1049. if (!irq_ptr)
  1050. return -ENODEV;
  1051. BUG_ON(irqs_disabled());
  1052. DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
  1053. mutex_lock(&irq_ptr->setup_mutex);
  1054. /*
  1055. * Subchannel was already shot down. We cannot prevent being called
  1056. * twice since cio may trigger a shutdown asynchronously.
  1057. */
  1058. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1059. mutex_unlock(&irq_ptr->setup_mutex);
  1060. return 0;
  1061. }
  1062. /*
  1063. * Indicate that the device is going down. Scheduling the queue
  1064. * tasklets is forbidden from here on.
  1065. */
  1066. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  1067. tiqdio_remove_input_queues(irq_ptr);
  1068. qdio_shutdown_queues(cdev);
  1069. qdio_shutdown_debug_entries(irq_ptr, cdev);
  1070. /* cleanup subchannel */
  1071. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  1072. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  1073. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  1074. else
  1075. /* default behaviour is halt */
  1076. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  1077. if (rc) {
  1078. DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
  1079. DBF_ERROR("rc:%4d", rc);
  1080. goto no_cleanup;
  1081. }
  1082. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
  1083. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  1084. wait_event_interruptible_timeout(cdev->private->wait_q,
  1085. irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
  1086. irq_ptr->state == QDIO_IRQ_STATE_ERR,
  1087. 10 * HZ);
  1088. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  1089. no_cleanup:
  1090. qdio_shutdown_thinint(irq_ptr);
  1091. /* restore interrupt handler */
  1092. if ((void *)cdev->handler == (void *)qdio_int_handler)
  1093. cdev->handler = irq_ptr->orig_handler;
  1094. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  1095. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1096. mutex_unlock(&irq_ptr->setup_mutex);
  1097. if (rc)
  1098. return rc;
  1099. return 0;
  1100. }
  1101. EXPORT_SYMBOL_GPL(qdio_shutdown);
  1102. /**
  1103. * qdio_free - free data structures for a qdio subchannel
  1104. * @cdev: associated ccw device
  1105. */
  1106. int qdio_free(struct ccw_device *cdev)
  1107. {
  1108. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1109. if (!irq_ptr)
  1110. return -ENODEV;
  1111. DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
  1112. mutex_lock(&irq_ptr->setup_mutex);
  1113. if (irq_ptr->debug_area != NULL) {
  1114. debug_unregister(irq_ptr->debug_area);
  1115. irq_ptr->debug_area = NULL;
  1116. }
  1117. cdev->private->qdio_data = NULL;
  1118. mutex_unlock(&irq_ptr->setup_mutex);
  1119. qdio_release_memory(irq_ptr);
  1120. return 0;
  1121. }
  1122. EXPORT_SYMBOL_GPL(qdio_free);
  1123. /**
  1124. * qdio_allocate - allocate qdio queues and associated data
  1125. * @init_data: initialization data
  1126. */
  1127. int qdio_allocate(struct qdio_initialize *init_data)
  1128. {
  1129. struct qdio_irq *irq_ptr;
  1130. DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
  1131. if ((init_data->no_input_qs && !init_data->input_handler) ||
  1132. (init_data->no_output_qs && !init_data->output_handler))
  1133. return -EINVAL;
  1134. if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
  1135. (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
  1136. return -EINVAL;
  1137. if ((!init_data->input_sbal_addr_array) ||
  1138. (!init_data->output_sbal_addr_array))
  1139. return -EINVAL;
  1140. /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
  1141. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1142. if (!irq_ptr)
  1143. goto out_err;
  1144. mutex_init(&irq_ptr->setup_mutex);
  1145. qdio_allocate_dbf(init_data, irq_ptr);
  1146. /*
  1147. * Allocate a page for the chsc calls in qdio_establish.
  1148. * Must be pre-allocated since a zfcp recovery will call
  1149. * qdio_establish. In case of low memory and swap on a zfcp disk
  1150. * we may not be able to allocate memory otherwise.
  1151. */
  1152. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  1153. if (!irq_ptr->chsc_page)
  1154. goto out_rel;
  1155. /* qdr is used in ccw1.cda which is u32 */
  1156. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1157. if (!irq_ptr->qdr)
  1158. goto out_rel;
  1159. WARN_ON((unsigned long)irq_ptr->qdr & 0xfff);
  1160. if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
  1161. init_data->no_output_qs))
  1162. goto out_rel;
  1163. init_data->cdev->private->qdio_data = irq_ptr;
  1164. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1165. return 0;
  1166. out_rel:
  1167. qdio_release_memory(irq_ptr);
  1168. out_err:
  1169. return -ENOMEM;
  1170. }
  1171. EXPORT_SYMBOL_GPL(qdio_allocate);
  1172. static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
  1173. {
  1174. struct qdio_q *q = irq_ptr->input_qs[0];
  1175. int i, use_cq = 0;
  1176. if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
  1177. use_cq = 1;
  1178. for_each_output_queue(irq_ptr, q, i) {
  1179. if (use_cq) {
  1180. if (qdio_enable_async_operation(&q->u.out) < 0) {
  1181. use_cq = 0;
  1182. continue;
  1183. }
  1184. } else
  1185. qdio_disable_async_operation(&q->u.out);
  1186. }
  1187. DBF_EVENT("use_cq:%d", use_cq);
  1188. }
  1189. /**
  1190. * qdio_establish - establish queues on a qdio subchannel
  1191. * @init_data: initialization data
  1192. */
  1193. int qdio_establish(struct qdio_initialize *init_data)
  1194. {
  1195. struct qdio_irq *irq_ptr;
  1196. struct ccw_device *cdev = init_data->cdev;
  1197. unsigned long saveflags;
  1198. int rc;
  1199. DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
  1200. irq_ptr = cdev->private->qdio_data;
  1201. if (!irq_ptr)
  1202. return -ENODEV;
  1203. if (cdev->private->state != DEV_STATE_ONLINE)
  1204. return -EINVAL;
  1205. mutex_lock(&irq_ptr->setup_mutex);
  1206. qdio_setup_irq(init_data);
  1207. rc = qdio_establish_thinint(irq_ptr);
  1208. if (rc) {
  1209. mutex_unlock(&irq_ptr->setup_mutex);
  1210. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1211. return rc;
  1212. }
  1213. /* establish q */
  1214. irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
  1215. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1216. irq_ptr->ccw.count = irq_ptr->equeue.count;
  1217. irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
  1218. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1219. ccw_device_set_options_mask(cdev, 0);
  1220. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  1221. if (rc) {
  1222. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  1223. DBF_ERROR("rc:%4x", rc);
  1224. }
  1225. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1226. if (rc) {
  1227. mutex_unlock(&irq_ptr->setup_mutex);
  1228. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1229. return rc;
  1230. }
  1231. wait_event_interruptible_timeout(cdev->private->wait_q,
  1232. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  1233. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  1234. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  1235. mutex_unlock(&irq_ptr->setup_mutex);
  1236. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1237. return -EIO;
  1238. }
  1239. qdio_setup_ssqd_info(irq_ptr);
  1240. DBF_EVENT("qib ac:%4x", irq_ptr->qib.ac);
  1241. qdio_detect_hsicq(irq_ptr);
  1242. /* qebsm is now setup if available, initialize buffer states */
  1243. qdio_init_buf_states(irq_ptr);
  1244. mutex_unlock(&irq_ptr->setup_mutex);
  1245. qdio_print_subchannel_info(irq_ptr, cdev);
  1246. qdio_setup_debug_entries(irq_ptr, cdev);
  1247. return 0;
  1248. }
  1249. EXPORT_SYMBOL_GPL(qdio_establish);
  1250. /**
  1251. * qdio_activate - activate queues on a qdio subchannel
  1252. * @cdev: associated cdev
  1253. */
  1254. int qdio_activate(struct ccw_device *cdev)
  1255. {
  1256. struct qdio_irq *irq_ptr;
  1257. int rc;
  1258. unsigned long saveflags;
  1259. DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
  1260. irq_ptr = cdev->private->qdio_data;
  1261. if (!irq_ptr)
  1262. return -ENODEV;
  1263. if (cdev->private->state != DEV_STATE_ONLINE)
  1264. return -EINVAL;
  1265. mutex_lock(&irq_ptr->setup_mutex);
  1266. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1267. rc = -EBUSY;
  1268. goto out;
  1269. }
  1270. irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
  1271. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1272. irq_ptr->ccw.count = irq_ptr->aqueue.count;
  1273. irq_ptr->ccw.cda = 0;
  1274. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1275. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1276. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1277. 0, DOIO_DENY_PREFETCH);
  1278. if (rc) {
  1279. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1280. DBF_ERROR("rc:%4x", rc);
  1281. }
  1282. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1283. if (rc)
  1284. goto out;
  1285. if (is_thinint_irq(irq_ptr))
  1286. tiqdio_add_input_queues(irq_ptr);
  1287. /* wait for subchannel to become active */
  1288. msleep(5);
  1289. switch (irq_ptr->state) {
  1290. case QDIO_IRQ_STATE_STOPPED:
  1291. case QDIO_IRQ_STATE_ERR:
  1292. rc = -EIO;
  1293. break;
  1294. default:
  1295. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1296. rc = 0;
  1297. }
  1298. out:
  1299. mutex_unlock(&irq_ptr->setup_mutex);
  1300. return rc;
  1301. }
  1302. EXPORT_SYMBOL_GPL(qdio_activate);
  1303. static inline int buf_in_between(int bufnr, int start, int count)
  1304. {
  1305. int end = add_buf(start, count);
  1306. if (end > start) {
  1307. if (bufnr >= start && bufnr < end)
  1308. return 1;
  1309. else
  1310. return 0;
  1311. }
  1312. /* wrap-around case */
  1313. if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
  1314. (bufnr < end))
  1315. return 1;
  1316. else
  1317. return 0;
  1318. }
  1319. /**
  1320. * handle_inbound - reset processed input buffers
  1321. * @q: queue containing the buffers
  1322. * @callflags: flags
  1323. * @bufnr: first buffer to process
  1324. * @count: how many buffers are emptied
  1325. */
  1326. static int handle_inbound(struct qdio_q *q, unsigned int callflags,
  1327. int bufnr, int count)
  1328. {
  1329. int used, diff;
  1330. qperf_inc(q, inbound_call);
  1331. if (!q->u.in.polling)
  1332. goto set;
  1333. /* protect against stop polling setting an ACK for an emptied slsb */
  1334. if (count == QDIO_MAX_BUFFERS_PER_Q) {
  1335. /* overwriting everything, just delete polling status */
  1336. q->u.in.polling = 0;
  1337. q->u.in.ack_count = 0;
  1338. goto set;
  1339. } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
  1340. if (is_qebsm(q)) {
  1341. /* partial overwrite, just update ack_start */
  1342. diff = add_buf(bufnr, count);
  1343. diff = sub_buf(diff, q->u.in.ack_start);
  1344. q->u.in.ack_count -= diff;
  1345. if (q->u.in.ack_count <= 0) {
  1346. q->u.in.polling = 0;
  1347. q->u.in.ack_count = 0;
  1348. goto set;
  1349. }
  1350. q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
  1351. }
  1352. else
  1353. /* the only ACK will be deleted, so stop polling */
  1354. q->u.in.polling = 0;
  1355. }
  1356. set:
  1357. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1358. used = atomic_add_return(count, &q->nr_buf_used) - count;
  1359. BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q);
  1360. /* no need to signal as long as the adapter had free buffers */
  1361. if (used)
  1362. return 0;
  1363. if (need_siga_in(q))
  1364. return qdio_siga_input(q);
  1365. return 0;
  1366. }
  1367. /**
  1368. * handle_outbound - process filled outbound buffers
  1369. * @q: queue containing the buffers
  1370. * @callflags: flags
  1371. * @bufnr: first buffer to process
  1372. * @count: how many buffers are filled
  1373. */
  1374. static int handle_outbound(struct qdio_q *q, unsigned int callflags,
  1375. int bufnr, int count)
  1376. {
  1377. unsigned char state = 0;
  1378. int used, rc = 0;
  1379. qperf_inc(q, outbound_call);
  1380. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1381. used = atomic_add_return(count, &q->nr_buf_used);
  1382. BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q);
  1383. if (used == QDIO_MAX_BUFFERS_PER_Q)
  1384. qperf_inc(q, outbound_queue_full);
  1385. if (callflags & QDIO_FLAG_PCI_OUT) {
  1386. q->u.out.pci_out_enabled = 1;
  1387. qperf_inc(q, pci_request_int);
  1388. } else
  1389. q->u.out.pci_out_enabled = 0;
  1390. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1391. unsigned long phys_aob = 0;
  1392. /* One SIGA-W per buffer required for unicast HSI */
  1393. WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
  1394. phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
  1395. rc = qdio_kick_outbound_q(q, phys_aob);
  1396. } else if (need_siga_sync(q)) {
  1397. rc = qdio_siga_sync_q(q);
  1398. } else {
  1399. /* try to fast requeue buffers */
  1400. get_buf_state(q, prev_buf(bufnr), &state, 0);
  1401. if (state != SLSB_CU_OUTPUT_PRIMED)
  1402. rc = qdio_kick_outbound_q(q, 0);
  1403. else
  1404. qperf_inc(q, fast_requeue);
  1405. }
  1406. /* in case of SIGA errors we must process the error immediately */
  1407. if (used >= q->u.out.scan_threshold || rc)
  1408. tasklet_schedule(&q->tasklet);
  1409. else
  1410. /* free the SBALs in case of no further traffic */
  1411. if (!timer_pending(&q->u.out.timer))
  1412. mod_timer(&q->u.out.timer, jiffies + HZ);
  1413. return rc;
  1414. }
  1415. /**
  1416. * do_QDIO - process input or output buffers
  1417. * @cdev: associated ccw_device for the qdio subchannel
  1418. * @callflags: input or output and special flags from the program
  1419. * @q_nr: queue number
  1420. * @bufnr: buffer number
  1421. * @count: how many buffers to process
  1422. */
  1423. int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
  1424. int q_nr, unsigned int bufnr, unsigned int count)
  1425. {
  1426. struct qdio_irq *irq_ptr;
  1427. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1428. return -EINVAL;
  1429. irq_ptr = cdev->private->qdio_data;
  1430. if (!irq_ptr)
  1431. return -ENODEV;
  1432. DBF_DEV_EVENT(DBF_INFO, irq_ptr,
  1433. "do%02x b:%02x c:%02x", callflags, bufnr, count);
  1434. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1435. return -EBUSY;
  1436. if (!count)
  1437. return 0;
  1438. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1439. return handle_inbound(irq_ptr->input_qs[q_nr],
  1440. callflags, bufnr, count);
  1441. else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
  1442. return handle_outbound(irq_ptr->output_qs[q_nr],
  1443. callflags, bufnr, count);
  1444. return -EINVAL;
  1445. }
  1446. EXPORT_SYMBOL_GPL(do_QDIO);
  1447. /**
  1448. * qdio_start_irq - process input buffers
  1449. * @cdev: associated ccw_device for the qdio subchannel
  1450. * @nr: input queue number
  1451. *
  1452. * Return codes
  1453. * 0 - success
  1454. * 1 - irqs not started since new data is available
  1455. */
  1456. int qdio_start_irq(struct ccw_device *cdev, int nr)
  1457. {
  1458. struct qdio_q *q;
  1459. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1460. if (!irq_ptr)
  1461. return -ENODEV;
  1462. q = irq_ptr->input_qs[nr];
  1463. WARN_ON(queue_irqs_enabled(q));
  1464. if (!shared_ind(q))
  1465. xchg(q->irq_ptr->dsci, 0);
  1466. qdio_stop_polling(q);
  1467. clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
  1468. /*
  1469. * We need to check again to not lose initiative after
  1470. * resetting the ACK state.
  1471. */
  1472. if (!shared_ind(q) && *q->irq_ptr->dsci)
  1473. goto rescan;
  1474. if (!qdio_inbound_q_done(q))
  1475. goto rescan;
  1476. return 0;
  1477. rescan:
  1478. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1479. &q->u.in.queue_irq_state))
  1480. return 0;
  1481. else
  1482. return 1;
  1483. }
  1484. EXPORT_SYMBOL(qdio_start_irq);
  1485. /**
  1486. * qdio_get_next_buffers - process input buffers
  1487. * @cdev: associated ccw_device for the qdio subchannel
  1488. * @nr: input queue number
  1489. * @bufnr: first filled buffer number
  1490. * @error: buffers are in error state
  1491. *
  1492. * Return codes
  1493. * < 0 - error
  1494. * = 0 - no new buffers found
  1495. * > 0 - number of processed buffers
  1496. */
  1497. int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
  1498. int *error)
  1499. {
  1500. struct qdio_q *q;
  1501. int start, end;
  1502. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1503. if (!irq_ptr)
  1504. return -ENODEV;
  1505. q = irq_ptr->input_qs[nr];
  1506. WARN_ON(queue_irqs_enabled(q));
  1507. /*
  1508. * Cannot rely on automatic sync after interrupt since queues may
  1509. * also be examined without interrupt.
  1510. */
  1511. if (need_siga_sync(q))
  1512. qdio_sync_queues(q);
  1513. /* check the PCI capable outbound queues. */
  1514. qdio_check_outbound_after_thinint(q);
  1515. if (!qdio_inbound_q_moved(q))
  1516. return 0;
  1517. /* Note: upper-layer MUST stop processing immediately here ... */
  1518. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  1519. return -EIO;
  1520. start = q->first_to_kick;
  1521. end = q->first_to_check;
  1522. *bufnr = start;
  1523. *error = q->qdio_error;
  1524. /* for the next time */
  1525. q->first_to_kick = end;
  1526. q->qdio_error = 0;
  1527. return sub_buf(end, start);
  1528. }
  1529. EXPORT_SYMBOL(qdio_get_next_buffers);
  1530. /**
  1531. * qdio_stop_irq - disable interrupt processing for the device
  1532. * @cdev: associated ccw_device for the qdio subchannel
  1533. * @nr: input queue number
  1534. *
  1535. * Return codes
  1536. * 0 - interrupts were already disabled
  1537. * 1 - interrupts successfully disabled
  1538. */
  1539. int qdio_stop_irq(struct ccw_device *cdev, int nr)
  1540. {
  1541. struct qdio_q *q;
  1542. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1543. if (!irq_ptr)
  1544. return -ENODEV;
  1545. q = irq_ptr->input_qs[nr];
  1546. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1547. &q->u.in.queue_irq_state))
  1548. return 0;
  1549. else
  1550. return 1;
  1551. }
  1552. EXPORT_SYMBOL(qdio_stop_irq);
  1553. static int __init init_QDIO(void)
  1554. {
  1555. int rc;
  1556. rc = qdio_debug_init();
  1557. if (rc)
  1558. return rc;
  1559. rc = qdio_setup_init();
  1560. if (rc)
  1561. goto out_debug;
  1562. rc = tiqdio_allocate_memory();
  1563. if (rc)
  1564. goto out_cache;
  1565. rc = tiqdio_register_thinints();
  1566. if (rc)
  1567. goto out_ti;
  1568. return 0;
  1569. out_ti:
  1570. tiqdio_free_memory();
  1571. out_cache:
  1572. qdio_setup_exit();
  1573. out_debug:
  1574. qdio_debug_exit();
  1575. return rc;
  1576. }
  1577. static void __exit exit_QDIO(void)
  1578. {
  1579. tiqdio_unregister_thinints();
  1580. tiqdio_free_memory();
  1581. qdio_setup_exit();
  1582. qdio_debug_exit();
  1583. }
  1584. module_init(init_QDIO);
  1585. module_exit(exit_QDIO);