coda.c 51 KB

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  1. /*
  2. * Coda multi-standard codec IP
  3. *
  4. * Copyright (C) 2012 Vista Silicon S.L.
  5. * Javier Martin, <javier.martin@vista-silicon.com>
  6. * Xavier Duret
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/firmware.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/io.h>
  18. #include <linux/irq.h>
  19. #include <linux/module.h>
  20. #include <linux/of_device.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/slab.h>
  23. #include <linux/videodev2.h>
  24. #include <linux/of.h>
  25. #include <mach/iram.h>
  26. #include <media/v4l2-ctrls.h>
  27. #include <media/v4l2-device.h>
  28. #include <media/v4l2-ioctl.h>
  29. #include <media/v4l2-mem2mem.h>
  30. #include <media/videobuf2-core.h>
  31. #include <media/videobuf2-dma-contig.h>
  32. #include "coda.h"
  33. #define CODA_NAME "coda"
  34. #define CODA_MAX_INSTANCES 4
  35. #define CODA_FMO_BUF_SIZE 32
  36. #define CODADX6_WORK_BUF_SIZE (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  37. #define CODA7_WORK_BUF_SIZE (512 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  38. #define CODA_PARA_BUF_SIZE (10 * 1024)
  39. #define CODA_ISRAM_SIZE (2048 * 2)
  40. #define CODA7_IRAM_SIZE 0x14000 /* 81920 bytes */
  41. #define CODA_OUTPUT_BUFS 4
  42. #define CODA_CAPTURE_BUFS 2
  43. #define MAX_W 720
  44. #define MAX_H 576
  45. #define CODA_MAX_FRAME_SIZE 0x90000
  46. #define FMO_SLICE_SAVE_BUF_SIZE (32)
  47. #define CODA_DEFAULT_GAMMA 4096
  48. #define MIN_W 176
  49. #define MIN_H 144
  50. #define MAX_W 720
  51. #define MAX_H 576
  52. #define S_ALIGN 1 /* multiple of 2 */
  53. #define W_ALIGN 1 /* multiple of 2 */
  54. #define H_ALIGN 1 /* multiple of 2 */
  55. #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
  56. static int coda_debug;
  57. module_param(coda_debug, int, 0);
  58. MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
  59. enum {
  60. V4L2_M2M_SRC = 0,
  61. V4L2_M2M_DST = 1,
  62. };
  63. enum coda_fmt_type {
  64. CODA_FMT_ENC,
  65. CODA_FMT_RAW,
  66. };
  67. enum coda_inst_type {
  68. CODA_INST_ENCODER,
  69. CODA_INST_DECODER,
  70. };
  71. enum coda_product {
  72. CODA_DX6 = 0xf001,
  73. CODA_7541 = 0xf012,
  74. };
  75. struct coda_fmt {
  76. char *name;
  77. u32 fourcc;
  78. enum coda_fmt_type type;
  79. };
  80. struct coda_devtype {
  81. char *firmware;
  82. enum coda_product product;
  83. struct coda_fmt *formats;
  84. unsigned int num_formats;
  85. size_t workbuf_size;
  86. };
  87. /* Per-queue, driver-specific private data */
  88. struct coda_q_data {
  89. unsigned int width;
  90. unsigned int height;
  91. unsigned int sizeimage;
  92. struct coda_fmt *fmt;
  93. };
  94. struct coda_aux_buf {
  95. void *vaddr;
  96. dma_addr_t paddr;
  97. u32 size;
  98. };
  99. struct coda_dev {
  100. struct v4l2_device v4l2_dev;
  101. struct video_device vfd;
  102. struct platform_device *plat_dev;
  103. const struct coda_devtype *devtype;
  104. void __iomem *regs_base;
  105. struct clk *clk_per;
  106. struct clk *clk_ahb;
  107. struct coda_aux_buf codebuf;
  108. struct coda_aux_buf workbuf;
  109. long unsigned int iram_paddr;
  110. spinlock_t irqlock;
  111. struct mutex dev_mutex;
  112. struct v4l2_m2m_dev *m2m_dev;
  113. struct vb2_alloc_ctx *alloc_ctx;
  114. int instances;
  115. };
  116. struct coda_params {
  117. u8 h264_intra_qp;
  118. u8 h264_inter_qp;
  119. u8 mpeg4_intra_qp;
  120. u8 mpeg4_inter_qp;
  121. u8 gop_size;
  122. int codec_mode;
  123. enum v4l2_mpeg_video_multi_slice_mode slice_mode;
  124. u32 framerate;
  125. u16 bitrate;
  126. u32 slice_max_mb;
  127. };
  128. struct coda_ctx {
  129. struct coda_dev *dev;
  130. int aborting;
  131. int rawstreamon;
  132. int compstreamon;
  133. u32 isequence;
  134. struct coda_q_data q_data[2];
  135. enum coda_inst_type inst_type;
  136. enum v4l2_colorspace colorspace;
  137. struct coda_params params;
  138. struct v4l2_m2m_ctx *m2m_ctx;
  139. struct v4l2_ctrl_handler ctrls;
  140. struct v4l2_fh fh;
  141. struct vb2_buffer *reference;
  142. int gopcounter;
  143. char vpu_header[3][64];
  144. int vpu_header_size[3];
  145. struct coda_aux_buf parabuf;
  146. int idx;
  147. };
  148. static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
  149. {
  150. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  151. "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
  152. writel(data, dev->regs_base + reg);
  153. }
  154. static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
  155. {
  156. u32 data;
  157. data = readl(dev->regs_base + reg);
  158. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  159. "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
  160. return data;
  161. }
  162. static inline unsigned long coda_isbusy(struct coda_dev *dev)
  163. {
  164. return coda_read(dev, CODA_REG_BIT_BUSY);
  165. }
  166. static inline int coda_is_initialized(struct coda_dev *dev)
  167. {
  168. return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
  169. }
  170. static int coda_wait_timeout(struct coda_dev *dev)
  171. {
  172. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  173. while (coda_isbusy(dev)) {
  174. if (time_after(jiffies, timeout))
  175. return -ETIMEDOUT;
  176. }
  177. return 0;
  178. }
  179. static void coda_command_async(struct coda_ctx *ctx, int cmd)
  180. {
  181. struct coda_dev *dev = ctx->dev;
  182. coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
  183. coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
  184. coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
  185. coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
  186. }
  187. static int coda_command_sync(struct coda_ctx *ctx, int cmd)
  188. {
  189. struct coda_dev *dev = ctx->dev;
  190. coda_command_async(ctx, cmd);
  191. return coda_wait_timeout(dev);
  192. }
  193. static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
  194. enum v4l2_buf_type type)
  195. {
  196. switch (type) {
  197. case V4L2_BUF_TYPE_VIDEO_OUTPUT:
  198. return &(ctx->q_data[V4L2_M2M_SRC]);
  199. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  200. return &(ctx->q_data[V4L2_M2M_DST]);
  201. default:
  202. BUG();
  203. }
  204. return NULL;
  205. }
  206. /*
  207. * Add one array of supported formats for each version of Coda:
  208. * i.MX27 -> codadx6
  209. * i.MX51 -> coda7
  210. * i.MX6 -> coda960
  211. */
  212. static struct coda_fmt codadx6_formats[] = {
  213. {
  214. .name = "YUV 4:2:0 Planar",
  215. .fourcc = V4L2_PIX_FMT_YUV420,
  216. .type = CODA_FMT_RAW,
  217. },
  218. {
  219. .name = "H264 Encoded Stream",
  220. .fourcc = V4L2_PIX_FMT_H264,
  221. .type = CODA_FMT_ENC,
  222. },
  223. {
  224. .name = "MPEG4 Encoded Stream",
  225. .fourcc = V4L2_PIX_FMT_MPEG4,
  226. .type = CODA_FMT_ENC,
  227. },
  228. };
  229. static struct coda_fmt coda7_formats[] = {
  230. {
  231. .name = "YUV 4:2:0 Planar",
  232. .fourcc = V4L2_PIX_FMT_YUV420,
  233. .type = CODA_FMT_RAW,
  234. },
  235. {
  236. .name = "H264 Encoded Stream",
  237. .fourcc = V4L2_PIX_FMT_H264,
  238. .type = CODA_FMT_ENC,
  239. },
  240. {
  241. .name = "MPEG4 Encoded Stream",
  242. .fourcc = V4L2_PIX_FMT_MPEG4,
  243. .type = CODA_FMT_ENC,
  244. },
  245. };
  246. static struct coda_fmt *find_format(struct coda_dev *dev, struct v4l2_format *f)
  247. {
  248. struct coda_fmt *formats = dev->devtype->formats;
  249. int num_formats = dev->devtype->num_formats;
  250. unsigned int k;
  251. for (k = 0; k < num_formats; k++) {
  252. if (formats[k].fourcc == f->fmt.pix.pixelformat)
  253. break;
  254. }
  255. if (k == num_formats)
  256. return NULL;
  257. return &formats[k];
  258. }
  259. /*
  260. * V4L2 ioctl() operations.
  261. */
  262. static int vidioc_querycap(struct file *file, void *priv,
  263. struct v4l2_capability *cap)
  264. {
  265. strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
  266. strlcpy(cap->card, CODA_NAME, sizeof(cap->card));
  267. strlcpy(cap->bus_info, CODA_NAME, sizeof(cap->bus_info));
  268. /*
  269. * This is only a mem-to-mem video device. The capture and output
  270. * device capability flags are left only for backward compatibility
  271. * and are scheduled for removal.
  272. */
  273. cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
  274. V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
  275. cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
  276. return 0;
  277. }
  278. static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
  279. enum coda_fmt_type type)
  280. {
  281. struct coda_ctx *ctx = fh_to_ctx(priv);
  282. struct coda_dev *dev = ctx->dev;
  283. struct coda_fmt *formats = dev->devtype->formats;
  284. struct coda_fmt *fmt;
  285. int num_formats = dev->devtype->num_formats;
  286. int i, num = 0;
  287. for (i = 0; i < num_formats; i++) {
  288. if (formats[i].type == type) {
  289. if (num == f->index)
  290. break;
  291. ++num;
  292. }
  293. }
  294. if (i < num_formats) {
  295. fmt = &formats[i];
  296. strlcpy(f->description, fmt->name, sizeof(f->description));
  297. f->pixelformat = fmt->fourcc;
  298. return 0;
  299. }
  300. /* Format not found */
  301. return -EINVAL;
  302. }
  303. static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
  304. struct v4l2_fmtdesc *f)
  305. {
  306. return enum_fmt(priv, f, CODA_FMT_ENC);
  307. }
  308. static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
  309. struct v4l2_fmtdesc *f)
  310. {
  311. return enum_fmt(priv, f, CODA_FMT_RAW);
  312. }
  313. static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
  314. {
  315. struct vb2_queue *vq;
  316. struct coda_q_data *q_data;
  317. struct coda_ctx *ctx = fh_to_ctx(priv);
  318. vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
  319. if (!vq)
  320. return -EINVAL;
  321. q_data = get_q_data(ctx, f->type);
  322. f->fmt.pix.field = V4L2_FIELD_NONE;
  323. f->fmt.pix.pixelformat = q_data->fmt->fourcc;
  324. f->fmt.pix.width = q_data->width;
  325. f->fmt.pix.height = q_data->height;
  326. if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420)
  327. f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
  328. else /* encoded formats h.264/mpeg4 */
  329. f->fmt.pix.bytesperline = 0;
  330. f->fmt.pix.sizeimage = q_data->sizeimage;
  331. f->fmt.pix.colorspace = ctx->colorspace;
  332. return 0;
  333. }
  334. static int vidioc_try_fmt(struct coda_dev *dev, struct v4l2_format *f)
  335. {
  336. enum v4l2_field field;
  337. field = f->fmt.pix.field;
  338. if (field == V4L2_FIELD_ANY)
  339. field = V4L2_FIELD_NONE;
  340. else if (V4L2_FIELD_NONE != field)
  341. return -EINVAL;
  342. /* V4L2 specification suggests the driver corrects the format struct
  343. * if any of the dimensions is unsupported */
  344. f->fmt.pix.field = field;
  345. if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) {
  346. v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
  347. W_ALIGN, &f->fmt.pix.height,
  348. MIN_H, MAX_H, H_ALIGN, S_ALIGN);
  349. f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
  350. f->fmt.pix.sizeimage = f->fmt.pix.height *
  351. f->fmt.pix.bytesperline;
  352. } else { /*encoded formats h.264/mpeg4 */
  353. f->fmt.pix.bytesperline = 0;
  354. f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
  355. }
  356. return 0;
  357. }
  358. static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
  359. struct v4l2_format *f)
  360. {
  361. int ret;
  362. struct coda_fmt *fmt;
  363. struct coda_ctx *ctx = fh_to_ctx(priv);
  364. fmt = find_format(ctx->dev, f);
  365. /*
  366. * Since decoding support is not implemented yet do not allow
  367. * CODA_FMT_RAW formats in the capture interface.
  368. */
  369. if (!fmt || !(fmt->type == CODA_FMT_ENC))
  370. f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264;
  371. f->fmt.pix.colorspace = ctx->colorspace;
  372. ret = vidioc_try_fmt(ctx->dev, f);
  373. if (ret < 0)
  374. return ret;
  375. return 0;
  376. }
  377. static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
  378. struct v4l2_format *f)
  379. {
  380. struct coda_ctx *ctx = fh_to_ctx(priv);
  381. struct coda_fmt *fmt;
  382. int ret;
  383. fmt = find_format(ctx->dev, f);
  384. /*
  385. * Since decoding support is not implemented yet do not allow
  386. * CODA_FMT formats in the capture interface.
  387. */
  388. if (!fmt || !(fmt->type == CODA_FMT_RAW))
  389. f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420;
  390. if (!f->fmt.pix.colorspace)
  391. f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
  392. ret = vidioc_try_fmt(ctx->dev, f);
  393. if (ret < 0)
  394. return ret;
  395. return 0;
  396. }
  397. static int vidioc_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
  398. {
  399. struct coda_q_data *q_data;
  400. struct vb2_queue *vq;
  401. int ret;
  402. vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
  403. if (!vq)
  404. return -EINVAL;
  405. q_data = get_q_data(ctx, f->type);
  406. if (!q_data)
  407. return -EINVAL;
  408. if (vb2_is_busy(vq)) {
  409. v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
  410. return -EBUSY;
  411. }
  412. ret = vidioc_try_fmt(ctx->dev, f);
  413. if (ret)
  414. return ret;
  415. q_data->fmt = find_format(ctx->dev, f);
  416. q_data->width = f->fmt.pix.width;
  417. q_data->height = f->fmt.pix.height;
  418. if (q_data->fmt->fourcc == V4L2_PIX_FMT_YUV420) {
  419. q_data->sizeimage = q_data->width * q_data->height * 3 / 2;
  420. } else { /* encoded format h.264/mpeg-4 */
  421. q_data->sizeimage = CODA_MAX_FRAME_SIZE;
  422. }
  423. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  424. "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
  425. f->type, q_data->width, q_data->height, q_data->fmt->fourcc);
  426. return 0;
  427. }
  428. static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
  429. struct v4l2_format *f)
  430. {
  431. int ret;
  432. ret = vidioc_try_fmt_vid_cap(file, priv, f);
  433. if (ret)
  434. return ret;
  435. return vidioc_s_fmt(fh_to_ctx(priv), f);
  436. }
  437. static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
  438. struct v4l2_format *f)
  439. {
  440. struct coda_ctx *ctx = fh_to_ctx(priv);
  441. int ret;
  442. ret = vidioc_try_fmt_vid_out(file, priv, f);
  443. if (ret)
  444. return ret;
  445. ret = vidioc_s_fmt(ctx, f);
  446. if (ret)
  447. ctx->colorspace = f->fmt.pix.colorspace;
  448. return ret;
  449. }
  450. static int vidioc_reqbufs(struct file *file, void *priv,
  451. struct v4l2_requestbuffers *reqbufs)
  452. {
  453. struct coda_ctx *ctx = fh_to_ctx(priv);
  454. return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
  455. }
  456. static int vidioc_querybuf(struct file *file, void *priv,
  457. struct v4l2_buffer *buf)
  458. {
  459. struct coda_ctx *ctx = fh_to_ctx(priv);
  460. return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
  461. }
  462. static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
  463. {
  464. struct coda_ctx *ctx = fh_to_ctx(priv);
  465. return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
  466. }
  467. static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
  468. {
  469. struct coda_ctx *ctx = fh_to_ctx(priv);
  470. return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
  471. }
  472. static int vidioc_streamon(struct file *file, void *priv,
  473. enum v4l2_buf_type type)
  474. {
  475. struct coda_ctx *ctx = fh_to_ctx(priv);
  476. return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
  477. }
  478. static int vidioc_streamoff(struct file *file, void *priv,
  479. enum v4l2_buf_type type)
  480. {
  481. struct coda_ctx *ctx = fh_to_ctx(priv);
  482. return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
  483. }
  484. static const struct v4l2_ioctl_ops coda_ioctl_ops = {
  485. .vidioc_querycap = vidioc_querycap,
  486. .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
  487. .vidioc_g_fmt_vid_cap = vidioc_g_fmt,
  488. .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
  489. .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
  490. .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
  491. .vidioc_g_fmt_vid_out = vidioc_g_fmt,
  492. .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
  493. .vidioc_s_fmt_vid_out = vidioc_s_fmt_vid_out,
  494. .vidioc_reqbufs = vidioc_reqbufs,
  495. .vidioc_querybuf = vidioc_querybuf,
  496. .vidioc_qbuf = vidioc_qbuf,
  497. .vidioc_dqbuf = vidioc_dqbuf,
  498. .vidioc_streamon = vidioc_streamon,
  499. .vidioc_streamoff = vidioc_streamoff,
  500. };
  501. /*
  502. * Mem-to-mem operations.
  503. */
  504. static void coda_device_run(void *m2m_priv)
  505. {
  506. struct coda_ctx *ctx = m2m_priv;
  507. struct coda_q_data *q_data_src, *q_data_dst;
  508. struct vb2_buffer *src_buf, *dst_buf;
  509. struct coda_dev *dev = ctx->dev;
  510. int force_ipicture;
  511. int quant_param = 0;
  512. u32 picture_y, picture_cb, picture_cr;
  513. u32 pic_stream_buffer_addr, pic_stream_buffer_size;
  514. u32 dst_fourcc;
  515. src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
  516. dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  517. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  518. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  519. dst_fourcc = q_data_dst->fmt->fourcc;
  520. src_buf->v4l2_buf.sequence = ctx->isequence;
  521. dst_buf->v4l2_buf.sequence = ctx->isequence;
  522. ctx->isequence++;
  523. /*
  524. * Workaround coda firmware BUG that only marks the first
  525. * frame as IDR. This is a problem for some decoders that can't
  526. * recover when a frame is lost.
  527. */
  528. if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
  529. src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
  530. src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
  531. } else {
  532. src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
  533. src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
  534. }
  535. /*
  536. * Copy headers at the beginning of the first frame for H.264 only.
  537. * In MPEG4 they are already copied by the coda.
  538. */
  539. if (src_buf->v4l2_buf.sequence == 0) {
  540. pic_stream_buffer_addr =
  541. vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
  542. ctx->vpu_header_size[0] +
  543. ctx->vpu_header_size[1] +
  544. ctx->vpu_header_size[2];
  545. pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
  546. ctx->vpu_header_size[0] -
  547. ctx->vpu_header_size[1] -
  548. ctx->vpu_header_size[2];
  549. memcpy(vb2_plane_vaddr(dst_buf, 0),
  550. &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
  551. memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
  552. &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
  553. memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
  554. ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
  555. ctx->vpu_header_size[2]);
  556. } else {
  557. pic_stream_buffer_addr =
  558. vb2_dma_contig_plane_dma_addr(dst_buf, 0);
  559. pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
  560. }
  561. if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
  562. force_ipicture = 1;
  563. switch (dst_fourcc) {
  564. case V4L2_PIX_FMT_H264:
  565. quant_param = ctx->params.h264_intra_qp;
  566. break;
  567. case V4L2_PIX_FMT_MPEG4:
  568. quant_param = ctx->params.mpeg4_intra_qp;
  569. break;
  570. default:
  571. v4l2_warn(&ctx->dev->v4l2_dev,
  572. "cannot set intra qp, fmt not supported\n");
  573. break;
  574. }
  575. } else {
  576. force_ipicture = 0;
  577. switch (dst_fourcc) {
  578. case V4L2_PIX_FMT_H264:
  579. quant_param = ctx->params.h264_inter_qp;
  580. break;
  581. case V4L2_PIX_FMT_MPEG4:
  582. quant_param = ctx->params.mpeg4_inter_qp;
  583. break;
  584. default:
  585. v4l2_warn(&ctx->dev->v4l2_dev,
  586. "cannot set inter qp, fmt not supported\n");
  587. break;
  588. }
  589. }
  590. /* submit */
  591. coda_write(dev, 0, CODA_CMD_ENC_PIC_ROT_MODE);
  592. coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
  593. picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
  594. picture_cb = picture_y + q_data_src->width * q_data_src->height;
  595. picture_cr = picture_cb + q_data_src->width / 2 *
  596. q_data_src->height / 2;
  597. coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
  598. coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
  599. coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
  600. coda_write(dev, force_ipicture << 1 & 0x2,
  601. CODA_CMD_ENC_PIC_OPTION);
  602. coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
  603. coda_write(dev, pic_stream_buffer_size / 1024,
  604. CODA_CMD_ENC_PIC_BB_SIZE);
  605. if (dev->devtype->product == CODA_7541) {
  606. coda_write(dev, CODA7_USE_BIT_ENABLE | CODA7_USE_HOST_BIT_ENABLE |
  607. CODA7_USE_ME_ENABLE | CODA7_USE_HOST_ME_ENABLE,
  608. CODA7_REG_BIT_AXI_SRAM_USE);
  609. }
  610. coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
  611. }
  612. static int coda_job_ready(void *m2m_priv)
  613. {
  614. struct coda_ctx *ctx = m2m_priv;
  615. /*
  616. * For both 'P' and 'key' frame cases 1 picture
  617. * and 1 frame are needed.
  618. */
  619. if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) ||
  620. !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
  621. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  622. "not ready: not enough video buffers.\n");
  623. return 0;
  624. }
  625. /* For P frames a reference picture is needed too */
  626. if ((ctx->gopcounter != (ctx->params.gop_size - 1)) &&
  627. !ctx->reference) {
  628. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  629. "not ready: reference picture not available.\n");
  630. return 0;
  631. }
  632. if (coda_isbusy(ctx->dev)) {
  633. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  634. "not ready: coda is still busy.\n");
  635. return 0;
  636. }
  637. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  638. "job ready\n");
  639. return 1;
  640. }
  641. static void coda_job_abort(void *priv)
  642. {
  643. struct coda_ctx *ctx = priv;
  644. struct coda_dev *dev = ctx->dev;
  645. ctx->aborting = 1;
  646. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  647. "Aborting task\n");
  648. v4l2_m2m_job_finish(dev->m2m_dev, ctx->m2m_ctx);
  649. }
  650. static void coda_lock(void *m2m_priv)
  651. {
  652. struct coda_ctx *ctx = m2m_priv;
  653. struct coda_dev *pcdev = ctx->dev;
  654. mutex_lock(&pcdev->dev_mutex);
  655. }
  656. static void coda_unlock(void *m2m_priv)
  657. {
  658. struct coda_ctx *ctx = m2m_priv;
  659. struct coda_dev *pcdev = ctx->dev;
  660. mutex_unlock(&pcdev->dev_mutex);
  661. }
  662. static struct v4l2_m2m_ops coda_m2m_ops = {
  663. .device_run = coda_device_run,
  664. .job_ready = coda_job_ready,
  665. .job_abort = coda_job_abort,
  666. .lock = coda_lock,
  667. .unlock = coda_unlock,
  668. };
  669. static void set_default_params(struct coda_ctx *ctx)
  670. {
  671. struct coda_dev *dev = ctx->dev;
  672. ctx->params.codec_mode = CODA_MODE_INVALID;
  673. ctx->colorspace = V4L2_COLORSPACE_REC709;
  674. ctx->params.framerate = 30;
  675. ctx->reference = NULL;
  676. ctx->aborting = 0;
  677. /* Default formats for output and input queues */
  678. ctx->q_data[V4L2_M2M_SRC].fmt = &dev->devtype->formats[0];
  679. ctx->q_data[V4L2_M2M_DST].fmt = &dev->devtype->formats[1];
  680. ctx->q_data[V4L2_M2M_SRC].width = MAX_W;
  681. ctx->q_data[V4L2_M2M_SRC].height = MAX_H;
  682. ctx->q_data[V4L2_M2M_SRC].sizeimage = (MAX_W * MAX_H * 3) / 2;
  683. ctx->q_data[V4L2_M2M_DST].width = MAX_W;
  684. ctx->q_data[V4L2_M2M_DST].height = MAX_H;
  685. ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
  686. }
  687. /*
  688. * Queue operations
  689. */
  690. static int coda_queue_setup(struct vb2_queue *vq,
  691. const struct v4l2_format *fmt,
  692. unsigned int *nbuffers, unsigned int *nplanes,
  693. unsigned int sizes[], void *alloc_ctxs[])
  694. {
  695. struct coda_ctx *ctx = vb2_get_drv_priv(vq);
  696. unsigned int size;
  697. if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
  698. *nbuffers = CODA_OUTPUT_BUFS;
  699. if (fmt)
  700. size = fmt->fmt.pix.width *
  701. fmt->fmt.pix.height * 3 / 2;
  702. else
  703. size = MAX_W *
  704. MAX_H * 3 / 2;
  705. } else {
  706. *nbuffers = CODA_CAPTURE_BUFS;
  707. size = CODA_MAX_FRAME_SIZE;
  708. }
  709. *nplanes = 1;
  710. sizes[0] = size;
  711. alloc_ctxs[0] = ctx->dev->alloc_ctx;
  712. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  713. "get %d buffer(s) of size %d each.\n", *nbuffers, size);
  714. return 0;
  715. }
  716. static int coda_buf_prepare(struct vb2_buffer *vb)
  717. {
  718. struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  719. struct coda_q_data *q_data;
  720. q_data = get_q_data(ctx, vb->vb2_queue->type);
  721. if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
  722. v4l2_warn(&ctx->dev->v4l2_dev,
  723. "%s data will not fit into plane (%lu < %lu)\n",
  724. __func__, vb2_plane_size(vb, 0),
  725. (long)q_data->sizeimage);
  726. return -EINVAL;
  727. }
  728. vb2_set_plane_payload(vb, 0, q_data->sizeimage);
  729. return 0;
  730. }
  731. static void coda_buf_queue(struct vb2_buffer *vb)
  732. {
  733. struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  734. v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
  735. }
  736. static void coda_wait_prepare(struct vb2_queue *q)
  737. {
  738. struct coda_ctx *ctx = vb2_get_drv_priv(q);
  739. coda_unlock(ctx);
  740. }
  741. static void coda_wait_finish(struct vb2_queue *q)
  742. {
  743. struct coda_ctx *ctx = vb2_get_drv_priv(q);
  744. coda_lock(ctx);
  745. }
  746. static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
  747. {
  748. struct coda_ctx *ctx = vb2_get_drv_priv(q);
  749. struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
  750. u32 bitstream_buf, bitstream_size;
  751. struct coda_dev *dev = ctx->dev;
  752. struct coda_q_data *q_data_src, *q_data_dst;
  753. u32 dst_fourcc;
  754. struct vb2_buffer *buf;
  755. struct vb2_queue *src_vq;
  756. u32 value;
  757. int i = 0;
  758. if (count < 1)
  759. return -EINVAL;
  760. if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
  761. ctx->rawstreamon = 1;
  762. else
  763. ctx->compstreamon = 1;
  764. /* Don't start the coda unless both queues are on */
  765. if (!(ctx->rawstreamon & ctx->compstreamon))
  766. return 0;
  767. ctx->gopcounter = ctx->params.gop_size - 1;
  768. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  769. buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  770. bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
  771. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  772. bitstream_size = q_data_dst->sizeimage;
  773. dst_fourcc = q_data_dst->fmt->fourcc;
  774. /* Find out whether coda must encode or decode */
  775. if (q_data_src->fmt->type == CODA_FMT_RAW &&
  776. q_data_dst->fmt->type == CODA_FMT_ENC) {
  777. ctx->inst_type = CODA_INST_ENCODER;
  778. } else if (q_data_src->fmt->type == CODA_FMT_ENC &&
  779. q_data_dst->fmt->type == CODA_FMT_RAW) {
  780. ctx->inst_type = CODA_INST_DECODER;
  781. v4l2_err(v4l2_dev, "decoding not supported.\n");
  782. return -EINVAL;
  783. } else {
  784. v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
  785. return -EINVAL;
  786. }
  787. if (!coda_is_initialized(dev)) {
  788. v4l2_err(v4l2_dev, "coda is not initialized.\n");
  789. return -EFAULT;
  790. }
  791. coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
  792. coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->idx));
  793. coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->idx));
  794. switch (dev->devtype->product) {
  795. case CODA_DX6:
  796. coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
  797. CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
  798. break;
  799. default:
  800. coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
  801. CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
  802. }
  803. if (dev->devtype->product == CODA_DX6) {
  804. /* Configure the coda */
  805. coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
  806. }
  807. /* Could set rotation here if needed */
  808. switch (dev->devtype->product) {
  809. case CODA_DX6:
  810. value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
  811. break;
  812. default:
  813. value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
  814. }
  815. value |= (q_data_src->height & CODA_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
  816. coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
  817. coda_write(dev, ctx->params.framerate,
  818. CODA_CMD_ENC_SEQ_SRC_F_RATE);
  819. switch (dst_fourcc) {
  820. case V4L2_PIX_FMT_MPEG4:
  821. if (dev->devtype->product == CODA_DX6)
  822. ctx->params.codec_mode = CODADX6_MODE_ENCODE_MP4;
  823. else
  824. ctx->params.codec_mode = CODA7_MODE_ENCODE_MP4;
  825. coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
  826. coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
  827. break;
  828. case V4L2_PIX_FMT_H264:
  829. if (dev->devtype->product == CODA_DX6)
  830. ctx->params.codec_mode = CODADX6_MODE_ENCODE_H264;
  831. else
  832. ctx->params.codec_mode = CODA7_MODE_ENCODE_H264;
  833. coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
  834. coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
  835. break;
  836. default:
  837. v4l2_err(v4l2_dev,
  838. "dst format (0x%08x) invalid.\n", dst_fourcc);
  839. return -EINVAL;
  840. }
  841. value = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
  842. value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
  843. if (ctx->params.slice_mode == V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB)
  844. value |= 1 & CODA_SLICING_MODE_MASK;
  845. coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
  846. value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
  847. coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
  848. if (ctx->params.bitrate) {
  849. /* Rate control enabled */
  850. value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
  851. value |= 1 & CODA_RATECONTROL_ENABLE_MASK;
  852. } else {
  853. value = 0;
  854. }
  855. coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
  856. coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
  857. coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
  858. coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
  859. coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
  860. /* set default gamma */
  861. value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
  862. coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
  863. value = (CODA_DEFAULT_GAMMA > 0) << CODA_OPTION_GAMMA_OFFSET;
  864. value |= (0 & CODA_OPTION_SLICEREPORT_MASK) << CODA_OPTION_SLICEREPORT_OFFSET;
  865. coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
  866. if (dst_fourcc == V4L2_PIX_FMT_H264) {
  867. value = (FMO_SLICE_SAVE_BUF_SIZE << 7);
  868. value |= (0 & CODA_FMOPARAM_TYPE_MASK) << CODA_FMOPARAM_TYPE_OFFSET;
  869. value |= 0 & CODA_FMOPARAM_SLICENUM_MASK;
  870. if (dev->devtype->product == CODA_DX6) {
  871. coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
  872. } else {
  873. coda_write(dev, dev->iram_paddr, CODA7_CMD_ENC_SEQ_SEARCH_BASE);
  874. coda_write(dev, 48 * 1024, CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
  875. }
  876. }
  877. if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
  878. v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
  879. return -ETIMEDOUT;
  880. }
  881. if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0)
  882. return -EFAULT;
  883. /*
  884. * Walk the src buffer list and let the codec know the
  885. * addresses of the pictures.
  886. */
  887. src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  888. for (i = 0; i < src_vq->num_buffers; i++) {
  889. u32 *p;
  890. buf = src_vq->bufs[i];
  891. p = ctx->parabuf.vaddr;
  892. p[i * 3] = vb2_dma_contig_plane_dma_addr(buf, 0);
  893. p[i * 3 + 1] = p[i * 3] + q_data_src->width *
  894. q_data_src->height;
  895. p[i * 3 + 2] = p[i * 3 + 1] + q_data_src->width / 2 *
  896. q_data_src->height / 2;
  897. }
  898. coda_write(dev, src_vq->num_buffers, CODA_CMD_SET_FRAME_BUF_NUM);
  899. coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
  900. if (dev->devtype->product != CODA_DX6) {
  901. coda_write(dev, round_up(q_data_src->width, 8), CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
  902. coda_write(dev, dev->iram_paddr + 48 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
  903. coda_write(dev, dev->iram_paddr + 53 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
  904. coda_write(dev, dev->iram_paddr + 58 * 1024, CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
  905. coda_write(dev, dev->iram_paddr + 68 * 1024, CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
  906. coda_write(dev, 0x0, CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
  907. }
  908. if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
  909. v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
  910. return -ETIMEDOUT;
  911. }
  912. /* Save stream headers */
  913. buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  914. switch (dst_fourcc) {
  915. case V4L2_PIX_FMT_H264:
  916. /*
  917. * Get SPS in the first frame and copy it to an
  918. * intermediate buffer.
  919. */
  920. coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
  921. coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
  922. coda_write(dev, CODA_HEADER_H264_SPS, CODA_CMD_ENC_HEADER_CODE);
  923. if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
  924. v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
  925. return -ETIMEDOUT;
  926. }
  927. ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
  928. coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
  929. memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
  930. ctx->vpu_header_size[0]);
  931. /*
  932. * Get PPS in the first frame and copy it to an
  933. * intermediate buffer.
  934. */
  935. coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
  936. coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
  937. coda_write(dev, CODA_HEADER_H264_PPS, CODA_CMD_ENC_HEADER_CODE);
  938. if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
  939. v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
  940. return -ETIMEDOUT;
  941. }
  942. ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
  943. coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
  944. memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
  945. ctx->vpu_header_size[1]);
  946. ctx->vpu_header_size[2] = 0;
  947. break;
  948. case V4L2_PIX_FMT_MPEG4:
  949. /*
  950. * Get VOS in the first frame and copy it to an
  951. * intermediate buffer
  952. */
  953. coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
  954. coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
  955. coda_write(dev, CODA_HEADER_MP4V_VOS, CODA_CMD_ENC_HEADER_CODE);
  956. if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
  957. v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
  958. return -ETIMEDOUT;
  959. }
  960. ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
  961. coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
  962. memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
  963. ctx->vpu_header_size[0]);
  964. coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
  965. coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
  966. coda_write(dev, CODA_HEADER_MP4V_VIS, CODA_CMD_ENC_HEADER_CODE);
  967. if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
  968. v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
  969. return -ETIMEDOUT;
  970. }
  971. ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
  972. coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
  973. memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
  974. ctx->vpu_header_size[1]);
  975. coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
  976. coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
  977. coda_write(dev, CODA_HEADER_MP4V_VOL, CODA_CMD_ENC_HEADER_CODE);
  978. if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
  979. v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
  980. return -ETIMEDOUT;
  981. }
  982. ctx->vpu_header_size[2] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
  983. coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
  984. memcpy(&ctx->vpu_header[2][0], vb2_plane_vaddr(buf, 0),
  985. ctx->vpu_header_size[2]);
  986. break;
  987. default:
  988. /* No more formats need to save headers at the moment */
  989. break;
  990. }
  991. return 0;
  992. }
  993. static int coda_stop_streaming(struct vb2_queue *q)
  994. {
  995. struct coda_ctx *ctx = vb2_get_drv_priv(q);
  996. if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
  997. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  998. "%s: output\n", __func__);
  999. ctx->rawstreamon = 0;
  1000. } else {
  1001. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1002. "%s: capture\n", __func__);
  1003. ctx->compstreamon = 0;
  1004. }
  1005. if (!ctx->rawstreamon && !ctx->compstreamon) {
  1006. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1007. "%s: sent command 'SEQ_END' to coda\n", __func__);
  1008. if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
  1009. v4l2_err(&ctx->dev->v4l2_dev,
  1010. "CODA_COMMAND_SEQ_END failed\n");
  1011. return -ETIMEDOUT;
  1012. }
  1013. }
  1014. return 0;
  1015. }
  1016. static struct vb2_ops coda_qops = {
  1017. .queue_setup = coda_queue_setup,
  1018. .buf_prepare = coda_buf_prepare,
  1019. .buf_queue = coda_buf_queue,
  1020. .wait_prepare = coda_wait_prepare,
  1021. .wait_finish = coda_wait_finish,
  1022. .start_streaming = coda_start_streaming,
  1023. .stop_streaming = coda_stop_streaming,
  1024. };
  1025. static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
  1026. {
  1027. struct coda_ctx *ctx =
  1028. container_of(ctrl->handler, struct coda_ctx, ctrls);
  1029. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1030. "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
  1031. switch (ctrl->id) {
  1032. case V4L2_CID_MPEG_VIDEO_BITRATE:
  1033. ctx->params.bitrate = ctrl->val / 1000;
  1034. break;
  1035. case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
  1036. ctx->params.gop_size = ctrl->val;
  1037. break;
  1038. case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
  1039. ctx->params.h264_intra_qp = ctrl->val;
  1040. break;
  1041. case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
  1042. ctx->params.h264_inter_qp = ctrl->val;
  1043. break;
  1044. case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
  1045. ctx->params.mpeg4_intra_qp = ctrl->val;
  1046. break;
  1047. case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
  1048. ctx->params.mpeg4_inter_qp = ctrl->val;
  1049. break;
  1050. case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
  1051. ctx->params.slice_mode = ctrl->val;
  1052. break;
  1053. case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
  1054. ctx->params.slice_max_mb = ctrl->val;
  1055. break;
  1056. case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
  1057. break;
  1058. default:
  1059. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1060. "Invalid control, id=%d, val=%d\n",
  1061. ctrl->id, ctrl->val);
  1062. return -EINVAL;
  1063. }
  1064. return 0;
  1065. }
  1066. static struct v4l2_ctrl_ops coda_ctrl_ops = {
  1067. .s_ctrl = coda_s_ctrl,
  1068. };
  1069. static int coda_ctrls_setup(struct coda_ctx *ctx)
  1070. {
  1071. v4l2_ctrl_handler_init(&ctx->ctrls, 9);
  1072. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1073. V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
  1074. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1075. V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
  1076. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1077. V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
  1078. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1079. V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
  1080. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1081. V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
  1082. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1083. V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
  1084. v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
  1085. V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
  1086. V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB, 0,
  1087. V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB);
  1088. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1089. V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
  1090. v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
  1091. V4L2_CID_MPEG_VIDEO_HEADER_MODE,
  1092. V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
  1093. (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
  1094. V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
  1095. if (ctx->ctrls.error) {
  1096. v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
  1097. ctx->ctrls.error);
  1098. return -EINVAL;
  1099. }
  1100. return v4l2_ctrl_handler_setup(&ctx->ctrls);
  1101. }
  1102. static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
  1103. struct vb2_queue *dst_vq)
  1104. {
  1105. struct coda_ctx *ctx = priv;
  1106. int ret;
  1107. src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
  1108. src_vq->io_modes = VB2_MMAP;
  1109. src_vq->drv_priv = ctx;
  1110. src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
  1111. src_vq->ops = &coda_qops;
  1112. src_vq->mem_ops = &vb2_dma_contig_memops;
  1113. ret = vb2_queue_init(src_vq);
  1114. if (ret)
  1115. return ret;
  1116. dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1117. dst_vq->io_modes = VB2_MMAP;
  1118. dst_vq->drv_priv = ctx;
  1119. dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
  1120. dst_vq->ops = &coda_qops;
  1121. dst_vq->mem_ops = &vb2_dma_contig_memops;
  1122. return vb2_queue_init(dst_vq);
  1123. }
  1124. static int coda_open(struct file *file)
  1125. {
  1126. struct coda_dev *dev = video_drvdata(file);
  1127. struct coda_ctx *ctx = NULL;
  1128. int ret = 0;
  1129. if (dev->instances >= CODA_MAX_INSTANCES)
  1130. return -EBUSY;
  1131. ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
  1132. if (!ctx)
  1133. return -ENOMEM;
  1134. v4l2_fh_init(&ctx->fh, video_devdata(file));
  1135. file->private_data = &ctx->fh;
  1136. v4l2_fh_add(&ctx->fh);
  1137. ctx->dev = dev;
  1138. set_default_params(ctx);
  1139. ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
  1140. &coda_queue_init);
  1141. if (IS_ERR(ctx->m2m_ctx)) {
  1142. int ret = PTR_ERR(ctx->m2m_ctx);
  1143. v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
  1144. __func__, ret);
  1145. goto err;
  1146. }
  1147. ret = coda_ctrls_setup(ctx);
  1148. if (ret) {
  1149. v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
  1150. goto err;
  1151. }
  1152. ctx->fh.ctrl_handler = &ctx->ctrls;
  1153. ctx->parabuf.vaddr = dma_alloc_coherent(&dev->plat_dev->dev,
  1154. CODA_PARA_BUF_SIZE, &ctx->parabuf.paddr, GFP_KERNEL);
  1155. if (!ctx->parabuf.vaddr) {
  1156. v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
  1157. ret = -ENOMEM;
  1158. goto err;
  1159. }
  1160. coda_lock(ctx);
  1161. ctx->idx = dev->instances++;
  1162. coda_unlock(ctx);
  1163. clk_prepare_enable(dev->clk_per);
  1164. clk_prepare_enable(dev->clk_ahb);
  1165. v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
  1166. ctx->idx, ctx);
  1167. return 0;
  1168. err:
  1169. v4l2_fh_del(&ctx->fh);
  1170. v4l2_fh_exit(&ctx->fh);
  1171. kfree(ctx);
  1172. return ret;
  1173. }
  1174. static int coda_release(struct file *file)
  1175. {
  1176. struct coda_dev *dev = video_drvdata(file);
  1177. struct coda_ctx *ctx = fh_to_ctx(file->private_data);
  1178. v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
  1179. ctx);
  1180. coda_lock(ctx);
  1181. dev->instances--;
  1182. coda_unlock(ctx);
  1183. dma_free_coherent(&dev->plat_dev->dev, CODA_PARA_BUF_SIZE,
  1184. ctx->parabuf.vaddr, ctx->parabuf.paddr);
  1185. v4l2_m2m_ctx_release(ctx->m2m_ctx);
  1186. v4l2_ctrl_handler_free(&ctx->ctrls);
  1187. clk_disable_unprepare(dev->clk_per);
  1188. clk_disable_unprepare(dev->clk_ahb);
  1189. v4l2_fh_del(&ctx->fh);
  1190. v4l2_fh_exit(&ctx->fh);
  1191. kfree(ctx);
  1192. return 0;
  1193. }
  1194. static unsigned int coda_poll(struct file *file,
  1195. struct poll_table_struct *wait)
  1196. {
  1197. struct coda_ctx *ctx = fh_to_ctx(file->private_data);
  1198. int ret;
  1199. coda_lock(ctx);
  1200. ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
  1201. coda_unlock(ctx);
  1202. return ret;
  1203. }
  1204. static int coda_mmap(struct file *file, struct vm_area_struct *vma)
  1205. {
  1206. struct coda_ctx *ctx = fh_to_ctx(file->private_data);
  1207. return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
  1208. }
  1209. static const struct v4l2_file_operations coda_fops = {
  1210. .owner = THIS_MODULE,
  1211. .open = coda_open,
  1212. .release = coda_release,
  1213. .poll = coda_poll,
  1214. .unlocked_ioctl = video_ioctl2,
  1215. .mmap = coda_mmap,
  1216. };
  1217. static irqreturn_t coda_irq_handler(int irq, void *data)
  1218. {
  1219. struct vb2_buffer *src_buf, *dst_buf, *tmp_buf;
  1220. struct coda_dev *dev = data;
  1221. u32 wr_ptr, start_ptr;
  1222. struct coda_ctx *ctx;
  1223. /* read status register to attend the IRQ */
  1224. coda_read(dev, CODA_REG_BIT_INT_STATUS);
  1225. coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
  1226. CODA_REG_BIT_INT_CLEAR);
  1227. ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
  1228. if (ctx == NULL) {
  1229. v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
  1230. return IRQ_HANDLED;
  1231. }
  1232. if (ctx->aborting) {
  1233. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1234. "task has been aborted\n");
  1235. return IRQ_HANDLED;
  1236. }
  1237. if (coda_isbusy(ctx->dev)) {
  1238. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1239. "coda is still busy!!!!\n");
  1240. return IRQ_NONE;
  1241. }
  1242. src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
  1243. dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  1244. /* Get results from the coda */
  1245. coda_read(dev, CODA_RET_ENC_PIC_TYPE);
  1246. start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
  1247. wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx));
  1248. /* Calculate bytesused field */
  1249. if (dst_buf->v4l2_buf.sequence == 0) {
  1250. dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr) +
  1251. ctx->vpu_header_size[0] +
  1252. ctx->vpu_header_size[1] +
  1253. ctx->vpu_header_size[2];
  1254. } else {
  1255. dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr);
  1256. }
  1257. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
  1258. wr_ptr - start_ptr);
  1259. coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
  1260. coda_read(dev, CODA_RET_ENC_PIC_FLAG);
  1261. if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
  1262. dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
  1263. dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
  1264. } else {
  1265. dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
  1266. dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
  1267. }
  1268. /* Free previous reference picture if available */
  1269. if (ctx->reference) {
  1270. v4l2_m2m_buf_done(ctx->reference, VB2_BUF_STATE_DONE);
  1271. ctx->reference = NULL;
  1272. }
  1273. /*
  1274. * For the last frame of the gop we don't need to save
  1275. * a reference picture.
  1276. */
  1277. v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
  1278. tmp_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
  1279. if (ctx->gopcounter == 0)
  1280. v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
  1281. else
  1282. ctx->reference = tmp_buf;
  1283. v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
  1284. ctx->gopcounter--;
  1285. if (ctx->gopcounter < 0)
  1286. ctx->gopcounter = ctx->params.gop_size - 1;
  1287. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  1288. "job finished: encoding frame (%d) (%s)\n",
  1289. dst_buf->v4l2_buf.sequence,
  1290. (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
  1291. "KEYFRAME" : "PFRAME");
  1292. v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
  1293. return IRQ_HANDLED;
  1294. }
  1295. static u32 coda_supported_firmwares[] = {
  1296. CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
  1297. CODA_FIRMWARE_VERNUM(CODA_7541, 13, 4, 29),
  1298. };
  1299. static bool coda_firmware_supported(u32 vernum)
  1300. {
  1301. int i;
  1302. for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
  1303. if (vernum == coda_supported_firmwares[i])
  1304. return true;
  1305. return false;
  1306. }
  1307. static char *coda_product_name(int product)
  1308. {
  1309. static char buf[9];
  1310. switch (product) {
  1311. case CODA_DX6:
  1312. return "CodaDx6";
  1313. case CODA_7541:
  1314. return "CODA7541";
  1315. default:
  1316. snprintf(buf, sizeof(buf), "(0x%04x)", product);
  1317. return buf;
  1318. }
  1319. }
  1320. static int coda_hw_init(struct coda_dev *dev)
  1321. {
  1322. u16 product, major, minor, release;
  1323. u32 data;
  1324. u16 *p;
  1325. int i;
  1326. clk_prepare_enable(dev->clk_per);
  1327. clk_prepare_enable(dev->clk_ahb);
  1328. /*
  1329. * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
  1330. * The 16-bit chars in the code buffer are in memory access
  1331. * order, re-sort them to CODA order for register download.
  1332. * Data in this SRAM survives a reboot.
  1333. */
  1334. p = (u16 *)dev->codebuf.vaddr;
  1335. if (dev->devtype->product == CODA_DX6) {
  1336. for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
  1337. data = CODA_DOWN_ADDRESS_SET(i) |
  1338. CODA_DOWN_DATA_SET(p[i ^ 1]);
  1339. coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
  1340. }
  1341. } else {
  1342. for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
  1343. data = CODA_DOWN_ADDRESS_SET(i) |
  1344. CODA_DOWN_DATA_SET(p[round_down(i, 4) +
  1345. 3 - (i % 4)]);
  1346. coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
  1347. }
  1348. }
  1349. /* Tell the BIT where to find everything it needs */
  1350. coda_write(dev, dev->workbuf.paddr,
  1351. CODA_REG_BIT_WORK_BUF_ADDR);
  1352. coda_write(dev, dev->codebuf.paddr,
  1353. CODA_REG_BIT_CODE_BUF_ADDR);
  1354. coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
  1355. /* Set default values */
  1356. switch (dev->devtype->product) {
  1357. case CODA_DX6:
  1358. coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
  1359. break;
  1360. default:
  1361. coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
  1362. }
  1363. coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
  1364. if (dev->devtype->product != CODA_DX6)
  1365. coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
  1366. coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
  1367. CODA_REG_BIT_INT_ENABLE);
  1368. /* Reset VPU and start processor */
  1369. data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
  1370. data |= CODA_REG_RESET_ENABLE;
  1371. coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
  1372. udelay(10);
  1373. data &= ~CODA_REG_RESET_ENABLE;
  1374. coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
  1375. coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
  1376. /* Load firmware */
  1377. coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
  1378. coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
  1379. coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
  1380. coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
  1381. coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
  1382. if (coda_wait_timeout(dev)) {
  1383. clk_disable_unprepare(dev->clk_per);
  1384. clk_disable_unprepare(dev->clk_ahb);
  1385. v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
  1386. return -EIO;
  1387. }
  1388. /* Check we are compatible with the loaded firmware */
  1389. data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
  1390. product = CODA_FIRMWARE_PRODUCT(data);
  1391. major = CODA_FIRMWARE_MAJOR(data);
  1392. minor = CODA_FIRMWARE_MINOR(data);
  1393. release = CODA_FIRMWARE_RELEASE(data);
  1394. clk_disable_unprepare(dev->clk_per);
  1395. clk_disable_unprepare(dev->clk_ahb);
  1396. if (product != dev->devtype->product) {
  1397. v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
  1398. " Version: %u.%u.%u\n",
  1399. coda_product_name(dev->devtype->product),
  1400. coda_product_name(product), major, minor, release);
  1401. return -EINVAL;
  1402. }
  1403. v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
  1404. coda_product_name(product));
  1405. if (coda_firmware_supported(data)) {
  1406. v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
  1407. major, minor, release);
  1408. } else {
  1409. v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
  1410. "%u.%u.%u\n", major, minor, release);
  1411. }
  1412. return 0;
  1413. }
  1414. static void coda_fw_callback(const struct firmware *fw, void *context)
  1415. {
  1416. struct coda_dev *dev = context;
  1417. struct platform_device *pdev = dev->plat_dev;
  1418. int ret;
  1419. if (!fw) {
  1420. v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
  1421. return;
  1422. }
  1423. /* allocate auxiliary per-device code buffer for the BIT processor */
  1424. dev->codebuf.size = fw->size;
  1425. dev->codebuf.vaddr = dma_alloc_coherent(&pdev->dev, fw->size,
  1426. &dev->codebuf.paddr,
  1427. GFP_KERNEL);
  1428. if (!dev->codebuf.vaddr) {
  1429. dev_err(&pdev->dev, "failed to allocate code buffer\n");
  1430. return;
  1431. }
  1432. /* Copy the whole firmware image to the code buffer */
  1433. memcpy(dev->codebuf.vaddr, fw->data, fw->size);
  1434. release_firmware(fw);
  1435. ret = coda_hw_init(dev);
  1436. if (ret) {
  1437. v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
  1438. return;
  1439. }
  1440. dev->vfd.fops = &coda_fops,
  1441. dev->vfd.ioctl_ops = &coda_ioctl_ops;
  1442. dev->vfd.release = video_device_release_empty,
  1443. dev->vfd.lock = &dev->dev_mutex;
  1444. dev->vfd.v4l2_dev = &dev->v4l2_dev;
  1445. dev->vfd.vfl_dir = VFL_DIR_M2M;
  1446. snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
  1447. video_set_drvdata(&dev->vfd, dev);
  1448. dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
  1449. if (IS_ERR(dev->alloc_ctx)) {
  1450. v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
  1451. return;
  1452. }
  1453. dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
  1454. if (IS_ERR(dev->m2m_dev)) {
  1455. v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
  1456. goto rel_ctx;
  1457. }
  1458. ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
  1459. if (ret) {
  1460. v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
  1461. goto rel_m2m;
  1462. }
  1463. v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
  1464. dev->vfd.num);
  1465. return;
  1466. rel_m2m:
  1467. v4l2_m2m_release(dev->m2m_dev);
  1468. rel_ctx:
  1469. vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
  1470. }
  1471. static int coda_firmware_request(struct coda_dev *dev)
  1472. {
  1473. char *fw = dev->devtype->firmware;
  1474. dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
  1475. coda_product_name(dev->devtype->product));
  1476. return request_firmware_nowait(THIS_MODULE, true,
  1477. fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
  1478. }
  1479. enum coda_platform {
  1480. CODA_IMX27,
  1481. CODA_IMX53,
  1482. };
  1483. static const struct coda_devtype coda_devdata[] = {
  1484. [CODA_IMX27] = {
  1485. .firmware = "v4l-codadx6-imx27.bin",
  1486. .product = CODA_DX6,
  1487. .formats = codadx6_formats,
  1488. .num_formats = ARRAY_SIZE(codadx6_formats),
  1489. },
  1490. [CODA_IMX53] = {
  1491. .firmware = "v4l-coda7541-imx53.bin",
  1492. .product = CODA_7541,
  1493. .formats = coda7_formats,
  1494. .num_formats = ARRAY_SIZE(coda7_formats),
  1495. },
  1496. };
  1497. static struct platform_device_id coda_platform_ids[] = {
  1498. { .name = "coda-imx27", .driver_data = CODA_IMX27 },
  1499. { .name = "coda-imx53", .driver_data = CODA_7541 },
  1500. { /* sentinel */ }
  1501. };
  1502. MODULE_DEVICE_TABLE(platform, coda_platform_ids);
  1503. #ifdef CONFIG_OF
  1504. static const struct of_device_id coda_dt_ids[] = {
  1505. { .compatible = "fsl,imx27-vpu", .data = &coda_platform_ids[CODA_IMX27] },
  1506. { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
  1507. { /* sentinel */ }
  1508. };
  1509. MODULE_DEVICE_TABLE(of, coda_dt_ids);
  1510. #endif
  1511. static int __devinit coda_probe(struct platform_device *pdev)
  1512. {
  1513. const struct of_device_id *of_id =
  1514. of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
  1515. const struct platform_device_id *pdev_id;
  1516. struct coda_dev *dev;
  1517. struct resource *res;
  1518. int ret, irq;
  1519. dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
  1520. if (!dev) {
  1521. dev_err(&pdev->dev, "Not enough memory for %s\n",
  1522. CODA_NAME);
  1523. return -ENOMEM;
  1524. }
  1525. spin_lock_init(&dev->irqlock);
  1526. dev->plat_dev = pdev;
  1527. dev->clk_per = devm_clk_get(&pdev->dev, "per");
  1528. if (IS_ERR(dev->clk_per)) {
  1529. dev_err(&pdev->dev, "Could not get per clock\n");
  1530. return PTR_ERR(dev->clk_per);
  1531. }
  1532. dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
  1533. if (IS_ERR(dev->clk_ahb)) {
  1534. dev_err(&pdev->dev, "Could not get ahb clock\n");
  1535. return PTR_ERR(dev->clk_ahb);
  1536. }
  1537. /* Get memory for physical registers */
  1538. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1539. if (res == NULL) {
  1540. dev_err(&pdev->dev, "failed to get memory region resource\n");
  1541. return -ENOENT;
  1542. }
  1543. if (devm_request_mem_region(&pdev->dev, res->start,
  1544. resource_size(res), CODA_NAME) == NULL) {
  1545. dev_err(&pdev->dev, "failed to request memory region\n");
  1546. return -ENOENT;
  1547. }
  1548. dev->regs_base = devm_ioremap(&pdev->dev, res->start,
  1549. resource_size(res));
  1550. if (!dev->regs_base) {
  1551. dev_err(&pdev->dev, "failed to ioremap address region\n");
  1552. return -ENOENT;
  1553. }
  1554. /* IRQ */
  1555. irq = platform_get_irq(pdev, 0);
  1556. if (irq < 0) {
  1557. dev_err(&pdev->dev, "failed to get irq resource\n");
  1558. return -ENOENT;
  1559. }
  1560. if (devm_request_irq(&pdev->dev, irq, coda_irq_handler,
  1561. 0, CODA_NAME, dev) < 0) {
  1562. dev_err(&pdev->dev, "failed to request irq\n");
  1563. return -ENOENT;
  1564. }
  1565. ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
  1566. if (ret)
  1567. return ret;
  1568. mutex_init(&dev->dev_mutex);
  1569. pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
  1570. if (of_id) {
  1571. dev->devtype = of_id->data;
  1572. } else if (pdev_id) {
  1573. dev->devtype = &coda_devdata[pdev_id->driver_data];
  1574. } else {
  1575. v4l2_device_unregister(&dev->v4l2_dev);
  1576. return -EINVAL;
  1577. }
  1578. /* allocate auxiliary per-device buffers for the BIT processor */
  1579. switch (dev->devtype->product) {
  1580. case CODA_DX6:
  1581. dev->workbuf.size = CODADX6_WORK_BUF_SIZE;
  1582. break;
  1583. default:
  1584. dev->workbuf.size = CODA7_WORK_BUF_SIZE;
  1585. }
  1586. dev->workbuf.vaddr = dma_alloc_coherent(&pdev->dev, dev->workbuf.size,
  1587. &dev->workbuf.paddr,
  1588. GFP_KERNEL);
  1589. if (!dev->workbuf.vaddr) {
  1590. dev_err(&pdev->dev, "failed to allocate work buffer\n");
  1591. v4l2_device_unregister(&dev->v4l2_dev);
  1592. return -ENOMEM;
  1593. }
  1594. if (dev->devtype->product == CODA_DX6) {
  1595. dev->iram_paddr = 0xffff4c00;
  1596. } else {
  1597. void __iomem *iram_vaddr;
  1598. iram_vaddr = iram_alloc(CODA7_IRAM_SIZE,
  1599. &dev->iram_paddr);
  1600. if (!iram_vaddr) {
  1601. dev_err(&pdev->dev, "unable to alloc iram\n");
  1602. return -ENOMEM;
  1603. }
  1604. }
  1605. platform_set_drvdata(pdev, dev);
  1606. return coda_firmware_request(dev);
  1607. }
  1608. static int coda_remove(struct platform_device *pdev)
  1609. {
  1610. struct coda_dev *dev = platform_get_drvdata(pdev);
  1611. video_unregister_device(&dev->vfd);
  1612. if (dev->m2m_dev)
  1613. v4l2_m2m_release(dev->m2m_dev);
  1614. if (dev->alloc_ctx)
  1615. vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
  1616. v4l2_device_unregister(&dev->v4l2_dev);
  1617. if (dev->iram_paddr)
  1618. iram_free(dev->iram_paddr, CODA7_IRAM_SIZE);
  1619. if (dev->codebuf.vaddr)
  1620. dma_free_coherent(&pdev->dev, dev->codebuf.size,
  1621. &dev->codebuf.vaddr, dev->codebuf.paddr);
  1622. if (dev->workbuf.vaddr)
  1623. dma_free_coherent(&pdev->dev, dev->workbuf.size, &dev->workbuf.vaddr,
  1624. dev->workbuf.paddr);
  1625. return 0;
  1626. }
  1627. static struct platform_driver coda_driver = {
  1628. .probe = coda_probe,
  1629. .remove = __devexit_p(coda_remove),
  1630. .driver = {
  1631. .name = CODA_NAME,
  1632. .owner = THIS_MODULE,
  1633. .of_match_table = of_match_ptr(coda_dt_ids),
  1634. },
  1635. .id_table = coda_platform_ids,
  1636. };
  1637. module_platform_driver(coda_driver);
  1638. MODULE_LICENSE("GPL");
  1639. MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
  1640. MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");