main.c 53 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include "ath9k.h"
  18. #include "btcoex.h"
  19. static void ath_update_txpow(struct ath_softc *sc)
  20. {
  21. struct ath_hw *ah = sc->sc_ah;
  22. if (sc->curtxpow != sc->config.txpowlimit) {
  23. ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  24. /* read back in case value is clamped */
  25. sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  26. }
  27. }
  28. static u8 parse_mpdudensity(u8 mpdudensity)
  29. {
  30. /*
  31. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  32. * 0 for no restriction
  33. * 1 for 1/4 us
  34. * 2 for 1/2 us
  35. * 3 for 1 us
  36. * 4 for 2 us
  37. * 5 for 4 us
  38. * 6 for 8 us
  39. * 7 for 16 us
  40. */
  41. switch (mpdudensity) {
  42. case 0:
  43. return 0;
  44. case 1:
  45. case 2:
  46. case 3:
  47. /* Our lower layer calculations limit our precision to
  48. 1 microsecond */
  49. return 1;
  50. case 4:
  51. return 2;
  52. case 5:
  53. return 4;
  54. case 6:
  55. return 8;
  56. case 7:
  57. return 16;
  58. default:
  59. return 0;
  60. }
  61. }
  62. static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  63. struct ieee80211_hw *hw)
  64. {
  65. struct ieee80211_channel *curchan = hw->conf.channel;
  66. struct ath9k_channel *channel;
  67. u8 chan_idx;
  68. chan_idx = curchan->hw_value;
  69. channel = &sc->sc_ah->channels[chan_idx];
  70. ath9k_update_ichannel(sc, hw, channel);
  71. return channel;
  72. }
  73. bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  74. {
  75. unsigned long flags;
  76. bool ret;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  79. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  80. return ret;
  81. }
  82. void ath9k_ps_wakeup(struct ath_softc *sc)
  83. {
  84. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  85. unsigned long flags;
  86. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  87. if (++sc->ps_usecount != 1)
  88. goto unlock;
  89. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  90. /*
  91. * While the hardware is asleep, the cycle counters contain no
  92. * useful data. Better clear them now so that they don't mess up
  93. * survey data results.
  94. */
  95. spin_lock(&common->cc_lock);
  96. ath_hw_cycle_counters_update(common);
  97. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  98. spin_unlock(&common->cc_lock);
  99. unlock:
  100. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  101. }
  102. void ath9k_ps_restore(struct ath_softc *sc)
  103. {
  104. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  105. unsigned long flags;
  106. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  107. if (--sc->ps_usecount != 0)
  108. goto unlock;
  109. spin_lock(&common->cc_lock);
  110. ath_hw_cycle_counters_update(common);
  111. spin_unlock(&common->cc_lock);
  112. if (sc->ps_idle)
  113. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  114. else if (sc->ps_enabled &&
  115. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  116. PS_WAIT_FOR_CAB |
  117. PS_WAIT_FOR_PSPOLL_DATA |
  118. PS_WAIT_FOR_TX_ACK)))
  119. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  120. unlock:
  121. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  122. }
  123. static void ath_start_ani(struct ath_common *common)
  124. {
  125. struct ath_hw *ah = common->ah;
  126. unsigned long timestamp = jiffies_to_msecs(jiffies);
  127. struct ath_softc *sc = (struct ath_softc *) common->priv;
  128. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  129. return;
  130. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  131. return;
  132. common->ani.longcal_timer = timestamp;
  133. common->ani.shortcal_timer = timestamp;
  134. common->ani.checkani_timer = timestamp;
  135. mod_timer(&common->ani.timer,
  136. jiffies +
  137. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  138. }
  139. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  140. {
  141. struct ath_hw *ah = sc->sc_ah;
  142. struct ath9k_channel *chan = &ah->channels[channel];
  143. struct survey_info *survey = &sc->survey[channel];
  144. if (chan->noisefloor) {
  145. survey->filled |= SURVEY_INFO_NOISE_DBM;
  146. survey->noise = chan->noisefloor;
  147. }
  148. }
  149. static void ath_update_survey_stats(struct ath_softc *sc)
  150. {
  151. struct ath_hw *ah = sc->sc_ah;
  152. struct ath_common *common = ath9k_hw_common(ah);
  153. int pos = ah->curchan - &ah->channels[0];
  154. struct survey_info *survey = &sc->survey[pos];
  155. struct ath_cycle_counters *cc = &common->cc_survey;
  156. unsigned int div = common->clockrate * 1000;
  157. if (!ah->curchan)
  158. return;
  159. if (ah->power_mode == ATH9K_PM_AWAKE)
  160. ath_hw_cycle_counters_update(common);
  161. if (cc->cycles > 0) {
  162. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  163. SURVEY_INFO_CHANNEL_TIME_BUSY |
  164. SURVEY_INFO_CHANNEL_TIME_RX |
  165. SURVEY_INFO_CHANNEL_TIME_TX;
  166. survey->channel_time += cc->cycles / div;
  167. survey->channel_time_busy += cc->rx_busy / div;
  168. survey->channel_time_rx += cc->rx_frame / div;
  169. survey->channel_time_tx += cc->tx_frame / div;
  170. }
  171. memset(cc, 0, sizeof(*cc));
  172. ath_update_survey_nf(sc, pos);
  173. }
  174. /*
  175. * Set/change channels. If the channel is really being changed, it's done
  176. * by reseting the chip. To accomplish this we must first cleanup any pending
  177. * DMA, then restart stuff.
  178. */
  179. int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  180. struct ath9k_channel *hchan)
  181. {
  182. struct ath_wiphy *aphy = hw->priv;
  183. struct ath_hw *ah = sc->sc_ah;
  184. struct ath_common *common = ath9k_hw_common(ah);
  185. struct ieee80211_conf *conf = &common->hw->conf;
  186. bool fastcc = true, stopped;
  187. struct ieee80211_channel *channel = hw->conf.channel;
  188. struct ath9k_hw_cal_data *caldata = NULL;
  189. int r;
  190. if (sc->sc_flags & SC_OP_INVALID)
  191. return -EIO;
  192. del_timer_sync(&common->ani.timer);
  193. cancel_work_sync(&sc->paprd_work);
  194. cancel_work_sync(&sc->hw_check_work);
  195. cancel_delayed_work_sync(&sc->tx_complete_work);
  196. ath9k_ps_wakeup(sc);
  197. spin_lock_bh(&sc->sc_pcu_lock);
  198. /*
  199. * This is only performed if the channel settings have
  200. * actually changed.
  201. *
  202. * To switch channels clear any pending DMA operations;
  203. * wait long enough for the RX fifo to drain, reset the
  204. * hardware at the new frequency, and then re-enable
  205. * the relevant bits of the h/w.
  206. */
  207. ath9k_hw_disable_interrupts(ah);
  208. ath_drain_all_txq(sc, false);
  209. stopped = ath_stoprecv(sc);
  210. /* XXX: do not flush receive queue here. We don't want
  211. * to flush data frames already in queue because of
  212. * changing channel. */
  213. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  214. fastcc = false;
  215. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  216. caldata = &aphy->caldata;
  217. ath_print(common, ATH_DBG_CONFIG,
  218. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  219. sc->sc_ah->curchan->channel,
  220. channel->center_freq, conf_is_ht40(conf),
  221. fastcc);
  222. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  223. if (r) {
  224. ath_print(common, ATH_DBG_FATAL,
  225. "Unable to reset channel (%u MHz), "
  226. "reset status %d\n",
  227. channel->center_freq, r);
  228. goto ps_restore;
  229. }
  230. if (ath_startrecv(sc) != 0) {
  231. ath_print(common, ATH_DBG_FATAL,
  232. "Unable to restart recv logic\n");
  233. r = -EIO;
  234. goto ps_restore;
  235. }
  236. ath_update_txpow(sc);
  237. ath9k_hw_set_interrupts(ah, ah->imask);
  238. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  239. ath_beacon_config(sc, NULL);
  240. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  241. ath_start_ani(common);
  242. }
  243. ps_restore:
  244. spin_unlock_bh(&sc->sc_pcu_lock);
  245. ath9k_ps_restore(sc);
  246. return r;
  247. }
  248. static void ath_paprd_activate(struct ath_softc *sc)
  249. {
  250. struct ath_hw *ah = sc->sc_ah;
  251. struct ath9k_hw_cal_data *caldata = ah->caldata;
  252. struct ath_common *common = ath9k_hw_common(ah);
  253. int chain;
  254. if (!caldata || !caldata->paprd_done)
  255. return;
  256. ath9k_ps_wakeup(sc);
  257. ar9003_paprd_enable(ah, false);
  258. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  259. if (!(common->tx_chainmask & BIT(chain)))
  260. continue;
  261. ar9003_paprd_populate_single_table(ah, caldata, chain);
  262. }
  263. ar9003_paprd_enable(ah, true);
  264. ath9k_ps_restore(sc);
  265. }
  266. void ath_paprd_calibrate(struct work_struct *work)
  267. {
  268. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  269. struct ieee80211_hw *hw = sc->hw;
  270. struct ath_hw *ah = sc->sc_ah;
  271. struct ieee80211_hdr *hdr;
  272. struct sk_buff *skb = NULL;
  273. struct ieee80211_tx_info *tx_info;
  274. int band = hw->conf.channel->band;
  275. struct ieee80211_supported_band *sband = &sc->sbands[band];
  276. struct ath_tx_control txctl;
  277. struct ath9k_hw_cal_data *caldata = ah->caldata;
  278. struct ath_common *common = ath9k_hw_common(ah);
  279. int ftype;
  280. int chain_ok = 0;
  281. int chain;
  282. int len = 1800;
  283. int time_left;
  284. int i;
  285. if (!caldata)
  286. return;
  287. skb = alloc_skb(len, GFP_KERNEL);
  288. if (!skb)
  289. return;
  290. tx_info = IEEE80211_SKB_CB(skb);
  291. skb_put(skb, len);
  292. memset(skb->data, 0, len);
  293. hdr = (struct ieee80211_hdr *)skb->data;
  294. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  295. hdr->frame_control = cpu_to_le16(ftype);
  296. hdr->duration_id = cpu_to_le16(10);
  297. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  298. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  299. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  300. memset(&txctl, 0, sizeof(txctl));
  301. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  302. ath9k_ps_wakeup(sc);
  303. ar9003_paprd_init_table(ah);
  304. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  305. if (!(common->tx_chainmask & BIT(chain)))
  306. continue;
  307. chain_ok = 0;
  308. memset(tx_info, 0, sizeof(*tx_info));
  309. tx_info->band = band;
  310. for (i = 0; i < 4; i++) {
  311. tx_info->control.rates[i].idx = sband->n_bitrates - 1;
  312. tx_info->control.rates[i].count = 6;
  313. }
  314. init_completion(&sc->paprd_complete);
  315. sc->paprd_pending = true;
  316. ar9003_paprd_setup_gain_table(ah, chain);
  317. txctl.paprd = BIT(chain);
  318. if (ath_tx_start(hw, skb, &txctl) != 0)
  319. break;
  320. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  321. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  322. sc->paprd_pending = false;
  323. if (!time_left) {
  324. ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
  325. "Timeout waiting for paprd training on "
  326. "TX chain %d\n",
  327. chain);
  328. goto fail_paprd;
  329. }
  330. if (!ar9003_paprd_is_done(ah))
  331. break;
  332. if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
  333. break;
  334. chain_ok = 1;
  335. }
  336. kfree_skb(skb);
  337. if (chain_ok) {
  338. caldata->paprd_done = true;
  339. ath_paprd_activate(sc);
  340. }
  341. fail_paprd:
  342. ath9k_ps_restore(sc);
  343. }
  344. /*
  345. * This routine performs the periodic noise floor calibration function
  346. * that is used to adjust and optimize the chip performance. This
  347. * takes environmental changes (location, temperature) into account.
  348. * When the task is complete, it reschedules itself depending on the
  349. * appropriate interval that was calculated.
  350. */
  351. void ath_ani_calibrate(unsigned long data)
  352. {
  353. struct ath_softc *sc = (struct ath_softc *)data;
  354. struct ath_hw *ah = sc->sc_ah;
  355. struct ath_common *common = ath9k_hw_common(ah);
  356. bool longcal = false;
  357. bool shortcal = false;
  358. bool aniflag = false;
  359. unsigned int timestamp = jiffies_to_msecs(jiffies);
  360. u32 cal_interval, short_cal_interval, long_cal_interval;
  361. unsigned long flags;
  362. if (ah->caldata && ah->caldata->nfcal_interference)
  363. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  364. else
  365. long_cal_interval = ATH_LONG_CALINTERVAL;
  366. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  367. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  368. /* Only calibrate if awake */
  369. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  370. goto set_timer;
  371. ath9k_ps_wakeup(sc);
  372. /* Long calibration runs independently of short calibration. */
  373. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  374. longcal = true;
  375. ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  376. common->ani.longcal_timer = timestamp;
  377. }
  378. /* Short calibration applies only while caldone is false */
  379. if (!common->ani.caldone) {
  380. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  381. shortcal = true;
  382. ath_print(common, ATH_DBG_ANI,
  383. "shortcal @%lu\n", jiffies);
  384. common->ani.shortcal_timer = timestamp;
  385. common->ani.resetcal_timer = timestamp;
  386. }
  387. } else {
  388. if ((timestamp - common->ani.resetcal_timer) >=
  389. ATH_RESTART_CALINTERVAL) {
  390. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  391. if (common->ani.caldone)
  392. common->ani.resetcal_timer = timestamp;
  393. }
  394. }
  395. /* Verify whether we must check ANI */
  396. if ((timestamp - common->ani.checkani_timer) >=
  397. ah->config.ani_poll_interval) {
  398. aniflag = true;
  399. common->ani.checkani_timer = timestamp;
  400. }
  401. /* Skip all processing if there's nothing to do. */
  402. if (longcal || shortcal || aniflag) {
  403. /* Call ANI routine if necessary */
  404. if (aniflag) {
  405. spin_lock_irqsave(&common->cc_lock, flags);
  406. ath9k_hw_ani_monitor(ah, ah->curchan);
  407. ath_update_survey_stats(sc);
  408. spin_unlock_irqrestore(&common->cc_lock, flags);
  409. }
  410. /* Perform calibration if necessary */
  411. if (longcal || shortcal) {
  412. common->ani.caldone =
  413. ath9k_hw_calibrate(ah,
  414. ah->curchan,
  415. common->rx_chainmask,
  416. longcal);
  417. }
  418. }
  419. ath9k_ps_restore(sc);
  420. set_timer:
  421. /*
  422. * Set timer interval based on previous results.
  423. * The interval must be the shortest necessary to satisfy ANI,
  424. * short calibration and long calibration.
  425. */
  426. cal_interval = ATH_LONG_CALINTERVAL;
  427. if (sc->sc_ah->config.enable_ani)
  428. cal_interval = min(cal_interval,
  429. (u32)ah->config.ani_poll_interval);
  430. if (!common->ani.caldone)
  431. cal_interval = min(cal_interval, (u32)short_cal_interval);
  432. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  433. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  434. if (!ah->caldata->paprd_done)
  435. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  436. else
  437. ath_paprd_activate(sc);
  438. }
  439. }
  440. /*
  441. * Update tx/rx chainmask. For legacy association,
  442. * hard code chainmask to 1x1, for 11n association, use
  443. * the chainmask configuration, for bt coexistence, use
  444. * the chainmask configuration even in legacy mode.
  445. */
  446. void ath_update_chainmask(struct ath_softc *sc, int is_ht)
  447. {
  448. struct ath_hw *ah = sc->sc_ah;
  449. struct ath_common *common = ath9k_hw_common(ah);
  450. if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
  451. (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
  452. common->tx_chainmask = ah->caps.tx_chainmask;
  453. common->rx_chainmask = ah->caps.rx_chainmask;
  454. } else {
  455. common->tx_chainmask = 1;
  456. common->rx_chainmask = 1;
  457. }
  458. ath_print(common, ATH_DBG_CONFIG,
  459. "tx chmask: %d, rx chmask: %d\n",
  460. common->tx_chainmask,
  461. common->rx_chainmask);
  462. }
  463. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  464. {
  465. struct ath_node *an;
  466. an = (struct ath_node *)sta->drv_priv;
  467. if (sc->sc_flags & SC_OP_TXAGGR) {
  468. ath_tx_node_init(sc, an);
  469. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  470. sta->ht_cap.ampdu_factor);
  471. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  472. }
  473. }
  474. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  475. {
  476. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  477. if (sc->sc_flags & SC_OP_TXAGGR)
  478. ath_tx_node_cleanup(sc, an);
  479. }
  480. void ath_hw_check(struct work_struct *work)
  481. {
  482. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  483. int i;
  484. ath9k_ps_wakeup(sc);
  485. for (i = 0; i < 3; i++) {
  486. if (ath9k_hw_check_alive(sc->sc_ah))
  487. goto out;
  488. msleep(1);
  489. }
  490. ath_reset(sc, true);
  491. out:
  492. ath9k_ps_restore(sc);
  493. }
  494. void ath9k_tasklet(unsigned long data)
  495. {
  496. struct ath_softc *sc = (struct ath_softc *)data;
  497. struct ath_hw *ah = sc->sc_ah;
  498. struct ath_common *common = ath9k_hw_common(ah);
  499. u32 status = sc->intrstatus;
  500. u32 rxmask;
  501. ath9k_ps_wakeup(sc);
  502. if (status & ATH9K_INT_FATAL) {
  503. ath_reset(sc, true);
  504. ath9k_ps_restore(sc);
  505. return;
  506. }
  507. spin_lock_bh(&sc->sc_pcu_lock);
  508. if (!ath9k_hw_check_alive(ah))
  509. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  510. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  511. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  512. ATH9K_INT_RXORN);
  513. else
  514. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  515. if (status & rxmask) {
  516. /* Check for high priority Rx first */
  517. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  518. (status & ATH9K_INT_RXHP))
  519. ath_rx_tasklet(sc, 0, true);
  520. ath_rx_tasklet(sc, 0, false);
  521. }
  522. if (status & ATH9K_INT_TX) {
  523. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  524. ath_tx_edma_tasklet(sc);
  525. else
  526. ath_tx_tasklet(sc);
  527. }
  528. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  529. /*
  530. * TSF sync does not look correct; remain awake to sync with
  531. * the next Beacon.
  532. */
  533. ath_print(common, ATH_DBG_PS,
  534. "TSFOOR - Sync with next Beacon\n");
  535. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  536. }
  537. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  538. if (status & ATH9K_INT_GENTIMER)
  539. ath_gen_timer_isr(sc->sc_ah);
  540. /* re-enable hardware interrupt */
  541. ath9k_hw_enable_interrupts(ah);
  542. spin_unlock_bh(&sc->sc_pcu_lock);
  543. ath9k_ps_restore(sc);
  544. }
  545. irqreturn_t ath_isr(int irq, void *dev)
  546. {
  547. #define SCHED_INTR ( \
  548. ATH9K_INT_FATAL | \
  549. ATH9K_INT_RXORN | \
  550. ATH9K_INT_RXEOL | \
  551. ATH9K_INT_RX | \
  552. ATH9K_INT_RXLP | \
  553. ATH9K_INT_RXHP | \
  554. ATH9K_INT_TX | \
  555. ATH9K_INT_BMISS | \
  556. ATH9K_INT_CST | \
  557. ATH9K_INT_TSFOOR | \
  558. ATH9K_INT_GENTIMER)
  559. struct ath_softc *sc = dev;
  560. struct ath_hw *ah = sc->sc_ah;
  561. struct ath_common *common = ath9k_hw_common(ah);
  562. enum ath9k_int status;
  563. bool sched = false;
  564. /*
  565. * The hardware is not ready/present, don't
  566. * touch anything. Note this can happen early
  567. * on if the IRQ is shared.
  568. */
  569. if (sc->sc_flags & SC_OP_INVALID)
  570. return IRQ_NONE;
  571. /* shared irq, not for us */
  572. if (!ath9k_hw_intrpend(ah))
  573. return IRQ_NONE;
  574. /*
  575. * Figure out the reason(s) for the interrupt. Note
  576. * that the hal returns a pseudo-ISR that may include
  577. * bits we haven't explicitly enabled so we mask the
  578. * value to insure we only process bits we requested.
  579. */
  580. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  581. status &= ah->imask; /* discard unasked-for bits */
  582. /*
  583. * If there are no status bits set, then this interrupt was not
  584. * for me (should have been caught above).
  585. */
  586. if (!status)
  587. return IRQ_NONE;
  588. /* Cache the status */
  589. sc->intrstatus = status;
  590. if (status & SCHED_INTR)
  591. sched = true;
  592. /*
  593. * If a FATAL or RXORN interrupt is received, we have to reset the
  594. * chip immediately.
  595. */
  596. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  597. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  598. goto chip_reset;
  599. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  600. (status & ATH9K_INT_BB_WATCHDOG)) {
  601. spin_lock(&common->cc_lock);
  602. ath_hw_cycle_counters_update(common);
  603. ar9003_hw_bb_watchdog_dbg_info(ah);
  604. spin_unlock(&common->cc_lock);
  605. goto chip_reset;
  606. }
  607. if (status & ATH9K_INT_SWBA)
  608. tasklet_schedule(&sc->bcon_tasklet);
  609. if (status & ATH9K_INT_TXURN)
  610. ath9k_hw_updatetxtriglevel(ah, true);
  611. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  612. if (status & ATH9K_INT_RXEOL) {
  613. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  614. ath9k_hw_set_interrupts(ah, ah->imask);
  615. }
  616. }
  617. if (status & ATH9K_INT_MIB) {
  618. /*
  619. * Disable interrupts until we service the MIB
  620. * interrupt; otherwise it will continue to
  621. * fire.
  622. */
  623. ath9k_hw_disable_interrupts(ah);
  624. /*
  625. * Let the hal handle the event. We assume
  626. * it will clear whatever condition caused
  627. * the interrupt.
  628. */
  629. spin_lock(&common->cc_lock);
  630. ath9k_hw_proc_mib_event(ah);
  631. spin_unlock(&common->cc_lock);
  632. ath9k_hw_enable_interrupts(ah);
  633. }
  634. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  635. if (status & ATH9K_INT_TIM_TIMER) {
  636. /* Clear RxAbort bit so that we can
  637. * receive frames */
  638. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  639. ath9k_hw_setrxabort(sc->sc_ah, 0);
  640. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  641. }
  642. chip_reset:
  643. ath_debug_stat_interrupt(sc, status);
  644. if (sched) {
  645. /* turn off every interrupt */
  646. ath9k_hw_disable_interrupts(ah);
  647. tasklet_schedule(&sc->intr_tq);
  648. }
  649. return IRQ_HANDLED;
  650. #undef SCHED_INTR
  651. }
  652. static u32 ath_get_extchanmode(struct ath_softc *sc,
  653. struct ieee80211_channel *chan,
  654. enum nl80211_channel_type channel_type)
  655. {
  656. u32 chanmode = 0;
  657. switch (chan->band) {
  658. case IEEE80211_BAND_2GHZ:
  659. switch(channel_type) {
  660. case NL80211_CHAN_NO_HT:
  661. case NL80211_CHAN_HT20:
  662. chanmode = CHANNEL_G_HT20;
  663. break;
  664. case NL80211_CHAN_HT40PLUS:
  665. chanmode = CHANNEL_G_HT40PLUS;
  666. break;
  667. case NL80211_CHAN_HT40MINUS:
  668. chanmode = CHANNEL_G_HT40MINUS;
  669. break;
  670. }
  671. break;
  672. case IEEE80211_BAND_5GHZ:
  673. switch(channel_type) {
  674. case NL80211_CHAN_NO_HT:
  675. case NL80211_CHAN_HT20:
  676. chanmode = CHANNEL_A_HT20;
  677. break;
  678. case NL80211_CHAN_HT40PLUS:
  679. chanmode = CHANNEL_A_HT40PLUS;
  680. break;
  681. case NL80211_CHAN_HT40MINUS:
  682. chanmode = CHANNEL_A_HT40MINUS;
  683. break;
  684. }
  685. break;
  686. default:
  687. break;
  688. }
  689. return chanmode;
  690. }
  691. static void ath9k_bss_assoc_info(struct ath_softc *sc,
  692. struct ieee80211_hw *hw,
  693. struct ieee80211_vif *vif,
  694. struct ieee80211_bss_conf *bss_conf)
  695. {
  696. struct ath_wiphy *aphy = hw->priv;
  697. struct ath_hw *ah = sc->sc_ah;
  698. struct ath_common *common = ath9k_hw_common(ah);
  699. if (bss_conf->assoc) {
  700. ath_print(common, ATH_DBG_CONFIG,
  701. "Bss Info ASSOC %d, bssid: %pM\n",
  702. bss_conf->aid, common->curbssid);
  703. /* New association, store aid */
  704. common->curaid = bss_conf->aid;
  705. ath9k_hw_write_associd(ah);
  706. /*
  707. * Request a re-configuration of Beacon related timers
  708. * on the receipt of the first Beacon frame (i.e.,
  709. * after time sync with the AP).
  710. */
  711. sc->ps_flags |= PS_BEACON_SYNC;
  712. /* Configure the beacon */
  713. ath_beacon_config(sc, vif);
  714. /* Reset rssi stats */
  715. aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
  716. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  717. sc->sc_flags |= SC_OP_ANI_RUN;
  718. ath_start_ani(common);
  719. } else {
  720. ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
  721. common->curaid = 0;
  722. /* Stop ANI */
  723. sc->sc_flags &= ~SC_OP_ANI_RUN;
  724. del_timer_sync(&common->ani.timer);
  725. }
  726. }
  727. void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  728. {
  729. struct ath_hw *ah = sc->sc_ah;
  730. struct ath_common *common = ath9k_hw_common(ah);
  731. struct ieee80211_channel *channel = hw->conf.channel;
  732. int r;
  733. ath9k_ps_wakeup(sc);
  734. spin_lock_bh(&sc->sc_pcu_lock);
  735. ath9k_hw_configpcipowersave(ah, 0, 0);
  736. if (!ah->curchan)
  737. ah->curchan = ath_get_curchannel(sc, sc->hw);
  738. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  739. if (r) {
  740. ath_print(common, ATH_DBG_FATAL,
  741. "Unable to reset channel (%u MHz), "
  742. "reset status %d\n",
  743. channel->center_freq, r);
  744. }
  745. ath_update_txpow(sc);
  746. if (ath_startrecv(sc) != 0) {
  747. ath_print(common, ATH_DBG_FATAL,
  748. "Unable to restart recv logic\n");
  749. spin_unlock_bh(&sc->sc_pcu_lock);
  750. return;
  751. }
  752. if (sc->sc_flags & SC_OP_BEACONS)
  753. ath_beacon_config(sc, NULL); /* restart beacons */
  754. /* Re-Enable interrupts */
  755. ath9k_hw_set_interrupts(ah, ah->imask);
  756. /* Enable LED */
  757. ath9k_hw_cfg_output(ah, ah->led_pin,
  758. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  759. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  760. ieee80211_wake_queues(hw);
  761. spin_unlock_bh(&sc->sc_pcu_lock);
  762. ath9k_ps_restore(sc);
  763. }
  764. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  765. {
  766. struct ath_hw *ah = sc->sc_ah;
  767. struct ieee80211_channel *channel = hw->conf.channel;
  768. int r;
  769. ath9k_ps_wakeup(sc);
  770. spin_lock_bh(&sc->sc_pcu_lock);
  771. ieee80211_stop_queues(hw);
  772. /*
  773. * Keep the LED on when the radio is disabled
  774. * during idle unassociated state.
  775. */
  776. if (!sc->ps_idle) {
  777. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  778. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  779. }
  780. /* Disable interrupts */
  781. ath9k_hw_disable_interrupts(ah);
  782. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  783. ath_stoprecv(sc); /* turn off frame recv */
  784. ath_flushrecv(sc); /* flush recv queue */
  785. if (!ah->curchan)
  786. ah->curchan = ath_get_curchannel(sc, hw);
  787. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  788. if (r) {
  789. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  790. "Unable to reset channel (%u MHz), "
  791. "reset status %d\n",
  792. channel->center_freq, r);
  793. }
  794. ath9k_hw_phy_disable(ah);
  795. ath9k_hw_configpcipowersave(ah, 1, 1);
  796. spin_unlock_bh(&sc->sc_pcu_lock);
  797. ath9k_ps_restore(sc);
  798. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  799. }
  800. int ath_reset(struct ath_softc *sc, bool retry_tx)
  801. {
  802. struct ath_hw *ah = sc->sc_ah;
  803. struct ath_common *common = ath9k_hw_common(ah);
  804. struct ieee80211_hw *hw = sc->hw;
  805. int r;
  806. /* Stop ANI */
  807. del_timer_sync(&common->ani.timer);
  808. spin_lock_bh(&sc->sc_pcu_lock);
  809. ieee80211_stop_queues(hw);
  810. ath9k_hw_disable_interrupts(ah);
  811. ath_drain_all_txq(sc, retry_tx);
  812. ath_stoprecv(sc);
  813. ath_flushrecv(sc);
  814. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  815. if (r)
  816. ath_print(common, ATH_DBG_FATAL,
  817. "Unable to reset hardware; reset status %d\n", r);
  818. if (ath_startrecv(sc) != 0)
  819. ath_print(common, ATH_DBG_FATAL,
  820. "Unable to start recv logic\n");
  821. /*
  822. * We may be doing a reset in response to a request
  823. * that changes the channel so update any state that
  824. * might change as a result.
  825. */
  826. ath_update_txpow(sc);
  827. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  828. ath_beacon_config(sc, NULL); /* restart beacons */
  829. ath9k_hw_set_interrupts(ah, ah->imask);
  830. if (retry_tx) {
  831. int i;
  832. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  833. if (ATH_TXQ_SETUP(sc, i)) {
  834. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  835. ath_txq_schedule(sc, &sc->tx.txq[i]);
  836. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  837. }
  838. }
  839. }
  840. ieee80211_wake_queues(hw);
  841. spin_unlock_bh(&sc->sc_pcu_lock);
  842. /* Start ANI */
  843. ath_start_ani(common);
  844. return r;
  845. }
  846. /* XXX: Remove me once we don't depend on ath9k_channel for all
  847. * this redundant data */
  848. void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
  849. struct ath9k_channel *ichan)
  850. {
  851. struct ieee80211_channel *chan = hw->conf.channel;
  852. struct ieee80211_conf *conf = &hw->conf;
  853. ichan->channel = chan->center_freq;
  854. ichan->chan = chan;
  855. if (chan->band == IEEE80211_BAND_2GHZ) {
  856. ichan->chanmode = CHANNEL_G;
  857. ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
  858. } else {
  859. ichan->chanmode = CHANNEL_A;
  860. ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
  861. }
  862. if (conf_is_ht(conf))
  863. ichan->chanmode = ath_get_extchanmode(sc, chan,
  864. conf->channel_type);
  865. }
  866. /**********************/
  867. /* mac80211 callbacks */
  868. /**********************/
  869. static int ath9k_start(struct ieee80211_hw *hw)
  870. {
  871. struct ath_wiphy *aphy = hw->priv;
  872. struct ath_softc *sc = aphy->sc;
  873. struct ath_hw *ah = sc->sc_ah;
  874. struct ath_common *common = ath9k_hw_common(ah);
  875. struct ieee80211_channel *curchan = hw->conf.channel;
  876. struct ath9k_channel *init_channel;
  877. int r;
  878. ath_print(common, ATH_DBG_CONFIG,
  879. "Starting driver with initial channel: %d MHz\n",
  880. curchan->center_freq);
  881. mutex_lock(&sc->mutex);
  882. if (ath9k_wiphy_started(sc)) {
  883. if (sc->chan_idx == curchan->hw_value) {
  884. /*
  885. * Already on the operational channel, the new wiphy
  886. * can be marked active.
  887. */
  888. aphy->state = ATH_WIPHY_ACTIVE;
  889. ieee80211_wake_queues(hw);
  890. } else {
  891. /*
  892. * Another wiphy is on another channel, start the new
  893. * wiphy in paused state.
  894. */
  895. aphy->state = ATH_WIPHY_PAUSED;
  896. ieee80211_stop_queues(hw);
  897. }
  898. mutex_unlock(&sc->mutex);
  899. return 0;
  900. }
  901. aphy->state = ATH_WIPHY_ACTIVE;
  902. /* setup initial channel */
  903. sc->chan_idx = curchan->hw_value;
  904. init_channel = ath_get_curchannel(sc, hw);
  905. /* Reset SERDES registers */
  906. ath9k_hw_configpcipowersave(ah, 0, 0);
  907. /*
  908. * The basic interface to setting the hardware in a good
  909. * state is ``reset''. On return the hardware is known to
  910. * be powered up and with interrupts disabled. This must
  911. * be followed by initialization of the appropriate bits
  912. * and then setup of the interrupt mask.
  913. */
  914. spin_lock_bh(&sc->sc_pcu_lock);
  915. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  916. if (r) {
  917. ath_print(common, ATH_DBG_FATAL,
  918. "Unable to reset hardware; reset status %d "
  919. "(freq %u MHz)\n", r,
  920. curchan->center_freq);
  921. spin_unlock_bh(&sc->sc_pcu_lock);
  922. goto mutex_unlock;
  923. }
  924. /*
  925. * This is needed only to setup initial state
  926. * but it's best done after a reset.
  927. */
  928. ath_update_txpow(sc);
  929. /*
  930. * Setup the hardware after reset:
  931. * The receive engine is set going.
  932. * Frame transmit is handled entirely
  933. * in the frame output path; there's nothing to do
  934. * here except setup the interrupt mask.
  935. */
  936. if (ath_startrecv(sc) != 0) {
  937. ath_print(common, ATH_DBG_FATAL,
  938. "Unable to start recv logic\n");
  939. r = -EIO;
  940. spin_unlock_bh(&sc->sc_pcu_lock);
  941. goto mutex_unlock;
  942. }
  943. spin_unlock_bh(&sc->sc_pcu_lock);
  944. /* Setup our intr mask. */
  945. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  946. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  947. ATH9K_INT_GLOBAL;
  948. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  949. ah->imask |= ATH9K_INT_RXHP |
  950. ATH9K_INT_RXLP |
  951. ATH9K_INT_BB_WATCHDOG;
  952. else
  953. ah->imask |= ATH9K_INT_RX;
  954. ah->imask |= ATH9K_INT_GTT;
  955. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  956. ah->imask |= ATH9K_INT_CST;
  957. sc->sc_flags &= ~SC_OP_INVALID;
  958. /* Disable BMISS interrupt when we're not associated */
  959. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  960. ath9k_hw_set_interrupts(ah, ah->imask);
  961. ieee80211_wake_queues(hw);
  962. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  963. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  964. !ah->btcoex_hw.enabled) {
  965. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  966. AR_STOMP_LOW_WLAN_WGHT);
  967. ath9k_hw_btcoex_enable(ah);
  968. if (common->bus_ops->bt_coex_prep)
  969. common->bus_ops->bt_coex_prep(common);
  970. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  971. ath9k_btcoex_timer_resume(sc);
  972. }
  973. mutex_unlock:
  974. mutex_unlock(&sc->mutex);
  975. return r;
  976. }
  977. static int ath9k_tx(struct ieee80211_hw *hw,
  978. struct sk_buff *skb)
  979. {
  980. struct ath_wiphy *aphy = hw->priv;
  981. struct ath_softc *sc = aphy->sc;
  982. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  983. struct ath_tx_control txctl;
  984. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  985. if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
  986. ath_print(common, ATH_DBG_XMIT,
  987. "ath9k: %s: TX in unexpected wiphy state "
  988. "%d\n", wiphy_name(hw->wiphy), aphy->state);
  989. goto exit;
  990. }
  991. if (sc->ps_enabled) {
  992. /*
  993. * mac80211 does not set PM field for normal data frames, so we
  994. * need to update that based on the current PS mode.
  995. */
  996. if (ieee80211_is_data(hdr->frame_control) &&
  997. !ieee80211_is_nullfunc(hdr->frame_control) &&
  998. !ieee80211_has_pm(hdr->frame_control)) {
  999. ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
  1000. "while in PS mode\n");
  1001. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  1002. }
  1003. }
  1004. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  1005. /*
  1006. * We are using PS-Poll and mac80211 can request TX while in
  1007. * power save mode. Need to wake up hardware for the TX to be
  1008. * completed and if needed, also for RX of buffered frames.
  1009. */
  1010. ath9k_ps_wakeup(sc);
  1011. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  1012. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1013. if (ieee80211_is_pspoll(hdr->frame_control)) {
  1014. ath_print(common, ATH_DBG_PS,
  1015. "Sending PS-Poll to pick a buffered frame\n");
  1016. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  1017. } else {
  1018. ath_print(common, ATH_DBG_PS,
  1019. "Wake up to complete TX\n");
  1020. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  1021. }
  1022. /*
  1023. * The actual restore operation will happen only after
  1024. * the sc_flags bit is cleared. We are just dropping
  1025. * the ps_usecount here.
  1026. */
  1027. ath9k_ps_restore(sc);
  1028. }
  1029. memset(&txctl, 0, sizeof(struct ath_tx_control));
  1030. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  1031. ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  1032. if (ath_tx_start(hw, skb, &txctl) != 0) {
  1033. ath_print(common, ATH_DBG_XMIT, "TX failed\n");
  1034. goto exit;
  1035. }
  1036. return 0;
  1037. exit:
  1038. dev_kfree_skb_any(skb);
  1039. return 0;
  1040. }
  1041. static void ath9k_stop(struct ieee80211_hw *hw)
  1042. {
  1043. struct ath_wiphy *aphy = hw->priv;
  1044. struct ath_softc *sc = aphy->sc;
  1045. struct ath_hw *ah = sc->sc_ah;
  1046. struct ath_common *common = ath9k_hw_common(ah);
  1047. int i;
  1048. mutex_lock(&sc->mutex);
  1049. aphy->state = ATH_WIPHY_INACTIVE;
  1050. if (led_blink)
  1051. cancel_delayed_work_sync(&sc->ath_led_blink_work);
  1052. cancel_delayed_work_sync(&sc->tx_complete_work);
  1053. cancel_work_sync(&sc->paprd_work);
  1054. cancel_work_sync(&sc->hw_check_work);
  1055. for (i = 0; i < sc->num_sec_wiphy; i++) {
  1056. if (sc->sec_wiphy[i])
  1057. break;
  1058. }
  1059. if (i == sc->num_sec_wiphy) {
  1060. cancel_delayed_work_sync(&sc->wiphy_work);
  1061. cancel_work_sync(&sc->chan_work);
  1062. }
  1063. if (sc->sc_flags & SC_OP_INVALID) {
  1064. ath_print(common, ATH_DBG_ANY, "Device not present\n");
  1065. mutex_unlock(&sc->mutex);
  1066. return;
  1067. }
  1068. if (ath9k_wiphy_started(sc)) {
  1069. mutex_unlock(&sc->mutex);
  1070. return; /* another wiphy still in use */
  1071. }
  1072. /* Ensure HW is awake when we try to shut it down. */
  1073. ath9k_ps_wakeup(sc);
  1074. if (ah->btcoex_hw.enabled) {
  1075. ath9k_hw_btcoex_disable(ah);
  1076. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1077. ath9k_btcoex_timer_pause(sc);
  1078. }
  1079. spin_lock_bh(&sc->sc_pcu_lock);
  1080. /* make sure h/w will not generate any interrupt
  1081. * before setting the invalid flag. */
  1082. ath9k_hw_disable_interrupts(ah);
  1083. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1084. ath_drain_all_txq(sc, false);
  1085. ath_stoprecv(sc);
  1086. ath9k_hw_phy_disable(ah);
  1087. } else
  1088. sc->rx.rxlink = NULL;
  1089. /* disable HAL and put h/w to sleep */
  1090. ath9k_hw_disable(ah);
  1091. ath9k_hw_configpcipowersave(ah, 1, 1);
  1092. spin_unlock_bh(&sc->sc_pcu_lock);
  1093. ath9k_ps_restore(sc);
  1094. /* Finally, put the chip in FULL SLEEP mode */
  1095. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  1096. sc->sc_flags |= SC_OP_INVALID;
  1097. mutex_unlock(&sc->mutex);
  1098. ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
  1099. }
  1100. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1101. struct ieee80211_vif *vif)
  1102. {
  1103. struct ath_wiphy *aphy = hw->priv;
  1104. struct ath_softc *sc = aphy->sc;
  1105. struct ath_hw *ah = sc->sc_ah;
  1106. struct ath_common *common = ath9k_hw_common(ah);
  1107. struct ath_vif *avp = (void *)vif->drv_priv;
  1108. enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
  1109. int ret = 0;
  1110. mutex_lock(&sc->mutex);
  1111. switch (vif->type) {
  1112. case NL80211_IFTYPE_STATION:
  1113. ic_opmode = NL80211_IFTYPE_STATION;
  1114. break;
  1115. case NL80211_IFTYPE_WDS:
  1116. ic_opmode = NL80211_IFTYPE_WDS;
  1117. break;
  1118. case NL80211_IFTYPE_ADHOC:
  1119. case NL80211_IFTYPE_AP:
  1120. case NL80211_IFTYPE_MESH_POINT:
  1121. if (sc->nbcnvifs >= ATH_BCBUF) {
  1122. ret = -ENOBUFS;
  1123. goto out;
  1124. }
  1125. ic_opmode = vif->type;
  1126. break;
  1127. default:
  1128. ath_print(common, ATH_DBG_FATAL,
  1129. "Interface type %d not yet supported\n", vif->type);
  1130. ret = -EOPNOTSUPP;
  1131. goto out;
  1132. }
  1133. ath_print(common, ATH_DBG_CONFIG,
  1134. "Attach a VIF of type: %d\n", ic_opmode);
  1135. /* Set the VIF opmode */
  1136. avp->av_opmode = ic_opmode;
  1137. avp->av_bslot = -1;
  1138. sc->nvifs++;
  1139. ath9k_set_bssid_mask(hw, vif);
  1140. if (sc->nvifs > 1)
  1141. goto out; /* skip global settings for secondary vif */
  1142. if (ic_opmode == NL80211_IFTYPE_AP) {
  1143. ath9k_hw_set_tsfadjust(ah, 1);
  1144. sc->sc_flags |= SC_OP_TSF_RESET;
  1145. }
  1146. /* Set the device opmode */
  1147. ah->opmode = ic_opmode;
  1148. /*
  1149. * Enable MIB interrupts when there are hardware phy counters.
  1150. * Note we only do this (at the moment) for station mode.
  1151. */
  1152. if ((vif->type == NL80211_IFTYPE_STATION) ||
  1153. (vif->type == NL80211_IFTYPE_ADHOC) ||
  1154. (vif->type == NL80211_IFTYPE_MESH_POINT)) {
  1155. if (ah->config.enable_ani)
  1156. ah->imask |= ATH9K_INT_MIB;
  1157. ah->imask |= ATH9K_INT_TSFOOR;
  1158. }
  1159. ath9k_hw_set_interrupts(ah, ah->imask);
  1160. if (vif->type == NL80211_IFTYPE_AP ||
  1161. vif->type == NL80211_IFTYPE_ADHOC ||
  1162. vif->type == NL80211_IFTYPE_MONITOR) {
  1163. sc->sc_flags |= SC_OP_ANI_RUN;
  1164. ath_start_ani(common);
  1165. }
  1166. out:
  1167. mutex_unlock(&sc->mutex);
  1168. return ret;
  1169. }
  1170. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1171. struct ieee80211_vif *vif)
  1172. {
  1173. struct ath_wiphy *aphy = hw->priv;
  1174. struct ath_softc *sc = aphy->sc;
  1175. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1176. struct ath_vif *avp = (void *)vif->drv_priv;
  1177. int i;
  1178. ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1179. mutex_lock(&sc->mutex);
  1180. /* Stop ANI */
  1181. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1182. del_timer_sync(&common->ani.timer);
  1183. /* Reclaim beacon resources */
  1184. if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
  1185. (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1186. (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
  1187. ath9k_ps_wakeup(sc);
  1188. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1189. ath9k_ps_restore(sc);
  1190. }
  1191. ath_beacon_return(sc, avp);
  1192. sc->sc_flags &= ~SC_OP_BEACONS;
  1193. for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
  1194. if (sc->beacon.bslot[i] == vif) {
  1195. printk(KERN_DEBUG "%s: vif had allocated beacon "
  1196. "slot\n", __func__);
  1197. sc->beacon.bslot[i] = NULL;
  1198. sc->beacon.bslot_aphy[i] = NULL;
  1199. }
  1200. }
  1201. sc->nvifs--;
  1202. mutex_unlock(&sc->mutex);
  1203. }
  1204. static void ath9k_enable_ps(struct ath_softc *sc)
  1205. {
  1206. struct ath_hw *ah = sc->sc_ah;
  1207. sc->ps_enabled = true;
  1208. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1209. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1210. ah->imask |= ATH9K_INT_TIM_TIMER;
  1211. ath9k_hw_set_interrupts(ah, ah->imask);
  1212. }
  1213. ath9k_hw_setrxabort(ah, 1);
  1214. }
  1215. }
  1216. static void ath9k_disable_ps(struct ath_softc *sc)
  1217. {
  1218. struct ath_hw *ah = sc->sc_ah;
  1219. sc->ps_enabled = false;
  1220. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1221. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1222. ath9k_hw_setrxabort(ah, 0);
  1223. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1224. PS_WAIT_FOR_CAB |
  1225. PS_WAIT_FOR_PSPOLL_DATA |
  1226. PS_WAIT_FOR_TX_ACK);
  1227. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1228. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1229. ath9k_hw_set_interrupts(ah, ah->imask);
  1230. }
  1231. }
  1232. }
  1233. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1234. {
  1235. struct ath_wiphy *aphy = hw->priv;
  1236. struct ath_softc *sc = aphy->sc;
  1237. struct ath_hw *ah = sc->sc_ah;
  1238. struct ath_common *common = ath9k_hw_common(ah);
  1239. struct ieee80211_conf *conf = &hw->conf;
  1240. bool disable_radio;
  1241. mutex_lock(&sc->mutex);
  1242. /*
  1243. * Leave this as the first check because we need to turn on the
  1244. * radio if it was disabled before prior to processing the rest
  1245. * of the changes. Likewise we must only disable the radio towards
  1246. * the end.
  1247. */
  1248. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1249. bool enable_radio;
  1250. bool all_wiphys_idle;
  1251. bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1252. spin_lock_bh(&sc->wiphy_lock);
  1253. all_wiphys_idle = ath9k_all_wiphys_idle(sc);
  1254. ath9k_set_wiphy_idle(aphy, idle);
  1255. enable_radio = (!idle && all_wiphys_idle);
  1256. /*
  1257. * After we unlock here its possible another wiphy
  1258. * can be re-renabled so to account for that we will
  1259. * only disable the radio toward the end of this routine
  1260. * if by then all wiphys are still idle.
  1261. */
  1262. spin_unlock_bh(&sc->wiphy_lock);
  1263. if (enable_radio) {
  1264. sc->ps_idle = false;
  1265. ath_radio_enable(sc, hw);
  1266. ath_print(common, ATH_DBG_CONFIG,
  1267. "not-idle: enabling radio\n");
  1268. }
  1269. }
  1270. /*
  1271. * We just prepare to enable PS. We have to wait until our AP has
  1272. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1273. * those ACKs and end up retransmitting the same null data frames.
  1274. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1275. */
  1276. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1277. unsigned long flags;
  1278. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1279. if (conf->flags & IEEE80211_CONF_PS)
  1280. ath9k_enable_ps(sc);
  1281. else
  1282. ath9k_disable_ps(sc);
  1283. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1284. }
  1285. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1286. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1287. ath_print(common, ATH_DBG_CONFIG,
  1288. "HW opmode set to Monitor mode\n");
  1289. sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
  1290. }
  1291. }
  1292. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1293. struct ieee80211_channel *curchan = hw->conf.channel;
  1294. int pos = curchan->hw_value;
  1295. int old_pos = -1;
  1296. unsigned long flags;
  1297. if (ah->curchan)
  1298. old_pos = ah->curchan - &ah->channels[0];
  1299. aphy->chan_idx = pos;
  1300. aphy->chan_is_ht = conf_is_ht(conf);
  1301. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1302. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1303. else
  1304. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1305. if (aphy->state == ATH_WIPHY_SCAN ||
  1306. aphy->state == ATH_WIPHY_ACTIVE)
  1307. ath9k_wiphy_pause_all_forced(sc, aphy);
  1308. else {
  1309. /*
  1310. * Do not change operational channel based on a paused
  1311. * wiphy changes.
  1312. */
  1313. goto skip_chan_change;
  1314. }
  1315. ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
  1316. curchan->center_freq);
  1317. /* XXX: remove me eventualy */
  1318. ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
  1319. ath_update_chainmask(sc, conf_is_ht(conf));
  1320. /* update survey stats for the old channel before switching */
  1321. spin_lock_irqsave(&common->cc_lock, flags);
  1322. ath_update_survey_stats(sc);
  1323. spin_unlock_irqrestore(&common->cc_lock, flags);
  1324. /*
  1325. * If the operating channel changes, change the survey in-use flags
  1326. * along with it.
  1327. * Reset the survey data for the new channel, unless we're switching
  1328. * back to the operating channel from an off-channel operation.
  1329. */
  1330. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1331. sc->cur_survey != &sc->survey[pos]) {
  1332. if (sc->cur_survey)
  1333. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1334. sc->cur_survey = &sc->survey[pos];
  1335. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1336. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1337. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1338. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1339. }
  1340. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1341. ath_print(common, ATH_DBG_FATAL,
  1342. "Unable to set channel\n");
  1343. mutex_unlock(&sc->mutex);
  1344. return -EINVAL;
  1345. }
  1346. /*
  1347. * The most recent snapshot of channel->noisefloor for the old
  1348. * channel is only available after the hardware reset. Copy it to
  1349. * the survey stats now.
  1350. */
  1351. if (old_pos >= 0)
  1352. ath_update_survey_nf(sc, old_pos);
  1353. }
  1354. skip_chan_change:
  1355. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1356. sc->config.txpowlimit = 2 * conf->power_level;
  1357. ath_update_txpow(sc);
  1358. }
  1359. spin_lock_bh(&sc->wiphy_lock);
  1360. disable_radio = ath9k_all_wiphys_idle(sc);
  1361. spin_unlock_bh(&sc->wiphy_lock);
  1362. if (disable_radio) {
  1363. ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1364. sc->ps_idle = true;
  1365. ath_radio_disable(sc, hw);
  1366. }
  1367. mutex_unlock(&sc->mutex);
  1368. return 0;
  1369. }
  1370. #define SUPPORTED_FILTERS \
  1371. (FIF_PROMISC_IN_BSS | \
  1372. FIF_ALLMULTI | \
  1373. FIF_CONTROL | \
  1374. FIF_PSPOLL | \
  1375. FIF_OTHER_BSS | \
  1376. FIF_BCN_PRBRESP_PROMISC | \
  1377. FIF_PROBE_REQ | \
  1378. FIF_FCSFAIL)
  1379. /* FIXME: sc->sc_full_reset ? */
  1380. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1381. unsigned int changed_flags,
  1382. unsigned int *total_flags,
  1383. u64 multicast)
  1384. {
  1385. struct ath_wiphy *aphy = hw->priv;
  1386. struct ath_softc *sc = aphy->sc;
  1387. u32 rfilt;
  1388. changed_flags &= SUPPORTED_FILTERS;
  1389. *total_flags &= SUPPORTED_FILTERS;
  1390. sc->rx.rxfilter = *total_flags;
  1391. ath9k_ps_wakeup(sc);
  1392. rfilt = ath_calcrxfilter(sc);
  1393. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1394. ath9k_ps_restore(sc);
  1395. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1396. "Set HW RX filter: 0x%x\n", rfilt);
  1397. }
  1398. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1399. struct ieee80211_vif *vif,
  1400. struct ieee80211_sta *sta)
  1401. {
  1402. struct ath_wiphy *aphy = hw->priv;
  1403. struct ath_softc *sc = aphy->sc;
  1404. ath_node_attach(sc, sta);
  1405. return 0;
  1406. }
  1407. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1408. struct ieee80211_vif *vif,
  1409. struct ieee80211_sta *sta)
  1410. {
  1411. struct ath_wiphy *aphy = hw->priv;
  1412. struct ath_softc *sc = aphy->sc;
  1413. ath_node_detach(sc, sta);
  1414. return 0;
  1415. }
  1416. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1417. const struct ieee80211_tx_queue_params *params)
  1418. {
  1419. struct ath_wiphy *aphy = hw->priv;
  1420. struct ath_softc *sc = aphy->sc;
  1421. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1422. struct ath_txq *txq;
  1423. struct ath9k_tx_queue_info qi;
  1424. int ret = 0;
  1425. if (queue >= WME_NUM_AC)
  1426. return 0;
  1427. txq = sc->tx.txq_map[queue];
  1428. mutex_lock(&sc->mutex);
  1429. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1430. qi.tqi_aifs = params->aifs;
  1431. qi.tqi_cwmin = params->cw_min;
  1432. qi.tqi_cwmax = params->cw_max;
  1433. qi.tqi_burstTime = params->txop;
  1434. ath_print(common, ATH_DBG_CONFIG,
  1435. "Configure tx [queue/halq] [%d/%d], "
  1436. "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1437. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1438. params->cw_max, params->txop);
  1439. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1440. if (ret)
  1441. ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
  1442. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1443. if (queue == WME_AC_BE && !ret)
  1444. ath_beaconq_config(sc);
  1445. mutex_unlock(&sc->mutex);
  1446. return ret;
  1447. }
  1448. static int ath9k_set_key(struct ieee80211_hw *hw,
  1449. enum set_key_cmd cmd,
  1450. struct ieee80211_vif *vif,
  1451. struct ieee80211_sta *sta,
  1452. struct ieee80211_key_conf *key)
  1453. {
  1454. struct ath_wiphy *aphy = hw->priv;
  1455. struct ath_softc *sc = aphy->sc;
  1456. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1457. int ret = 0;
  1458. if (modparam_nohwcrypt)
  1459. return -ENOSPC;
  1460. mutex_lock(&sc->mutex);
  1461. ath9k_ps_wakeup(sc);
  1462. ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1463. switch (cmd) {
  1464. case SET_KEY:
  1465. ret = ath_key_config(common, vif, sta, key);
  1466. if (ret >= 0) {
  1467. key->hw_key_idx = ret;
  1468. /* push IV and Michael MIC generation to stack */
  1469. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1470. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1471. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1472. if (sc->sc_ah->sw_mgmt_crypto &&
  1473. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1474. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1475. ret = 0;
  1476. }
  1477. break;
  1478. case DISABLE_KEY:
  1479. ath_key_delete(common, key);
  1480. break;
  1481. default:
  1482. ret = -EINVAL;
  1483. }
  1484. ath9k_ps_restore(sc);
  1485. mutex_unlock(&sc->mutex);
  1486. return ret;
  1487. }
  1488. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1489. struct ieee80211_vif *vif,
  1490. struct ieee80211_bss_conf *bss_conf,
  1491. u32 changed)
  1492. {
  1493. struct ath_wiphy *aphy = hw->priv;
  1494. struct ath_softc *sc = aphy->sc;
  1495. struct ath_hw *ah = sc->sc_ah;
  1496. struct ath_common *common = ath9k_hw_common(ah);
  1497. struct ath_vif *avp = (void *)vif->drv_priv;
  1498. int slottime;
  1499. int error;
  1500. mutex_lock(&sc->mutex);
  1501. if (changed & BSS_CHANGED_BSSID) {
  1502. /* Set BSSID */
  1503. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1504. memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
  1505. common->curaid = 0;
  1506. ath9k_hw_write_associd(ah);
  1507. /* Set aggregation protection mode parameters */
  1508. sc->config.ath_aggr_prot = 0;
  1509. /* Only legacy IBSS for now */
  1510. if (vif->type == NL80211_IFTYPE_ADHOC)
  1511. ath_update_chainmask(sc, 0);
  1512. ath_print(common, ATH_DBG_CONFIG,
  1513. "BSSID: %pM aid: 0x%x\n",
  1514. common->curbssid, common->curaid);
  1515. /* need to reconfigure the beacon */
  1516. sc->sc_flags &= ~SC_OP_BEACONS ;
  1517. }
  1518. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1519. if ((changed & BSS_CHANGED_BEACON) ||
  1520. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1521. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1522. error = ath_beacon_alloc(aphy, vif);
  1523. if (!error)
  1524. ath_beacon_config(sc, vif);
  1525. }
  1526. if (changed & BSS_CHANGED_ERP_SLOT) {
  1527. if (bss_conf->use_short_slot)
  1528. slottime = 9;
  1529. else
  1530. slottime = 20;
  1531. if (vif->type == NL80211_IFTYPE_AP) {
  1532. /*
  1533. * Defer update, so that connected stations can adjust
  1534. * their settings at the same time.
  1535. * See beacon.c for more details
  1536. */
  1537. sc->beacon.slottime = slottime;
  1538. sc->beacon.updateslot = UPDATE;
  1539. } else {
  1540. ah->slottime = slottime;
  1541. ath9k_hw_init_global_settings(ah);
  1542. }
  1543. }
  1544. /* Disable transmission of beacons */
  1545. if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
  1546. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1547. if (changed & BSS_CHANGED_BEACON_INT) {
  1548. sc->beacon_interval = bss_conf->beacon_int;
  1549. /*
  1550. * In case of AP mode, the HW TSF has to be reset
  1551. * when the beacon interval changes.
  1552. */
  1553. if (vif->type == NL80211_IFTYPE_AP) {
  1554. sc->sc_flags |= SC_OP_TSF_RESET;
  1555. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1556. error = ath_beacon_alloc(aphy, vif);
  1557. if (!error)
  1558. ath_beacon_config(sc, vif);
  1559. } else {
  1560. ath_beacon_config(sc, vif);
  1561. }
  1562. }
  1563. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1564. ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1565. bss_conf->use_short_preamble);
  1566. if (bss_conf->use_short_preamble)
  1567. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1568. else
  1569. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1570. }
  1571. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1572. ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1573. bss_conf->use_cts_prot);
  1574. if (bss_conf->use_cts_prot &&
  1575. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1576. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1577. else
  1578. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1579. }
  1580. if (changed & BSS_CHANGED_ASSOC) {
  1581. ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
  1582. bss_conf->assoc);
  1583. ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
  1584. }
  1585. mutex_unlock(&sc->mutex);
  1586. }
  1587. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1588. {
  1589. u64 tsf;
  1590. struct ath_wiphy *aphy = hw->priv;
  1591. struct ath_softc *sc = aphy->sc;
  1592. mutex_lock(&sc->mutex);
  1593. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1594. mutex_unlock(&sc->mutex);
  1595. return tsf;
  1596. }
  1597. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1598. {
  1599. struct ath_wiphy *aphy = hw->priv;
  1600. struct ath_softc *sc = aphy->sc;
  1601. mutex_lock(&sc->mutex);
  1602. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1603. mutex_unlock(&sc->mutex);
  1604. }
  1605. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1606. {
  1607. struct ath_wiphy *aphy = hw->priv;
  1608. struct ath_softc *sc = aphy->sc;
  1609. mutex_lock(&sc->mutex);
  1610. ath9k_ps_wakeup(sc);
  1611. ath9k_hw_reset_tsf(sc->sc_ah);
  1612. ath9k_ps_restore(sc);
  1613. mutex_unlock(&sc->mutex);
  1614. }
  1615. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1616. struct ieee80211_vif *vif,
  1617. enum ieee80211_ampdu_mlme_action action,
  1618. struct ieee80211_sta *sta,
  1619. u16 tid, u16 *ssn)
  1620. {
  1621. struct ath_wiphy *aphy = hw->priv;
  1622. struct ath_softc *sc = aphy->sc;
  1623. int ret = 0;
  1624. local_bh_disable();
  1625. switch (action) {
  1626. case IEEE80211_AMPDU_RX_START:
  1627. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1628. ret = -ENOTSUPP;
  1629. break;
  1630. case IEEE80211_AMPDU_RX_STOP:
  1631. break;
  1632. case IEEE80211_AMPDU_TX_START:
  1633. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1634. return -EOPNOTSUPP;
  1635. ath9k_ps_wakeup(sc);
  1636. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1637. if (!ret)
  1638. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1639. ath9k_ps_restore(sc);
  1640. break;
  1641. case IEEE80211_AMPDU_TX_STOP:
  1642. ath9k_ps_wakeup(sc);
  1643. ath_tx_aggr_stop(sc, sta, tid);
  1644. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1645. ath9k_ps_restore(sc);
  1646. break;
  1647. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1648. ath9k_ps_wakeup(sc);
  1649. ath_tx_aggr_resume(sc, sta, tid);
  1650. ath9k_ps_restore(sc);
  1651. break;
  1652. default:
  1653. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  1654. "Unknown AMPDU action\n");
  1655. }
  1656. local_bh_enable();
  1657. return ret;
  1658. }
  1659. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1660. struct survey_info *survey)
  1661. {
  1662. struct ath_wiphy *aphy = hw->priv;
  1663. struct ath_softc *sc = aphy->sc;
  1664. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1665. struct ieee80211_supported_band *sband;
  1666. struct ieee80211_channel *chan;
  1667. unsigned long flags;
  1668. int pos;
  1669. spin_lock_irqsave(&common->cc_lock, flags);
  1670. if (idx == 0)
  1671. ath_update_survey_stats(sc);
  1672. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1673. if (sband && idx >= sband->n_channels) {
  1674. idx -= sband->n_channels;
  1675. sband = NULL;
  1676. }
  1677. if (!sband)
  1678. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1679. if (!sband || idx >= sband->n_channels) {
  1680. spin_unlock_irqrestore(&common->cc_lock, flags);
  1681. return -ENOENT;
  1682. }
  1683. chan = &sband->channels[idx];
  1684. pos = chan->hw_value;
  1685. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1686. survey->channel = chan;
  1687. spin_unlock_irqrestore(&common->cc_lock, flags);
  1688. return 0;
  1689. }
  1690. static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
  1691. {
  1692. struct ath_wiphy *aphy = hw->priv;
  1693. struct ath_softc *sc = aphy->sc;
  1694. mutex_lock(&sc->mutex);
  1695. if (ath9k_wiphy_scanning(sc)) {
  1696. /*
  1697. * There is a race here in mac80211 but fixing it requires
  1698. * we revisit how we handle the scan complete callback.
  1699. * After mac80211 fixes we will not have configured hardware
  1700. * to the home channel nor would we have configured the RX
  1701. * filter yet.
  1702. */
  1703. mutex_unlock(&sc->mutex);
  1704. return;
  1705. }
  1706. aphy->state = ATH_WIPHY_SCAN;
  1707. ath9k_wiphy_pause_all_forced(sc, aphy);
  1708. mutex_unlock(&sc->mutex);
  1709. }
  1710. /*
  1711. * XXX: this requires a revisit after the driver
  1712. * scan_complete gets moved to another place/removed in mac80211.
  1713. */
  1714. static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
  1715. {
  1716. struct ath_wiphy *aphy = hw->priv;
  1717. struct ath_softc *sc = aphy->sc;
  1718. mutex_lock(&sc->mutex);
  1719. aphy->state = ATH_WIPHY_ACTIVE;
  1720. mutex_unlock(&sc->mutex);
  1721. }
  1722. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1723. {
  1724. struct ath_wiphy *aphy = hw->priv;
  1725. struct ath_softc *sc = aphy->sc;
  1726. struct ath_hw *ah = sc->sc_ah;
  1727. mutex_lock(&sc->mutex);
  1728. ah->coverage_class = coverage_class;
  1729. ath9k_hw_init_global_settings(ah);
  1730. mutex_unlock(&sc->mutex);
  1731. }
  1732. struct ieee80211_ops ath9k_ops = {
  1733. .tx = ath9k_tx,
  1734. .start = ath9k_start,
  1735. .stop = ath9k_stop,
  1736. .add_interface = ath9k_add_interface,
  1737. .remove_interface = ath9k_remove_interface,
  1738. .config = ath9k_config,
  1739. .configure_filter = ath9k_configure_filter,
  1740. .sta_add = ath9k_sta_add,
  1741. .sta_remove = ath9k_sta_remove,
  1742. .conf_tx = ath9k_conf_tx,
  1743. .bss_info_changed = ath9k_bss_info_changed,
  1744. .set_key = ath9k_set_key,
  1745. .get_tsf = ath9k_get_tsf,
  1746. .set_tsf = ath9k_set_tsf,
  1747. .reset_tsf = ath9k_reset_tsf,
  1748. .ampdu_action = ath9k_ampdu_action,
  1749. .get_survey = ath9k_get_survey,
  1750. .sw_scan_start = ath9k_sw_scan_start,
  1751. .sw_scan_complete = ath9k_sw_scan_complete,
  1752. .rfkill_poll = ath9k_rfkill_poll_state,
  1753. .set_coverage_class = ath9k_set_coverage_class,
  1754. };