ymfpci_main.c 70 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Routines for control of YMF724/740/744/754 chips
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. *
  19. */
  20. #include <sound/driver.h>
  21. #include <linux/delay.h>
  22. #include <linux/firmware.h>
  23. #include <linux/init.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/pci.h>
  26. #include <linux/sched.h>
  27. #include <linux/slab.h>
  28. #include <linux/vmalloc.h>
  29. #include <sound/core.h>
  30. #include <sound/control.h>
  31. #include <sound/info.h>
  32. #include <sound/tlv.h>
  33. #include <sound/ymfpci.h>
  34. #include <sound/asoundef.h>
  35. #include <sound/mpu401.h>
  36. #include <asm/io.h>
  37. #include <asm/byteorder.h>
  38. /*
  39. * common I/O routines
  40. */
  41. static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
  42. static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
  43. {
  44. return readb(chip->reg_area_virt + offset);
  45. }
  46. static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
  47. {
  48. writeb(val, chip->reg_area_virt + offset);
  49. }
  50. static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
  51. {
  52. return readw(chip->reg_area_virt + offset);
  53. }
  54. static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
  55. {
  56. writew(val, chip->reg_area_virt + offset);
  57. }
  58. static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
  59. {
  60. return readl(chip->reg_area_virt + offset);
  61. }
  62. static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
  63. {
  64. writel(val, chip->reg_area_virt + offset);
  65. }
  66. static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
  67. {
  68. unsigned long end_time;
  69. u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
  70. end_time = jiffies + msecs_to_jiffies(750);
  71. do {
  72. if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
  73. return 0;
  74. set_current_state(TASK_UNINTERRUPTIBLE);
  75. schedule_timeout_uninterruptible(1);
  76. } while (time_before(jiffies, end_time));
  77. snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
  78. return -EBUSY;
  79. }
  80. static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
  81. {
  82. struct snd_ymfpci *chip = ac97->private_data;
  83. u32 cmd;
  84. snd_ymfpci_codec_ready(chip, 0);
  85. cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
  86. snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
  87. }
  88. static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
  89. {
  90. struct snd_ymfpci *chip = ac97->private_data;
  91. if (snd_ymfpci_codec_ready(chip, 0))
  92. return ~0;
  93. snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
  94. if (snd_ymfpci_codec_ready(chip, 0))
  95. return ~0;
  96. if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
  97. int i;
  98. for (i = 0; i < 600; i++)
  99. snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
  100. }
  101. return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
  102. }
  103. /*
  104. * Misc routines
  105. */
  106. static u32 snd_ymfpci_calc_delta(u32 rate)
  107. {
  108. switch (rate) {
  109. case 8000: return 0x02aaab00;
  110. case 11025: return 0x03accd00;
  111. case 16000: return 0x05555500;
  112. case 22050: return 0x07599a00;
  113. case 32000: return 0x0aaaab00;
  114. case 44100: return 0x0eb33300;
  115. default: return ((rate << 16) / 375) << 5;
  116. }
  117. }
  118. static u32 def_rate[8] = {
  119. 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
  120. };
  121. static u32 snd_ymfpci_calc_lpfK(u32 rate)
  122. {
  123. u32 i;
  124. static u32 val[8] = {
  125. 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
  126. 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
  127. };
  128. if (rate == 44100)
  129. return 0x40000000; /* FIXME: What's the right value? */
  130. for (i = 0; i < 8; i++)
  131. if (rate <= def_rate[i])
  132. return val[i];
  133. return val[0];
  134. }
  135. static u32 snd_ymfpci_calc_lpfQ(u32 rate)
  136. {
  137. u32 i;
  138. static u32 val[8] = {
  139. 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
  140. 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
  141. };
  142. if (rate == 44100)
  143. return 0x370A0000;
  144. for (i = 0; i < 8; i++)
  145. if (rate <= def_rate[i])
  146. return val[i];
  147. return val[0];
  148. }
  149. /*
  150. * Hardware start management
  151. */
  152. static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
  153. {
  154. unsigned long flags;
  155. spin_lock_irqsave(&chip->reg_lock, flags);
  156. if (chip->start_count++ > 0)
  157. goto __end;
  158. snd_ymfpci_writel(chip, YDSXGR_MODE,
  159. snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
  160. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
  161. __end:
  162. spin_unlock_irqrestore(&chip->reg_lock, flags);
  163. }
  164. static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
  165. {
  166. unsigned long flags;
  167. long timeout = 1000;
  168. spin_lock_irqsave(&chip->reg_lock, flags);
  169. if (--chip->start_count > 0)
  170. goto __end;
  171. snd_ymfpci_writel(chip, YDSXGR_MODE,
  172. snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
  173. while (timeout-- > 0) {
  174. if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
  175. break;
  176. }
  177. if (atomic_read(&chip->interrupt_sleep_count)) {
  178. atomic_set(&chip->interrupt_sleep_count, 0);
  179. wake_up(&chip->interrupt_sleep);
  180. }
  181. __end:
  182. spin_unlock_irqrestore(&chip->reg_lock, flags);
  183. }
  184. /*
  185. * Playback voice management
  186. */
  187. static int voice_alloc(struct snd_ymfpci *chip,
  188. enum snd_ymfpci_voice_type type, int pair,
  189. struct snd_ymfpci_voice **rvoice)
  190. {
  191. struct snd_ymfpci_voice *voice, *voice2;
  192. int idx;
  193. *rvoice = NULL;
  194. for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
  195. voice = &chip->voices[idx];
  196. voice2 = pair ? &chip->voices[idx+1] : NULL;
  197. if (voice->use || (voice2 && voice2->use))
  198. continue;
  199. voice->use = 1;
  200. if (voice2)
  201. voice2->use = 1;
  202. switch (type) {
  203. case YMFPCI_PCM:
  204. voice->pcm = 1;
  205. if (voice2)
  206. voice2->pcm = 1;
  207. break;
  208. case YMFPCI_SYNTH:
  209. voice->synth = 1;
  210. break;
  211. case YMFPCI_MIDI:
  212. voice->midi = 1;
  213. break;
  214. }
  215. snd_ymfpci_hw_start(chip);
  216. if (voice2)
  217. snd_ymfpci_hw_start(chip);
  218. *rvoice = voice;
  219. return 0;
  220. }
  221. return -ENOMEM;
  222. }
  223. static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
  224. enum snd_ymfpci_voice_type type, int pair,
  225. struct snd_ymfpci_voice **rvoice)
  226. {
  227. unsigned long flags;
  228. int result;
  229. snd_assert(rvoice != NULL, return -EINVAL);
  230. snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL);
  231. spin_lock_irqsave(&chip->voice_lock, flags);
  232. for (;;) {
  233. result = voice_alloc(chip, type, pair, rvoice);
  234. if (result == 0 || type != YMFPCI_PCM)
  235. break;
  236. /* TODO: synth/midi voice deallocation */
  237. break;
  238. }
  239. spin_unlock_irqrestore(&chip->voice_lock, flags);
  240. return result;
  241. }
  242. static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
  243. {
  244. unsigned long flags;
  245. snd_assert(pvoice != NULL, return -EINVAL);
  246. snd_ymfpci_hw_stop(chip);
  247. spin_lock_irqsave(&chip->voice_lock, flags);
  248. pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
  249. pvoice->ypcm = NULL;
  250. pvoice->interrupt = NULL;
  251. spin_unlock_irqrestore(&chip->voice_lock, flags);
  252. return 0;
  253. }
  254. /*
  255. * PCM part
  256. */
  257. static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
  258. {
  259. struct snd_ymfpci_pcm *ypcm;
  260. u32 pos, delta;
  261. if ((ypcm = voice->ypcm) == NULL)
  262. return;
  263. if (ypcm->substream == NULL)
  264. return;
  265. spin_lock(&chip->reg_lock);
  266. if (ypcm->running) {
  267. pos = le32_to_cpu(voice->bank[chip->active_bank].start);
  268. if (pos < ypcm->last_pos)
  269. delta = pos + (ypcm->buffer_size - ypcm->last_pos);
  270. else
  271. delta = pos - ypcm->last_pos;
  272. ypcm->period_pos += delta;
  273. ypcm->last_pos = pos;
  274. if (ypcm->period_pos >= ypcm->period_size) {
  275. // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
  276. ypcm->period_pos %= ypcm->period_size;
  277. spin_unlock(&chip->reg_lock);
  278. snd_pcm_period_elapsed(ypcm->substream);
  279. spin_lock(&chip->reg_lock);
  280. }
  281. if (unlikely(ypcm->update_pcm_vol)) {
  282. unsigned int subs = ypcm->substream->number;
  283. unsigned int next_bank = 1 - chip->active_bank;
  284. struct snd_ymfpci_playback_bank *bank;
  285. u32 volume;
  286. bank = &voice->bank[next_bank];
  287. volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
  288. bank->left_gain_end = volume;
  289. if (ypcm->output_rear)
  290. bank->eff2_gain_end = volume;
  291. if (ypcm->voices[1])
  292. bank = &ypcm->voices[1]->bank[next_bank];
  293. volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
  294. bank->right_gain_end = volume;
  295. if (ypcm->output_rear)
  296. bank->eff3_gain_end = volume;
  297. ypcm->update_pcm_vol--;
  298. }
  299. }
  300. spin_unlock(&chip->reg_lock);
  301. }
  302. static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
  303. {
  304. struct snd_pcm_runtime *runtime = substream->runtime;
  305. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  306. struct snd_ymfpci *chip = ypcm->chip;
  307. u32 pos, delta;
  308. spin_lock(&chip->reg_lock);
  309. if (ypcm->running) {
  310. pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
  311. if (pos < ypcm->last_pos)
  312. delta = pos + (ypcm->buffer_size - ypcm->last_pos);
  313. else
  314. delta = pos - ypcm->last_pos;
  315. ypcm->period_pos += delta;
  316. ypcm->last_pos = pos;
  317. if (ypcm->period_pos >= ypcm->period_size) {
  318. ypcm->period_pos %= ypcm->period_size;
  319. // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
  320. spin_unlock(&chip->reg_lock);
  321. snd_pcm_period_elapsed(substream);
  322. spin_lock(&chip->reg_lock);
  323. }
  324. }
  325. spin_unlock(&chip->reg_lock);
  326. }
  327. static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
  328. int cmd)
  329. {
  330. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  331. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  332. int result = 0;
  333. spin_lock(&chip->reg_lock);
  334. if (ypcm->voices[0] == NULL) {
  335. result = -EINVAL;
  336. goto __unlock;
  337. }
  338. switch (cmd) {
  339. case SNDRV_PCM_TRIGGER_START:
  340. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  341. case SNDRV_PCM_TRIGGER_RESUME:
  342. chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
  343. if (ypcm->voices[1] != NULL)
  344. chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
  345. ypcm->running = 1;
  346. break;
  347. case SNDRV_PCM_TRIGGER_STOP:
  348. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  349. case SNDRV_PCM_TRIGGER_SUSPEND:
  350. chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
  351. if (ypcm->voices[1] != NULL)
  352. chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
  353. ypcm->running = 0;
  354. break;
  355. default:
  356. result = -EINVAL;
  357. break;
  358. }
  359. __unlock:
  360. spin_unlock(&chip->reg_lock);
  361. return result;
  362. }
  363. static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
  364. int cmd)
  365. {
  366. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  367. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  368. int result = 0;
  369. u32 tmp;
  370. spin_lock(&chip->reg_lock);
  371. switch (cmd) {
  372. case SNDRV_PCM_TRIGGER_START:
  373. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  374. case SNDRV_PCM_TRIGGER_RESUME:
  375. tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
  376. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
  377. ypcm->running = 1;
  378. break;
  379. case SNDRV_PCM_TRIGGER_STOP:
  380. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  381. case SNDRV_PCM_TRIGGER_SUSPEND:
  382. tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
  383. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
  384. ypcm->running = 0;
  385. break;
  386. default:
  387. result = -EINVAL;
  388. break;
  389. }
  390. spin_unlock(&chip->reg_lock);
  391. return result;
  392. }
  393. static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
  394. {
  395. int err;
  396. if (ypcm->voices[1] != NULL && voices < 2) {
  397. snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
  398. ypcm->voices[1] = NULL;
  399. }
  400. if (voices == 1 && ypcm->voices[0] != NULL)
  401. return 0; /* already allocated */
  402. if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
  403. return 0; /* already allocated */
  404. if (voices > 1) {
  405. if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
  406. snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
  407. ypcm->voices[0] = NULL;
  408. }
  409. }
  410. err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
  411. if (err < 0)
  412. return err;
  413. ypcm->voices[0]->ypcm = ypcm;
  414. ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
  415. if (voices > 1) {
  416. ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
  417. ypcm->voices[1]->ypcm = ypcm;
  418. }
  419. return 0;
  420. }
  421. static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
  422. struct snd_pcm_runtime *runtime,
  423. int has_pcm_volume)
  424. {
  425. struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
  426. u32 format;
  427. u32 delta = snd_ymfpci_calc_delta(runtime->rate);
  428. u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
  429. u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
  430. struct snd_ymfpci_playback_bank *bank;
  431. unsigned int nbank;
  432. u32 vol_left, vol_right;
  433. u8 use_left, use_right;
  434. snd_assert(voice != NULL, return);
  435. if (runtime->channels == 1) {
  436. use_left = 1;
  437. use_right = 1;
  438. } else {
  439. use_left = (voiceidx & 1) == 0;
  440. use_right = !use_left;
  441. }
  442. if (has_pcm_volume) {
  443. vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
  444. [ypcm->substream->number].left << 15);
  445. vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
  446. [ypcm->substream->number].right << 15);
  447. } else {
  448. vol_left = cpu_to_le32(0x40000000);
  449. vol_right = cpu_to_le32(0x40000000);
  450. }
  451. format = runtime->channels == 2 ? 0x00010000 : 0;
  452. if (snd_pcm_format_width(runtime->format) == 8)
  453. format |= 0x80000000;
  454. if (runtime->channels == 2 && (voiceidx & 1) != 0)
  455. format |= 1;
  456. for (nbank = 0; nbank < 2; nbank++) {
  457. bank = &voice->bank[nbank];
  458. memset(bank, 0, sizeof(*bank));
  459. bank->format = cpu_to_le32(format);
  460. bank->base = cpu_to_le32(runtime->dma_addr);
  461. bank->loop_end = cpu_to_le32(ypcm->buffer_size);
  462. bank->lpfQ = cpu_to_le32(lpfQ);
  463. bank->delta =
  464. bank->delta_end = cpu_to_le32(delta);
  465. bank->lpfK =
  466. bank->lpfK_end = cpu_to_le32(lpfK);
  467. bank->eg_gain =
  468. bank->eg_gain_end = cpu_to_le32(0x40000000);
  469. if (ypcm->output_front) {
  470. if (use_left) {
  471. bank->left_gain =
  472. bank->left_gain_end = vol_left;
  473. }
  474. if (use_right) {
  475. bank->right_gain =
  476. bank->right_gain_end = vol_right;
  477. }
  478. }
  479. if (ypcm->output_rear) {
  480. if (!ypcm->swap_rear) {
  481. if (use_left) {
  482. bank->eff2_gain =
  483. bank->eff2_gain_end = vol_left;
  484. }
  485. if (use_right) {
  486. bank->eff3_gain =
  487. bank->eff3_gain_end = vol_right;
  488. }
  489. } else {
  490. /* The SPDIF out channels seem to be swapped, so we have
  491. * to swap them here, too. The rear analog out channels
  492. * will be wrong, but otherwise AC3 would not work.
  493. */
  494. if (use_left) {
  495. bank->eff3_gain =
  496. bank->eff3_gain_end = vol_left;
  497. }
  498. if (use_right) {
  499. bank->eff2_gain =
  500. bank->eff2_gain_end = vol_right;
  501. }
  502. }
  503. }
  504. }
  505. }
  506. static int __devinit snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
  507. {
  508. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  509. 4096, &chip->ac3_tmp_base) < 0)
  510. return -ENOMEM;
  511. chip->bank_effect[3][0]->base =
  512. chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
  513. chip->bank_effect[3][0]->loop_end =
  514. chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
  515. chip->bank_effect[4][0]->base =
  516. chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
  517. chip->bank_effect[4][0]->loop_end =
  518. chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
  519. spin_lock_irq(&chip->reg_lock);
  520. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
  521. snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
  522. spin_unlock_irq(&chip->reg_lock);
  523. return 0;
  524. }
  525. static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
  526. {
  527. spin_lock_irq(&chip->reg_lock);
  528. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
  529. snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
  530. spin_unlock_irq(&chip->reg_lock);
  531. // snd_ymfpci_irq_wait(chip);
  532. if (chip->ac3_tmp_base.area) {
  533. snd_dma_free_pages(&chip->ac3_tmp_base);
  534. chip->ac3_tmp_base.area = NULL;
  535. }
  536. return 0;
  537. }
  538. static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
  539. struct snd_pcm_hw_params *hw_params)
  540. {
  541. struct snd_pcm_runtime *runtime = substream->runtime;
  542. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  543. int err;
  544. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  545. return err;
  546. if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
  547. return err;
  548. return 0;
  549. }
  550. static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
  551. {
  552. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  553. struct snd_pcm_runtime *runtime = substream->runtime;
  554. struct snd_ymfpci_pcm *ypcm;
  555. if (runtime->private_data == NULL)
  556. return 0;
  557. ypcm = runtime->private_data;
  558. /* wait, until the PCI operations are not finished */
  559. snd_ymfpci_irq_wait(chip);
  560. snd_pcm_lib_free_pages(substream);
  561. if (ypcm->voices[1]) {
  562. snd_ymfpci_voice_free(chip, ypcm->voices[1]);
  563. ypcm->voices[1] = NULL;
  564. }
  565. if (ypcm->voices[0]) {
  566. snd_ymfpci_voice_free(chip, ypcm->voices[0]);
  567. ypcm->voices[0] = NULL;
  568. }
  569. return 0;
  570. }
  571. static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
  572. {
  573. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  574. struct snd_pcm_runtime *runtime = substream->runtime;
  575. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  576. unsigned int nvoice;
  577. ypcm->period_size = runtime->period_size;
  578. ypcm->buffer_size = runtime->buffer_size;
  579. ypcm->period_pos = 0;
  580. ypcm->last_pos = 0;
  581. for (nvoice = 0; nvoice < runtime->channels; nvoice++)
  582. snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
  583. substream->pcm == chip->pcm);
  584. return 0;
  585. }
  586. static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
  587. struct snd_pcm_hw_params *hw_params)
  588. {
  589. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  590. }
  591. static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
  592. {
  593. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  594. /* wait, until the PCI operations are not finished */
  595. snd_ymfpci_irq_wait(chip);
  596. return snd_pcm_lib_free_pages(substream);
  597. }
  598. static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
  599. {
  600. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  601. struct snd_pcm_runtime *runtime = substream->runtime;
  602. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  603. struct snd_ymfpci_capture_bank * bank;
  604. int nbank;
  605. u32 rate, format;
  606. ypcm->period_size = runtime->period_size;
  607. ypcm->buffer_size = runtime->buffer_size;
  608. ypcm->period_pos = 0;
  609. ypcm->last_pos = 0;
  610. ypcm->shift = 0;
  611. rate = ((48000 * 4096) / runtime->rate) - 1;
  612. format = 0;
  613. if (runtime->channels == 2) {
  614. format |= 2;
  615. ypcm->shift++;
  616. }
  617. if (snd_pcm_format_width(runtime->format) == 8)
  618. format |= 1;
  619. else
  620. ypcm->shift++;
  621. switch (ypcm->capture_bank_number) {
  622. case 0:
  623. snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
  624. snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
  625. break;
  626. case 1:
  627. snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
  628. snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
  629. break;
  630. }
  631. for (nbank = 0; nbank < 2; nbank++) {
  632. bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
  633. bank->base = cpu_to_le32(runtime->dma_addr);
  634. bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
  635. bank->start = 0;
  636. bank->num_of_loops = 0;
  637. }
  638. return 0;
  639. }
  640. static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
  641. {
  642. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  643. struct snd_pcm_runtime *runtime = substream->runtime;
  644. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  645. struct snd_ymfpci_voice *voice = ypcm->voices[0];
  646. if (!(ypcm->running && voice))
  647. return 0;
  648. return le32_to_cpu(voice->bank[chip->active_bank].start);
  649. }
  650. static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
  651. {
  652. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  653. struct snd_pcm_runtime *runtime = substream->runtime;
  654. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  655. if (!ypcm->running)
  656. return 0;
  657. return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
  658. }
  659. static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
  660. {
  661. wait_queue_t wait;
  662. int loops = 4;
  663. while (loops-- > 0) {
  664. if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
  665. continue;
  666. init_waitqueue_entry(&wait, current);
  667. add_wait_queue(&chip->interrupt_sleep, &wait);
  668. atomic_inc(&chip->interrupt_sleep_count);
  669. schedule_timeout_uninterruptible(msecs_to_jiffies(50));
  670. remove_wait_queue(&chip->interrupt_sleep, &wait);
  671. }
  672. }
  673. static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
  674. {
  675. struct snd_ymfpci *chip = dev_id;
  676. u32 status, nvoice, mode;
  677. struct snd_ymfpci_voice *voice;
  678. status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
  679. if (status & 0x80000000) {
  680. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
  681. spin_lock(&chip->voice_lock);
  682. for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
  683. voice = &chip->voices[nvoice];
  684. if (voice->interrupt)
  685. voice->interrupt(chip, voice);
  686. }
  687. for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
  688. if (chip->capture_substream[nvoice])
  689. snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
  690. }
  691. #if 0
  692. for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
  693. if (chip->effect_substream[nvoice])
  694. snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
  695. }
  696. #endif
  697. spin_unlock(&chip->voice_lock);
  698. spin_lock(&chip->reg_lock);
  699. snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
  700. mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
  701. snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
  702. spin_unlock(&chip->reg_lock);
  703. if (atomic_read(&chip->interrupt_sleep_count)) {
  704. atomic_set(&chip->interrupt_sleep_count, 0);
  705. wake_up(&chip->interrupt_sleep);
  706. }
  707. }
  708. status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
  709. if (status & 1) {
  710. if (chip->timer)
  711. snd_timer_interrupt(chip->timer, chip->timer->sticks);
  712. }
  713. snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
  714. if (chip->rawmidi)
  715. snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
  716. return IRQ_HANDLED;
  717. }
  718. static struct snd_pcm_hardware snd_ymfpci_playback =
  719. {
  720. .info = (SNDRV_PCM_INFO_MMAP |
  721. SNDRV_PCM_INFO_MMAP_VALID |
  722. SNDRV_PCM_INFO_INTERLEAVED |
  723. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  724. SNDRV_PCM_INFO_PAUSE |
  725. SNDRV_PCM_INFO_RESUME),
  726. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  727. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  728. .rate_min = 8000,
  729. .rate_max = 48000,
  730. .channels_min = 1,
  731. .channels_max = 2,
  732. .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
  733. .period_bytes_min = 64,
  734. .period_bytes_max = 256 * 1024, /* FIXME: enough? */
  735. .periods_min = 3,
  736. .periods_max = 1024,
  737. .fifo_size = 0,
  738. };
  739. static struct snd_pcm_hardware snd_ymfpci_capture =
  740. {
  741. .info = (SNDRV_PCM_INFO_MMAP |
  742. SNDRV_PCM_INFO_MMAP_VALID |
  743. SNDRV_PCM_INFO_INTERLEAVED |
  744. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  745. SNDRV_PCM_INFO_PAUSE |
  746. SNDRV_PCM_INFO_RESUME),
  747. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  748. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  749. .rate_min = 8000,
  750. .rate_max = 48000,
  751. .channels_min = 1,
  752. .channels_max = 2,
  753. .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
  754. .period_bytes_min = 64,
  755. .period_bytes_max = 256 * 1024, /* FIXME: enough? */
  756. .periods_min = 3,
  757. .periods_max = 1024,
  758. .fifo_size = 0,
  759. };
  760. static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
  761. {
  762. kfree(runtime->private_data);
  763. }
  764. static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
  765. {
  766. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  767. struct snd_pcm_runtime *runtime = substream->runtime;
  768. struct snd_ymfpci_pcm *ypcm;
  769. ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
  770. if (ypcm == NULL)
  771. return -ENOMEM;
  772. ypcm->chip = chip;
  773. ypcm->type = PLAYBACK_VOICE;
  774. ypcm->substream = substream;
  775. runtime->hw = snd_ymfpci_playback;
  776. runtime->private_data = ypcm;
  777. runtime->private_free = snd_ymfpci_pcm_free_substream;
  778. /* FIXME? True value is 256/48 = 5.33333 ms */
  779. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
  780. return 0;
  781. }
  782. /* call with spinlock held */
  783. static void ymfpci_open_extension(struct snd_ymfpci *chip)
  784. {
  785. if (! chip->rear_opened) {
  786. if (! chip->spdif_opened) /* set AC3 */
  787. snd_ymfpci_writel(chip, YDSXGR_MODE,
  788. snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
  789. /* enable second codec (4CHEN) */
  790. snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
  791. (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
  792. }
  793. }
  794. /* call with spinlock held */
  795. static void ymfpci_close_extension(struct snd_ymfpci *chip)
  796. {
  797. if (! chip->rear_opened) {
  798. if (! chip->spdif_opened)
  799. snd_ymfpci_writel(chip, YDSXGR_MODE,
  800. snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
  801. snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
  802. (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
  803. }
  804. }
  805. static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
  806. {
  807. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  808. struct snd_pcm_runtime *runtime = substream->runtime;
  809. struct snd_ymfpci_pcm *ypcm;
  810. struct snd_kcontrol *kctl;
  811. int err;
  812. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  813. return err;
  814. ypcm = runtime->private_data;
  815. ypcm->output_front = 1;
  816. ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
  817. ypcm->swap_rear = 0;
  818. spin_lock_irq(&chip->reg_lock);
  819. if (ypcm->output_rear) {
  820. ymfpci_open_extension(chip);
  821. chip->rear_opened++;
  822. }
  823. spin_unlock_irq(&chip->reg_lock);
  824. kctl = chip->pcm_mixer[substream->number].ctl;
  825. kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  826. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
  827. return 0;
  828. }
  829. static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
  830. {
  831. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  832. struct snd_pcm_runtime *runtime = substream->runtime;
  833. struct snd_ymfpci_pcm *ypcm;
  834. int err;
  835. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  836. return err;
  837. ypcm = runtime->private_data;
  838. ypcm->output_front = 0;
  839. ypcm->output_rear = 1;
  840. ypcm->swap_rear = 1;
  841. spin_lock_irq(&chip->reg_lock);
  842. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
  843. snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
  844. ymfpci_open_extension(chip);
  845. chip->spdif_pcm_bits = chip->spdif_bits;
  846. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
  847. chip->spdif_opened++;
  848. spin_unlock_irq(&chip->reg_lock);
  849. chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  850. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
  851. SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
  852. return 0;
  853. }
  854. static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
  855. {
  856. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  857. struct snd_pcm_runtime *runtime = substream->runtime;
  858. struct snd_ymfpci_pcm *ypcm;
  859. int err;
  860. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  861. return err;
  862. ypcm = runtime->private_data;
  863. ypcm->output_front = 0;
  864. ypcm->output_rear = 1;
  865. ypcm->swap_rear = 0;
  866. spin_lock_irq(&chip->reg_lock);
  867. ymfpci_open_extension(chip);
  868. chip->rear_opened++;
  869. spin_unlock_irq(&chip->reg_lock);
  870. return 0;
  871. }
  872. static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
  873. u32 capture_bank_number)
  874. {
  875. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  876. struct snd_pcm_runtime *runtime = substream->runtime;
  877. struct snd_ymfpci_pcm *ypcm;
  878. ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
  879. if (ypcm == NULL)
  880. return -ENOMEM;
  881. ypcm->chip = chip;
  882. ypcm->type = capture_bank_number + CAPTURE_REC;
  883. ypcm->substream = substream;
  884. ypcm->capture_bank_number = capture_bank_number;
  885. chip->capture_substream[capture_bank_number] = substream;
  886. runtime->hw = snd_ymfpci_capture;
  887. /* FIXME? True value is 256/48 = 5.33333 ms */
  888. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
  889. runtime->private_data = ypcm;
  890. runtime->private_free = snd_ymfpci_pcm_free_substream;
  891. snd_ymfpci_hw_start(chip);
  892. return 0;
  893. }
  894. static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
  895. {
  896. return snd_ymfpci_capture_open(substream, 0);
  897. }
  898. static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
  899. {
  900. return snd_ymfpci_capture_open(substream, 1);
  901. }
  902. static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
  903. {
  904. return 0;
  905. }
  906. static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
  907. {
  908. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  909. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  910. struct snd_kcontrol *kctl;
  911. spin_lock_irq(&chip->reg_lock);
  912. if (ypcm->output_rear && chip->rear_opened > 0) {
  913. chip->rear_opened--;
  914. ymfpci_close_extension(chip);
  915. }
  916. spin_unlock_irq(&chip->reg_lock);
  917. kctl = chip->pcm_mixer[substream->number].ctl;
  918. kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  919. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
  920. return snd_ymfpci_playback_close_1(substream);
  921. }
  922. static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
  923. {
  924. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  925. spin_lock_irq(&chip->reg_lock);
  926. chip->spdif_opened = 0;
  927. ymfpci_close_extension(chip);
  928. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
  929. snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
  930. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  931. spin_unlock_irq(&chip->reg_lock);
  932. chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  933. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
  934. SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
  935. return snd_ymfpci_playback_close_1(substream);
  936. }
  937. static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
  938. {
  939. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  940. spin_lock_irq(&chip->reg_lock);
  941. if (chip->rear_opened > 0) {
  942. chip->rear_opened--;
  943. ymfpci_close_extension(chip);
  944. }
  945. spin_unlock_irq(&chip->reg_lock);
  946. return snd_ymfpci_playback_close_1(substream);
  947. }
  948. static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
  949. {
  950. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  951. struct snd_pcm_runtime *runtime = substream->runtime;
  952. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  953. if (ypcm != NULL) {
  954. chip->capture_substream[ypcm->capture_bank_number] = NULL;
  955. snd_ymfpci_hw_stop(chip);
  956. }
  957. return 0;
  958. }
  959. static struct snd_pcm_ops snd_ymfpci_playback_ops = {
  960. .open = snd_ymfpci_playback_open,
  961. .close = snd_ymfpci_playback_close,
  962. .ioctl = snd_pcm_lib_ioctl,
  963. .hw_params = snd_ymfpci_playback_hw_params,
  964. .hw_free = snd_ymfpci_playback_hw_free,
  965. .prepare = snd_ymfpci_playback_prepare,
  966. .trigger = snd_ymfpci_playback_trigger,
  967. .pointer = snd_ymfpci_playback_pointer,
  968. };
  969. static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
  970. .open = snd_ymfpci_capture_rec_open,
  971. .close = snd_ymfpci_capture_close,
  972. .ioctl = snd_pcm_lib_ioctl,
  973. .hw_params = snd_ymfpci_capture_hw_params,
  974. .hw_free = snd_ymfpci_capture_hw_free,
  975. .prepare = snd_ymfpci_capture_prepare,
  976. .trigger = snd_ymfpci_capture_trigger,
  977. .pointer = snd_ymfpci_capture_pointer,
  978. };
  979. int __devinit snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  980. {
  981. struct snd_pcm *pcm;
  982. int err;
  983. if (rpcm)
  984. *rpcm = NULL;
  985. if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
  986. return err;
  987. pcm->private_data = chip;
  988. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
  989. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
  990. /* global setup */
  991. pcm->info_flags = 0;
  992. strcpy(pcm->name, "YMFPCI");
  993. chip->pcm = pcm;
  994. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  995. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  996. if (rpcm)
  997. *rpcm = pcm;
  998. return 0;
  999. }
  1000. static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
  1001. .open = snd_ymfpci_capture_ac97_open,
  1002. .close = snd_ymfpci_capture_close,
  1003. .ioctl = snd_pcm_lib_ioctl,
  1004. .hw_params = snd_ymfpci_capture_hw_params,
  1005. .hw_free = snd_ymfpci_capture_hw_free,
  1006. .prepare = snd_ymfpci_capture_prepare,
  1007. .trigger = snd_ymfpci_capture_trigger,
  1008. .pointer = snd_ymfpci_capture_pointer,
  1009. };
  1010. int __devinit snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1011. {
  1012. struct snd_pcm *pcm;
  1013. int err;
  1014. if (rpcm)
  1015. *rpcm = NULL;
  1016. if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
  1017. return err;
  1018. pcm->private_data = chip;
  1019. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
  1020. /* global setup */
  1021. pcm->info_flags = 0;
  1022. sprintf(pcm->name, "YMFPCI - %s",
  1023. chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
  1024. chip->pcm2 = pcm;
  1025. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1026. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1027. if (rpcm)
  1028. *rpcm = pcm;
  1029. return 0;
  1030. }
  1031. static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
  1032. .open = snd_ymfpci_playback_spdif_open,
  1033. .close = snd_ymfpci_playback_spdif_close,
  1034. .ioctl = snd_pcm_lib_ioctl,
  1035. .hw_params = snd_ymfpci_playback_hw_params,
  1036. .hw_free = snd_ymfpci_playback_hw_free,
  1037. .prepare = snd_ymfpci_playback_prepare,
  1038. .trigger = snd_ymfpci_playback_trigger,
  1039. .pointer = snd_ymfpci_playback_pointer,
  1040. };
  1041. int __devinit snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1042. {
  1043. struct snd_pcm *pcm;
  1044. int err;
  1045. if (rpcm)
  1046. *rpcm = NULL;
  1047. if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
  1048. return err;
  1049. pcm->private_data = chip;
  1050. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
  1051. /* global setup */
  1052. pcm->info_flags = 0;
  1053. strcpy(pcm->name, "YMFPCI - IEC958");
  1054. chip->pcm_spdif = pcm;
  1055. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1056. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1057. if (rpcm)
  1058. *rpcm = pcm;
  1059. return 0;
  1060. }
  1061. static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
  1062. .open = snd_ymfpci_playback_4ch_open,
  1063. .close = snd_ymfpci_playback_4ch_close,
  1064. .ioctl = snd_pcm_lib_ioctl,
  1065. .hw_params = snd_ymfpci_playback_hw_params,
  1066. .hw_free = snd_ymfpci_playback_hw_free,
  1067. .prepare = snd_ymfpci_playback_prepare,
  1068. .trigger = snd_ymfpci_playback_trigger,
  1069. .pointer = snd_ymfpci_playback_pointer,
  1070. };
  1071. int __devinit snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1072. {
  1073. struct snd_pcm *pcm;
  1074. int err;
  1075. if (rpcm)
  1076. *rpcm = NULL;
  1077. if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
  1078. return err;
  1079. pcm->private_data = chip;
  1080. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
  1081. /* global setup */
  1082. pcm->info_flags = 0;
  1083. strcpy(pcm->name, "YMFPCI - Rear PCM");
  1084. chip->pcm_4ch = pcm;
  1085. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1086. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1087. if (rpcm)
  1088. *rpcm = pcm;
  1089. return 0;
  1090. }
  1091. static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1092. {
  1093. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1094. uinfo->count = 1;
  1095. return 0;
  1096. }
  1097. static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
  1098. struct snd_ctl_elem_value *ucontrol)
  1099. {
  1100. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1101. spin_lock_irq(&chip->reg_lock);
  1102. ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
  1103. ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
  1104. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
  1105. spin_unlock_irq(&chip->reg_lock);
  1106. return 0;
  1107. }
  1108. static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
  1109. struct snd_ctl_elem_value *ucontrol)
  1110. {
  1111. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1112. unsigned int val;
  1113. int change;
  1114. val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
  1115. (ucontrol->value.iec958.status[1] << 8);
  1116. spin_lock_irq(&chip->reg_lock);
  1117. change = chip->spdif_bits != val;
  1118. chip->spdif_bits = val;
  1119. if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
  1120. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  1121. spin_unlock_irq(&chip->reg_lock);
  1122. return change;
  1123. }
  1124. static struct snd_kcontrol_new snd_ymfpci_spdif_default __devinitdata =
  1125. {
  1126. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1127. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1128. .info = snd_ymfpci_spdif_default_info,
  1129. .get = snd_ymfpci_spdif_default_get,
  1130. .put = snd_ymfpci_spdif_default_put
  1131. };
  1132. static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1133. {
  1134. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1135. uinfo->count = 1;
  1136. return 0;
  1137. }
  1138. static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
  1139. struct snd_ctl_elem_value *ucontrol)
  1140. {
  1141. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1142. spin_lock_irq(&chip->reg_lock);
  1143. ucontrol->value.iec958.status[0] = 0x3e;
  1144. ucontrol->value.iec958.status[1] = 0xff;
  1145. spin_unlock_irq(&chip->reg_lock);
  1146. return 0;
  1147. }
  1148. static struct snd_kcontrol_new snd_ymfpci_spdif_mask __devinitdata =
  1149. {
  1150. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1151. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1152. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1153. .info = snd_ymfpci_spdif_mask_info,
  1154. .get = snd_ymfpci_spdif_mask_get,
  1155. };
  1156. static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1157. {
  1158. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1159. uinfo->count = 1;
  1160. return 0;
  1161. }
  1162. static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
  1163. struct snd_ctl_elem_value *ucontrol)
  1164. {
  1165. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1166. spin_lock_irq(&chip->reg_lock);
  1167. ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
  1168. ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
  1169. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
  1170. spin_unlock_irq(&chip->reg_lock);
  1171. return 0;
  1172. }
  1173. static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
  1174. struct snd_ctl_elem_value *ucontrol)
  1175. {
  1176. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1177. unsigned int val;
  1178. int change;
  1179. val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
  1180. (ucontrol->value.iec958.status[1] << 8);
  1181. spin_lock_irq(&chip->reg_lock);
  1182. change = chip->spdif_pcm_bits != val;
  1183. chip->spdif_pcm_bits = val;
  1184. if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
  1185. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
  1186. spin_unlock_irq(&chip->reg_lock);
  1187. return change;
  1188. }
  1189. static struct snd_kcontrol_new snd_ymfpci_spdif_stream __devinitdata =
  1190. {
  1191. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  1192. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1193. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
  1194. .info = snd_ymfpci_spdif_stream_info,
  1195. .get = snd_ymfpci_spdif_stream_get,
  1196. .put = snd_ymfpci_spdif_stream_put
  1197. };
  1198. static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
  1199. {
  1200. static char *texts[3] = {"AC'97", "IEC958", "ZV Port"};
  1201. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1202. info->count = 1;
  1203. info->value.enumerated.items = 3;
  1204. if (info->value.enumerated.item > 2)
  1205. info->value.enumerated.item = 2;
  1206. strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
  1207. return 0;
  1208. }
  1209. static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
  1210. {
  1211. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1212. u16 reg;
  1213. spin_lock_irq(&chip->reg_lock);
  1214. reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1215. spin_unlock_irq(&chip->reg_lock);
  1216. if (!(reg & 0x100))
  1217. value->value.enumerated.item[0] = 0;
  1218. else
  1219. value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
  1220. return 0;
  1221. }
  1222. static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
  1223. {
  1224. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1225. u16 reg, old_reg;
  1226. spin_lock_irq(&chip->reg_lock);
  1227. old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1228. if (value->value.enumerated.item[0] == 0)
  1229. reg = old_reg & ~0x100;
  1230. else
  1231. reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
  1232. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
  1233. spin_unlock_irq(&chip->reg_lock);
  1234. return reg != old_reg;
  1235. }
  1236. static struct snd_kcontrol_new snd_ymfpci_drec_source __devinitdata = {
  1237. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
  1238. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1239. .name = "Direct Recording Source",
  1240. .info = snd_ymfpci_drec_source_info,
  1241. .get = snd_ymfpci_drec_source_get,
  1242. .put = snd_ymfpci_drec_source_put
  1243. };
  1244. /*
  1245. * Mixer controls
  1246. */
  1247. #define YMFPCI_SINGLE(xname, xindex, reg, shift) \
  1248. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1249. .info = snd_ymfpci_info_single, \
  1250. .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
  1251. .private_value = ((reg) | ((shift) << 16)) }
  1252. static int snd_ymfpci_info_single(struct snd_kcontrol *kcontrol,
  1253. struct snd_ctl_elem_info *uinfo)
  1254. {
  1255. int reg = kcontrol->private_value & 0xffff;
  1256. switch (reg) {
  1257. case YDSXGR_SPDIFOUTCTRL: break;
  1258. case YDSXGR_SPDIFINCTRL: break;
  1259. default: return -EINVAL;
  1260. }
  1261. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1262. uinfo->count = 1;
  1263. uinfo->value.integer.min = 0;
  1264. uinfo->value.integer.max = 1;
  1265. return 0;
  1266. }
  1267. static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
  1268. struct snd_ctl_elem_value *ucontrol)
  1269. {
  1270. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1271. int reg = kcontrol->private_value & 0xffff;
  1272. unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
  1273. unsigned int mask = 1;
  1274. switch (reg) {
  1275. case YDSXGR_SPDIFOUTCTRL: break;
  1276. case YDSXGR_SPDIFINCTRL: break;
  1277. default: return -EINVAL;
  1278. }
  1279. ucontrol->value.integer.value[0] =
  1280. (snd_ymfpci_readl(chip, reg) >> shift) & mask;
  1281. return 0;
  1282. }
  1283. static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
  1284. struct snd_ctl_elem_value *ucontrol)
  1285. {
  1286. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1287. int reg = kcontrol->private_value & 0xffff;
  1288. unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
  1289. unsigned int mask = 1;
  1290. int change;
  1291. unsigned int val, oval;
  1292. switch (reg) {
  1293. case YDSXGR_SPDIFOUTCTRL: break;
  1294. case YDSXGR_SPDIFINCTRL: break;
  1295. default: return -EINVAL;
  1296. }
  1297. val = (ucontrol->value.integer.value[0] & mask);
  1298. val <<= shift;
  1299. spin_lock_irq(&chip->reg_lock);
  1300. oval = snd_ymfpci_readl(chip, reg);
  1301. val = (oval & ~(mask << shift)) | val;
  1302. change = val != oval;
  1303. snd_ymfpci_writel(chip, reg, val);
  1304. spin_unlock_irq(&chip->reg_lock);
  1305. return change;
  1306. }
  1307. static DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
  1308. #define YMFPCI_DOUBLE(xname, xindex, reg) \
  1309. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1310. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  1311. .info = snd_ymfpci_info_double, \
  1312. .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
  1313. .private_value = reg, \
  1314. .tlv = { .p = db_scale_native } }
  1315. static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1316. {
  1317. unsigned int reg = kcontrol->private_value;
  1318. if (reg < 0x80 || reg >= 0xc0)
  1319. return -EINVAL;
  1320. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1321. uinfo->count = 2;
  1322. uinfo->value.integer.min = 0;
  1323. uinfo->value.integer.max = 16383;
  1324. return 0;
  1325. }
  1326. static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1327. {
  1328. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1329. unsigned int reg = kcontrol->private_value;
  1330. unsigned int shift_left = 0, shift_right = 16, mask = 16383;
  1331. unsigned int val;
  1332. if (reg < 0x80 || reg >= 0xc0)
  1333. return -EINVAL;
  1334. spin_lock_irq(&chip->reg_lock);
  1335. val = snd_ymfpci_readl(chip, reg);
  1336. spin_unlock_irq(&chip->reg_lock);
  1337. ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
  1338. ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
  1339. return 0;
  1340. }
  1341. static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1342. {
  1343. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1344. unsigned int reg = kcontrol->private_value;
  1345. unsigned int shift_left = 0, shift_right = 16, mask = 16383;
  1346. int change;
  1347. unsigned int val1, val2, oval;
  1348. if (reg < 0x80 || reg >= 0xc0)
  1349. return -EINVAL;
  1350. val1 = ucontrol->value.integer.value[0] & mask;
  1351. val2 = ucontrol->value.integer.value[1] & mask;
  1352. val1 <<= shift_left;
  1353. val2 <<= shift_right;
  1354. spin_lock_irq(&chip->reg_lock);
  1355. oval = snd_ymfpci_readl(chip, reg);
  1356. val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
  1357. change = val1 != oval;
  1358. snd_ymfpci_writel(chip, reg, val1);
  1359. spin_unlock_irq(&chip->reg_lock);
  1360. return change;
  1361. }
  1362. /*
  1363. * 4ch duplication
  1364. */
  1365. static int snd_ymfpci_info_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1366. {
  1367. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1368. uinfo->count = 1;
  1369. uinfo->value.integer.min = 0;
  1370. uinfo->value.integer.max = 1;
  1371. return 0;
  1372. }
  1373. static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1374. {
  1375. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1376. ucontrol->value.integer.value[0] = chip->mode_dup4ch;
  1377. return 0;
  1378. }
  1379. static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1380. {
  1381. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1382. int change;
  1383. change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
  1384. if (change)
  1385. chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
  1386. return change;
  1387. }
  1388. static struct snd_kcontrol_new snd_ymfpci_controls[] __devinitdata = {
  1389. YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL),
  1390. YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
  1391. YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
  1392. YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
  1393. YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
  1394. YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
  1395. YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
  1396. YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
  1397. YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
  1398. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
  1399. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
  1400. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
  1401. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
  1402. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
  1403. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
  1404. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
  1405. {
  1406. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1407. .name = "4ch Duplication",
  1408. .info = snd_ymfpci_info_dup4ch,
  1409. .get = snd_ymfpci_get_dup4ch,
  1410. .put = snd_ymfpci_put_dup4ch,
  1411. },
  1412. };
  1413. /*
  1414. * GPIO
  1415. */
  1416. static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
  1417. {
  1418. u16 reg, mode;
  1419. unsigned long flags;
  1420. spin_lock_irqsave(&chip->reg_lock, flags);
  1421. reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
  1422. reg &= ~(1 << (pin + 8));
  1423. reg |= (1 << pin);
  1424. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
  1425. /* set the level mode for input line */
  1426. mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
  1427. mode &= ~(3 << (pin * 2));
  1428. snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
  1429. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
  1430. mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
  1431. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1432. return (mode >> pin) & 1;
  1433. }
  1434. static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
  1435. {
  1436. u16 reg;
  1437. unsigned long flags;
  1438. spin_lock_irqsave(&chip->reg_lock, flags);
  1439. reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
  1440. reg &= ~(1 << pin);
  1441. reg &= ~(1 << (pin + 8));
  1442. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
  1443. snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
  1444. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
  1445. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1446. return 0;
  1447. }
  1448. static int snd_ymfpci_gpio_sw_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1449. {
  1450. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1451. uinfo->count = 1;
  1452. uinfo->value.integer.min = 0;
  1453. uinfo->value.integer.max = 1;
  1454. return 0;
  1455. }
  1456. static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1457. {
  1458. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1459. int pin = (int)kcontrol->private_value;
  1460. ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
  1461. return 0;
  1462. }
  1463. static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1464. {
  1465. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1466. int pin = (int)kcontrol->private_value;
  1467. if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
  1468. snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
  1469. ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
  1470. return 1;
  1471. }
  1472. return 0;
  1473. }
  1474. static struct snd_kcontrol_new snd_ymfpci_rear_shared __devinitdata = {
  1475. .name = "Shared Rear/Line-In Switch",
  1476. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1477. .info = snd_ymfpci_gpio_sw_info,
  1478. .get = snd_ymfpci_gpio_sw_get,
  1479. .put = snd_ymfpci_gpio_sw_put,
  1480. .private_value = 2,
  1481. };
  1482. /*
  1483. * PCM voice volume
  1484. */
  1485. static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
  1486. struct snd_ctl_elem_info *uinfo)
  1487. {
  1488. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1489. uinfo->count = 2;
  1490. uinfo->value.integer.min = 0;
  1491. uinfo->value.integer.max = 0x8000;
  1492. return 0;
  1493. }
  1494. static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
  1495. struct snd_ctl_elem_value *ucontrol)
  1496. {
  1497. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1498. unsigned int subs = kcontrol->id.subdevice;
  1499. ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
  1500. ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
  1501. return 0;
  1502. }
  1503. static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
  1504. struct snd_ctl_elem_value *ucontrol)
  1505. {
  1506. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1507. unsigned int subs = kcontrol->id.subdevice;
  1508. struct snd_pcm_substream *substream;
  1509. unsigned long flags;
  1510. if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
  1511. ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
  1512. chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
  1513. chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
  1514. substream = (struct snd_pcm_substream *)kcontrol->private_value;
  1515. spin_lock_irqsave(&chip->voice_lock, flags);
  1516. if (substream->runtime && substream->runtime->private_data) {
  1517. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  1518. ypcm->update_pcm_vol = 2;
  1519. }
  1520. spin_unlock_irqrestore(&chip->voice_lock, flags);
  1521. return 1;
  1522. }
  1523. return 0;
  1524. }
  1525. static struct snd_kcontrol_new snd_ymfpci_pcm_volume __devinitdata = {
  1526. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1527. .name = "PCM Playback Volume",
  1528. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1529. SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  1530. .info = snd_ymfpci_pcm_vol_info,
  1531. .get = snd_ymfpci_pcm_vol_get,
  1532. .put = snd_ymfpci_pcm_vol_put,
  1533. };
  1534. /*
  1535. * Mixer routines
  1536. */
  1537. static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
  1538. {
  1539. struct snd_ymfpci *chip = bus->private_data;
  1540. chip->ac97_bus = NULL;
  1541. }
  1542. static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
  1543. {
  1544. struct snd_ymfpci *chip = ac97->private_data;
  1545. chip->ac97 = NULL;
  1546. }
  1547. int __devinit snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
  1548. {
  1549. struct snd_ac97_template ac97;
  1550. struct snd_kcontrol *kctl;
  1551. struct snd_pcm_substream *substream;
  1552. unsigned int idx;
  1553. int err;
  1554. static struct snd_ac97_bus_ops ops = {
  1555. .write = snd_ymfpci_codec_write,
  1556. .read = snd_ymfpci_codec_read,
  1557. };
  1558. if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
  1559. return err;
  1560. chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
  1561. chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
  1562. memset(&ac97, 0, sizeof(ac97));
  1563. ac97.private_data = chip;
  1564. ac97.private_free = snd_ymfpci_mixer_free_ac97;
  1565. if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
  1566. return err;
  1567. /* to be sure */
  1568. snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
  1569. AC97_EA_VRA|AC97_EA_VRM, 0);
  1570. for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
  1571. if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
  1572. return err;
  1573. }
  1574. /* add S/PDIF control */
  1575. snd_assert(chip->pcm_spdif != NULL, return -EIO);
  1576. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
  1577. return err;
  1578. kctl->id.device = chip->pcm_spdif->device;
  1579. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
  1580. return err;
  1581. kctl->id.device = chip->pcm_spdif->device;
  1582. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
  1583. return err;
  1584. kctl->id.device = chip->pcm_spdif->device;
  1585. chip->spdif_pcm_ctl = kctl;
  1586. /* direct recording source */
  1587. if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
  1588. (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
  1589. return err;
  1590. /*
  1591. * shared rear/line-in
  1592. */
  1593. if (rear_switch) {
  1594. if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
  1595. return err;
  1596. }
  1597. /* per-voice volume */
  1598. substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
  1599. for (idx = 0; idx < 32; ++idx) {
  1600. kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
  1601. if (!kctl)
  1602. return -ENOMEM;
  1603. kctl->id.device = chip->pcm->device;
  1604. kctl->id.subdevice = idx;
  1605. kctl->private_value = (unsigned long)substream;
  1606. if ((err = snd_ctl_add(chip->card, kctl)) < 0)
  1607. return err;
  1608. chip->pcm_mixer[idx].left = 0x8000;
  1609. chip->pcm_mixer[idx].right = 0x8000;
  1610. chip->pcm_mixer[idx].ctl = kctl;
  1611. substream = substream->next;
  1612. }
  1613. return 0;
  1614. }
  1615. /*
  1616. * timer
  1617. */
  1618. static int snd_ymfpci_timer_start(struct snd_timer *timer)
  1619. {
  1620. struct snd_ymfpci *chip;
  1621. unsigned long flags;
  1622. unsigned int count;
  1623. chip = snd_timer_chip(timer);
  1624. count = (timer->sticks << 1) - 1;
  1625. spin_lock_irqsave(&chip->reg_lock, flags);
  1626. snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
  1627. snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
  1628. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1629. return 0;
  1630. }
  1631. static int snd_ymfpci_timer_stop(struct snd_timer *timer)
  1632. {
  1633. struct snd_ymfpci *chip;
  1634. unsigned long flags;
  1635. chip = snd_timer_chip(timer);
  1636. spin_lock_irqsave(&chip->reg_lock, flags);
  1637. snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
  1638. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1639. return 0;
  1640. }
  1641. static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
  1642. unsigned long *num, unsigned long *den)
  1643. {
  1644. *num = 1;
  1645. *den = 48000;
  1646. return 0;
  1647. }
  1648. static struct snd_timer_hardware snd_ymfpci_timer_hw = {
  1649. .flags = SNDRV_TIMER_HW_AUTO,
  1650. .resolution = 20833, /* 1/fs = 20.8333...us */
  1651. .ticks = 0x8000,
  1652. .start = snd_ymfpci_timer_start,
  1653. .stop = snd_ymfpci_timer_stop,
  1654. .precise_resolution = snd_ymfpci_timer_precise_resolution,
  1655. };
  1656. int __devinit snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
  1657. {
  1658. struct snd_timer *timer = NULL;
  1659. struct snd_timer_id tid;
  1660. int err;
  1661. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  1662. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  1663. tid.card = chip->card->number;
  1664. tid.device = device;
  1665. tid.subdevice = 0;
  1666. if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
  1667. strcpy(timer->name, "YMFPCI timer");
  1668. timer->private_data = chip;
  1669. timer->hw = snd_ymfpci_timer_hw;
  1670. }
  1671. chip->timer = timer;
  1672. return err;
  1673. }
  1674. /*
  1675. * proc interface
  1676. */
  1677. static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
  1678. struct snd_info_buffer *buffer)
  1679. {
  1680. struct snd_ymfpci *chip = entry->private_data;
  1681. int i;
  1682. snd_iprintf(buffer, "YMFPCI\n\n");
  1683. for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
  1684. snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
  1685. }
  1686. static int __devinit snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
  1687. {
  1688. struct snd_info_entry *entry;
  1689. if (! snd_card_proc_new(card, "ymfpci", &entry))
  1690. snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read);
  1691. return 0;
  1692. }
  1693. /*
  1694. * initialization routines
  1695. */
  1696. static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
  1697. {
  1698. u8 cmd;
  1699. pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
  1700. #if 0 // force to reset
  1701. if (cmd & 0x03) {
  1702. #endif
  1703. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
  1704. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
  1705. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
  1706. pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
  1707. pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
  1708. #if 0
  1709. }
  1710. #endif
  1711. }
  1712. static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
  1713. {
  1714. snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
  1715. }
  1716. static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
  1717. {
  1718. u32 val;
  1719. int timeout = 1000;
  1720. val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
  1721. if (val)
  1722. snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
  1723. while (timeout-- > 0) {
  1724. val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
  1725. if ((val & 0x00000002) == 0)
  1726. break;
  1727. }
  1728. }
  1729. #define FIRMWARE_IN_THE_KERNEL
  1730. #ifdef FIRMWARE_IN_THE_KERNEL
  1731. #include "ymfpci_image.h"
  1732. static struct firmware snd_ymfpci_dsp_microcode = {
  1733. .size = YDSXG_DSPLENGTH,
  1734. .data = (u8 *)DspInst,
  1735. };
  1736. static struct firmware snd_ymfpci_controller_microcode = {
  1737. .size = YDSXG_CTRLLENGTH,
  1738. .data = (u8 *)CntrlInst,
  1739. };
  1740. static struct firmware snd_ymfpci_controller_1e_microcode = {
  1741. .size = YDSXG_CTRLLENGTH,
  1742. .data = (u8 *)CntrlInst1E,
  1743. };
  1744. #endif
  1745. #ifdef __LITTLE_ENDIAN
  1746. static inline void snd_ymfpci_convert_from_le(const struct firmware *fw) { }
  1747. #else
  1748. static void snd_ymfpci_convert_from_le(const struct firmware *fw)
  1749. {
  1750. int i;
  1751. u32 *data = (u32 *)fw->data;
  1752. for (i = 0; i < fw->size / 4; ++i)
  1753. le32_to_cpus(&data[i]);
  1754. }
  1755. #endif
  1756. static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
  1757. {
  1758. int err, is_1e;
  1759. const char *name;
  1760. err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw",
  1761. &chip->pci->dev);
  1762. if (err >= 0) {
  1763. if (chip->dsp_microcode->size == YDSXG_DSPLENGTH)
  1764. snd_ymfpci_convert_from_le(chip->dsp_microcode);
  1765. else {
  1766. snd_printk(KERN_ERR "DSP microcode has wrong size\n");
  1767. err = -EINVAL;
  1768. }
  1769. }
  1770. if (err < 0) {
  1771. #ifdef FIRMWARE_IN_THE_KERNEL
  1772. chip->dsp_microcode = &snd_ymfpci_dsp_microcode;
  1773. #else
  1774. return err;
  1775. #endif
  1776. }
  1777. is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
  1778. chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
  1779. chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
  1780. chip->device_id == PCI_DEVICE_ID_YAMAHA_754;
  1781. name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw";
  1782. err = request_firmware(&chip->controller_microcode, name,
  1783. &chip->pci->dev);
  1784. if (err >= 0) {
  1785. if (chip->controller_microcode->size == YDSXG_CTRLLENGTH)
  1786. snd_ymfpci_convert_from_le(chip->controller_microcode);
  1787. else {
  1788. snd_printk(KERN_ERR "controller microcode"
  1789. " has wrong size\n");
  1790. err = -EINVAL;
  1791. }
  1792. }
  1793. if (err < 0) {
  1794. #ifdef FIRMWARE_IN_THE_KERNEL
  1795. chip->controller_microcode =
  1796. is_1e ? &snd_ymfpci_controller_1e_microcode
  1797. : &snd_ymfpci_controller_microcode;
  1798. #else
  1799. return err;
  1800. #endif
  1801. }
  1802. return 0;
  1803. }
  1804. static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
  1805. {
  1806. int i;
  1807. u16 ctrl;
  1808. u32 *inst;
  1809. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
  1810. snd_ymfpci_disable_dsp(chip);
  1811. snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
  1812. snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
  1813. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
  1814. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
  1815. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
  1816. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
  1817. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
  1818. ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1819. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
  1820. /* setup DSP instruction code */
  1821. inst = (u32 *)chip->dsp_microcode->data;
  1822. for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
  1823. snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), inst[i]);
  1824. /* setup control instruction code */
  1825. inst = (u32 *)chip->controller_microcode->data;
  1826. for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
  1827. snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]);
  1828. snd_ymfpci_enable_dsp(chip);
  1829. }
  1830. static int __devinit snd_ymfpci_memalloc(struct snd_ymfpci *chip)
  1831. {
  1832. long size, playback_ctrl_size;
  1833. int voice, bank, reg;
  1834. u8 *ptr;
  1835. dma_addr_t ptr_addr;
  1836. playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
  1837. chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
  1838. chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
  1839. chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
  1840. chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
  1841. size = ALIGN(playback_ctrl_size, 0x100) +
  1842. ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) +
  1843. ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) +
  1844. ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) +
  1845. chip->work_size;
  1846. /* work_ptr must be aligned to 256 bytes, but it's already
  1847. covered with the kernel page allocation mechanism */
  1848. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  1849. size, &chip->work_ptr) < 0)
  1850. return -ENOMEM;
  1851. ptr = chip->work_ptr.area;
  1852. ptr_addr = chip->work_ptr.addr;
  1853. memset(ptr, 0, size); /* for sure */
  1854. chip->bank_base_playback = ptr;
  1855. chip->bank_base_playback_addr = ptr_addr;
  1856. chip->ctrl_playback = (u32 *)ptr;
  1857. chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
  1858. ptr += ALIGN(playback_ctrl_size, 0x100);
  1859. ptr_addr += ALIGN(playback_ctrl_size, 0x100);
  1860. for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
  1861. chip->voices[voice].number = voice;
  1862. chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
  1863. chip->voices[voice].bank_addr = ptr_addr;
  1864. for (bank = 0; bank < 2; bank++) {
  1865. chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
  1866. ptr += chip->bank_size_playback;
  1867. ptr_addr += chip->bank_size_playback;
  1868. }
  1869. }
  1870. ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
  1871. ptr_addr = ALIGN(ptr_addr, 0x100);
  1872. chip->bank_base_capture = ptr;
  1873. chip->bank_base_capture_addr = ptr_addr;
  1874. for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
  1875. for (bank = 0; bank < 2; bank++) {
  1876. chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
  1877. ptr += chip->bank_size_capture;
  1878. ptr_addr += chip->bank_size_capture;
  1879. }
  1880. ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
  1881. ptr_addr = ALIGN(ptr_addr, 0x100);
  1882. chip->bank_base_effect = ptr;
  1883. chip->bank_base_effect_addr = ptr_addr;
  1884. for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
  1885. for (bank = 0; bank < 2; bank++) {
  1886. chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
  1887. ptr += chip->bank_size_effect;
  1888. ptr_addr += chip->bank_size_effect;
  1889. }
  1890. ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
  1891. ptr_addr = ALIGN(ptr_addr, 0x100);
  1892. chip->work_base = ptr;
  1893. chip->work_base_addr = ptr_addr;
  1894. snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, );
  1895. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
  1896. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
  1897. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
  1898. snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
  1899. snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
  1900. /* S/PDIF output initialization */
  1901. chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
  1902. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
  1903. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  1904. /* S/PDIF input initialization */
  1905. snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
  1906. /* digital mixer setup */
  1907. for (reg = 0x80; reg < 0xc0; reg += 4)
  1908. snd_ymfpci_writel(chip, reg, 0);
  1909. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
  1910. snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
  1911. snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
  1912. snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
  1913. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
  1914. snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
  1915. snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
  1916. return 0;
  1917. }
  1918. static int snd_ymfpci_free(struct snd_ymfpci *chip)
  1919. {
  1920. u16 ctrl;
  1921. snd_assert(chip != NULL, return -EINVAL);
  1922. if (chip->res_reg_area) { /* don't touch busy hardware */
  1923. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
  1924. snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
  1925. snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
  1926. snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
  1927. snd_ymfpci_disable_dsp(chip);
  1928. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
  1929. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
  1930. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
  1931. snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
  1932. snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
  1933. ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1934. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
  1935. }
  1936. snd_ymfpci_ac3_done(chip);
  1937. /* Set PCI device to D3 state */
  1938. #if 0
  1939. /* FIXME: temporarily disabled, otherwise we cannot fire up
  1940. * the chip again unless reboot. ACPI bug?
  1941. */
  1942. pci_set_power_state(chip->pci, 3);
  1943. #endif
  1944. #ifdef CONFIG_PM
  1945. vfree(chip->saved_regs);
  1946. #endif
  1947. release_and_free_resource(chip->mpu_res);
  1948. release_and_free_resource(chip->fm_res);
  1949. snd_ymfpci_free_gameport(chip);
  1950. if (chip->reg_area_virt)
  1951. iounmap(chip->reg_area_virt);
  1952. if (chip->work_ptr.area)
  1953. snd_dma_free_pages(&chip->work_ptr);
  1954. if (chip->irq >= 0)
  1955. free_irq(chip->irq, chip);
  1956. release_and_free_resource(chip->res_reg_area);
  1957. pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
  1958. pci_disable_device(chip->pci);
  1959. #ifdef FIRMWARE_IN_THE_KERNEL
  1960. if (chip->dsp_microcode != &snd_ymfpci_dsp_microcode)
  1961. #endif
  1962. release_firmware(chip->dsp_microcode);
  1963. #ifdef FIRMWARE_IN_THE_KERNEL
  1964. if (chip->controller_microcode != &snd_ymfpci_controller_microcode &&
  1965. chip->controller_microcode != &snd_ymfpci_controller_1e_microcode)
  1966. #endif
  1967. release_firmware(chip->controller_microcode);
  1968. kfree(chip);
  1969. return 0;
  1970. }
  1971. static int snd_ymfpci_dev_free(struct snd_device *device)
  1972. {
  1973. struct snd_ymfpci *chip = device->device_data;
  1974. return snd_ymfpci_free(chip);
  1975. }
  1976. #ifdef CONFIG_PM
  1977. static int saved_regs_index[] = {
  1978. /* spdif */
  1979. YDSXGR_SPDIFOUTCTRL,
  1980. YDSXGR_SPDIFOUTSTATUS,
  1981. YDSXGR_SPDIFINCTRL,
  1982. /* volumes */
  1983. YDSXGR_PRIADCLOOPVOL,
  1984. YDSXGR_NATIVEDACINVOL,
  1985. YDSXGR_NATIVEDACOUTVOL,
  1986. // YDSXGR_BUF441OUTVOL,
  1987. YDSXGR_NATIVEADCINVOL,
  1988. YDSXGR_SPDIFLOOPVOL,
  1989. YDSXGR_SPDIFOUTVOL,
  1990. YDSXGR_ZVOUTVOL,
  1991. YDSXGR_LEGACYOUTVOL,
  1992. /* address bases */
  1993. YDSXGR_PLAYCTRLBASE,
  1994. YDSXGR_RECCTRLBASE,
  1995. YDSXGR_EFFCTRLBASE,
  1996. YDSXGR_WORKBASE,
  1997. /* capture set up */
  1998. YDSXGR_MAPOFREC,
  1999. YDSXGR_RECFORMAT,
  2000. YDSXGR_RECSLOTSR,
  2001. YDSXGR_ADCFORMAT,
  2002. YDSXGR_ADCSLOTSR,
  2003. };
  2004. #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
  2005. int snd_ymfpci_suspend(struct pci_dev *pci, pm_message_t state)
  2006. {
  2007. struct snd_card *card = pci_get_drvdata(pci);
  2008. struct snd_ymfpci *chip = card->private_data;
  2009. unsigned int i;
  2010. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  2011. snd_pcm_suspend_all(chip->pcm);
  2012. snd_pcm_suspend_all(chip->pcm2);
  2013. snd_pcm_suspend_all(chip->pcm_spdif);
  2014. snd_pcm_suspend_all(chip->pcm_4ch);
  2015. snd_ac97_suspend(chip->ac97);
  2016. for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
  2017. chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
  2018. chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
  2019. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
  2020. snd_ymfpci_disable_dsp(chip);
  2021. pci_disable_device(pci);
  2022. pci_save_state(pci);
  2023. pci_set_power_state(pci, pci_choose_state(pci, state));
  2024. return 0;
  2025. }
  2026. int snd_ymfpci_resume(struct pci_dev *pci)
  2027. {
  2028. struct snd_card *card = pci_get_drvdata(pci);
  2029. struct snd_ymfpci *chip = card->private_data;
  2030. unsigned int i;
  2031. pci_set_power_state(pci, PCI_D0);
  2032. pci_restore_state(pci);
  2033. if (pci_enable_device(pci) < 0) {
  2034. printk(KERN_ERR "ymfpci: pci_enable_device failed, "
  2035. "disabling device\n");
  2036. snd_card_disconnect(card);
  2037. return -EIO;
  2038. }
  2039. pci_set_master(pci);
  2040. snd_ymfpci_aclink_reset(pci);
  2041. snd_ymfpci_codec_ready(chip, 0);
  2042. snd_ymfpci_download_image(chip);
  2043. udelay(100);
  2044. for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
  2045. snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
  2046. snd_ac97_resume(chip->ac97);
  2047. /* start hw again */
  2048. if (chip->start_count > 0) {
  2049. spin_lock_irq(&chip->reg_lock);
  2050. snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
  2051. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
  2052. spin_unlock_irq(&chip->reg_lock);
  2053. }
  2054. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  2055. return 0;
  2056. }
  2057. #endif /* CONFIG_PM */
  2058. int __devinit snd_ymfpci_create(struct snd_card *card,
  2059. struct pci_dev * pci,
  2060. unsigned short old_legacy_ctrl,
  2061. struct snd_ymfpci ** rchip)
  2062. {
  2063. struct snd_ymfpci *chip;
  2064. int err;
  2065. static struct snd_device_ops ops = {
  2066. .dev_free = snd_ymfpci_dev_free,
  2067. };
  2068. *rchip = NULL;
  2069. /* enable PCI device */
  2070. if ((err = pci_enable_device(pci)) < 0)
  2071. return err;
  2072. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  2073. if (chip == NULL) {
  2074. pci_disable_device(pci);
  2075. return -ENOMEM;
  2076. }
  2077. chip->old_legacy_ctrl = old_legacy_ctrl;
  2078. spin_lock_init(&chip->reg_lock);
  2079. spin_lock_init(&chip->voice_lock);
  2080. init_waitqueue_head(&chip->interrupt_sleep);
  2081. atomic_set(&chip->interrupt_sleep_count, 0);
  2082. chip->card = card;
  2083. chip->pci = pci;
  2084. chip->irq = -1;
  2085. chip->device_id = pci->device;
  2086. pci_read_config_byte(pci, PCI_REVISION_ID, &chip->rev);
  2087. chip->reg_area_phys = pci_resource_start(pci, 0);
  2088. chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
  2089. pci_set_master(pci);
  2090. if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
  2091. snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
  2092. snd_ymfpci_free(chip);
  2093. return -EBUSY;
  2094. }
  2095. if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED,
  2096. "YMFPCI", chip)) {
  2097. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2098. snd_ymfpci_free(chip);
  2099. return -EBUSY;
  2100. }
  2101. chip->irq = pci->irq;
  2102. snd_ymfpci_aclink_reset(pci);
  2103. if (snd_ymfpci_codec_ready(chip, 0) < 0) {
  2104. snd_ymfpci_free(chip);
  2105. return -EIO;
  2106. }
  2107. err = snd_ymfpci_request_firmware(chip);
  2108. if (err < 0) {
  2109. snd_printk(KERN_ERR "firmware request failed: %d\n", err);
  2110. snd_ymfpci_free(chip);
  2111. return err;
  2112. }
  2113. snd_ymfpci_download_image(chip);
  2114. udelay(100); /* seems we need a delay after downloading image.. */
  2115. if (snd_ymfpci_memalloc(chip) < 0) {
  2116. snd_ymfpci_free(chip);
  2117. return -EIO;
  2118. }
  2119. if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
  2120. snd_ymfpci_free(chip);
  2121. return err;
  2122. }
  2123. #ifdef CONFIG_PM
  2124. chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
  2125. if (chip->saved_regs == NULL) {
  2126. snd_ymfpci_free(chip);
  2127. return -ENOMEM;
  2128. }
  2129. #endif
  2130. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  2131. snd_ymfpci_free(chip);
  2132. return err;
  2133. }
  2134. snd_ymfpci_proc_init(card, chip);
  2135. snd_card_set_dev(card, &pci->dev);
  2136. *rchip = chip;
  2137. return 0;
  2138. }