em28xx-core.c 16 KB

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  1. /*
  2. em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
  3. Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
  4. Markus Rechberger <mrechberger@gmail.com>
  5. Mauro Carvalho Chehab <mchehab@infradead.org>
  6. Sascha Sommer <saschasommer@freenet.de>
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. */
  19. #include <linux/init.h>
  20. #include <linux/list.h>
  21. #include <linux/module.h>
  22. #include <linux/usb.h>
  23. #include <linux/vmalloc.h>
  24. #include "em28xx.h"
  25. /* #define ENABLE_DEBUG_ISOC_FRAMES */
  26. static unsigned int core_debug;
  27. module_param(core_debug,int,0644);
  28. MODULE_PARM_DESC(core_debug,"enable debug messages [core]");
  29. #define em28xx_coredbg(fmt, arg...) do {\
  30. if (core_debug) \
  31. printk(KERN_INFO "%s %s :"fmt, \
  32. dev->name, __func__ , ##arg); } while (0)
  33. static unsigned int reg_debug;
  34. module_param(reg_debug,int,0644);
  35. MODULE_PARM_DESC(reg_debug,"enable debug messages [URB reg]");
  36. #define em28xx_regdbg(fmt, arg...) do {\
  37. if (reg_debug) \
  38. printk(KERN_INFO "%s %s :"fmt, \
  39. dev->name, __func__ , ##arg); } while (0)
  40. static int alt = EM28XX_PINOUT;
  41. module_param(alt, int, 0644);
  42. MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
  43. /* FIXME */
  44. #define em28xx_isocdbg(fmt, arg...) do {\
  45. if (core_debug) \
  46. printk(KERN_INFO "%s %s :"fmt, \
  47. dev->name, __func__ , ##arg); } while (0)
  48. /*
  49. * em28xx_read_reg_req()
  50. * reads data from the usb device specifying bRequest
  51. */
  52. int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
  53. char *buf, int len)
  54. {
  55. int ret, byte;
  56. if (dev->state & DEV_DISCONNECTED)
  57. return(-ENODEV);
  58. em28xx_regdbg("req=%02x, reg=%02x ", req, reg);
  59. ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
  60. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  61. 0x0000, reg, buf, len, HZ);
  62. if (reg_debug){
  63. printk(ret < 0 ? " failed!\n" : "%02x values: ", ret);
  64. for (byte = 0; byte < len; byte++) {
  65. printk(" %02x", (unsigned char)buf[byte]);
  66. }
  67. printk("\n");
  68. }
  69. return ret;
  70. }
  71. /*
  72. * em28xx_read_reg_req()
  73. * reads data from the usb device specifying bRequest
  74. */
  75. int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
  76. {
  77. u8 val;
  78. int ret;
  79. if (dev->state & DEV_DISCONNECTED)
  80. return(-ENODEV);
  81. em28xx_regdbg("req=%02x, reg=%02x:", req, reg);
  82. ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
  83. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  84. 0x0000, reg, &val, 1, HZ);
  85. if (reg_debug)
  86. printk(ret < 0 ? " failed!\n" :
  87. "%02x\n", (unsigned char) val);
  88. if (ret < 0)
  89. return ret;
  90. return val;
  91. }
  92. int em28xx_read_reg(struct em28xx *dev, u16 reg)
  93. {
  94. return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
  95. }
  96. /*
  97. * em28xx_write_regs_req()
  98. * sends data to the usb device, specifying bRequest
  99. */
  100. int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
  101. int len)
  102. {
  103. int ret;
  104. /*usb_control_msg seems to expect a kmalloced buffer */
  105. unsigned char *bufs;
  106. if (dev->state & DEV_DISCONNECTED)
  107. return(-ENODEV);
  108. bufs = kmalloc(len, GFP_KERNEL);
  109. em28xx_regdbg("req=%02x reg=%02x:", req, reg);
  110. if (reg_debug) {
  111. int i;
  112. for (i = 0; i < len; ++i)
  113. printk (" %02x", (unsigned char)buf[i]);
  114. printk ("\n");
  115. }
  116. if (!bufs)
  117. return -ENOMEM;
  118. memcpy(bufs, buf, len);
  119. ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), req,
  120. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  121. 0x0000, reg, bufs, len, HZ);
  122. msleep(5); /* FIXME: magic number */
  123. kfree(bufs);
  124. return ret;
  125. }
  126. int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
  127. {
  128. return em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
  129. }
  130. /*
  131. * em28xx_write_reg_bits()
  132. * sets only some bits (specified by bitmask) of a register, by first reading
  133. * the actual value
  134. */
  135. static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
  136. u8 bitmask)
  137. {
  138. int oldval;
  139. u8 newval;
  140. if ((oldval = em28xx_read_reg(dev, reg)) < 0)
  141. return oldval;
  142. newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
  143. return em28xx_write_regs(dev, reg, &newval, 1);
  144. }
  145. /*
  146. * em28xx_write_ac97()
  147. * write a 16 bit value to the specified AC97 address (LSB first!)
  148. */
  149. static int em28xx_write_ac97(struct em28xx *dev, u8 reg, u8 *val)
  150. {
  151. int ret, i;
  152. u8 addr = reg & 0x7f;
  153. if ((ret = em28xx_write_regs(dev, AC97LSB_REG, val, 2)) < 0)
  154. return ret;
  155. if ((ret = em28xx_write_regs(dev, AC97ADDR_REG, &addr, 1)) < 0)
  156. return ret;
  157. /* Wait up to 50 ms for AC97 command to complete */
  158. for (i = 0; i < 10; i++) {
  159. if ((ret = em28xx_read_reg(dev, AC97BUSY_REG)) < 0)
  160. return ret;
  161. if (!(ret & 0x01))
  162. return 0;
  163. msleep(5);
  164. }
  165. em28xx_warn ("AC97 command still being executed: not handled properly!\n");
  166. return 0;
  167. }
  168. static int em28xx_set_audio_source(struct em28xx *dev)
  169. {
  170. static char *enable = "\x08\x08";
  171. static char *disable = "\x08\x88";
  172. char *video = enable, *line = disable;
  173. int ret;
  174. u8 input;
  175. if (dev->is_em2800) {
  176. if (dev->ctl_ainput)
  177. input = EM2800_AUDIO_SRC_LINE;
  178. else
  179. input = EM2800_AUDIO_SRC_TUNER;
  180. ret = em28xx_write_regs(dev, EM2800_AUDIOSRC_REG, &input, 1);
  181. if (ret < 0)
  182. return ret;
  183. }
  184. if (dev->has_msp34xx)
  185. input = EM28XX_AUDIO_SRC_TUNER;
  186. else {
  187. switch (dev->ctl_ainput) {
  188. case EM28XX_AMUX_VIDEO:
  189. input = EM28XX_AUDIO_SRC_TUNER;
  190. break;
  191. case EM28XX_AMUX_LINE_IN:
  192. input = EM28XX_AUDIO_SRC_LINE;
  193. break;
  194. case EM28XX_AMUX_AC97_VIDEO:
  195. input = EM28XX_AUDIO_SRC_LINE;
  196. break;
  197. case EM28XX_AMUX_AC97_LINE_IN:
  198. input = EM28XX_AUDIO_SRC_LINE;
  199. video = disable;
  200. line = enable;
  201. break;
  202. }
  203. }
  204. ret = em28xx_write_reg_bits(dev, AUDIOSRC_REG, input, 0xc0);
  205. if (ret < 0)
  206. return ret;
  207. msleep(5);
  208. /* Sets AC97 mixer registers
  209. This is seems to be needed, even for non-ac97 configs
  210. */
  211. ret = em28xx_write_ac97(dev, VIDEO_AC97, video);
  212. if (ret < 0)
  213. return ret;
  214. ret = em28xx_write_ac97(dev, LINE_IN_AC97, line);
  215. return ret;
  216. }
  217. int em28xx_audio_analog_set(struct em28xx *dev)
  218. {
  219. int ret;
  220. char s[2] = { 0x00, 0x00 };
  221. u8 xclk = 0x07;
  222. s[0] |= 0x1f - dev->volume;
  223. s[1] |= 0x1f - dev->volume;
  224. /* Mute */
  225. s[1] |= 0x80;
  226. ret = em28xx_write_ac97(dev, MASTER_AC97, s);
  227. if (ret < 0)
  228. return ret;
  229. if (dev->has_12mhz_i2s)
  230. xclk |= 0x20;
  231. if (!dev->mute)
  232. xclk |= 0x80;
  233. ret = em28xx_write_reg_bits(dev, XCLK_REG, xclk, 0xa7);
  234. if (ret < 0)
  235. return ret;
  236. msleep(10);
  237. /* Selects the proper audio input */
  238. ret = em28xx_set_audio_source(dev);
  239. /* Unmute device */
  240. if (!dev->mute)
  241. s[1] &= ~0x80;
  242. ret = em28xx_write_ac97(dev, MASTER_AC97, s);
  243. return ret;
  244. }
  245. EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
  246. int em28xx_colorlevels_set_default(struct em28xx *dev)
  247. {
  248. em28xx_write_regs(dev, YGAIN_REG, "\x10", 1); /* contrast */
  249. em28xx_write_regs(dev, YOFFSET_REG, "\x00", 1); /* brightness */
  250. em28xx_write_regs(dev, UVGAIN_REG, "\x10", 1); /* saturation */
  251. em28xx_write_regs(dev, UOFFSET_REG, "\x00", 1);
  252. em28xx_write_regs(dev, VOFFSET_REG, "\x00", 1);
  253. em28xx_write_regs(dev, SHARPNESS_REG, "\x00", 1);
  254. em28xx_write_regs(dev, GAMMA_REG, "\x20", 1);
  255. em28xx_write_regs(dev, RGAIN_REG, "\x20", 1);
  256. em28xx_write_regs(dev, GGAIN_REG, "\x20", 1);
  257. em28xx_write_regs(dev, BGAIN_REG, "\x20", 1);
  258. em28xx_write_regs(dev, ROFFSET_REG, "\x00", 1);
  259. em28xx_write_regs(dev, GOFFSET_REG, "\x00", 1);
  260. return em28xx_write_regs(dev, BOFFSET_REG, "\x00", 1);
  261. }
  262. int em28xx_capture_start(struct em28xx *dev, int start)
  263. {
  264. int rc;
  265. /* FIXME: which is the best order? */
  266. /* video registers are sampled by VREF */
  267. rc = em28xx_write_reg_bits(dev, USBSUSP_REG,
  268. start ? 0x10 : 0x00, 0x10);
  269. if (rc < 0)
  270. return rc;
  271. if (!start) {
  272. /* disable video capture */
  273. rc = em28xx_write_regs(dev, VINENABLE_REG, "\x27", 1);
  274. return rc;
  275. }
  276. /* enable video capture */
  277. rc = em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);
  278. if (dev->mode == EM28XX_ANALOG_MODE)
  279. rc = em28xx_write_regs(dev, VINENABLE_REG,"\x67", 1);
  280. else
  281. rc = em28xx_write_regs(dev, VINENABLE_REG,"\x37", 1);
  282. msleep (6);
  283. return rc;
  284. }
  285. int em28xx_outfmt_set_yuv422(struct em28xx *dev)
  286. {
  287. em28xx_write_regs(dev, OUTFMT_REG, "\x34", 1);
  288. em28xx_write_regs(dev, VINMODE_REG, "\x10", 1);
  289. return em28xx_write_regs(dev, VINCTRL_REG, "\x11", 1);
  290. }
  291. static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
  292. u8 ymin, u8 ymax)
  293. {
  294. em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n", xmin, ymin, xmax, ymax);
  295. em28xx_write_regs(dev, XMIN_REG, &xmin, 1);
  296. em28xx_write_regs(dev, XMAX_REG, &xmax, 1);
  297. em28xx_write_regs(dev, YMIN_REG, &ymin, 1);
  298. return em28xx_write_regs(dev, YMAX_REG, &ymax, 1);
  299. }
  300. static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
  301. u16 width, u16 height)
  302. {
  303. u8 cwidth = width;
  304. u8 cheight = height;
  305. u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
  306. em28xx_coredbg("em28xx Area Set: (%d,%d)\n", (width | (overflow & 2) << 7),
  307. (height | (overflow & 1) << 8));
  308. em28xx_write_regs(dev, HSTART_REG, &hstart, 1);
  309. em28xx_write_regs(dev, VSTART_REG, &vstart, 1);
  310. em28xx_write_regs(dev, CWIDTH_REG, &cwidth, 1);
  311. em28xx_write_regs(dev, CHEIGHT_REG, &cheight, 1);
  312. return em28xx_write_regs(dev, OFLOW_REG, &overflow, 1);
  313. }
  314. static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
  315. {
  316. u8 mode;
  317. /* the em2800 scaler only supports scaling down to 50% */
  318. if(dev->is_em2800)
  319. mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
  320. else {
  321. u8 buf[2];
  322. buf[0] = h;
  323. buf[1] = h >> 8;
  324. em28xx_write_regs(dev, HSCALELOW_REG, (char *)buf, 2);
  325. buf[0] = v;
  326. buf[1] = v >> 8;
  327. em28xx_write_regs(dev, VSCALELOW_REG, (char *)buf, 2);
  328. /* it seems that both H and V scalers must be active to work correctly */
  329. mode = (h || v)? 0x30: 0x00;
  330. }
  331. return em28xx_write_reg_bits(dev, COMPR_REG, mode, 0x30);
  332. }
  333. /* FIXME: this only function read values from dev */
  334. int em28xx_resolution_set(struct em28xx *dev)
  335. {
  336. int width, height;
  337. width = norm_maxw(dev);
  338. height = norm_maxh(dev) >> 1;
  339. em28xx_outfmt_set_yuv422(dev);
  340. em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
  341. em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
  342. return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
  343. }
  344. int em28xx_set_alternate(struct em28xx *dev)
  345. {
  346. int errCode, prev_alt = dev->alt;
  347. int i;
  348. unsigned int min_pkt_size = dev->width * 2 + 4;
  349. /* When image size is bigger than a certain value,
  350. the frame size should be increased, otherwise, only
  351. green screen will be received.
  352. */
  353. if (dev->width * 2 * dev->height > 720 * 240 * 2)
  354. min_pkt_size *= 2;
  355. for (i = 0; i < dev->num_alt; i++) {
  356. /* stop when the selected alt setting offers enough bandwidth */
  357. if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
  358. dev->alt = i;
  359. break;
  360. /* otherwise make sure that we end up with the maximum bandwidth
  361. because the min_pkt_size equation might be wrong...
  362. */
  363. } else if (dev->alt_max_pkt_size[i] >
  364. dev->alt_max_pkt_size[dev->alt])
  365. dev->alt = i;
  366. }
  367. if (dev->alt != prev_alt) {
  368. em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
  369. min_pkt_size, dev->alt);
  370. dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
  371. em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
  372. dev->alt, dev->max_pkt_size);
  373. errCode = usb_set_interface(dev->udev, 0, dev->alt);
  374. if (errCode < 0) {
  375. em28xx_errdev ("cannot change alternate number to %d (error=%i)\n",
  376. dev->alt, errCode);
  377. return errCode;
  378. }
  379. }
  380. return 0;
  381. }
  382. /* ------------------------------------------------------------------
  383. URB control
  384. ------------------------------------------------------------------*/
  385. /*
  386. * IRQ callback, called by URB callback
  387. */
  388. static void em28xx_irq_callback(struct urb *urb)
  389. {
  390. struct em28xx_dmaqueue *dma_q = urb->context;
  391. struct em28xx *dev = container_of(dma_q, struct em28xx, vidq);
  392. int rc, i;
  393. /* Copy data from URB */
  394. spin_lock(&dev->slock);
  395. rc = dev->isoc_ctl.isoc_copy(dev, urb);
  396. spin_unlock(&dev->slock);
  397. /* Reset urb buffers */
  398. for (i = 0; i < urb->number_of_packets; i++) {
  399. urb->iso_frame_desc[i].status = 0;
  400. urb->iso_frame_desc[i].actual_length = 0;
  401. }
  402. urb->status = 0;
  403. urb->status = usb_submit_urb(urb, GFP_ATOMIC);
  404. if (urb->status) {
  405. em28xx_err("urb resubmit failed (error=%i)\n",
  406. urb->status);
  407. }
  408. }
  409. /*
  410. * Stop and Deallocate URBs
  411. */
  412. void em28xx_uninit_isoc(struct em28xx *dev)
  413. {
  414. struct urb *urb;
  415. int i;
  416. em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");
  417. dev->isoc_ctl.nfields = -1;
  418. for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
  419. urb = dev->isoc_ctl.urb[i];
  420. if (urb) {
  421. usb_kill_urb(urb);
  422. usb_unlink_urb(urb);
  423. if (dev->isoc_ctl.transfer_buffer[i]) {
  424. usb_buffer_free(dev->udev,
  425. urb->transfer_buffer_length,
  426. dev->isoc_ctl.transfer_buffer[i],
  427. urb->transfer_dma);
  428. }
  429. usb_free_urb(urb);
  430. dev->isoc_ctl.urb[i] = NULL;
  431. }
  432. dev->isoc_ctl.transfer_buffer[i] = NULL;
  433. }
  434. kfree(dev->isoc_ctl.urb);
  435. kfree(dev->isoc_ctl.transfer_buffer);
  436. dev->isoc_ctl.urb = NULL;
  437. dev->isoc_ctl.transfer_buffer = NULL;
  438. dev->isoc_ctl.num_bufs = 0;
  439. em28xx_capture_start(dev, 0);
  440. }
  441. EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
  442. /*
  443. * Allocate URBs and start IRQ
  444. */
  445. int em28xx_init_isoc(struct em28xx *dev, int max_packets,
  446. int num_bufs, int max_pkt_size,
  447. int (*isoc_copy) (struct em28xx *dev, struct urb *urb),
  448. int cap_type)
  449. {
  450. struct em28xx_dmaqueue *dma_q = &dev->vidq;
  451. int i;
  452. int sb_size, pipe;
  453. struct urb *urb;
  454. int j, k;
  455. int rc;
  456. em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");
  457. /* De-allocates all pending stuff */
  458. em28xx_uninit_isoc(dev);
  459. dev->isoc_ctl.isoc_copy = isoc_copy;
  460. dev->isoc_ctl.num_bufs = num_bufs;
  461. dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL);
  462. if (!dev->isoc_ctl.urb) {
  463. em28xx_errdev("cannot alloc memory for usb buffers\n");
  464. return -ENOMEM;
  465. }
  466. dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
  467. GFP_KERNEL);
  468. if (!dev->isoc_ctl.urb) {
  469. em28xx_errdev("cannot allocate memory for usbtransfer\n");
  470. kfree(dev->isoc_ctl.urb);
  471. return -ENOMEM;
  472. }
  473. dev->isoc_ctl.max_pkt_size = max_pkt_size;
  474. dev->isoc_ctl.buf = NULL;
  475. sb_size = max_packets * dev->isoc_ctl.max_pkt_size;
  476. /* allocate urbs and transfer buffers */
  477. for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
  478. urb = usb_alloc_urb(max_packets, GFP_KERNEL);
  479. if (!urb) {
  480. em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
  481. em28xx_uninit_isoc(dev);
  482. return -ENOMEM;
  483. }
  484. dev->isoc_ctl.urb[i] = urb;
  485. dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev,
  486. sb_size, GFP_KERNEL, &urb->transfer_dma);
  487. if (!dev->isoc_ctl.transfer_buffer[i]) {
  488. em28xx_err("unable to allocate %i bytes for transfer"
  489. " buffer %i%s\n",
  490. sb_size, i,
  491. in_interrupt()?" while in int":"");
  492. em28xx_uninit_isoc(dev);
  493. return -ENOMEM;
  494. }
  495. memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);
  496. /* FIXME: this is a hack - should be
  497. 'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
  498. should also be using 'desc.bInterval'
  499. */
  500. pipe = usb_rcvisocpipe(dev->udev, cap_type == EM28XX_ANALOG_CAPTURE ? 0x82 : 0x84);
  501. usb_fill_int_urb(urb, dev->udev, pipe,
  502. dev->isoc_ctl.transfer_buffer[i], sb_size,
  503. em28xx_irq_callback, dma_q, 1);
  504. urb->number_of_packets = max_packets;
  505. urb->transfer_flags = URB_ISO_ASAP;
  506. k = 0;
  507. for (j = 0; j < max_packets; j++) {
  508. urb->iso_frame_desc[j].offset = k;
  509. urb->iso_frame_desc[j].length =
  510. dev->isoc_ctl.max_pkt_size;
  511. k += dev->isoc_ctl.max_pkt_size;
  512. }
  513. }
  514. init_waitqueue_head(&dma_q->wq);
  515. em28xx_capture_start(dev, cap_type);
  516. /* submit urbs and enables IRQ */
  517. for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
  518. rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
  519. if (rc) {
  520. em28xx_err("submit of urb %i failed (error=%i)\n", i,
  521. rc);
  522. em28xx_uninit_isoc(dev);
  523. return rc;
  524. }
  525. }
  526. return 0;
  527. }
  528. EXPORT_SYMBOL_GPL(em28xx_init_isoc);