mpt2sas_base.c 118 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2010 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/errno.h>
  45. #include <linux/init.h>
  46. #include <linux/slab.h>
  47. #include <linux/types.h>
  48. #include <linux/pci.h>
  49. #include <linux/kdev_t.h>
  50. #include <linux/blkdev.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/sort.h>
  55. #include <linux/io.h>
  56. #include <linux/time.h>
  57. #include <linux/aer.h>
  58. #include "mpt2sas_base.h"
  59. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  60. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  61. static int max_queue_depth = -1;
  62. module_param(max_queue_depth, int, 0);
  63. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  64. static int max_sgl_entries = -1;
  65. module_param(max_sgl_entries, int, 0);
  66. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  67. static int msix_disable = -1;
  68. module_param(msix_disable, int, 0);
  69. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  70. static int missing_delay[2] = {-1, -1};
  71. module_param_array(missing_delay, int, NULL, 0);
  72. MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
  73. /* diag_buffer_enable is bitwise
  74. * bit 0 set = TRACE
  75. * bit 1 set = SNAPSHOT
  76. * bit 2 set = EXTENDED
  77. *
  78. * Either bit can be set, or both
  79. */
  80. static int diag_buffer_enable;
  81. module_param(diag_buffer_enable, int, 0);
  82. MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
  83. "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
  84. static int mpt2sas_fwfault_debug;
  85. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  86. "and halt firmware - (default=0)");
  87. static int disable_discovery = -1;
  88. module_param(disable_discovery, int, 0);
  89. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  90. /**
  91. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  92. *
  93. */
  94. static int
  95. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  96. {
  97. int ret = param_set_int(val, kp);
  98. struct MPT2SAS_ADAPTER *ioc;
  99. if (ret)
  100. return ret;
  101. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  102. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  103. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  104. return 0;
  105. }
  106. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  107. param_get_int, &mpt2sas_fwfault_debug, 0644);
  108. /**
  109. * _base_fault_reset_work - workq handling ioc fault conditions
  110. * @work: input argument, used to derive ioc
  111. * Context: sleep.
  112. *
  113. * Return nothing.
  114. */
  115. static void
  116. _base_fault_reset_work(struct work_struct *work)
  117. {
  118. struct MPT2SAS_ADAPTER *ioc =
  119. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  120. unsigned long flags;
  121. u32 doorbell;
  122. int rc;
  123. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  124. if (ioc->shost_recovery)
  125. goto rearm_timer;
  126. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  127. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  128. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  129. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  130. FORCE_BIG_HAMMER);
  131. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  132. __func__, (rc == 0) ? "success" : "failed");
  133. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  134. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  135. mpt2sas_base_fault_info(ioc, doorbell &
  136. MPI2_DOORBELL_DATA_MASK);
  137. }
  138. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  139. rearm_timer:
  140. if (ioc->fault_reset_work_q)
  141. queue_delayed_work(ioc->fault_reset_work_q,
  142. &ioc->fault_reset_work,
  143. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  144. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  145. }
  146. /**
  147. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  148. * @ioc: per adapter object
  149. * Context: sleep.
  150. *
  151. * Return nothing.
  152. */
  153. void
  154. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  155. {
  156. unsigned long flags;
  157. if (ioc->fault_reset_work_q)
  158. return;
  159. /* initialize fault polling */
  160. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  161. snprintf(ioc->fault_reset_work_q_name,
  162. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  163. ioc->fault_reset_work_q =
  164. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  165. if (!ioc->fault_reset_work_q) {
  166. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  167. ioc->name, __func__, __LINE__);
  168. return;
  169. }
  170. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  171. if (ioc->fault_reset_work_q)
  172. queue_delayed_work(ioc->fault_reset_work_q,
  173. &ioc->fault_reset_work,
  174. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  175. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  176. }
  177. /**
  178. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  179. * @ioc: per adapter object
  180. * Context: sleep.
  181. *
  182. * Return nothing.
  183. */
  184. void
  185. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  186. {
  187. unsigned long flags;
  188. struct workqueue_struct *wq;
  189. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  190. wq = ioc->fault_reset_work_q;
  191. ioc->fault_reset_work_q = NULL;
  192. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  193. if (wq) {
  194. if (!cancel_delayed_work(&ioc->fault_reset_work))
  195. flush_workqueue(wq);
  196. destroy_workqueue(wq);
  197. }
  198. }
  199. /**
  200. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  201. * @ioc: per adapter object
  202. * @fault_code: fault code
  203. *
  204. * Return nothing.
  205. */
  206. void
  207. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  208. {
  209. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  210. ioc->name, fault_code);
  211. }
  212. /**
  213. * mpt2sas_halt_firmware - halt's mpt controller firmware
  214. * @ioc: per adapter object
  215. *
  216. * For debugging timeout related issues. Writing 0xCOFFEE00
  217. * to the doorbell register will halt controller firmware. With
  218. * the purpose to stop both driver and firmware, the enduser can
  219. * obtain a ring buffer from controller UART.
  220. */
  221. void
  222. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  223. {
  224. u32 doorbell;
  225. if (!ioc->fwfault_debug)
  226. return;
  227. dump_stack();
  228. doorbell = readl(&ioc->chip->Doorbell);
  229. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  230. mpt2sas_base_fault_info(ioc , doorbell);
  231. else {
  232. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  233. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  234. "timeout\n", ioc->name);
  235. }
  236. panic("panic in %s\n", __func__);
  237. }
  238. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  239. /**
  240. * _base_sas_ioc_info - verbose translation of the ioc status
  241. * @ioc: per adapter object
  242. * @mpi_reply: reply mf payload returned from firmware
  243. * @request_hdr: request mf
  244. *
  245. * Return nothing.
  246. */
  247. static void
  248. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  249. MPI2RequestHeader_t *request_hdr)
  250. {
  251. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  252. MPI2_IOCSTATUS_MASK;
  253. char *desc = NULL;
  254. u16 frame_sz;
  255. char *func_str = NULL;
  256. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  257. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  258. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  259. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  260. return;
  261. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  262. return;
  263. switch (ioc_status) {
  264. /****************************************************************************
  265. * Common IOCStatus values for all replies
  266. ****************************************************************************/
  267. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  268. desc = "invalid function";
  269. break;
  270. case MPI2_IOCSTATUS_BUSY:
  271. desc = "busy";
  272. break;
  273. case MPI2_IOCSTATUS_INVALID_SGL:
  274. desc = "invalid sgl";
  275. break;
  276. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  277. desc = "internal error";
  278. break;
  279. case MPI2_IOCSTATUS_INVALID_VPID:
  280. desc = "invalid vpid";
  281. break;
  282. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  283. desc = "insufficient resources";
  284. break;
  285. case MPI2_IOCSTATUS_INVALID_FIELD:
  286. desc = "invalid field";
  287. break;
  288. case MPI2_IOCSTATUS_INVALID_STATE:
  289. desc = "invalid state";
  290. break;
  291. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  292. desc = "op state not supported";
  293. break;
  294. /****************************************************************************
  295. * Config IOCStatus values
  296. ****************************************************************************/
  297. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  298. desc = "config invalid action";
  299. break;
  300. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  301. desc = "config invalid type";
  302. break;
  303. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  304. desc = "config invalid page";
  305. break;
  306. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  307. desc = "config invalid data";
  308. break;
  309. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  310. desc = "config no defaults";
  311. break;
  312. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  313. desc = "config cant commit";
  314. break;
  315. /****************************************************************************
  316. * SCSI IO Reply
  317. ****************************************************************************/
  318. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  319. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  320. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  321. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  322. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  323. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  324. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  325. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  326. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  327. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  328. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  329. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  330. break;
  331. /****************************************************************************
  332. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  333. ****************************************************************************/
  334. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  335. desc = "eedp guard error";
  336. break;
  337. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  338. desc = "eedp ref tag error";
  339. break;
  340. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  341. desc = "eedp app tag error";
  342. break;
  343. /****************************************************************************
  344. * SCSI Target values
  345. ****************************************************************************/
  346. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  347. desc = "target invalid io index";
  348. break;
  349. case MPI2_IOCSTATUS_TARGET_ABORTED:
  350. desc = "target aborted";
  351. break;
  352. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  353. desc = "target no conn retryable";
  354. break;
  355. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  356. desc = "target no connection";
  357. break;
  358. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  359. desc = "target xfer count mismatch";
  360. break;
  361. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  362. desc = "target data offset error";
  363. break;
  364. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  365. desc = "target too much write data";
  366. break;
  367. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  368. desc = "target iu too short";
  369. break;
  370. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  371. desc = "target ack nak timeout";
  372. break;
  373. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  374. desc = "target nak received";
  375. break;
  376. /****************************************************************************
  377. * Serial Attached SCSI values
  378. ****************************************************************************/
  379. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  380. desc = "smp request failed";
  381. break;
  382. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  383. desc = "smp data overrun";
  384. break;
  385. /****************************************************************************
  386. * Diagnostic Buffer Post / Diagnostic Release values
  387. ****************************************************************************/
  388. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  389. desc = "diagnostic released";
  390. break;
  391. default:
  392. break;
  393. }
  394. if (!desc)
  395. return;
  396. switch (request_hdr->Function) {
  397. case MPI2_FUNCTION_CONFIG:
  398. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  399. func_str = "config_page";
  400. break;
  401. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  402. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  403. func_str = "task_mgmt";
  404. break;
  405. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  406. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  407. func_str = "sas_iounit_ctl";
  408. break;
  409. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  410. frame_sz = sizeof(Mpi2SepRequest_t);
  411. func_str = "enclosure";
  412. break;
  413. case MPI2_FUNCTION_IOC_INIT:
  414. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  415. func_str = "ioc_init";
  416. break;
  417. case MPI2_FUNCTION_PORT_ENABLE:
  418. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  419. func_str = "port_enable";
  420. break;
  421. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  422. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  423. func_str = "smp_passthru";
  424. break;
  425. default:
  426. frame_sz = 32;
  427. func_str = "unknown";
  428. break;
  429. }
  430. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  431. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  432. _debug_dump_mf(request_hdr, frame_sz/4);
  433. }
  434. /**
  435. * _base_display_event_data - verbose translation of firmware asyn events
  436. * @ioc: per adapter object
  437. * @mpi_reply: reply mf payload returned from firmware
  438. *
  439. * Return nothing.
  440. */
  441. static void
  442. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  443. Mpi2EventNotificationReply_t *mpi_reply)
  444. {
  445. char *desc = NULL;
  446. u16 event;
  447. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  448. return;
  449. event = le16_to_cpu(mpi_reply->Event);
  450. switch (event) {
  451. case MPI2_EVENT_LOG_DATA:
  452. desc = "Log Data";
  453. break;
  454. case MPI2_EVENT_STATE_CHANGE:
  455. desc = "Status Change";
  456. break;
  457. case MPI2_EVENT_HARD_RESET_RECEIVED:
  458. desc = "Hard Reset Received";
  459. break;
  460. case MPI2_EVENT_EVENT_CHANGE:
  461. desc = "Event Change";
  462. break;
  463. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  464. desc = "Device Status Change";
  465. break;
  466. case MPI2_EVENT_IR_OPERATION_STATUS:
  467. if (!ioc->hide_ir_msg)
  468. desc = "IR Operation Status";
  469. break;
  470. case MPI2_EVENT_SAS_DISCOVERY:
  471. {
  472. Mpi2EventDataSasDiscovery_t *event_data =
  473. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  474. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  475. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  476. "start" : "stop");
  477. if (event_data->DiscoveryStatus)
  478. printk("discovery_status(0x%08x)",
  479. le32_to_cpu(event_data->DiscoveryStatus));
  480. printk("\n");
  481. return;
  482. }
  483. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  484. desc = "SAS Broadcast Primitive";
  485. break;
  486. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  487. desc = "SAS Init Device Status Change";
  488. break;
  489. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  490. desc = "SAS Init Table Overflow";
  491. break;
  492. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  493. desc = "SAS Topology Change List";
  494. break;
  495. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  496. desc = "SAS Enclosure Device Status Change";
  497. break;
  498. case MPI2_EVENT_IR_VOLUME:
  499. if (!ioc->hide_ir_msg)
  500. desc = "IR Volume";
  501. break;
  502. case MPI2_EVENT_IR_PHYSICAL_DISK:
  503. if (!ioc->hide_ir_msg)
  504. desc = "IR Physical Disk";
  505. break;
  506. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  507. if (!ioc->hide_ir_msg)
  508. desc = "IR Configuration Change List";
  509. break;
  510. case MPI2_EVENT_LOG_ENTRY_ADDED:
  511. if (!ioc->hide_ir_msg)
  512. desc = "Log Entry Added";
  513. break;
  514. }
  515. if (!desc)
  516. return;
  517. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  518. }
  519. #endif
  520. /**
  521. * _base_sas_log_info - verbose translation of firmware log info
  522. * @ioc: per adapter object
  523. * @log_info: log info
  524. *
  525. * Return nothing.
  526. */
  527. static void
  528. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  529. {
  530. union loginfo_type {
  531. u32 loginfo;
  532. struct {
  533. u32 subcode:16;
  534. u32 code:8;
  535. u32 originator:4;
  536. u32 bus_type:4;
  537. } dw;
  538. };
  539. union loginfo_type sas_loginfo;
  540. char *originator_str = NULL;
  541. sas_loginfo.loginfo = log_info;
  542. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  543. return;
  544. /* each nexus loss loginfo */
  545. if (log_info == 0x31170000)
  546. return;
  547. /* eat the loginfos associated with task aborts */
  548. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  549. 0x31140000 || log_info == 0x31130000))
  550. return;
  551. switch (sas_loginfo.dw.originator) {
  552. case 0:
  553. originator_str = "IOP";
  554. break;
  555. case 1:
  556. originator_str = "PL";
  557. break;
  558. case 2:
  559. if (!ioc->hide_ir_msg)
  560. originator_str = "IR";
  561. else
  562. originator_str = "WarpDrive";
  563. break;
  564. }
  565. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  566. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  567. originator_str, sas_loginfo.dw.code,
  568. sas_loginfo.dw.subcode);
  569. }
  570. /**
  571. * _base_display_reply_info -
  572. * @ioc: per adapter object
  573. * @smid: system request message index
  574. * @msix_index: MSIX table index supplied by the OS
  575. * @reply: reply message frame(lower 32bit addr)
  576. *
  577. * Return nothing.
  578. */
  579. static void
  580. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  581. u32 reply)
  582. {
  583. MPI2DefaultReply_t *mpi_reply;
  584. u16 ioc_status;
  585. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  586. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  587. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  588. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  589. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  590. _base_sas_ioc_info(ioc , mpi_reply,
  591. mpt2sas_base_get_msg_frame(ioc, smid));
  592. }
  593. #endif
  594. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  595. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  596. }
  597. /**
  598. * mpt2sas_base_done - base internal command completion routine
  599. * @ioc: per adapter object
  600. * @smid: system request message index
  601. * @msix_index: MSIX table index supplied by the OS
  602. * @reply: reply message frame(lower 32bit addr)
  603. *
  604. * Return 1 meaning mf should be freed from _base_interrupt
  605. * 0 means the mf is freed from this function.
  606. */
  607. u8
  608. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  609. u32 reply)
  610. {
  611. MPI2DefaultReply_t *mpi_reply;
  612. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  613. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  614. return 1;
  615. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  616. return 1;
  617. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  618. if (mpi_reply) {
  619. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  620. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  621. }
  622. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  623. complete(&ioc->base_cmds.done);
  624. return 1;
  625. }
  626. /**
  627. * _base_async_event - main callback handler for firmware asyn events
  628. * @ioc: per adapter object
  629. * @msix_index: MSIX table index supplied by the OS
  630. * @reply: reply message frame(lower 32bit addr)
  631. *
  632. * Return 1 meaning mf should be freed from _base_interrupt
  633. * 0 means the mf is freed from this function.
  634. */
  635. static u8
  636. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  637. {
  638. Mpi2EventNotificationReply_t *mpi_reply;
  639. Mpi2EventAckRequest_t *ack_request;
  640. u16 smid;
  641. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  642. if (!mpi_reply)
  643. return 1;
  644. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  645. return 1;
  646. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  647. _base_display_event_data(ioc, mpi_reply);
  648. #endif
  649. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  650. goto out;
  651. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  652. if (!smid) {
  653. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  654. ioc->name, __func__);
  655. goto out;
  656. }
  657. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  658. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  659. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  660. ack_request->Event = mpi_reply->Event;
  661. ack_request->EventContext = mpi_reply->EventContext;
  662. ack_request->VF_ID = 0; /* TODO */
  663. ack_request->VP_ID = 0;
  664. mpt2sas_base_put_smid_default(ioc, smid);
  665. out:
  666. /* scsih callback handler */
  667. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  668. /* ctl callback handler */
  669. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  670. return 1;
  671. }
  672. /**
  673. * _base_get_cb_idx - obtain the callback index
  674. * @ioc: per adapter object
  675. * @smid: system request message index
  676. *
  677. * Return callback index.
  678. */
  679. static u8
  680. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  681. {
  682. int i;
  683. u8 cb_idx;
  684. if (smid < ioc->hi_priority_smid) {
  685. i = smid - 1;
  686. cb_idx = ioc->scsi_lookup[i].cb_idx;
  687. } else if (smid < ioc->internal_smid) {
  688. i = smid - ioc->hi_priority_smid;
  689. cb_idx = ioc->hpr_lookup[i].cb_idx;
  690. } else if (smid <= ioc->hba_queue_depth) {
  691. i = smid - ioc->internal_smid;
  692. cb_idx = ioc->internal_lookup[i].cb_idx;
  693. } else
  694. cb_idx = 0xFF;
  695. return cb_idx;
  696. }
  697. /**
  698. * _base_mask_interrupts - disable interrupts
  699. * @ioc: per adapter object
  700. *
  701. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  702. *
  703. * Return nothing.
  704. */
  705. static void
  706. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  707. {
  708. u32 him_register;
  709. ioc->mask_interrupts = 1;
  710. him_register = readl(&ioc->chip->HostInterruptMask);
  711. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  712. writel(him_register, &ioc->chip->HostInterruptMask);
  713. readl(&ioc->chip->HostInterruptMask);
  714. }
  715. /**
  716. * _base_unmask_interrupts - enable interrupts
  717. * @ioc: per adapter object
  718. *
  719. * Enabling only Reply Interrupts
  720. *
  721. * Return nothing.
  722. */
  723. static void
  724. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  725. {
  726. u32 him_register;
  727. him_register = readl(&ioc->chip->HostInterruptMask);
  728. him_register &= ~MPI2_HIM_RIM;
  729. writel(him_register, &ioc->chip->HostInterruptMask);
  730. ioc->mask_interrupts = 0;
  731. }
  732. union reply_descriptor {
  733. u64 word;
  734. struct {
  735. u32 low;
  736. u32 high;
  737. } u;
  738. };
  739. /**
  740. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  741. * @irq: irq number (not used)
  742. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  743. * @r: pt_regs pointer (not used)
  744. *
  745. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  746. */
  747. static irqreturn_t
  748. _base_interrupt(int irq, void *bus_id)
  749. {
  750. union reply_descriptor rd;
  751. u32 completed_cmds;
  752. u8 request_desript_type;
  753. u16 smid;
  754. u8 cb_idx;
  755. u32 reply;
  756. u8 msix_index;
  757. struct MPT2SAS_ADAPTER *ioc = bus_id;
  758. Mpi2ReplyDescriptorsUnion_t *rpf;
  759. u8 rc;
  760. if (ioc->mask_interrupts)
  761. return IRQ_NONE;
  762. rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
  763. request_desript_type = rpf->Default.ReplyFlags
  764. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  765. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  766. return IRQ_NONE;
  767. completed_cmds = 0;
  768. cb_idx = 0xFF;
  769. do {
  770. rd.word = le64_to_cpu(rpf->Words);
  771. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  772. goto out;
  773. reply = 0;
  774. cb_idx = 0xFF;
  775. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  776. msix_index = rpf->Default.MSIxIndex;
  777. if (request_desript_type ==
  778. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  779. reply = le32_to_cpu
  780. (rpf->AddressReply.ReplyFrameAddress);
  781. if (reply > ioc->reply_dma_max_address ||
  782. reply < ioc->reply_dma_min_address)
  783. reply = 0;
  784. } else if (request_desript_type ==
  785. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  786. goto next;
  787. else if (request_desript_type ==
  788. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  789. goto next;
  790. if (smid)
  791. cb_idx = _base_get_cb_idx(ioc, smid);
  792. if (smid && cb_idx != 0xFF) {
  793. rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
  794. reply);
  795. if (reply)
  796. _base_display_reply_info(ioc, smid, msix_index,
  797. reply);
  798. if (rc)
  799. mpt2sas_base_free_smid(ioc, smid);
  800. }
  801. if (!smid)
  802. _base_async_event(ioc, msix_index, reply);
  803. /* reply free queue handling */
  804. if (reply) {
  805. ioc->reply_free_host_index =
  806. (ioc->reply_free_host_index ==
  807. (ioc->reply_free_queue_depth - 1)) ?
  808. 0 : ioc->reply_free_host_index + 1;
  809. ioc->reply_free[ioc->reply_free_host_index] =
  810. cpu_to_le32(reply);
  811. wmb();
  812. writel(ioc->reply_free_host_index,
  813. &ioc->chip->ReplyFreeHostIndex);
  814. }
  815. next:
  816. rpf->Words = cpu_to_le64(ULLONG_MAX);
  817. ioc->reply_post_host_index = (ioc->reply_post_host_index ==
  818. (ioc->reply_post_queue_depth - 1)) ? 0 :
  819. ioc->reply_post_host_index + 1;
  820. request_desript_type =
  821. ioc->reply_post_free[ioc->reply_post_host_index].Default.
  822. ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  823. completed_cmds++;
  824. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  825. goto out;
  826. if (!ioc->reply_post_host_index)
  827. rpf = ioc->reply_post_free;
  828. else
  829. rpf++;
  830. } while (1);
  831. out:
  832. if (!completed_cmds)
  833. return IRQ_NONE;
  834. wmb();
  835. writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
  836. return IRQ_HANDLED;
  837. }
  838. /**
  839. * mpt2sas_base_release_callback_handler - clear interrupt callback handler
  840. * @cb_idx: callback index
  841. *
  842. * Return nothing.
  843. */
  844. void
  845. mpt2sas_base_release_callback_handler(u8 cb_idx)
  846. {
  847. mpt_callbacks[cb_idx] = NULL;
  848. }
  849. /**
  850. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  851. * @cb_func: callback function
  852. *
  853. * Returns cb_func.
  854. */
  855. u8
  856. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  857. {
  858. u8 cb_idx;
  859. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  860. if (mpt_callbacks[cb_idx] == NULL)
  861. break;
  862. mpt_callbacks[cb_idx] = cb_func;
  863. return cb_idx;
  864. }
  865. /**
  866. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  867. *
  868. * Return nothing.
  869. */
  870. void
  871. mpt2sas_base_initialize_callback_handler(void)
  872. {
  873. u8 cb_idx;
  874. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  875. mpt2sas_base_release_callback_handler(cb_idx);
  876. }
  877. /**
  878. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  879. * @ioc: per adapter object
  880. * @paddr: virtual address for SGE
  881. *
  882. * Create a zero length scatter gather entry to insure the IOCs hardware has
  883. * something to use if the target device goes brain dead and tries
  884. * to send data even when none is asked for.
  885. *
  886. * Return nothing.
  887. */
  888. void
  889. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  890. {
  891. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  892. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  893. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  894. MPI2_SGE_FLAGS_SHIFT);
  895. ioc->base_add_sg_single(paddr, flags_length, -1);
  896. }
  897. /**
  898. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  899. * @paddr: virtual address for SGE
  900. * @flags_length: SGE flags and data transfer length
  901. * @dma_addr: Physical address
  902. *
  903. * Return nothing.
  904. */
  905. static void
  906. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  907. {
  908. Mpi2SGESimple32_t *sgel = paddr;
  909. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  910. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  911. sgel->FlagsLength = cpu_to_le32(flags_length);
  912. sgel->Address = cpu_to_le32(dma_addr);
  913. }
  914. /**
  915. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  916. * @paddr: virtual address for SGE
  917. * @flags_length: SGE flags and data transfer length
  918. * @dma_addr: Physical address
  919. *
  920. * Return nothing.
  921. */
  922. static void
  923. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  924. {
  925. Mpi2SGESimple64_t *sgel = paddr;
  926. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  927. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  928. sgel->FlagsLength = cpu_to_le32(flags_length);
  929. sgel->Address = cpu_to_le64(dma_addr);
  930. }
  931. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  932. /**
  933. * _base_config_dma_addressing - set dma addressing
  934. * @ioc: per adapter object
  935. * @pdev: PCI device struct
  936. *
  937. * Returns 0 for success, non-zero for failure.
  938. */
  939. static int
  940. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  941. {
  942. struct sysinfo s;
  943. char *desc = NULL;
  944. if (sizeof(dma_addr_t) > 4) {
  945. const uint64_t required_mask =
  946. dma_get_required_mask(&pdev->dev);
  947. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  948. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  949. DMA_BIT_MASK(64))) {
  950. ioc->base_add_sg_single = &_base_add_sg_single_64;
  951. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  952. desc = "64";
  953. goto out;
  954. }
  955. }
  956. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  957. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  958. ioc->base_add_sg_single = &_base_add_sg_single_32;
  959. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  960. desc = "32";
  961. } else
  962. return -ENODEV;
  963. out:
  964. si_meminfo(&s);
  965. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  966. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  967. return 0;
  968. }
  969. /**
  970. * _base_save_msix_table - backup msix vector table
  971. * @ioc: per adapter object
  972. *
  973. * This address an errata where diag reset clears out the table
  974. */
  975. static void
  976. _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
  977. {
  978. int i;
  979. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  980. return;
  981. for (i = 0; i < ioc->msix_vector_count; i++)
  982. ioc->msix_table_backup[i] = ioc->msix_table[i];
  983. }
  984. /**
  985. * _base_restore_msix_table - this restores the msix vector table
  986. * @ioc: per adapter object
  987. *
  988. */
  989. static void
  990. _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
  991. {
  992. int i;
  993. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  994. return;
  995. for (i = 0; i < ioc->msix_vector_count; i++)
  996. ioc->msix_table[i] = ioc->msix_table_backup[i];
  997. }
  998. /**
  999. * _base_check_enable_msix - checks MSIX capabable.
  1000. * @ioc: per adapter object
  1001. *
  1002. * Check to see if card is capable of MSIX, and set number
  1003. * of available msix vectors
  1004. */
  1005. static int
  1006. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1007. {
  1008. int base;
  1009. u16 message_control;
  1010. u32 msix_table_offset;
  1011. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1012. if (!base) {
  1013. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1014. "supported\n", ioc->name));
  1015. return -EINVAL;
  1016. }
  1017. /* get msix vector count */
  1018. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1019. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1020. /* get msix table */
  1021. pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
  1022. msix_table_offset &= 0xFFFFFFF8;
  1023. ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
  1024. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1025. "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
  1026. ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
  1027. return 0;
  1028. }
  1029. /**
  1030. * _base_disable_msix - disables msix
  1031. * @ioc: per adapter object
  1032. *
  1033. */
  1034. static void
  1035. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1036. {
  1037. if (ioc->msix_enable) {
  1038. pci_disable_msix(ioc->pdev);
  1039. kfree(ioc->msix_table_backup);
  1040. ioc->msix_table_backup = NULL;
  1041. ioc->msix_enable = 0;
  1042. }
  1043. }
  1044. /**
  1045. * _base_enable_msix - enables msix, failback to io_apic
  1046. * @ioc: per adapter object
  1047. *
  1048. */
  1049. static int
  1050. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1051. {
  1052. struct msix_entry entries;
  1053. int r;
  1054. u8 try_msix = 0;
  1055. if (msix_disable == -1 || msix_disable == 0)
  1056. try_msix = 1;
  1057. if (!try_msix)
  1058. goto try_ioapic;
  1059. if (_base_check_enable_msix(ioc) != 0)
  1060. goto try_ioapic;
  1061. ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
  1062. sizeof(u32), GFP_KERNEL);
  1063. if (!ioc->msix_table_backup) {
  1064. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  1065. "msix_table_backup failed!!!\n", ioc->name));
  1066. goto try_ioapic;
  1067. }
  1068. memset(&entries, 0, sizeof(struct msix_entry));
  1069. r = pci_enable_msix(ioc->pdev, &entries, 1);
  1070. if (r) {
  1071. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1072. "failed (r=%d) !!!\n", ioc->name, r));
  1073. goto try_ioapic;
  1074. }
  1075. r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
  1076. ioc->name, ioc);
  1077. if (r) {
  1078. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
  1079. "interrupt %d !!!\n", ioc->name, entries.vector));
  1080. pci_disable_msix(ioc->pdev);
  1081. goto try_ioapic;
  1082. }
  1083. ioc->pci_irq = entries.vector;
  1084. ioc->msix_enable = 1;
  1085. return 0;
  1086. /* failback to io_apic interrupt routing */
  1087. try_ioapic:
  1088. r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
  1089. ioc->name, ioc);
  1090. if (r) {
  1091. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1092. ioc->name, ioc->pdev->irq);
  1093. r = -EBUSY;
  1094. goto out_fail;
  1095. }
  1096. ioc->pci_irq = ioc->pdev->irq;
  1097. return 0;
  1098. out_fail:
  1099. return r;
  1100. }
  1101. /**
  1102. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1103. * @ioc: per adapter object
  1104. *
  1105. * Returns 0 for success, non-zero for failure.
  1106. */
  1107. int
  1108. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1109. {
  1110. struct pci_dev *pdev = ioc->pdev;
  1111. u32 memap_sz;
  1112. u32 pio_sz;
  1113. int i, r = 0;
  1114. u64 pio_chip = 0;
  1115. u64 chip_phys = 0;
  1116. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1117. ioc->name, __func__));
  1118. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1119. if (pci_enable_device_mem(pdev)) {
  1120. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1121. "failed\n", ioc->name);
  1122. return -ENODEV;
  1123. }
  1124. if (pci_request_selected_regions(pdev, ioc->bars,
  1125. MPT2SAS_DRIVER_NAME)) {
  1126. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1127. "failed\n", ioc->name);
  1128. r = -ENODEV;
  1129. goto out_fail;
  1130. }
  1131. /* AER (Advanced Error Reporting) hooks */
  1132. pci_enable_pcie_error_reporting(pdev);
  1133. pci_set_master(pdev);
  1134. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1135. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1136. ioc->name, pci_name(pdev));
  1137. r = -ENODEV;
  1138. goto out_fail;
  1139. }
  1140. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1141. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1142. if (pio_sz)
  1143. continue;
  1144. pio_chip = (u64)pci_resource_start(pdev, i);
  1145. pio_sz = pci_resource_len(pdev, i);
  1146. } else {
  1147. if (memap_sz)
  1148. continue;
  1149. /* verify memory resource is valid before using */
  1150. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1151. ioc->chip_phys = pci_resource_start(pdev, i);
  1152. chip_phys = (u64)ioc->chip_phys;
  1153. memap_sz = pci_resource_len(pdev, i);
  1154. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1155. if (ioc->chip == NULL) {
  1156. printk(MPT2SAS_ERR_FMT "unable to map "
  1157. "adapter memory!\n", ioc->name);
  1158. r = -EINVAL;
  1159. goto out_fail;
  1160. }
  1161. }
  1162. }
  1163. }
  1164. _base_mask_interrupts(ioc);
  1165. r = _base_enable_msix(ioc);
  1166. if (r)
  1167. goto out_fail;
  1168. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1169. ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1170. "IO-APIC enabled"), ioc->pci_irq);
  1171. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1172. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1173. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1174. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1175. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1176. pci_save_state(pdev);
  1177. return 0;
  1178. out_fail:
  1179. if (ioc->chip_phys)
  1180. iounmap(ioc->chip);
  1181. ioc->chip_phys = 0;
  1182. ioc->pci_irq = -1;
  1183. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1184. pci_disable_pcie_error_reporting(pdev);
  1185. pci_disable_device(pdev);
  1186. return r;
  1187. }
  1188. /**
  1189. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1190. * @ioc: per adapter object
  1191. * @smid: system request message index(smid zero is invalid)
  1192. *
  1193. * Returns virt pointer to message frame.
  1194. */
  1195. void *
  1196. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1197. {
  1198. return (void *)(ioc->request + (smid * ioc->request_sz));
  1199. }
  1200. /**
  1201. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1202. * @ioc: per adapter object
  1203. * @smid: system request message index
  1204. *
  1205. * Returns virt pointer to sense buffer.
  1206. */
  1207. void *
  1208. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1209. {
  1210. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1211. }
  1212. /**
  1213. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1214. * @ioc: per adapter object
  1215. * @smid: system request message index
  1216. *
  1217. * Returns phys pointer to the low 32bit address of the sense buffer.
  1218. */
  1219. __le32
  1220. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1221. {
  1222. return cpu_to_le32(ioc->sense_dma +
  1223. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1224. }
  1225. /**
  1226. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1227. * @ioc: per adapter object
  1228. * @phys_addr: lower 32 physical addr of the reply
  1229. *
  1230. * Converts 32bit lower physical addr into a virt address.
  1231. */
  1232. void *
  1233. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1234. {
  1235. if (!phys_addr)
  1236. return NULL;
  1237. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1238. }
  1239. /**
  1240. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1241. * @ioc: per adapter object
  1242. * @cb_idx: callback index
  1243. *
  1244. * Returns smid (zero is invalid)
  1245. */
  1246. u16
  1247. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1248. {
  1249. unsigned long flags;
  1250. struct request_tracker *request;
  1251. u16 smid;
  1252. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1253. if (list_empty(&ioc->internal_free_list)) {
  1254. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1255. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1256. ioc->name, __func__);
  1257. return 0;
  1258. }
  1259. request = list_entry(ioc->internal_free_list.next,
  1260. struct request_tracker, tracker_list);
  1261. request->cb_idx = cb_idx;
  1262. smid = request->smid;
  1263. list_del(&request->tracker_list);
  1264. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1265. return smid;
  1266. }
  1267. /**
  1268. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1269. * @ioc: per adapter object
  1270. * @cb_idx: callback index
  1271. * @scmd: pointer to scsi command object
  1272. *
  1273. * Returns smid (zero is invalid)
  1274. */
  1275. u16
  1276. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1277. struct scsi_cmnd *scmd)
  1278. {
  1279. unsigned long flags;
  1280. struct scsiio_tracker *request;
  1281. u16 smid;
  1282. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1283. if (list_empty(&ioc->free_list)) {
  1284. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1285. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1286. ioc->name, __func__);
  1287. return 0;
  1288. }
  1289. request = list_entry(ioc->free_list.next,
  1290. struct scsiio_tracker, tracker_list);
  1291. request->scmd = scmd;
  1292. request->cb_idx = cb_idx;
  1293. smid = request->smid;
  1294. list_del(&request->tracker_list);
  1295. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1296. return smid;
  1297. }
  1298. /**
  1299. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1300. * @ioc: per adapter object
  1301. * @cb_idx: callback index
  1302. *
  1303. * Returns smid (zero is invalid)
  1304. */
  1305. u16
  1306. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1307. {
  1308. unsigned long flags;
  1309. struct request_tracker *request;
  1310. u16 smid;
  1311. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1312. if (list_empty(&ioc->hpr_free_list)) {
  1313. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1314. return 0;
  1315. }
  1316. request = list_entry(ioc->hpr_free_list.next,
  1317. struct request_tracker, tracker_list);
  1318. request->cb_idx = cb_idx;
  1319. smid = request->smid;
  1320. list_del(&request->tracker_list);
  1321. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1322. return smid;
  1323. }
  1324. /**
  1325. * mpt2sas_base_free_smid - put smid back on free_list
  1326. * @ioc: per adapter object
  1327. * @smid: system request message index
  1328. *
  1329. * Return nothing.
  1330. */
  1331. void
  1332. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1333. {
  1334. unsigned long flags;
  1335. int i;
  1336. struct chain_tracker *chain_req, *next;
  1337. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1338. if (smid < ioc->hi_priority_smid) {
  1339. /* scsiio queue */
  1340. i = smid - 1;
  1341. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1342. list_for_each_entry_safe(chain_req, next,
  1343. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1344. list_del_init(&chain_req->tracker_list);
  1345. list_add_tail(&chain_req->tracker_list,
  1346. &ioc->free_chain_list);
  1347. }
  1348. }
  1349. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1350. ioc->scsi_lookup[i].scmd = NULL;
  1351. ioc->scsi_lookup[i].direct_io = 0;
  1352. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1353. &ioc->free_list);
  1354. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1355. /*
  1356. * See _wait_for_commands_to_complete() call with regards
  1357. * to this code.
  1358. */
  1359. if (ioc->shost_recovery && ioc->pending_io_count) {
  1360. if (ioc->pending_io_count == 1)
  1361. wake_up(&ioc->reset_wq);
  1362. ioc->pending_io_count--;
  1363. }
  1364. return;
  1365. } else if (smid < ioc->internal_smid) {
  1366. /* hi-priority */
  1367. i = smid - ioc->hi_priority_smid;
  1368. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1369. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1370. &ioc->hpr_free_list);
  1371. } else if (smid <= ioc->hba_queue_depth) {
  1372. /* internal queue */
  1373. i = smid - ioc->internal_smid;
  1374. ioc->internal_lookup[i].cb_idx = 0xFF;
  1375. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1376. &ioc->internal_free_list);
  1377. }
  1378. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1379. }
  1380. /**
  1381. * _base_writeq - 64 bit write to MMIO
  1382. * @ioc: per adapter object
  1383. * @b: data payload
  1384. * @addr: address in MMIO space
  1385. * @writeq_lock: spin lock
  1386. *
  1387. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1388. * care of 32 bit environment where its not quarenteed to send the entire word
  1389. * in one transfer.
  1390. */
  1391. #ifndef writeq
  1392. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1393. spinlock_t *writeq_lock)
  1394. {
  1395. unsigned long flags;
  1396. __u64 data_out = cpu_to_le64(b);
  1397. spin_lock_irqsave(writeq_lock, flags);
  1398. writel((u32)(data_out), addr);
  1399. writel((u32)(data_out >> 32), (addr + 4));
  1400. spin_unlock_irqrestore(writeq_lock, flags);
  1401. }
  1402. #else
  1403. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1404. spinlock_t *writeq_lock)
  1405. {
  1406. writeq(cpu_to_le64(b), addr);
  1407. }
  1408. #endif
  1409. /**
  1410. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1411. * @ioc: per adapter object
  1412. * @smid: system request message index
  1413. * @handle: device handle
  1414. *
  1415. * Return nothing.
  1416. */
  1417. void
  1418. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1419. {
  1420. Mpi2RequestDescriptorUnion_t descriptor;
  1421. u64 *request = (u64 *)&descriptor;
  1422. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1423. descriptor.SCSIIO.MSIxIndex = 0; /* TODO */
  1424. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1425. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1426. descriptor.SCSIIO.LMID = 0;
  1427. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1428. &ioc->scsi_lookup_lock);
  1429. }
  1430. /**
  1431. * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
  1432. * @ioc: per adapter object
  1433. * @smid: system request message index
  1434. *
  1435. * Return nothing.
  1436. */
  1437. void
  1438. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1439. {
  1440. Mpi2RequestDescriptorUnion_t descriptor;
  1441. u64 *request = (u64 *)&descriptor;
  1442. descriptor.HighPriority.RequestFlags =
  1443. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1444. descriptor.HighPriority.MSIxIndex = 0; /* TODO */
  1445. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1446. descriptor.HighPriority.LMID = 0;
  1447. descriptor.HighPriority.Reserved1 = 0;
  1448. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1449. &ioc->scsi_lookup_lock);
  1450. }
  1451. /**
  1452. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1453. * @ioc: per adapter object
  1454. * @smid: system request message index
  1455. *
  1456. * Return nothing.
  1457. */
  1458. void
  1459. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1460. {
  1461. Mpi2RequestDescriptorUnion_t descriptor;
  1462. u64 *request = (u64 *)&descriptor;
  1463. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1464. descriptor.Default.MSIxIndex = 0; /* TODO */
  1465. descriptor.Default.SMID = cpu_to_le16(smid);
  1466. descriptor.Default.LMID = 0;
  1467. descriptor.Default.DescriptorTypeDependent = 0;
  1468. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1469. &ioc->scsi_lookup_lock);
  1470. }
  1471. /**
  1472. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1473. * @ioc: per adapter object
  1474. * @smid: system request message index
  1475. * @io_index: value used to track the IO
  1476. *
  1477. * Return nothing.
  1478. */
  1479. void
  1480. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1481. u16 io_index)
  1482. {
  1483. Mpi2RequestDescriptorUnion_t descriptor;
  1484. u64 *request = (u64 *)&descriptor;
  1485. descriptor.SCSITarget.RequestFlags =
  1486. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1487. descriptor.SCSITarget.MSIxIndex = 0; /* TODO */
  1488. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1489. descriptor.SCSITarget.LMID = 0;
  1490. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1491. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1492. &ioc->scsi_lookup_lock);
  1493. }
  1494. /**
  1495. * _base_display_dell_branding - Disply branding string
  1496. * @ioc: per adapter object
  1497. *
  1498. * Return nothing.
  1499. */
  1500. static void
  1501. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1502. {
  1503. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1504. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1505. return;
  1506. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1507. switch (ioc->pdev->subsystem_device) {
  1508. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1509. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1510. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1511. break;
  1512. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1513. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1514. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1515. break;
  1516. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1517. strncpy(dell_branding,
  1518. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1519. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1520. break;
  1521. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1522. strncpy(dell_branding,
  1523. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1524. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1525. break;
  1526. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1527. strncpy(dell_branding,
  1528. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1529. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1530. break;
  1531. case MPT2SAS_DELL_PERC_H200_SSDID:
  1532. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1533. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1534. break;
  1535. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1536. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1537. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1538. break;
  1539. default:
  1540. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1541. break;
  1542. }
  1543. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1544. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1545. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1546. ioc->pdev->subsystem_device);
  1547. }
  1548. /**
  1549. * _base_display_intel_branding - Display branding string
  1550. * @ioc: per adapter object
  1551. *
  1552. * Return nothing.
  1553. */
  1554. static void
  1555. _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
  1556. {
  1557. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
  1558. return;
  1559. switch (ioc->pdev->device) {
  1560. case MPI2_MFGPAGE_DEVID_SAS2008:
  1561. switch (ioc->pdev->subsystem_device) {
  1562. case MPT2SAS_INTEL_RMS2LL080_SSDID:
  1563. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1564. MPT2SAS_INTEL_RMS2LL080_BRANDING);
  1565. break;
  1566. case MPT2SAS_INTEL_RMS2LL040_SSDID:
  1567. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1568. MPT2SAS_INTEL_RMS2LL040_BRANDING);
  1569. break;
  1570. default:
  1571. break;
  1572. }
  1573. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1574. switch (ioc->pdev->subsystem_device) {
  1575. case MPT2SAS_INTEL_RS25GB008_SSDID:
  1576. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1577. MPT2SAS_INTEL_RS25GB008_BRANDING);
  1578. break;
  1579. default:
  1580. break;
  1581. }
  1582. default:
  1583. break;
  1584. }
  1585. }
  1586. /**
  1587. * _base_display_hp_branding - Display branding string
  1588. * @ioc: per adapter object
  1589. *
  1590. * Return nothing.
  1591. */
  1592. static void
  1593. _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
  1594. {
  1595. if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
  1596. return;
  1597. switch (ioc->pdev->device) {
  1598. case MPI2_MFGPAGE_DEVID_SAS2004:
  1599. switch (ioc->pdev->subsystem_device) {
  1600. case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
  1601. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1602. MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
  1603. break;
  1604. default:
  1605. break;
  1606. }
  1607. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1608. switch (ioc->pdev->subsystem_device) {
  1609. case MPT2SAS_HP_2_4_INTERNAL_SSDID:
  1610. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1611. MPT2SAS_HP_2_4_INTERNAL_BRANDING);
  1612. break;
  1613. case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
  1614. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1615. MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
  1616. break;
  1617. case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
  1618. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1619. MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
  1620. break;
  1621. case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
  1622. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1623. MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
  1624. break;
  1625. default:
  1626. break;
  1627. }
  1628. default:
  1629. break;
  1630. }
  1631. }
  1632. /**
  1633. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1634. * @ioc: per adapter object
  1635. *
  1636. * Return nothing.
  1637. */
  1638. static void
  1639. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1640. {
  1641. int i = 0;
  1642. char desc[16];
  1643. u8 revision;
  1644. u32 iounit_pg1_flags;
  1645. u32 bios_version;
  1646. bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
  1647. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1648. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1649. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1650. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1651. ioc->name, desc,
  1652. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1653. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1654. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1655. ioc->facts.FWVersion.Word & 0x000000FF,
  1656. revision,
  1657. (bios_version & 0xFF000000) >> 24,
  1658. (bios_version & 0x00FF0000) >> 16,
  1659. (bios_version & 0x0000FF00) >> 8,
  1660. bios_version & 0x000000FF);
  1661. _base_display_dell_branding(ioc);
  1662. _base_display_intel_branding(ioc);
  1663. _base_display_hp_branding(ioc);
  1664. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1665. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1666. printk("Initiator");
  1667. i++;
  1668. }
  1669. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1670. printk("%sTarget", i ? "," : "");
  1671. i++;
  1672. }
  1673. i = 0;
  1674. printk("), ");
  1675. printk("Capabilities=(");
  1676. if (!ioc->hide_ir_msg) {
  1677. if (ioc->facts.IOCCapabilities &
  1678. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1679. printk("Raid");
  1680. i++;
  1681. }
  1682. }
  1683. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1684. printk("%sTLR", i ? "," : "");
  1685. i++;
  1686. }
  1687. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1688. printk("%sMulticast", i ? "," : "");
  1689. i++;
  1690. }
  1691. if (ioc->facts.IOCCapabilities &
  1692. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1693. printk("%sBIDI Target", i ? "," : "");
  1694. i++;
  1695. }
  1696. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1697. printk("%sEEDP", i ? "," : "");
  1698. i++;
  1699. }
  1700. if (ioc->facts.IOCCapabilities &
  1701. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1702. printk("%sSnapshot Buffer", i ? "," : "");
  1703. i++;
  1704. }
  1705. if (ioc->facts.IOCCapabilities &
  1706. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1707. printk("%sDiag Trace Buffer", i ? "," : "");
  1708. i++;
  1709. }
  1710. if (ioc->facts.IOCCapabilities &
  1711. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1712. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1713. i++;
  1714. }
  1715. if (ioc->facts.IOCCapabilities &
  1716. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1717. printk("%sTask Set Full", i ? "," : "");
  1718. i++;
  1719. }
  1720. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1721. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1722. printk("%sNCQ", i ? "," : "");
  1723. i++;
  1724. }
  1725. printk(")\n");
  1726. }
  1727. /**
  1728. * _base_update_missing_delay - change the missing delay timers
  1729. * @ioc: per adapter object
  1730. * @device_missing_delay: amount of time till device is reported missing
  1731. * @io_missing_delay: interval IO is returned when there is a missing device
  1732. *
  1733. * Return nothing.
  1734. *
  1735. * Passed on the command line, this function will modify the device missing
  1736. * delay, as well as the io missing delay. This should be called at driver
  1737. * load time.
  1738. */
  1739. static void
  1740. _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1741. u16 device_missing_delay, u8 io_missing_delay)
  1742. {
  1743. u16 dmd, dmd_new, dmd_orignal;
  1744. u8 io_missing_delay_original;
  1745. u16 sz;
  1746. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  1747. Mpi2ConfigReply_t mpi_reply;
  1748. u8 num_phys = 0;
  1749. u16 ioc_status;
  1750. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  1751. if (!num_phys)
  1752. return;
  1753. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  1754. sizeof(Mpi2SasIOUnit1PhyData_t));
  1755. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  1756. if (!sas_iounit_pg1) {
  1757. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1758. ioc->name, __FILE__, __LINE__, __func__);
  1759. goto out;
  1760. }
  1761. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  1762. sas_iounit_pg1, sz))) {
  1763. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1764. ioc->name, __FILE__, __LINE__, __func__);
  1765. goto out;
  1766. }
  1767. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  1768. MPI2_IOCSTATUS_MASK;
  1769. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  1770. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1771. ioc->name, __FILE__, __LINE__, __func__);
  1772. goto out;
  1773. }
  1774. /* device missing delay */
  1775. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  1776. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1777. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1778. else
  1779. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  1780. dmd_orignal = dmd;
  1781. if (device_missing_delay > 0x7F) {
  1782. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  1783. device_missing_delay;
  1784. dmd = dmd / 16;
  1785. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  1786. } else
  1787. dmd = device_missing_delay;
  1788. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  1789. /* io missing delay */
  1790. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  1791. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  1792. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  1793. sz)) {
  1794. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1795. dmd_new = (dmd &
  1796. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1797. else
  1798. dmd_new =
  1799. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  1800. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  1801. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  1802. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  1803. "new(%d)\n", ioc->name, io_missing_delay_original,
  1804. io_missing_delay);
  1805. ioc->device_missing_delay = dmd_new;
  1806. ioc->io_missing_delay = io_missing_delay;
  1807. }
  1808. out:
  1809. kfree(sas_iounit_pg1);
  1810. }
  1811. /**
  1812. * _base_static_config_pages - static start of day config pages
  1813. * @ioc: per adapter object
  1814. *
  1815. * Return nothing.
  1816. */
  1817. static void
  1818. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  1819. {
  1820. Mpi2ConfigReply_t mpi_reply;
  1821. u32 iounit_pg1_flags;
  1822. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  1823. if (ioc->ir_firmware)
  1824. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  1825. &ioc->manu_pg10);
  1826. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  1827. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  1828. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  1829. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  1830. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1831. _base_display_ioc_capabilities(ioc);
  1832. /*
  1833. * Enable task_set_full handling in iounit_pg1 when the
  1834. * facts capabilities indicate that its supported.
  1835. */
  1836. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1837. if ((ioc->facts.IOCCapabilities &
  1838. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  1839. iounit_pg1_flags &=
  1840. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1841. else
  1842. iounit_pg1_flags |=
  1843. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1844. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  1845. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1846. }
  1847. /**
  1848. * _base_release_memory_pools - release memory
  1849. * @ioc: per adapter object
  1850. *
  1851. * Free memory allocated from _base_allocate_memory_pools.
  1852. *
  1853. * Return nothing.
  1854. */
  1855. static void
  1856. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  1857. {
  1858. int i;
  1859. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1860. __func__));
  1861. if (ioc->request) {
  1862. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  1863. ioc->request, ioc->request_dma);
  1864. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  1865. ": free\n", ioc->name, ioc->request));
  1866. ioc->request = NULL;
  1867. }
  1868. if (ioc->sense) {
  1869. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  1870. if (ioc->sense_dma_pool)
  1871. pci_pool_destroy(ioc->sense_dma_pool);
  1872. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  1873. ": free\n", ioc->name, ioc->sense));
  1874. ioc->sense = NULL;
  1875. }
  1876. if (ioc->reply) {
  1877. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  1878. if (ioc->reply_dma_pool)
  1879. pci_pool_destroy(ioc->reply_dma_pool);
  1880. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  1881. ": free\n", ioc->name, ioc->reply));
  1882. ioc->reply = NULL;
  1883. }
  1884. if (ioc->reply_free) {
  1885. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  1886. ioc->reply_free_dma);
  1887. if (ioc->reply_free_dma_pool)
  1888. pci_pool_destroy(ioc->reply_free_dma_pool);
  1889. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  1890. "(0x%p): free\n", ioc->name, ioc->reply_free));
  1891. ioc->reply_free = NULL;
  1892. }
  1893. if (ioc->reply_post_free) {
  1894. pci_pool_free(ioc->reply_post_free_dma_pool,
  1895. ioc->reply_post_free, ioc->reply_post_free_dma);
  1896. if (ioc->reply_post_free_dma_pool)
  1897. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  1898. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1899. "reply_post_free_pool(0x%p): free\n", ioc->name,
  1900. ioc->reply_post_free));
  1901. ioc->reply_post_free = NULL;
  1902. }
  1903. if (ioc->config_page) {
  1904. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1905. "config_page(0x%p): free\n", ioc->name,
  1906. ioc->config_page));
  1907. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  1908. ioc->config_page, ioc->config_page_dma);
  1909. }
  1910. if (ioc->scsi_lookup) {
  1911. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  1912. ioc->scsi_lookup = NULL;
  1913. }
  1914. kfree(ioc->hpr_lookup);
  1915. kfree(ioc->internal_lookup);
  1916. if (ioc->chain_lookup) {
  1917. for (i = 0; i < ioc->chain_depth; i++) {
  1918. if (ioc->chain_lookup[i].chain_buffer)
  1919. pci_pool_free(ioc->chain_dma_pool,
  1920. ioc->chain_lookup[i].chain_buffer,
  1921. ioc->chain_lookup[i].chain_buffer_dma);
  1922. }
  1923. if (ioc->chain_dma_pool)
  1924. pci_pool_destroy(ioc->chain_dma_pool);
  1925. }
  1926. if (ioc->chain_lookup) {
  1927. free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
  1928. ioc->chain_lookup = NULL;
  1929. }
  1930. }
  1931. /**
  1932. * _base_allocate_memory_pools - allocate start of day memory pools
  1933. * @ioc: per adapter object
  1934. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1935. *
  1936. * Returns 0 success, anything else error
  1937. */
  1938. static int
  1939. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  1940. {
  1941. struct mpt2sas_facts *facts;
  1942. u32 queue_size, queue_diff;
  1943. u16 max_sge_elements;
  1944. u16 num_of_reply_frames;
  1945. u16 chains_needed_per_io;
  1946. u32 sz, total_sz;
  1947. u32 retry_sz;
  1948. u16 max_request_credit;
  1949. int i;
  1950. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1951. __func__));
  1952. retry_sz = 0;
  1953. facts = &ioc->facts;
  1954. /* command line tunables for max sgl entries */
  1955. if (max_sgl_entries != -1) {
  1956. ioc->shost->sg_tablesize = (max_sgl_entries <
  1957. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  1958. MPT2SAS_SG_DEPTH;
  1959. } else {
  1960. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  1961. }
  1962. /* command line tunables for max controller queue depth */
  1963. if (max_queue_depth != -1)
  1964. max_request_credit = (max_queue_depth < facts->RequestCredit)
  1965. ? max_queue_depth : facts->RequestCredit;
  1966. else
  1967. max_request_credit = facts->RequestCredit;
  1968. ioc->hba_queue_depth = max_request_credit;
  1969. ioc->hi_priority_depth = facts->HighPriorityCredit;
  1970. ioc->internal_depth = ioc->hi_priority_depth + 5;
  1971. /* request frame size */
  1972. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  1973. /* reply frame size */
  1974. ioc->reply_sz = facts->ReplyFrameSize * 4;
  1975. retry_allocation:
  1976. total_sz = 0;
  1977. /* calculate number of sg elements left over in the 1st frame */
  1978. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  1979. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  1980. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  1981. /* now do the same for a chain buffer */
  1982. max_sge_elements = ioc->request_sz - ioc->sge_size;
  1983. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  1984. ioc->chain_offset_value_for_main_message =
  1985. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  1986. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  1987. /*
  1988. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  1989. */
  1990. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  1991. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  1992. + 1;
  1993. if (chains_needed_per_io > facts->MaxChainDepth) {
  1994. chains_needed_per_io = facts->MaxChainDepth;
  1995. ioc->shost->sg_tablesize = min_t(u16,
  1996. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  1997. * chains_needed_per_io), ioc->shost->sg_tablesize);
  1998. }
  1999. ioc->chains_needed_per_io = chains_needed_per_io;
  2000. /* reply free queue sizing - taking into account for events */
  2001. num_of_reply_frames = ioc->hba_queue_depth + 32;
  2002. /* number of replies frames can't be a multiple of 16 */
  2003. /* decrease number of reply frames by 1 */
  2004. if (!(num_of_reply_frames % 16))
  2005. num_of_reply_frames--;
  2006. /* calculate number of reply free queue entries
  2007. * (must be multiple of 16)
  2008. */
  2009. /* (we know reply_free_queue_depth is not a multiple of 16) */
  2010. queue_size = num_of_reply_frames;
  2011. queue_size += 16 - (queue_size % 16);
  2012. ioc->reply_free_queue_depth = queue_size;
  2013. /* reply descriptor post queue sizing */
  2014. /* this size should be the number of request frames + number of reply
  2015. * frames
  2016. */
  2017. queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
  2018. /* round up to 16 byte boundary */
  2019. if (queue_size % 16)
  2020. queue_size += 16 - (queue_size % 16);
  2021. /* check against IOC maximum reply post queue depth */
  2022. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  2023. queue_diff = queue_size -
  2024. facts->MaxReplyDescriptorPostQueueDepth;
  2025. /* round queue_diff up to multiple of 16 */
  2026. if (queue_diff % 16)
  2027. queue_diff += 16 - (queue_diff % 16);
  2028. /* adjust hba_queue_depth, reply_free_queue_depth,
  2029. * and queue_size
  2030. */
  2031. ioc->hba_queue_depth -= (queue_diff / 2);
  2032. ioc->reply_free_queue_depth -= (queue_diff / 2);
  2033. queue_size = facts->MaxReplyDescriptorPostQueueDepth;
  2034. }
  2035. ioc->reply_post_queue_depth = queue_size;
  2036. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  2037. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  2038. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  2039. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  2040. ioc->chains_needed_per_io));
  2041. ioc->scsiio_depth = ioc->hba_queue_depth -
  2042. ioc->hi_priority_depth - ioc->internal_depth;
  2043. /* set the scsi host can_queue depth
  2044. * with some internal commands that could be outstanding
  2045. */
  2046. ioc->shost->can_queue = ioc->scsiio_depth - (2);
  2047. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  2048. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  2049. /* contiguous pool for request and chains, 16 byte align, one extra "
  2050. * "frame for smid=0
  2051. */
  2052. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  2053. sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
  2054. /* hi-priority queue */
  2055. sz += (ioc->hi_priority_depth * ioc->request_sz);
  2056. /* internal queue */
  2057. sz += (ioc->internal_depth * ioc->request_sz);
  2058. ioc->request_dma_sz = sz;
  2059. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  2060. if (!ioc->request) {
  2061. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2062. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2063. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  2064. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2065. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  2066. goto out;
  2067. retry_sz += 64;
  2068. ioc->hba_queue_depth = max_request_credit - retry_sz;
  2069. goto retry_allocation;
  2070. }
  2071. if (retry_sz)
  2072. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2073. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2074. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  2075. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2076. /* hi-priority queue */
  2077. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  2078. ioc->request_sz);
  2079. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  2080. ioc->request_sz);
  2081. /* internal queue */
  2082. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  2083. ioc->request_sz);
  2084. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  2085. ioc->request_sz);
  2086. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  2087. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2088. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  2089. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  2090. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  2091. ioc->name, (unsigned long long) ioc->request_dma));
  2092. total_sz += sz;
  2093. sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
  2094. ioc->scsi_lookup_pages = get_order(sz);
  2095. ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
  2096. GFP_KERNEL, ioc->scsi_lookup_pages);
  2097. if (!ioc->scsi_lookup) {
  2098. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  2099. "sz(%d)\n", ioc->name, (int)sz);
  2100. goto out;
  2101. }
  2102. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  2103. "depth(%d)\n", ioc->name, ioc->request,
  2104. ioc->scsiio_depth));
  2105. /* loop till the allocation succeeds */
  2106. do {
  2107. sz = ioc->chain_depth * sizeof(struct chain_tracker);
  2108. ioc->chain_pages = get_order(sz);
  2109. ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
  2110. GFP_KERNEL, ioc->chain_pages);
  2111. if (ioc->chain_lookup == NULL)
  2112. ioc->chain_depth -= 100;
  2113. } while (ioc->chain_lookup == NULL);
  2114. ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
  2115. ioc->request_sz, 16, 0);
  2116. if (!ioc->chain_dma_pool) {
  2117. printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
  2118. "failed\n", ioc->name);
  2119. goto out;
  2120. }
  2121. for (i = 0; i < ioc->chain_depth; i++) {
  2122. ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
  2123. ioc->chain_dma_pool , GFP_KERNEL,
  2124. &ioc->chain_lookup[i].chain_buffer_dma);
  2125. if (!ioc->chain_lookup[i].chain_buffer) {
  2126. ioc->chain_depth = i;
  2127. goto chain_done;
  2128. }
  2129. total_sz += ioc->request_sz;
  2130. }
  2131. chain_done:
  2132. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
  2133. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2134. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  2135. ioc->request_sz))/1024));
  2136. /* initialize hi-priority queue smid's */
  2137. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2138. sizeof(struct request_tracker), GFP_KERNEL);
  2139. if (!ioc->hpr_lookup) {
  2140. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2141. ioc->name);
  2142. goto out;
  2143. }
  2144. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2145. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2146. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2147. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2148. /* initialize internal queue smid's */
  2149. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2150. sizeof(struct request_tracker), GFP_KERNEL);
  2151. if (!ioc->internal_lookup) {
  2152. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2153. ioc->name);
  2154. goto out;
  2155. }
  2156. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2157. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2158. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2159. ioc->internal_depth, ioc->internal_smid));
  2160. /* sense buffers, 4 byte align */
  2161. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2162. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2163. 0);
  2164. if (!ioc->sense_dma_pool) {
  2165. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2166. ioc->name);
  2167. goto out;
  2168. }
  2169. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2170. &ioc->sense_dma);
  2171. if (!ioc->sense) {
  2172. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2173. ioc->name);
  2174. goto out;
  2175. }
  2176. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2177. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2178. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2179. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2180. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2181. ioc->name, (unsigned long long)ioc->sense_dma));
  2182. total_sz += sz;
  2183. /* reply pool, 4 byte align */
  2184. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2185. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2186. 0);
  2187. if (!ioc->reply_dma_pool) {
  2188. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2189. ioc->name);
  2190. goto out;
  2191. }
  2192. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2193. &ioc->reply_dma);
  2194. if (!ioc->reply) {
  2195. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2196. ioc->name);
  2197. goto out;
  2198. }
  2199. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2200. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2201. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2202. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2203. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2204. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2205. ioc->name, (unsigned long long)ioc->reply_dma));
  2206. total_sz += sz;
  2207. /* reply free queue, 16 byte align */
  2208. sz = ioc->reply_free_queue_depth * 4;
  2209. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2210. ioc->pdev, sz, 16, 0);
  2211. if (!ioc->reply_free_dma_pool) {
  2212. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2213. "failed\n", ioc->name);
  2214. goto out;
  2215. }
  2216. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2217. &ioc->reply_free_dma);
  2218. if (!ioc->reply_free) {
  2219. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2220. "failed\n", ioc->name);
  2221. goto out;
  2222. }
  2223. memset(ioc->reply_free, 0, sz);
  2224. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2225. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2226. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2227. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2228. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2229. total_sz += sz;
  2230. /* reply post queue, 16 byte align */
  2231. sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
  2232. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2233. ioc->pdev, sz, 16, 0);
  2234. if (!ioc->reply_post_free_dma_pool) {
  2235. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2236. "failed\n", ioc->name);
  2237. goto out;
  2238. }
  2239. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2240. GFP_KERNEL, &ioc->reply_post_free_dma);
  2241. if (!ioc->reply_post_free) {
  2242. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2243. "failed\n", ioc->name);
  2244. goto out;
  2245. }
  2246. memset(ioc->reply_post_free, 0, sz);
  2247. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2248. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2249. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2250. sz/1024));
  2251. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2252. "(0x%llx)\n", ioc->name, (unsigned long long)
  2253. ioc->reply_post_free_dma));
  2254. total_sz += sz;
  2255. ioc->config_page_sz = 512;
  2256. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2257. ioc->config_page_sz, &ioc->config_page_dma);
  2258. if (!ioc->config_page) {
  2259. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2260. "failed\n", ioc->name);
  2261. goto out;
  2262. }
  2263. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2264. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2265. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2266. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2267. total_sz += ioc->config_page_sz;
  2268. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2269. ioc->name, total_sz/1024);
  2270. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2271. "Max Controller Queue Depth(%d)\n",
  2272. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2273. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2274. ioc->name, ioc->shost->sg_tablesize);
  2275. return 0;
  2276. out:
  2277. return -ENOMEM;
  2278. }
  2279. /**
  2280. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2281. * @ioc: Pointer to MPT_ADAPTER structure
  2282. * @cooked: Request raw or cooked IOC state
  2283. *
  2284. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2285. * Doorbell bits in MPI_IOC_STATE_MASK.
  2286. */
  2287. u32
  2288. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2289. {
  2290. u32 s, sc;
  2291. s = readl(&ioc->chip->Doorbell);
  2292. sc = s & MPI2_IOC_STATE_MASK;
  2293. return cooked ? sc : s;
  2294. }
  2295. /**
  2296. * _base_wait_on_iocstate - waiting on a particular ioc state
  2297. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2298. * @timeout: timeout in second
  2299. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2300. *
  2301. * Returns 0 for success, non-zero for failure.
  2302. */
  2303. static int
  2304. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2305. int sleep_flag)
  2306. {
  2307. u32 count, cntdn;
  2308. u32 current_state;
  2309. count = 0;
  2310. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2311. do {
  2312. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2313. if (current_state == ioc_state)
  2314. return 0;
  2315. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2316. break;
  2317. if (sleep_flag == CAN_SLEEP)
  2318. msleep(1);
  2319. else
  2320. udelay(500);
  2321. count++;
  2322. } while (--cntdn);
  2323. return current_state;
  2324. }
  2325. /**
  2326. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2327. * a write to the doorbell)
  2328. * @ioc: per adapter object
  2329. * @timeout: timeout in second
  2330. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2331. *
  2332. * Returns 0 for success, non-zero for failure.
  2333. *
  2334. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2335. */
  2336. static int
  2337. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2338. int sleep_flag)
  2339. {
  2340. u32 cntdn, count;
  2341. u32 int_status;
  2342. count = 0;
  2343. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2344. do {
  2345. int_status = readl(&ioc->chip->HostInterruptStatus);
  2346. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2347. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2348. "successful count(%d), timeout(%d)\n", ioc->name,
  2349. __func__, count, timeout));
  2350. return 0;
  2351. }
  2352. if (sleep_flag == CAN_SLEEP)
  2353. msleep(1);
  2354. else
  2355. udelay(500);
  2356. count++;
  2357. } while (--cntdn);
  2358. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2359. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2360. return -EFAULT;
  2361. }
  2362. /**
  2363. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2364. * @ioc: per adapter object
  2365. * @timeout: timeout in second
  2366. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2367. *
  2368. * Returns 0 for success, non-zero for failure.
  2369. *
  2370. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2371. * doorbell.
  2372. */
  2373. static int
  2374. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2375. int sleep_flag)
  2376. {
  2377. u32 cntdn, count;
  2378. u32 int_status;
  2379. u32 doorbell;
  2380. count = 0;
  2381. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2382. do {
  2383. int_status = readl(&ioc->chip->HostInterruptStatus);
  2384. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2385. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2386. "successful count(%d), timeout(%d)\n", ioc->name,
  2387. __func__, count, timeout));
  2388. return 0;
  2389. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2390. doorbell = readl(&ioc->chip->Doorbell);
  2391. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2392. MPI2_IOC_STATE_FAULT) {
  2393. mpt2sas_base_fault_info(ioc , doorbell);
  2394. return -EFAULT;
  2395. }
  2396. } else if (int_status == 0xFFFFFFFF)
  2397. goto out;
  2398. if (sleep_flag == CAN_SLEEP)
  2399. msleep(1);
  2400. else
  2401. udelay(500);
  2402. count++;
  2403. } while (--cntdn);
  2404. out:
  2405. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2406. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2407. return -EFAULT;
  2408. }
  2409. /**
  2410. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2411. * @ioc: per adapter object
  2412. * @timeout: timeout in second
  2413. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2414. *
  2415. * Returns 0 for success, non-zero for failure.
  2416. *
  2417. */
  2418. static int
  2419. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2420. int sleep_flag)
  2421. {
  2422. u32 cntdn, count;
  2423. u32 doorbell_reg;
  2424. count = 0;
  2425. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2426. do {
  2427. doorbell_reg = readl(&ioc->chip->Doorbell);
  2428. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2429. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2430. "successful count(%d), timeout(%d)\n", ioc->name,
  2431. __func__, count, timeout));
  2432. return 0;
  2433. }
  2434. if (sleep_flag == CAN_SLEEP)
  2435. msleep(1);
  2436. else
  2437. udelay(500);
  2438. count++;
  2439. } while (--cntdn);
  2440. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2441. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2442. return -EFAULT;
  2443. }
  2444. /**
  2445. * _base_send_ioc_reset - send doorbell reset
  2446. * @ioc: per adapter object
  2447. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2448. * @timeout: timeout in second
  2449. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2450. *
  2451. * Returns 0 for success, non-zero for failure.
  2452. */
  2453. static int
  2454. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2455. int sleep_flag)
  2456. {
  2457. u32 ioc_state;
  2458. int r = 0;
  2459. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2460. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2461. ioc->name, __func__);
  2462. return -EFAULT;
  2463. }
  2464. if (!(ioc->facts.IOCCapabilities &
  2465. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2466. return -EFAULT;
  2467. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2468. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2469. &ioc->chip->Doorbell);
  2470. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2471. r = -EFAULT;
  2472. goto out;
  2473. }
  2474. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2475. timeout, sleep_flag);
  2476. if (ioc_state) {
  2477. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2478. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2479. r = -EFAULT;
  2480. goto out;
  2481. }
  2482. out:
  2483. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2484. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2485. return r;
  2486. }
  2487. /**
  2488. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2489. * @ioc: per adapter object
  2490. * @request_bytes: request length
  2491. * @request: pointer having request payload
  2492. * @reply_bytes: reply length
  2493. * @reply: pointer to reply payload
  2494. * @timeout: timeout in second
  2495. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2496. *
  2497. * Returns 0 for success, non-zero for failure.
  2498. */
  2499. static int
  2500. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2501. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2502. {
  2503. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2504. int i;
  2505. u8 failed;
  2506. u16 dummy;
  2507. __le32 *mfp;
  2508. /* make sure doorbell is not in use */
  2509. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2510. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2511. " (line=%d)\n", ioc->name, __LINE__);
  2512. return -EFAULT;
  2513. }
  2514. /* clear pending doorbell interrupts from previous state changes */
  2515. if (readl(&ioc->chip->HostInterruptStatus) &
  2516. MPI2_HIS_IOC2SYS_DB_STATUS)
  2517. writel(0, &ioc->chip->HostInterruptStatus);
  2518. /* send message to ioc */
  2519. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2520. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2521. &ioc->chip->Doorbell);
  2522. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2523. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2524. "int failed (line=%d)\n", ioc->name, __LINE__);
  2525. return -EFAULT;
  2526. }
  2527. writel(0, &ioc->chip->HostInterruptStatus);
  2528. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2529. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2530. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2531. return -EFAULT;
  2532. }
  2533. /* send message 32-bits at a time */
  2534. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2535. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2536. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2537. failed = 1;
  2538. }
  2539. if (failed) {
  2540. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2541. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2542. return -EFAULT;
  2543. }
  2544. /* now wait for the reply */
  2545. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2546. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2547. "int failed (line=%d)\n", ioc->name, __LINE__);
  2548. return -EFAULT;
  2549. }
  2550. /* read the first two 16-bits, it gives the total length of the reply */
  2551. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2552. & MPI2_DOORBELL_DATA_MASK);
  2553. writel(0, &ioc->chip->HostInterruptStatus);
  2554. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2555. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2556. "int failed (line=%d)\n", ioc->name, __LINE__);
  2557. return -EFAULT;
  2558. }
  2559. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2560. & MPI2_DOORBELL_DATA_MASK);
  2561. writel(0, &ioc->chip->HostInterruptStatus);
  2562. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2563. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2564. printk(MPT2SAS_ERR_FMT "doorbell "
  2565. "handshake int failed (line=%d)\n", ioc->name,
  2566. __LINE__);
  2567. return -EFAULT;
  2568. }
  2569. if (i >= reply_bytes/2) /* overflow case */
  2570. dummy = readl(&ioc->chip->Doorbell);
  2571. else
  2572. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2573. & MPI2_DOORBELL_DATA_MASK);
  2574. writel(0, &ioc->chip->HostInterruptStatus);
  2575. }
  2576. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2577. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2578. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2579. " (line=%d)\n", ioc->name, __LINE__));
  2580. }
  2581. writel(0, &ioc->chip->HostInterruptStatus);
  2582. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2583. mfp = (__le32 *)reply;
  2584. printk(KERN_INFO "\toffset:data\n");
  2585. for (i = 0; i < reply_bytes/4; i++)
  2586. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2587. le32_to_cpu(mfp[i]));
  2588. }
  2589. return 0;
  2590. }
  2591. /**
  2592. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2593. * @ioc: per adapter object
  2594. * @mpi_reply: the reply payload from FW
  2595. * @mpi_request: the request payload sent to FW
  2596. *
  2597. * The SAS IO Unit Control Request message allows the host to perform low-level
  2598. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2599. * to obtain the IOC assigned device handles for a device if it has other
  2600. * identifying information about the device, in addition allows the host to
  2601. * remove IOC resources associated with the device.
  2602. *
  2603. * Returns 0 for success, non-zero for failure.
  2604. */
  2605. int
  2606. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2607. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2608. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2609. {
  2610. u16 smid;
  2611. u32 ioc_state;
  2612. unsigned long timeleft;
  2613. u8 issue_reset;
  2614. int rc;
  2615. void *request;
  2616. u16 wait_state_count;
  2617. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2618. __func__));
  2619. mutex_lock(&ioc->base_cmds.mutex);
  2620. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2621. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2622. ioc->name, __func__);
  2623. rc = -EAGAIN;
  2624. goto out;
  2625. }
  2626. wait_state_count = 0;
  2627. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2628. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2629. if (wait_state_count++ == 10) {
  2630. printk(MPT2SAS_ERR_FMT
  2631. "%s: failed due to ioc not operational\n",
  2632. ioc->name, __func__);
  2633. rc = -EFAULT;
  2634. goto out;
  2635. }
  2636. ssleep(1);
  2637. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2638. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2639. "operational state(count=%d)\n", ioc->name,
  2640. __func__, wait_state_count);
  2641. }
  2642. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2643. if (!smid) {
  2644. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2645. ioc->name, __func__);
  2646. rc = -EAGAIN;
  2647. goto out;
  2648. }
  2649. rc = 0;
  2650. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2651. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2652. ioc->base_cmds.smid = smid;
  2653. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2654. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2655. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2656. ioc->ioc_link_reset_in_progress = 1;
  2657. mpt2sas_base_put_smid_default(ioc, smid);
  2658. init_completion(&ioc->base_cmds.done);
  2659. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2660. msecs_to_jiffies(10000));
  2661. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2662. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2663. ioc->ioc_link_reset_in_progress)
  2664. ioc->ioc_link_reset_in_progress = 0;
  2665. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2666. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2667. ioc->name, __func__);
  2668. _debug_dump_mf(mpi_request,
  2669. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2670. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2671. issue_reset = 1;
  2672. goto issue_host_reset;
  2673. }
  2674. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2675. memcpy(mpi_reply, ioc->base_cmds.reply,
  2676. sizeof(Mpi2SasIoUnitControlReply_t));
  2677. else
  2678. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2679. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2680. goto out;
  2681. issue_host_reset:
  2682. if (issue_reset)
  2683. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2684. FORCE_BIG_HAMMER);
  2685. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2686. rc = -EFAULT;
  2687. out:
  2688. mutex_unlock(&ioc->base_cmds.mutex);
  2689. return rc;
  2690. }
  2691. /**
  2692. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2693. * @ioc: per adapter object
  2694. * @mpi_reply: the reply payload from FW
  2695. * @mpi_request: the request payload sent to FW
  2696. *
  2697. * The SCSI Enclosure Processor request message causes the IOC to
  2698. * communicate with SES devices to control LED status signals.
  2699. *
  2700. * Returns 0 for success, non-zero for failure.
  2701. */
  2702. int
  2703. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2704. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2705. {
  2706. u16 smid;
  2707. u32 ioc_state;
  2708. unsigned long timeleft;
  2709. u8 issue_reset;
  2710. int rc;
  2711. void *request;
  2712. u16 wait_state_count;
  2713. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2714. __func__));
  2715. mutex_lock(&ioc->base_cmds.mutex);
  2716. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2717. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2718. ioc->name, __func__);
  2719. rc = -EAGAIN;
  2720. goto out;
  2721. }
  2722. wait_state_count = 0;
  2723. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2724. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2725. if (wait_state_count++ == 10) {
  2726. printk(MPT2SAS_ERR_FMT
  2727. "%s: failed due to ioc not operational\n",
  2728. ioc->name, __func__);
  2729. rc = -EFAULT;
  2730. goto out;
  2731. }
  2732. ssleep(1);
  2733. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2734. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2735. "operational state(count=%d)\n", ioc->name,
  2736. __func__, wait_state_count);
  2737. }
  2738. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2739. if (!smid) {
  2740. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2741. ioc->name, __func__);
  2742. rc = -EAGAIN;
  2743. goto out;
  2744. }
  2745. rc = 0;
  2746. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2747. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2748. ioc->base_cmds.smid = smid;
  2749. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2750. mpt2sas_base_put_smid_default(ioc, smid);
  2751. init_completion(&ioc->base_cmds.done);
  2752. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2753. msecs_to_jiffies(10000));
  2754. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2755. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2756. ioc->name, __func__);
  2757. _debug_dump_mf(mpi_request,
  2758. sizeof(Mpi2SepRequest_t)/4);
  2759. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2760. issue_reset = 1;
  2761. goto issue_host_reset;
  2762. }
  2763. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2764. memcpy(mpi_reply, ioc->base_cmds.reply,
  2765. sizeof(Mpi2SepReply_t));
  2766. else
  2767. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2768. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2769. goto out;
  2770. issue_host_reset:
  2771. if (issue_reset)
  2772. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2773. FORCE_BIG_HAMMER);
  2774. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2775. rc = -EFAULT;
  2776. out:
  2777. mutex_unlock(&ioc->base_cmds.mutex);
  2778. return rc;
  2779. }
  2780. /**
  2781. * _base_get_port_facts - obtain port facts reply and save in ioc
  2782. * @ioc: per adapter object
  2783. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2784. *
  2785. * Returns 0 for success, non-zero for failure.
  2786. */
  2787. static int
  2788. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2789. {
  2790. Mpi2PortFactsRequest_t mpi_request;
  2791. Mpi2PortFactsReply_t mpi_reply;
  2792. struct mpt2sas_port_facts *pfacts;
  2793. int mpi_reply_sz, mpi_request_sz, r;
  2794. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2795. __func__));
  2796. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2797. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2798. memset(&mpi_request, 0, mpi_request_sz);
  2799. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2800. mpi_request.PortNumber = port;
  2801. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2802. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2803. if (r != 0) {
  2804. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2805. ioc->name, __func__, r);
  2806. return r;
  2807. }
  2808. pfacts = &ioc->pfacts[port];
  2809. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  2810. pfacts->PortNumber = mpi_reply.PortNumber;
  2811. pfacts->VP_ID = mpi_reply.VP_ID;
  2812. pfacts->VF_ID = mpi_reply.VF_ID;
  2813. pfacts->MaxPostedCmdBuffers =
  2814. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  2815. return 0;
  2816. }
  2817. /**
  2818. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  2819. * @ioc: per adapter object
  2820. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2821. *
  2822. * Returns 0 for success, non-zero for failure.
  2823. */
  2824. static int
  2825. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2826. {
  2827. Mpi2IOCFactsRequest_t mpi_request;
  2828. Mpi2IOCFactsReply_t mpi_reply;
  2829. struct mpt2sas_facts *facts;
  2830. int mpi_reply_sz, mpi_request_sz, r;
  2831. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2832. __func__));
  2833. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  2834. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  2835. memset(&mpi_request, 0, mpi_request_sz);
  2836. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  2837. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2838. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2839. if (r != 0) {
  2840. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2841. ioc->name, __func__, r);
  2842. return r;
  2843. }
  2844. facts = &ioc->facts;
  2845. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  2846. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  2847. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  2848. facts->VP_ID = mpi_reply.VP_ID;
  2849. facts->VF_ID = mpi_reply.VF_ID;
  2850. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  2851. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  2852. facts->WhoInit = mpi_reply.WhoInit;
  2853. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  2854. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  2855. facts->MaxReplyDescriptorPostQueueDepth =
  2856. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  2857. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  2858. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  2859. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  2860. ioc->ir_firmware = 1;
  2861. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  2862. facts->IOCRequestFrameSize =
  2863. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  2864. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  2865. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  2866. ioc->shost->max_id = -1;
  2867. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  2868. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  2869. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  2870. facts->HighPriorityCredit =
  2871. le16_to_cpu(mpi_reply.HighPriorityCredit);
  2872. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  2873. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  2874. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  2875. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  2876. facts->MaxChainDepth));
  2877. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  2878. "reply frame size(%d)\n", ioc->name,
  2879. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  2880. return 0;
  2881. }
  2882. /**
  2883. * _base_send_ioc_init - send ioc_init to firmware
  2884. * @ioc: per adapter object
  2885. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2886. *
  2887. * Returns 0 for success, non-zero for failure.
  2888. */
  2889. static int
  2890. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2891. {
  2892. Mpi2IOCInitRequest_t mpi_request;
  2893. Mpi2IOCInitReply_t mpi_reply;
  2894. int r;
  2895. struct timeval current_time;
  2896. u16 ioc_status;
  2897. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2898. __func__));
  2899. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  2900. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  2901. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  2902. mpi_request.VF_ID = 0; /* TODO */
  2903. mpi_request.VP_ID = 0;
  2904. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  2905. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  2906. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  2907. mpi_request.ReplyDescriptorPostQueueDepth =
  2908. cpu_to_le16(ioc->reply_post_queue_depth);
  2909. mpi_request.ReplyFreeQueueDepth =
  2910. cpu_to_le16(ioc->reply_free_queue_depth);
  2911. mpi_request.SenseBufferAddressHigh =
  2912. cpu_to_le32((u64)ioc->sense_dma >> 32);
  2913. mpi_request.SystemReplyAddressHigh =
  2914. cpu_to_le32((u64)ioc->reply_dma >> 32);
  2915. mpi_request.SystemRequestFrameBaseAddress =
  2916. cpu_to_le64((u64)ioc->request_dma);
  2917. mpi_request.ReplyFreeQueueAddress =
  2918. cpu_to_le64((u64)ioc->reply_free_dma);
  2919. mpi_request.ReplyDescriptorPostQueueAddress =
  2920. cpu_to_le64((u64)ioc->reply_post_free_dma);
  2921. /* This time stamp specifies number of milliseconds
  2922. * since epoch ~ midnight January 1, 1970.
  2923. */
  2924. do_gettimeofday(&current_time);
  2925. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  2926. (current_time.tv_usec / 1000));
  2927. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2928. __le32 *mfp;
  2929. int i;
  2930. mfp = (__le32 *)&mpi_request;
  2931. printk(KERN_INFO "\toffset:data\n");
  2932. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  2933. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2934. le32_to_cpu(mfp[i]));
  2935. }
  2936. r = _base_handshake_req_reply_wait(ioc,
  2937. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  2938. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  2939. sleep_flag);
  2940. if (r != 0) {
  2941. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2942. ioc->name, __func__, r);
  2943. return r;
  2944. }
  2945. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  2946. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  2947. mpi_reply.IOCLogInfo) {
  2948. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  2949. r = -EIO;
  2950. }
  2951. return 0;
  2952. }
  2953. /**
  2954. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  2955. * @ioc: per adapter object
  2956. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2957. *
  2958. * Returns 0 for success, non-zero for failure.
  2959. */
  2960. static int
  2961. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2962. {
  2963. Mpi2PortEnableRequest_t *mpi_request;
  2964. u32 ioc_state;
  2965. unsigned long timeleft;
  2966. int r = 0;
  2967. u16 smid;
  2968. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  2969. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2970. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2971. ioc->name, __func__);
  2972. return -EAGAIN;
  2973. }
  2974. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2975. if (!smid) {
  2976. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2977. ioc->name, __func__);
  2978. return -EAGAIN;
  2979. }
  2980. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2981. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2982. ioc->base_cmds.smid = smid;
  2983. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  2984. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  2985. mpi_request->VF_ID = 0; /* TODO */
  2986. mpi_request->VP_ID = 0;
  2987. mpt2sas_base_put_smid_default(ioc, smid);
  2988. init_completion(&ioc->base_cmds.done);
  2989. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2990. 300*HZ);
  2991. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2992. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2993. ioc->name, __func__);
  2994. _debug_dump_mf(mpi_request,
  2995. sizeof(Mpi2PortEnableRequest_t)/4);
  2996. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2997. r = -EFAULT;
  2998. else
  2999. r = -ETIME;
  3000. goto out;
  3001. } else
  3002. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3003. ioc->name, __func__));
  3004. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
  3005. 60, sleep_flag);
  3006. if (ioc_state) {
  3007. printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
  3008. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3009. r = -EFAULT;
  3010. }
  3011. out:
  3012. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3013. printk(MPT2SAS_INFO_FMT "port enable: %s\n",
  3014. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  3015. return r;
  3016. }
  3017. /**
  3018. * _base_unmask_events - turn on notification for this event
  3019. * @ioc: per adapter object
  3020. * @event: firmware event
  3021. *
  3022. * The mask is stored in ioc->event_masks.
  3023. */
  3024. static void
  3025. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  3026. {
  3027. u32 desired_event;
  3028. if (event >= 128)
  3029. return;
  3030. desired_event = (1 << (event % 32));
  3031. if (event < 32)
  3032. ioc->event_masks[0] &= ~desired_event;
  3033. else if (event < 64)
  3034. ioc->event_masks[1] &= ~desired_event;
  3035. else if (event < 96)
  3036. ioc->event_masks[2] &= ~desired_event;
  3037. else if (event < 128)
  3038. ioc->event_masks[3] &= ~desired_event;
  3039. }
  3040. /**
  3041. * _base_event_notification - send event notification
  3042. * @ioc: per adapter object
  3043. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3044. *
  3045. * Returns 0 for success, non-zero for failure.
  3046. */
  3047. static int
  3048. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3049. {
  3050. Mpi2EventNotificationRequest_t *mpi_request;
  3051. unsigned long timeleft;
  3052. u16 smid;
  3053. int r = 0;
  3054. int i;
  3055. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3056. __func__));
  3057. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3058. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3059. ioc->name, __func__);
  3060. return -EAGAIN;
  3061. }
  3062. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  3063. if (!smid) {
  3064. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3065. ioc->name, __func__);
  3066. return -EAGAIN;
  3067. }
  3068. ioc->base_cmds.status = MPT2_CMD_PENDING;
  3069. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3070. ioc->base_cmds.smid = smid;
  3071. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  3072. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  3073. mpi_request->VF_ID = 0; /* TODO */
  3074. mpi_request->VP_ID = 0;
  3075. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3076. mpi_request->EventMasks[i] =
  3077. cpu_to_le32(ioc->event_masks[i]);
  3078. mpt2sas_base_put_smid_default(ioc, smid);
  3079. init_completion(&ioc->base_cmds.done);
  3080. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  3081. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3082. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3083. ioc->name, __func__);
  3084. _debug_dump_mf(mpi_request,
  3085. sizeof(Mpi2EventNotificationRequest_t)/4);
  3086. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  3087. r = -EFAULT;
  3088. else
  3089. r = -ETIME;
  3090. } else
  3091. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3092. ioc->name, __func__));
  3093. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3094. return r;
  3095. }
  3096. /**
  3097. * mpt2sas_base_validate_event_type - validating event types
  3098. * @ioc: per adapter object
  3099. * @event: firmware event
  3100. *
  3101. * This will turn on firmware event notification when application
  3102. * ask for that event. We don't mask events that are already enabled.
  3103. */
  3104. void
  3105. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  3106. {
  3107. int i, j;
  3108. u32 event_mask, desired_event;
  3109. u8 send_update_to_fw;
  3110. for (i = 0, send_update_to_fw = 0; i <
  3111. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  3112. event_mask = ~event_type[i];
  3113. desired_event = 1;
  3114. for (j = 0; j < 32; j++) {
  3115. if (!(event_mask & desired_event) &&
  3116. (ioc->event_masks[i] & desired_event)) {
  3117. ioc->event_masks[i] &= ~desired_event;
  3118. send_update_to_fw = 1;
  3119. }
  3120. desired_event = (desired_event << 1);
  3121. }
  3122. }
  3123. if (!send_update_to_fw)
  3124. return;
  3125. mutex_lock(&ioc->base_cmds.mutex);
  3126. _base_event_notification(ioc, CAN_SLEEP);
  3127. mutex_unlock(&ioc->base_cmds.mutex);
  3128. }
  3129. /**
  3130. * _base_diag_reset - the "big hammer" start of day reset
  3131. * @ioc: per adapter object
  3132. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3133. *
  3134. * Returns 0 for success, non-zero for failure.
  3135. */
  3136. static int
  3137. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3138. {
  3139. u32 host_diagnostic;
  3140. u32 ioc_state;
  3141. u32 count;
  3142. u32 hcb_size;
  3143. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3144. _base_save_msix_table(ioc);
  3145. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3146. ioc->name));
  3147. count = 0;
  3148. do {
  3149. /* Write magic sequence to WriteSequence register
  3150. * Loop until in diagnostic mode
  3151. */
  3152. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3153. "sequence\n", ioc->name));
  3154. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3155. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3156. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3157. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3158. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3159. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3160. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3161. /* wait 100 msec */
  3162. if (sleep_flag == CAN_SLEEP)
  3163. msleep(100);
  3164. else
  3165. mdelay(100);
  3166. if (count++ > 20)
  3167. goto out;
  3168. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3169. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3170. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3171. ioc->name, count, host_diagnostic));
  3172. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3173. hcb_size = readl(&ioc->chip->HCBSize);
  3174. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3175. ioc->name));
  3176. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3177. &ioc->chip->HostDiagnostic);
  3178. /* don't access any registers for 50 milliseconds */
  3179. msleep(50);
  3180. /* 300 second max wait */
  3181. for (count = 0; count < 3000000 ; count++) {
  3182. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3183. if (host_diagnostic == 0xFFFFFFFF)
  3184. goto out;
  3185. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3186. break;
  3187. /* wait 100 msec */
  3188. if (sleep_flag == CAN_SLEEP)
  3189. msleep(1);
  3190. else
  3191. mdelay(1);
  3192. }
  3193. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3194. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3195. "assuming the HCB Address points to good F/W\n",
  3196. ioc->name));
  3197. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3198. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3199. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3200. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3201. "re-enable the HCDW\n", ioc->name));
  3202. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3203. &ioc->chip->HCBSize);
  3204. }
  3205. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3206. ioc->name));
  3207. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3208. &ioc->chip->HostDiagnostic);
  3209. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3210. "diagnostic register\n", ioc->name));
  3211. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3212. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3213. "READY state\n", ioc->name));
  3214. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3215. sleep_flag);
  3216. if (ioc_state) {
  3217. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3218. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3219. goto out;
  3220. }
  3221. _base_restore_msix_table(ioc);
  3222. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3223. return 0;
  3224. out:
  3225. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3226. return -EFAULT;
  3227. }
  3228. /**
  3229. * _base_make_ioc_ready - put controller in READY state
  3230. * @ioc: per adapter object
  3231. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3232. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3233. *
  3234. * Returns 0 for success, non-zero for failure.
  3235. */
  3236. static int
  3237. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3238. enum reset_type type)
  3239. {
  3240. u32 ioc_state;
  3241. int rc;
  3242. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3243. __func__));
  3244. if (ioc->pci_error_recovery)
  3245. return 0;
  3246. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3247. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3248. ioc->name, __func__, ioc_state));
  3249. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3250. return 0;
  3251. if (ioc_state & MPI2_DOORBELL_USED) {
  3252. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3253. "active!\n", ioc->name));
  3254. goto issue_diag_reset;
  3255. }
  3256. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3257. mpt2sas_base_fault_info(ioc, ioc_state &
  3258. MPI2_DOORBELL_DATA_MASK);
  3259. goto issue_diag_reset;
  3260. }
  3261. if (type == FORCE_BIG_HAMMER)
  3262. goto issue_diag_reset;
  3263. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3264. if (!(_base_send_ioc_reset(ioc,
  3265. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3266. ioc->ioc_reset_count++;
  3267. return 0;
  3268. }
  3269. issue_diag_reset:
  3270. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3271. ioc->ioc_reset_count++;
  3272. return rc;
  3273. }
  3274. /**
  3275. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3276. * @ioc: per adapter object
  3277. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3278. *
  3279. * Returns 0 for success, non-zero for failure.
  3280. */
  3281. static int
  3282. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3283. {
  3284. int r, i;
  3285. unsigned long flags;
  3286. u32 reply_address;
  3287. u16 smid;
  3288. struct _tr_list *delayed_tr, *delayed_tr_next;
  3289. u8 hide_flag;
  3290. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3291. __func__));
  3292. /* clean the delayed target reset list */
  3293. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3294. &ioc->delayed_tr_list, list) {
  3295. list_del(&delayed_tr->list);
  3296. kfree(delayed_tr);
  3297. }
  3298. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3299. &ioc->delayed_tr_volume_list, list) {
  3300. list_del(&delayed_tr->list);
  3301. kfree(delayed_tr);
  3302. }
  3303. /* initialize the scsi lookup free list */
  3304. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3305. INIT_LIST_HEAD(&ioc->free_list);
  3306. smid = 1;
  3307. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3308. INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
  3309. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3310. ioc->scsi_lookup[i].smid = smid;
  3311. ioc->scsi_lookup[i].scmd = NULL;
  3312. ioc->scsi_lookup[i].direct_io = 0;
  3313. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3314. &ioc->free_list);
  3315. }
  3316. /* hi-priority queue */
  3317. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3318. smid = ioc->hi_priority_smid;
  3319. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3320. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3321. ioc->hpr_lookup[i].smid = smid;
  3322. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3323. &ioc->hpr_free_list);
  3324. }
  3325. /* internal queue */
  3326. INIT_LIST_HEAD(&ioc->internal_free_list);
  3327. smid = ioc->internal_smid;
  3328. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3329. ioc->internal_lookup[i].cb_idx = 0xFF;
  3330. ioc->internal_lookup[i].smid = smid;
  3331. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3332. &ioc->internal_free_list);
  3333. }
  3334. /* chain pool */
  3335. INIT_LIST_HEAD(&ioc->free_chain_list);
  3336. for (i = 0; i < ioc->chain_depth; i++)
  3337. list_add_tail(&ioc->chain_lookup[i].tracker_list,
  3338. &ioc->free_chain_list);
  3339. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3340. /* initialize Reply Free Queue */
  3341. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3342. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3343. ioc->reply_sz)
  3344. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3345. /* initialize Reply Post Free Queue */
  3346. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3347. ioc->reply_post_free[i].Words = cpu_to_le64(ULLONG_MAX);
  3348. r = _base_send_ioc_init(ioc, sleep_flag);
  3349. if (r)
  3350. return r;
  3351. /* initialize the index's */
  3352. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3353. ioc->reply_post_host_index = 0;
  3354. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3355. writel(0, &ioc->chip->ReplyPostHostIndex);
  3356. _base_unmask_interrupts(ioc);
  3357. r = _base_event_notification(ioc, sleep_flag);
  3358. if (r)
  3359. return r;
  3360. if (sleep_flag == CAN_SLEEP)
  3361. _base_static_config_pages(ioc);
  3362. if (ioc->wait_for_port_enable_to_complete && ioc->is_warpdrive) {
  3363. if (ioc->manu_pg10.OEMIdentifier == 0x80) {
  3364. hide_flag = (u8) (ioc->manu_pg10.OEMSpecificFlags0 &
  3365. MFG_PAGE10_HIDE_SSDS_MASK);
  3366. if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
  3367. ioc->mfg_pg10_hide_flag = hide_flag;
  3368. }
  3369. }
  3370. if (ioc->wait_for_port_enable_to_complete) {
  3371. if (diag_buffer_enable != 0)
  3372. mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable);
  3373. if (disable_discovery > 0)
  3374. return r;
  3375. }
  3376. r = _base_send_port_enable(ioc, sleep_flag);
  3377. if (r)
  3378. return r;
  3379. return r;
  3380. }
  3381. /**
  3382. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3383. * @ioc: per adapter object
  3384. *
  3385. * Return nothing.
  3386. */
  3387. void
  3388. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3389. {
  3390. struct pci_dev *pdev = ioc->pdev;
  3391. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3392. __func__));
  3393. _base_mask_interrupts(ioc);
  3394. ioc->shost_recovery = 1;
  3395. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3396. ioc->shost_recovery = 0;
  3397. if (ioc->pci_irq) {
  3398. synchronize_irq(pdev->irq);
  3399. free_irq(ioc->pci_irq, ioc);
  3400. }
  3401. _base_disable_msix(ioc);
  3402. if (ioc->chip_phys)
  3403. iounmap(ioc->chip);
  3404. ioc->pci_irq = -1;
  3405. ioc->chip_phys = 0;
  3406. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3407. pci_disable_pcie_error_reporting(pdev);
  3408. pci_disable_device(pdev);
  3409. return;
  3410. }
  3411. /**
  3412. * mpt2sas_base_attach - attach controller instance
  3413. * @ioc: per adapter object
  3414. *
  3415. * Returns 0 for success, non-zero for failure.
  3416. */
  3417. int
  3418. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3419. {
  3420. int r, i;
  3421. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3422. __func__));
  3423. r = mpt2sas_base_map_resources(ioc);
  3424. if (r)
  3425. return r;
  3426. pci_set_drvdata(ioc->pdev, ioc->shost);
  3427. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3428. if (r)
  3429. goto out_free_resources;
  3430. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3431. if (r)
  3432. goto out_free_resources;
  3433. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3434. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  3435. if (!ioc->pfacts) {
  3436. r = -ENOMEM;
  3437. goto out_free_resources;
  3438. }
  3439. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3440. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3441. if (r)
  3442. goto out_free_resources;
  3443. }
  3444. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3445. if (r)
  3446. goto out_free_resources;
  3447. init_waitqueue_head(&ioc->reset_wq);
  3448. /* allocate memory pd handle bitmask list */
  3449. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3450. if (ioc->facts.MaxDevHandle % 8)
  3451. ioc->pd_handles_sz++;
  3452. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3453. GFP_KERNEL);
  3454. if (!ioc->pd_handles) {
  3455. r = -ENOMEM;
  3456. goto out_free_resources;
  3457. }
  3458. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3459. /* base internal command bits */
  3460. mutex_init(&ioc->base_cmds.mutex);
  3461. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3462. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3463. /* transport internal command bits */
  3464. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3465. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3466. mutex_init(&ioc->transport_cmds.mutex);
  3467. /* scsih internal command bits */
  3468. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3469. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3470. mutex_init(&ioc->scsih_cmds.mutex);
  3471. /* task management internal command bits */
  3472. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3473. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3474. mutex_init(&ioc->tm_cmds.mutex);
  3475. /* config page internal command bits */
  3476. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3477. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3478. mutex_init(&ioc->config_cmds.mutex);
  3479. /* ctl module internal command bits */
  3480. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3481. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3482. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3483. mutex_init(&ioc->ctl_cmds.mutex);
  3484. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3485. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3486. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3487. !ioc->ctl_cmds.sense) {
  3488. r = -ENOMEM;
  3489. goto out_free_resources;
  3490. }
  3491. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3492. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3493. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3494. r = -ENOMEM;
  3495. goto out_free_resources;
  3496. }
  3497. init_completion(&ioc->shost_recovery_done);
  3498. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3499. ioc->event_masks[i] = -1;
  3500. /* here we enable the events we care about */
  3501. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3502. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3503. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3504. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3505. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3506. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3507. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3508. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3509. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3510. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3511. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3512. if (r)
  3513. goto out_free_resources;
  3514. if (missing_delay[0] != -1 && missing_delay[1] != -1)
  3515. _base_update_missing_delay(ioc, missing_delay[0],
  3516. missing_delay[1]);
  3517. mpt2sas_base_start_watchdog(ioc);
  3518. return 0;
  3519. out_free_resources:
  3520. ioc->remove_host = 1;
  3521. mpt2sas_base_free_resources(ioc);
  3522. _base_release_memory_pools(ioc);
  3523. pci_set_drvdata(ioc->pdev, NULL);
  3524. kfree(ioc->pd_handles);
  3525. kfree(ioc->tm_cmds.reply);
  3526. kfree(ioc->transport_cmds.reply);
  3527. kfree(ioc->scsih_cmds.reply);
  3528. kfree(ioc->config_cmds.reply);
  3529. kfree(ioc->base_cmds.reply);
  3530. kfree(ioc->ctl_cmds.reply);
  3531. kfree(ioc->ctl_cmds.sense);
  3532. kfree(ioc->pfacts);
  3533. ioc->ctl_cmds.reply = NULL;
  3534. ioc->base_cmds.reply = NULL;
  3535. ioc->tm_cmds.reply = NULL;
  3536. ioc->scsih_cmds.reply = NULL;
  3537. ioc->transport_cmds.reply = NULL;
  3538. ioc->config_cmds.reply = NULL;
  3539. ioc->pfacts = NULL;
  3540. return r;
  3541. }
  3542. /**
  3543. * mpt2sas_base_detach - remove controller instance
  3544. * @ioc: per adapter object
  3545. *
  3546. * Return nothing.
  3547. */
  3548. void
  3549. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3550. {
  3551. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3552. __func__));
  3553. mpt2sas_base_stop_watchdog(ioc);
  3554. mpt2sas_base_free_resources(ioc);
  3555. _base_release_memory_pools(ioc);
  3556. pci_set_drvdata(ioc->pdev, NULL);
  3557. kfree(ioc->pd_handles);
  3558. kfree(ioc->pfacts);
  3559. kfree(ioc->ctl_cmds.reply);
  3560. kfree(ioc->ctl_cmds.sense);
  3561. kfree(ioc->base_cmds.reply);
  3562. kfree(ioc->tm_cmds.reply);
  3563. kfree(ioc->transport_cmds.reply);
  3564. kfree(ioc->scsih_cmds.reply);
  3565. kfree(ioc->config_cmds.reply);
  3566. }
  3567. /**
  3568. * _base_reset_handler - reset callback handler (for base)
  3569. * @ioc: per adapter object
  3570. * @reset_phase: phase
  3571. *
  3572. * The handler for doing any required cleanup or initialization.
  3573. *
  3574. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3575. * MPT2_IOC_DONE_RESET
  3576. *
  3577. * Return nothing.
  3578. */
  3579. static void
  3580. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3581. {
  3582. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3583. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3584. switch (reset_phase) {
  3585. case MPT2_IOC_PRE_RESET:
  3586. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3587. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3588. break;
  3589. case MPT2_IOC_AFTER_RESET:
  3590. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3591. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3592. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3593. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3594. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3595. complete(&ioc->transport_cmds.done);
  3596. }
  3597. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3598. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3599. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3600. complete(&ioc->base_cmds.done);
  3601. }
  3602. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3603. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3604. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3605. ioc->config_cmds.smid = USHRT_MAX;
  3606. complete(&ioc->config_cmds.done);
  3607. }
  3608. break;
  3609. case MPT2_IOC_DONE_RESET:
  3610. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3611. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3612. break;
  3613. }
  3614. }
  3615. /**
  3616. * _wait_for_commands_to_complete - reset controller
  3617. * @ioc: Pointer to MPT_ADAPTER structure
  3618. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3619. *
  3620. * This function waiting(3s) for all pending commands to complete
  3621. * prior to putting controller in reset.
  3622. */
  3623. static void
  3624. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3625. {
  3626. u32 ioc_state;
  3627. unsigned long flags;
  3628. u16 i;
  3629. ioc->pending_io_count = 0;
  3630. if (sleep_flag != CAN_SLEEP)
  3631. return;
  3632. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3633. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  3634. return;
  3635. /* pending command count */
  3636. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3637. for (i = 0; i < ioc->scsiio_depth; i++)
  3638. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  3639. ioc->pending_io_count++;
  3640. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3641. if (!ioc->pending_io_count)
  3642. return;
  3643. /* wait for pending commands to complete */
  3644. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  3645. }
  3646. /**
  3647. * mpt2sas_base_hard_reset_handler - reset controller
  3648. * @ioc: Pointer to MPT_ADAPTER structure
  3649. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3650. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3651. *
  3652. * Returns 0 for success, non-zero for failure.
  3653. */
  3654. int
  3655. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3656. enum reset_type type)
  3657. {
  3658. int r;
  3659. unsigned long flags;
  3660. u8 pe_complete = ioc->wait_for_port_enable_to_complete;
  3661. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  3662. __func__));
  3663. if (ioc->pci_error_recovery) {
  3664. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  3665. ioc->name, __func__);
  3666. r = 0;
  3667. goto out;
  3668. }
  3669. if (mpt2sas_fwfault_debug)
  3670. mpt2sas_halt_firmware(ioc);
  3671. /* TODO - What we really should be doing is pulling
  3672. * out all the code associated with NO_SLEEP; its never used.
  3673. * That is legacy code from mpt fusion driver, ported over.
  3674. * I will leave this BUG_ON here for now till its been resolved.
  3675. */
  3676. BUG_ON(sleep_flag == NO_SLEEP);
  3677. /* wait for an active reset in progress to complete */
  3678. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  3679. do {
  3680. ssleep(1);
  3681. } while (ioc->shost_recovery == 1);
  3682. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  3683. __func__));
  3684. return ioc->ioc_reset_in_progress_status;
  3685. }
  3686. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3687. ioc->shost_recovery = 1;
  3688. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3689. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  3690. _wait_for_commands_to_complete(ioc, sleep_flag);
  3691. _base_mask_interrupts(ioc);
  3692. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  3693. if (r)
  3694. goto out;
  3695. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  3696. /* If this hard reset is called while port enable is active, then
  3697. * there is no reason to call make_ioc_operational
  3698. */
  3699. if (pe_complete) {
  3700. r = -EFAULT;
  3701. goto out;
  3702. }
  3703. r = _base_make_ioc_operational(ioc, sleep_flag);
  3704. if (!r)
  3705. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  3706. out:
  3707. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  3708. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  3709. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3710. ioc->ioc_reset_in_progress_status = r;
  3711. ioc->shost_recovery = 0;
  3712. complete(&ioc->shost_recovery_done);
  3713. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3714. mutex_unlock(&ioc->reset_in_progress_mutex);
  3715. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  3716. __func__));
  3717. return r;
  3718. }