lpfc_sli.c 108 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2007 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <scsi/scsi.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_host.h>
  29. #include <scsi/scsi_transport_fc.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. #include "lpfc_debugfs.h"
  39. /*
  40. * Define macro to log: Mailbox command x%x cannot issue Data
  41. * This allows multiple uses of lpfc_msgBlk0311
  42. * w/o perturbing log msg utility.
  43. */
  44. #define LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag) \
  45. lpfc_printf_log(phba, \
  46. KERN_INFO, \
  47. LOG_MBOX | LOG_SLI, \
  48. "(%d):0311 Mailbox command x%x cannot " \
  49. "issue Data: x%x x%x x%x\n", \
  50. pmbox->vport ? pmbox->vport->vpi : 0, \
  51. pmbox->mb.mbxCommand, \
  52. phba->pport->port_state, \
  53. psli->sli_flag, \
  54. flag)
  55. /* There are only four IOCB completion types. */
  56. typedef enum _lpfc_iocb_type {
  57. LPFC_UNKNOWN_IOCB,
  58. LPFC_UNSOL_IOCB,
  59. LPFC_SOL_IOCB,
  60. LPFC_ABORT_IOCB
  61. } lpfc_iocb_type;
  62. /* SLI-2/SLI-3 provide different sized iocbs. Given a pointer
  63. * to the start of the ring, and the slot number of the
  64. * desired iocb entry, calc a pointer to that entry.
  65. */
  66. static inline IOCB_t *
  67. lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  68. {
  69. return (IOCB_t *) (((char *) pring->cmdringaddr) +
  70. pring->cmdidx * phba->iocb_cmd_size);
  71. }
  72. static inline IOCB_t *
  73. lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  74. {
  75. return (IOCB_t *) (((char *) pring->rspringaddr) +
  76. pring->rspidx * phba->iocb_rsp_size);
  77. }
  78. static struct lpfc_iocbq *
  79. __lpfc_sli_get_iocbq(struct lpfc_hba *phba)
  80. {
  81. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  82. struct lpfc_iocbq * iocbq = NULL;
  83. list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
  84. return iocbq;
  85. }
  86. struct lpfc_iocbq *
  87. lpfc_sli_get_iocbq(struct lpfc_hba *phba)
  88. {
  89. struct lpfc_iocbq * iocbq = NULL;
  90. unsigned long iflags;
  91. spin_lock_irqsave(&phba->hbalock, iflags);
  92. iocbq = __lpfc_sli_get_iocbq(phba);
  93. spin_unlock_irqrestore(&phba->hbalock, iflags);
  94. return iocbq;
  95. }
  96. static void
  97. __lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  98. {
  99. size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
  100. /*
  101. * Clean all volatile data fields, preserve iotag and node struct.
  102. */
  103. memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
  104. list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
  105. }
  106. void
  107. lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  108. {
  109. unsigned long iflags;
  110. /*
  111. * Clean all volatile data fields, preserve iotag and node struct.
  112. */
  113. spin_lock_irqsave(&phba->hbalock, iflags);
  114. __lpfc_sli_release_iocbq(phba, iocbq);
  115. spin_unlock_irqrestore(&phba->hbalock, iflags);
  116. }
  117. /*
  118. * Translate the iocb command to an iocb command type used to decide the final
  119. * disposition of each completed IOCB.
  120. */
  121. static lpfc_iocb_type
  122. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  123. {
  124. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  125. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  126. return 0;
  127. switch (iocb_cmnd) {
  128. case CMD_XMIT_SEQUENCE_CR:
  129. case CMD_XMIT_SEQUENCE_CX:
  130. case CMD_XMIT_BCAST_CN:
  131. case CMD_XMIT_BCAST_CX:
  132. case CMD_ELS_REQUEST_CR:
  133. case CMD_ELS_REQUEST_CX:
  134. case CMD_CREATE_XRI_CR:
  135. case CMD_CREATE_XRI_CX:
  136. case CMD_GET_RPI_CN:
  137. case CMD_XMIT_ELS_RSP_CX:
  138. case CMD_GET_RPI_CR:
  139. case CMD_FCP_IWRITE_CR:
  140. case CMD_FCP_IWRITE_CX:
  141. case CMD_FCP_IREAD_CR:
  142. case CMD_FCP_IREAD_CX:
  143. case CMD_FCP_ICMND_CR:
  144. case CMD_FCP_ICMND_CX:
  145. case CMD_FCP_TSEND_CX:
  146. case CMD_FCP_TRSP_CX:
  147. case CMD_FCP_TRECEIVE_CX:
  148. case CMD_FCP_AUTO_TRSP_CX:
  149. case CMD_ADAPTER_MSG:
  150. case CMD_ADAPTER_DUMP:
  151. case CMD_XMIT_SEQUENCE64_CR:
  152. case CMD_XMIT_SEQUENCE64_CX:
  153. case CMD_XMIT_BCAST64_CN:
  154. case CMD_XMIT_BCAST64_CX:
  155. case CMD_ELS_REQUEST64_CR:
  156. case CMD_ELS_REQUEST64_CX:
  157. case CMD_FCP_IWRITE64_CR:
  158. case CMD_FCP_IWRITE64_CX:
  159. case CMD_FCP_IREAD64_CR:
  160. case CMD_FCP_IREAD64_CX:
  161. case CMD_FCP_ICMND64_CR:
  162. case CMD_FCP_ICMND64_CX:
  163. case CMD_FCP_TSEND64_CX:
  164. case CMD_FCP_TRSP64_CX:
  165. case CMD_FCP_TRECEIVE64_CX:
  166. case CMD_GEN_REQUEST64_CR:
  167. case CMD_GEN_REQUEST64_CX:
  168. case CMD_XMIT_ELS_RSP64_CX:
  169. type = LPFC_SOL_IOCB;
  170. break;
  171. case CMD_ABORT_XRI_CN:
  172. case CMD_ABORT_XRI_CX:
  173. case CMD_CLOSE_XRI_CN:
  174. case CMD_CLOSE_XRI_CX:
  175. case CMD_XRI_ABORTED_CX:
  176. case CMD_ABORT_MXRI64_CN:
  177. type = LPFC_ABORT_IOCB;
  178. break;
  179. case CMD_RCV_SEQUENCE_CX:
  180. case CMD_RCV_ELS_REQ_CX:
  181. case CMD_RCV_SEQUENCE64_CX:
  182. case CMD_RCV_ELS_REQ64_CX:
  183. case CMD_ASYNC_STATUS:
  184. case CMD_IOCB_RCV_SEQ64_CX:
  185. case CMD_IOCB_RCV_ELS64_CX:
  186. case CMD_IOCB_RCV_CONT64_CX:
  187. type = LPFC_UNSOL_IOCB;
  188. break;
  189. default:
  190. type = LPFC_UNKNOWN_IOCB;
  191. break;
  192. }
  193. return type;
  194. }
  195. static int
  196. lpfc_sli_ring_map(struct lpfc_hba *phba)
  197. {
  198. struct lpfc_sli *psli = &phba->sli;
  199. LPFC_MBOXQ_t *pmb;
  200. MAILBOX_t *pmbox;
  201. int i, rc, ret = 0;
  202. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  203. if (!pmb)
  204. return -ENOMEM;
  205. pmbox = &pmb->mb;
  206. phba->link_state = LPFC_INIT_MBX_CMDS;
  207. for (i = 0; i < psli->num_rings; i++) {
  208. lpfc_config_ring(phba, i, pmb);
  209. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  210. if (rc != MBX_SUCCESS) {
  211. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  212. "0446 Adapter failed to init (%d), "
  213. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  214. "ring %d\n",
  215. rc, pmbox->mbxCommand,
  216. pmbox->mbxStatus, i);
  217. phba->link_state = LPFC_HBA_ERROR;
  218. ret = -ENXIO;
  219. break;
  220. }
  221. }
  222. mempool_free(pmb, phba->mbox_mem_pool);
  223. return ret;
  224. }
  225. static int
  226. lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  227. struct lpfc_iocbq *piocb)
  228. {
  229. list_add_tail(&piocb->list, &pring->txcmplq);
  230. pring->txcmplq_cnt++;
  231. if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
  232. (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
  233. (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
  234. if (!piocb->vport)
  235. BUG();
  236. else
  237. mod_timer(&piocb->vport->els_tmofunc,
  238. jiffies + HZ * (phba->fc_ratov << 1));
  239. }
  240. return 0;
  241. }
  242. static struct lpfc_iocbq *
  243. lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  244. {
  245. struct lpfc_iocbq *cmd_iocb;
  246. list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
  247. if (cmd_iocb != NULL)
  248. pring->txq_cnt--;
  249. return cmd_iocb;
  250. }
  251. static IOCB_t *
  252. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  253. {
  254. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  255. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  256. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  257. uint32_t max_cmd_idx = pring->numCiocb;
  258. if ((pring->next_cmdidx == pring->cmdidx) &&
  259. (++pring->next_cmdidx >= max_cmd_idx))
  260. pring->next_cmdidx = 0;
  261. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  262. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  263. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  264. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  265. "0315 Ring %d issue: portCmdGet %d "
  266. "is bigger then cmd ring %d\n",
  267. pring->ringno,
  268. pring->local_getidx, max_cmd_idx);
  269. phba->link_state = LPFC_HBA_ERROR;
  270. /*
  271. * All error attention handlers are posted to
  272. * worker thread
  273. */
  274. phba->work_ha |= HA_ERATT;
  275. phba->work_hs = HS_FFER3;
  276. /* hbalock should already be held */
  277. if (phba->work_wait)
  278. lpfc_worker_wake_up(phba);
  279. return NULL;
  280. }
  281. if (pring->local_getidx == pring->next_cmdidx)
  282. return NULL;
  283. }
  284. return lpfc_cmd_iocb(phba, pring);
  285. }
  286. uint16_t
  287. lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  288. {
  289. struct lpfc_iocbq **new_arr;
  290. struct lpfc_iocbq **old_arr;
  291. size_t new_len;
  292. struct lpfc_sli *psli = &phba->sli;
  293. uint16_t iotag;
  294. spin_lock_irq(&phba->hbalock);
  295. iotag = psli->last_iotag;
  296. if(++iotag < psli->iocbq_lookup_len) {
  297. psli->last_iotag = iotag;
  298. psli->iocbq_lookup[iotag] = iocbq;
  299. spin_unlock_irq(&phba->hbalock);
  300. iocbq->iotag = iotag;
  301. return iotag;
  302. } else if (psli->iocbq_lookup_len < (0xffff
  303. - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
  304. new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
  305. spin_unlock_irq(&phba->hbalock);
  306. new_arr = kzalloc(new_len * sizeof (struct lpfc_iocbq *),
  307. GFP_KERNEL);
  308. if (new_arr) {
  309. spin_lock_irq(&phba->hbalock);
  310. old_arr = psli->iocbq_lookup;
  311. if (new_len <= psli->iocbq_lookup_len) {
  312. /* highly unprobable case */
  313. kfree(new_arr);
  314. iotag = psli->last_iotag;
  315. if(++iotag < psli->iocbq_lookup_len) {
  316. psli->last_iotag = iotag;
  317. psli->iocbq_lookup[iotag] = iocbq;
  318. spin_unlock_irq(&phba->hbalock);
  319. iocbq->iotag = iotag;
  320. return iotag;
  321. }
  322. spin_unlock_irq(&phba->hbalock);
  323. return 0;
  324. }
  325. if (psli->iocbq_lookup)
  326. memcpy(new_arr, old_arr,
  327. ((psli->last_iotag + 1) *
  328. sizeof (struct lpfc_iocbq *)));
  329. psli->iocbq_lookup = new_arr;
  330. psli->iocbq_lookup_len = new_len;
  331. psli->last_iotag = iotag;
  332. psli->iocbq_lookup[iotag] = iocbq;
  333. spin_unlock_irq(&phba->hbalock);
  334. iocbq->iotag = iotag;
  335. kfree(old_arr);
  336. return iotag;
  337. }
  338. } else
  339. spin_unlock_irq(&phba->hbalock);
  340. lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
  341. "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
  342. psli->last_iotag);
  343. return 0;
  344. }
  345. static void
  346. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  347. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  348. {
  349. /*
  350. * Set up an iotag
  351. */
  352. nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
  353. if (pring->ringno == LPFC_ELS_RING) {
  354. lpfc_debugfs_slow_ring_trc(phba,
  355. "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
  356. *(((uint32_t *) &nextiocb->iocb) + 4),
  357. *(((uint32_t *) &nextiocb->iocb) + 6),
  358. *(((uint32_t *) &nextiocb->iocb) + 7));
  359. }
  360. /*
  361. * Issue iocb command to adapter
  362. */
  363. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
  364. wmb();
  365. pring->stats.iocb_cmd++;
  366. /*
  367. * If there is no completion routine to call, we can release the
  368. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  369. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  370. */
  371. if (nextiocb->iocb_cmpl)
  372. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  373. else
  374. __lpfc_sli_release_iocbq(phba, nextiocb);
  375. /*
  376. * Let the HBA know what IOCB slot will be the next one the
  377. * driver will put a command into.
  378. */
  379. pring->cmdidx = pring->next_cmdidx;
  380. writel(pring->cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
  381. }
  382. static void
  383. lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  384. {
  385. int ringno = pring->ringno;
  386. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  387. wmb();
  388. /*
  389. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  390. * The HBA will tell us when an IOCB entry is available.
  391. */
  392. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  393. readl(phba->CAregaddr); /* flush */
  394. pring->stats.iocb_cmd_full++;
  395. }
  396. static void
  397. lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  398. {
  399. int ringno = pring->ringno;
  400. /*
  401. * Tell the HBA that there is work to do in this ring.
  402. */
  403. wmb();
  404. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  405. readl(phba->CAregaddr); /* flush */
  406. }
  407. static void
  408. lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  409. {
  410. IOCB_t *iocb;
  411. struct lpfc_iocbq *nextiocb;
  412. /*
  413. * Check to see if:
  414. * (a) there is anything on the txq to send
  415. * (b) link is up
  416. * (c) link attention events can be processed (fcp ring only)
  417. * (d) IOCB processing is not blocked by the outstanding mbox command.
  418. */
  419. if (pring->txq_cnt &&
  420. lpfc_is_link_up(phba) &&
  421. (pring->ringno != phba->sli.fcp_ring ||
  422. phba->sli.sli_flag & LPFC_PROCESS_LA)) {
  423. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  424. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  425. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  426. if (iocb)
  427. lpfc_sli_update_ring(phba, pring);
  428. else
  429. lpfc_sli_update_full_ring(phba, pring);
  430. }
  431. return;
  432. }
  433. static struct lpfc_hbq_entry *
  434. lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
  435. {
  436. struct hbq_s *hbqp = &phba->hbqs[hbqno];
  437. if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
  438. ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
  439. hbqp->next_hbqPutIdx = 0;
  440. if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
  441. uint32_t raw_index = phba->hbq_get[hbqno];
  442. uint32_t getidx = le32_to_cpu(raw_index);
  443. hbqp->local_hbqGetIdx = getidx;
  444. if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
  445. lpfc_printf_log(phba, KERN_ERR,
  446. LOG_SLI | LOG_VPORT,
  447. "1802 HBQ %d: local_hbqGetIdx "
  448. "%u is > than hbqp->entry_count %u\n",
  449. hbqno, hbqp->local_hbqGetIdx,
  450. hbqp->entry_count);
  451. phba->link_state = LPFC_HBA_ERROR;
  452. return NULL;
  453. }
  454. if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
  455. return NULL;
  456. }
  457. return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
  458. hbqp->hbqPutIdx;
  459. }
  460. void
  461. lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
  462. {
  463. struct lpfc_dmabuf *dmabuf, *next_dmabuf;
  464. struct hbq_dmabuf *hbq_buf;
  465. int i, hbq_count;
  466. hbq_count = lpfc_sli_hbq_count();
  467. /* Return all memory used by all HBQs */
  468. for (i = 0; i < hbq_count; ++i) {
  469. list_for_each_entry_safe(dmabuf, next_dmabuf,
  470. &phba->hbqs[i].hbq_buffer_list, list) {
  471. hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
  472. list_del(&hbq_buf->dbuf.list);
  473. (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
  474. }
  475. phba->hbqs[i].buffer_count = 0;
  476. }
  477. }
  478. static struct lpfc_hbq_entry *
  479. lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
  480. struct hbq_dmabuf *hbq_buf)
  481. {
  482. struct lpfc_hbq_entry *hbqe;
  483. dma_addr_t physaddr = hbq_buf->dbuf.phys;
  484. /* Get next HBQ entry slot to use */
  485. hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
  486. if (hbqe) {
  487. struct hbq_s *hbqp = &phba->hbqs[hbqno];
  488. hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
  489. hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
  490. hbqe->bde.tus.f.bdeSize = hbq_buf->size;
  491. hbqe->bde.tus.f.bdeFlags = 0;
  492. hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
  493. hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
  494. /* Sync SLIM */
  495. hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
  496. writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
  497. /* flush */
  498. readl(phba->hbq_put + hbqno);
  499. list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
  500. }
  501. return hbqe;
  502. }
  503. static struct lpfc_hbq_init lpfc_els_hbq = {
  504. .rn = 1,
  505. .entry_count = 200,
  506. .mask_count = 0,
  507. .profile = 0,
  508. .ring_mask = (1 << LPFC_ELS_RING),
  509. .buffer_count = 0,
  510. .init_count = 20,
  511. .add_count = 5,
  512. };
  513. static struct lpfc_hbq_init lpfc_extra_hbq = {
  514. .rn = 1,
  515. .entry_count = 200,
  516. .mask_count = 0,
  517. .profile = 0,
  518. .ring_mask = (1 << LPFC_EXTRA_RING),
  519. .buffer_count = 0,
  520. .init_count = 0,
  521. .add_count = 5,
  522. };
  523. struct lpfc_hbq_init *lpfc_hbq_defs[] = {
  524. &lpfc_els_hbq,
  525. &lpfc_extra_hbq,
  526. };
  527. static int
  528. lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
  529. {
  530. uint32_t i, start, end;
  531. struct hbq_dmabuf *hbq_buffer;
  532. if (!phba->hbqs[hbqno].hbq_alloc_buffer) {
  533. return 0;
  534. }
  535. start = phba->hbqs[hbqno].buffer_count;
  536. end = count + start;
  537. if (end > lpfc_hbq_defs[hbqno]->entry_count) {
  538. end = lpfc_hbq_defs[hbqno]->entry_count;
  539. }
  540. /* Populate HBQ entries */
  541. for (i = start; i < end; i++) {
  542. hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
  543. if (!hbq_buffer)
  544. return 1;
  545. hbq_buffer->tag = (i | (hbqno << 16));
  546. if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
  547. phba->hbqs[hbqno].buffer_count++;
  548. else
  549. (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
  550. }
  551. return 0;
  552. }
  553. int
  554. lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
  555. {
  556. return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
  557. lpfc_hbq_defs[qno]->add_count));
  558. }
  559. static int
  560. lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
  561. {
  562. return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
  563. lpfc_hbq_defs[qno]->init_count));
  564. }
  565. static struct hbq_dmabuf *
  566. lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
  567. {
  568. struct lpfc_dmabuf *d_buf;
  569. struct hbq_dmabuf *hbq_buf;
  570. uint32_t hbqno;
  571. hbqno = tag >> 16;
  572. if (hbqno >= LPFC_MAX_HBQS)
  573. return NULL;
  574. list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
  575. hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
  576. if (hbq_buf->tag == tag) {
  577. return hbq_buf;
  578. }
  579. }
  580. lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
  581. "1803 Bad hbq tag. Data: x%x x%x\n",
  582. tag, phba->hbqs[tag >> 16].buffer_count);
  583. return NULL;
  584. }
  585. void
  586. lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
  587. {
  588. uint32_t hbqno;
  589. if (hbq_buffer) {
  590. hbqno = hbq_buffer->tag >> 16;
  591. if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
  592. (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
  593. }
  594. }
  595. }
  596. static int
  597. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  598. {
  599. uint8_t ret;
  600. switch (mbxCommand) {
  601. case MBX_LOAD_SM:
  602. case MBX_READ_NV:
  603. case MBX_WRITE_NV:
  604. case MBX_WRITE_VPARMS:
  605. case MBX_RUN_BIU_DIAG:
  606. case MBX_INIT_LINK:
  607. case MBX_DOWN_LINK:
  608. case MBX_CONFIG_LINK:
  609. case MBX_CONFIG_RING:
  610. case MBX_RESET_RING:
  611. case MBX_READ_CONFIG:
  612. case MBX_READ_RCONFIG:
  613. case MBX_READ_SPARM:
  614. case MBX_READ_STATUS:
  615. case MBX_READ_RPI:
  616. case MBX_READ_XRI:
  617. case MBX_READ_REV:
  618. case MBX_READ_LNK_STAT:
  619. case MBX_REG_LOGIN:
  620. case MBX_UNREG_LOGIN:
  621. case MBX_READ_LA:
  622. case MBX_CLEAR_LA:
  623. case MBX_DUMP_MEMORY:
  624. case MBX_DUMP_CONTEXT:
  625. case MBX_RUN_DIAGS:
  626. case MBX_RESTART:
  627. case MBX_UPDATE_CFG:
  628. case MBX_DOWN_LOAD:
  629. case MBX_DEL_LD_ENTRY:
  630. case MBX_RUN_PROGRAM:
  631. case MBX_SET_MASK:
  632. case MBX_SET_SLIM:
  633. case MBX_UNREG_D_ID:
  634. case MBX_KILL_BOARD:
  635. case MBX_CONFIG_FARP:
  636. case MBX_BEACON:
  637. case MBX_LOAD_AREA:
  638. case MBX_RUN_BIU_DIAG64:
  639. case MBX_CONFIG_PORT:
  640. case MBX_READ_SPARM64:
  641. case MBX_READ_RPI64:
  642. case MBX_REG_LOGIN64:
  643. case MBX_READ_LA64:
  644. case MBX_FLASH_WR_ULA:
  645. case MBX_SET_DEBUG:
  646. case MBX_LOAD_EXP_ROM:
  647. case MBX_ASYNCEVT_ENABLE:
  648. case MBX_REG_VPI:
  649. case MBX_UNREG_VPI:
  650. case MBX_HEARTBEAT:
  651. ret = mbxCommand;
  652. break;
  653. default:
  654. ret = MBX_SHUTDOWN;
  655. break;
  656. }
  657. return ret;
  658. }
  659. static void
  660. lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
  661. {
  662. wait_queue_head_t *pdone_q;
  663. unsigned long drvr_flag;
  664. /*
  665. * If pdone_q is empty, the driver thread gave up waiting and
  666. * continued running.
  667. */
  668. pmboxq->mbox_flag |= LPFC_MBX_WAKE;
  669. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  670. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  671. if (pdone_q)
  672. wake_up_interruptible(pdone_q);
  673. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  674. return;
  675. }
  676. void
  677. lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
  678. {
  679. struct lpfc_dmabuf *mp;
  680. uint16_t rpi;
  681. int rc;
  682. mp = (struct lpfc_dmabuf *) (pmb->context1);
  683. if (mp) {
  684. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  685. kfree(mp);
  686. }
  687. /*
  688. * If a REG_LOGIN succeeded after node is destroyed or node
  689. * is in re-discovery driver need to cleanup the RPI.
  690. */
  691. if (!(phba->pport->load_flag & FC_UNLOADING) &&
  692. pmb->mb.mbxCommand == MBX_REG_LOGIN64 &&
  693. !pmb->mb.mbxStatus) {
  694. rpi = pmb->mb.un.varWords[0];
  695. lpfc_unreg_login(phba, pmb->mb.un.varRegLogin.vpi, rpi, pmb);
  696. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  697. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  698. if (rc != MBX_NOT_FINISHED)
  699. return;
  700. }
  701. mempool_free(pmb, phba->mbox_mem_pool);
  702. return;
  703. }
  704. int
  705. lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
  706. {
  707. MAILBOX_t *pmbox;
  708. LPFC_MBOXQ_t *pmb;
  709. int rc;
  710. LIST_HEAD(cmplq);
  711. phba->sli.slistat.mbox_event++;
  712. /* Get all completed mailboxe buffers into the cmplq */
  713. spin_lock_irq(&phba->hbalock);
  714. list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
  715. spin_unlock_irq(&phba->hbalock);
  716. /* Get a Mailbox buffer to setup mailbox commands for callback */
  717. do {
  718. list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
  719. if (pmb == NULL)
  720. break;
  721. pmbox = &pmb->mb;
  722. if (pmbox->mbxCommand != MBX_HEARTBEAT) {
  723. if (pmb->vport) {
  724. lpfc_debugfs_disc_trc(pmb->vport,
  725. LPFC_DISC_TRC_MBOX_VPORT,
  726. "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
  727. (uint32_t)pmbox->mbxCommand,
  728. pmbox->un.varWords[0],
  729. pmbox->un.varWords[1]);
  730. }
  731. else {
  732. lpfc_debugfs_disc_trc(phba->pport,
  733. LPFC_DISC_TRC_MBOX,
  734. "MBOX cmpl: cmd:x%x mb:x%x x%x",
  735. (uint32_t)pmbox->mbxCommand,
  736. pmbox->un.varWords[0],
  737. pmbox->un.varWords[1]);
  738. }
  739. }
  740. /*
  741. * It is a fatal error if unknown mbox command completion.
  742. */
  743. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  744. MBX_SHUTDOWN) {
  745. /* Unknow mailbox command compl */
  746. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  747. "(%d):0323 Unknown Mailbox command "
  748. "%x Cmpl\n",
  749. pmb->vport ? pmb->vport->vpi : 0,
  750. pmbox->mbxCommand);
  751. phba->link_state = LPFC_HBA_ERROR;
  752. phba->work_hs = HS_FFER3;
  753. lpfc_handle_eratt(phba);
  754. continue;
  755. }
  756. if (pmbox->mbxStatus) {
  757. phba->sli.slistat.mbox_stat_err++;
  758. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  759. /* Mbox cmd cmpl error - RETRYing */
  760. lpfc_printf_log(phba, KERN_INFO,
  761. LOG_MBOX | LOG_SLI,
  762. "(%d):0305 Mbox cmd cmpl "
  763. "error - RETRYing Data: x%x "
  764. "x%x x%x x%x\n",
  765. pmb->vport ? pmb->vport->vpi :0,
  766. pmbox->mbxCommand,
  767. pmbox->mbxStatus,
  768. pmbox->un.varWords[0],
  769. pmb->vport->port_state);
  770. pmbox->mbxStatus = 0;
  771. pmbox->mbxOwner = OWN_HOST;
  772. spin_lock_irq(&phba->hbalock);
  773. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  774. spin_unlock_irq(&phba->hbalock);
  775. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  776. if (rc == MBX_SUCCESS)
  777. continue;
  778. }
  779. }
  780. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  781. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  782. "(%d):0307 Mailbox cmd x%x Cmpl x%p "
  783. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  784. pmb->vport ? pmb->vport->vpi : 0,
  785. pmbox->mbxCommand,
  786. pmb->mbox_cmpl,
  787. *((uint32_t *) pmbox),
  788. pmbox->un.varWords[0],
  789. pmbox->un.varWords[1],
  790. pmbox->un.varWords[2],
  791. pmbox->un.varWords[3],
  792. pmbox->un.varWords[4],
  793. pmbox->un.varWords[5],
  794. pmbox->un.varWords[6],
  795. pmbox->un.varWords[7]);
  796. if (pmb->mbox_cmpl)
  797. pmb->mbox_cmpl(phba,pmb);
  798. } while (1);
  799. return 0;
  800. }
  801. static struct lpfc_dmabuf *
  802. lpfc_sli_replace_hbqbuff(struct lpfc_hba *phba, uint32_t tag)
  803. {
  804. struct hbq_dmabuf *hbq_entry, *new_hbq_entry;
  805. uint32_t hbqno;
  806. void *virt; /* virtual address ptr */
  807. dma_addr_t phys; /* mapped address */
  808. hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
  809. if (hbq_entry == NULL)
  810. return NULL;
  811. list_del(&hbq_entry->dbuf.list);
  812. hbqno = tag >> 16;
  813. new_hbq_entry = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
  814. if (new_hbq_entry == NULL)
  815. return &hbq_entry->dbuf;
  816. new_hbq_entry->tag = -1;
  817. phys = new_hbq_entry->dbuf.phys;
  818. virt = new_hbq_entry->dbuf.virt;
  819. new_hbq_entry->dbuf.phys = hbq_entry->dbuf.phys;
  820. new_hbq_entry->dbuf.virt = hbq_entry->dbuf.virt;
  821. hbq_entry->dbuf.phys = phys;
  822. hbq_entry->dbuf.virt = virt;
  823. lpfc_sli_free_hbq(phba, hbq_entry);
  824. return &new_hbq_entry->dbuf;
  825. }
  826. static struct lpfc_dmabuf *
  827. lpfc_sli_get_buff(struct lpfc_hba *phba,
  828. struct lpfc_sli_ring *pring,
  829. uint32_t tag)
  830. {
  831. if (tag & QUE_BUFTAG_BIT)
  832. return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
  833. else
  834. return lpfc_sli_replace_hbqbuff(phba, tag);
  835. }
  836. static int
  837. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  838. struct lpfc_iocbq *saveq)
  839. {
  840. IOCB_t * irsp;
  841. WORD5 * w5p;
  842. uint32_t Rctl, Type;
  843. uint32_t match, i;
  844. struct lpfc_iocbq *iocbq;
  845. match = 0;
  846. irsp = &(saveq->iocb);
  847. if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
  848. if (pring->lpfc_sli_rcv_async_status)
  849. pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
  850. else
  851. lpfc_printf_log(phba,
  852. KERN_WARNING,
  853. LOG_SLI,
  854. "0316 Ring %d handler: unexpected "
  855. "ASYNC_STATUS iocb received evt_code "
  856. "0x%x\n",
  857. pring->ringno,
  858. irsp->un.asyncstat.evt_code);
  859. return 1;
  860. }
  861. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  862. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)
  863. || (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)
  864. || (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX)) {
  865. Rctl = FC_ELS_REQ;
  866. Type = FC_ELS_DATA;
  867. } else {
  868. w5p =
  869. (WORD5 *) & (saveq->iocb.un.
  870. ulpWord[5]);
  871. Rctl = w5p->hcsw.Rctl;
  872. Type = w5p->hcsw.Type;
  873. /* Firmware Workaround */
  874. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  875. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
  876. irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
  877. Rctl = FC_ELS_REQ;
  878. Type = FC_ELS_DATA;
  879. w5p->hcsw.Rctl = Rctl;
  880. w5p->hcsw.Type = Type;
  881. }
  882. }
  883. if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
  884. struct lpfc_hbq_entry *hbqe_1, *hbqe_2;
  885. hbqe_1 = (struct lpfc_hbq_entry *) &saveq->iocb.un.ulpWord[0];
  886. hbqe_2 = (struct lpfc_hbq_entry *) &saveq->iocb.
  887. unsli3.sli3Words[4];
  888. if (irsp->ulpBdeCount != 0) {
  889. saveq->context2 = lpfc_sli_get_buff(phba, pring,
  890. irsp->un.ulpWord[3]);
  891. if (!saveq->context2)
  892. lpfc_printf_log(phba,
  893. KERN_ERR,
  894. LOG_SLI,
  895. "0341 Ring %d Cannot find buffer for "
  896. "an unsolicited iocb. tag 0x%x\n",
  897. pring->ringno,
  898. irsp->un.ulpWord[3]);
  899. }
  900. if (irsp->ulpBdeCount == 2) {
  901. saveq->context3 = lpfc_sli_get_buff(phba, pring,
  902. irsp->unsli3.sli3Words[7]);
  903. if (!saveq->context3)
  904. lpfc_printf_log(phba,
  905. KERN_ERR,
  906. LOG_SLI,
  907. "0342 Ring %d Cannot find buffer for an"
  908. " unsolicited iocb. tag 0x%x\n",
  909. pring->ringno,
  910. irsp->unsli3.sli3Words[7]);
  911. }
  912. list_for_each_entry(iocbq, &saveq->list, list) {
  913. hbqe_1 = (struct lpfc_hbq_entry *) &iocbq->iocb.
  914. un.ulpWord[0];
  915. hbqe_2 = (struct lpfc_hbq_entry *) &iocbq->iocb.
  916. unsli3.sli3Words[4];
  917. irsp = &(iocbq->iocb);
  918. if (irsp->ulpBdeCount != 0) {
  919. iocbq->context2 = lpfc_sli_get_buff(phba, pring,
  920. irsp->un.ulpWord[3]);
  921. if (!saveq->context2)
  922. lpfc_printf_log(phba,
  923. KERN_ERR,
  924. LOG_SLI,
  925. "0343 Ring %d Cannot find "
  926. "buffer for an unsolicited iocb"
  927. ". tag 0x%x\n", pring->ringno,
  928. irsp->un.ulpWord[3]);
  929. }
  930. if (irsp->ulpBdeCount == 2) {
  931. iocbq->context3 = lpfc_sli_get_buff(phba, pring,
  932. irsp->unsli3.sli3Words[7]);
  933. if (!saveq->context3)
  934. lpfc_printf_log(phba,
  935. KERN_ERR,
  936. LOG_SLI,
  937. "0344 Ring %d Cannot find "
  938. "buffer for an unsolicited "
  939. "iocb. tag 0x%x\n",
  940. pring->ringno,
  941. irsp->unsli3.sli3Words[7]);
  942. }
  943. }
  944. }
  945. /* unSolicited Responses */
  946. if (pring->prt[0].profile) {
  947. if (pring->prt[0].lpfc_sli_rcv_unsol_event)
  948. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
  949. saveq);
  950. match = 1;
  951. } else {
  952. /* We must search, based on rctl / type
  953. for the right routine */
  954. for (i = 0; i < pring->num_mask;
  955. i++) {
  956. if ((pring->prt[i].rctl ==
  957. Rctl)
  958. && (pring->prt[i].
  959. type == Type)) {
  960. if (pring->prt[i].lpfc_sli_rcv_unsol_event)
  961. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  962. (phba, pring, saveq);
  963. match = 1;
  964. break;
  965. }
  966. }
  967. }
  968. if (match == 0) {
  969. /* Unexpected Rctl / Type received */
  970. /* Ring <ringno> handler: unexpected
  971. Rctl <Rctl> Type <Type> received */
  972. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  973. "0313 Ring %d handler: unexpected Rctl x%x "
  974. "Type x%x received\n",
  975. pring->ringno, Rctl, Type);
  976. }
  977. return 1;
  978. }
  979. static struct lpfc_iocbq *
  980. lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
  981. struct lpfc_sli_ring *pring,
  982. struct lpfc_iocbq *prspiocb)
  983. {
  984. struct lpfc_iocbq *cmd_iocb = NULL;
  985. uint16_t iotag;
  986. iotag = prspiocb->iocb.ulpIoTag;
  987. if (iotag != 0 && iotag <= phba->sli.last_iotag) {
  988. cmd_iocb = phba->sli.iocbq_lookup[iotag];
  989. list_del_init(&cmd_iocb->list);
  990. pring->txcmplq_cnt--;
  991. return cmd_iocb;
  992. }
  993. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  994. "0317 iotag x%x is out off "
  995. "range: max iotag x%x wd0 x%x\n",
  996. iotag, phba->sli.last_iotag,
  997. *(((uint32_t *) &prspiocb->iocb) + 7));
  998. return NULL;
  999. }
  1000. static int
  1001. lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  1002. struct lpfc_iocbq *saveq)
  1003. {
  1004. struct lpfc_iocbq *cmdiocbp;
  1005. int rc = 1;
  1006. unsigned long iflag;
  1007. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  1008. spin_lock_irqsave(&phba->hbalock, iflag);
  1009. cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
  1010. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1011. if (cmdiocbp) {
  1012. if (cmdiocbp->iocb_cmpl) {
  1013. /*
  1014. * Post all ELS completions to the worker thread.
  1015. * All other are passed to the completion callback.
  1016. */
  1017. if (pring->ringno == LPFC_ELS_RING) {
  1018. if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
  1019. cmdiocbp->iocb_flag &=
  1020. ~LPFC_DRIVER_ABORTED;
  1021. saveq->iocb.ulpStatus =
  1022. IOSTAT_LOCAL_REJECT;
  1023. saveq->iocb.un.ulpWord[4] =
  1024. IOERR_SLI_ABORTED;
  1025. /* Firmware could still be in progress
  1026. * of DMAing payload, so don't free data
  1027. * buffer till after a hbeat.
  1028. */
  1029. saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
  1030. }
  1031. }
  1032. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  1033. } else
  1034. lpfc_sli_release_iocbq(phba, cmdiocbp);
  1035. } else {
  1036. /*
  1037. * Unknown initiating command based on the response iotag.
  1038. * This could be the case on the ELS ring because of
  1039. * lpfc_els_abort().
  1040. */
  1041. if (pring->ringno != LPFC_ELS_RING) {
  1042. /*
  1043. * Ring <ringno> handler: unexpected completion IoTag
  1044. * <IoTag>
  1045. */
  1046. lpfc_printf_vlog(cmdiocbp->vport, KERN_WARNING, LOG_SLI,
  1047. "0322 Ring %d handler: "
  1048. "unexpected completion IoTag x%x "
  1049. "Data: x%x x%x x%x x%x\n",
  1050. pring->ringno,
  1051. saveq->iocb.ulpIoTag,
  1052. saveq->iocb.ulpStatus,
  1053. saveq->iocb.un.ulpWord[4],
  1054. saveq->iocb.ulpCommand,
  1055. saveq->iocb.ulpContext);
  1056. }
  1057. }
  1058. return rc;
  1059. }
  1060. static void
  1061. lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1062. {
  1063. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1064. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1065. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1066. /*
  1067. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1068. * rsp ring <portRspMax>
  1069. */
  1070. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1071. "0312 Ring %d handler: portRspPut %d "
  1072. "is bigger then rsp ring %d\n",
  1073. pring->ringno, le32_to_cpu(pgp->rspPutInx),
  1074. pring->numRiocb);
  1075. phba->link_state = LPFC_HBA_ERROR;
  1076. /*
  1077. * All error attention handlers are posted to
  1078. * worker thread
  1079. */
  1080. phba->work_ha |= HA_ERATT;
  1081. phba->work_hs = HS_FFER3;
  1082. /* hbalock should already be held */
  1083. if (phba->work_wait)
  1084. lpfc_worker_wake_up(phba);
  1085. return;
  1086. }
  1087. void lpfc_sli_poll_fcp_ring(struct lpfc_hba *phba)
  1088. {
  1089. struct lpfc_sli *psli = &phba->sli;
  1090. struct lpfc_sli_ring *pring = &psli->ring[LPFC_FCP_RING];
  1091. IOCB_t *irsp = NULL;
  1092. IOCB_t *entry = NULL;
  1093. struct lpfc_iocbq *cmdiocbq = NULL;
  1094. struct lpfc_iocbq rspiocbq;
  1095. struct lpfc_pgp *pgp;
  1096. uint32_t status;
  1097. uint32_t portRspPut, portRspMax;
  1098. int type;
  1099. uint32_t rsp_cmpl = 0;
  1100. uint32_t ha_copy;
  1101. unsigned long iflags;
  1102. pring->stats.iocb_event++;
  1103. pgp = (phba->sli_rev == 3) ?
  1104. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1105. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1106. /*
  1107. * The next available response entry should never exceed the maximum
  1108. * entries. If it does, treat it as an adapter hardware error.
  1109. */
  1110. portRspMax = pring->numRiocb;
  1111. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1112. if (unlikely(portRspPut >= portRspMax)) {
  1113. lpfc_sli_rsp_pointers_error(phba, pring);
  1114. return;
  1115. }
  1116. rmb();
  1117. while (pring->rspidx != portRspPut) {
  1118. entry = lpfc_resp_iocb(phba, pring);
  1119. if (++pring->rspidx >= portRspMax)
  1120. pring->rspidx = 0;
  1121. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1122. (uint32_t *) &rspiocbq.iocb,
  1123. phba->iocb_rsp_size);
  1124. irsp = &rspiocbq.iocb;
  1125. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1126. pring->stats.iocb_rsp++;
  1127. rsp_cmpl++;
  1128. if (unlikely(irsp->ulpStatus)) {
  1129. /* Rsp ring <ringno> error: IOCB */
  1130. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1131. "0326 Rsp Ring %d error: IOCB Data: "
  1132. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1133. pring->ringno,
  1134. irsp->un.ulpWord[0],
  1135. irsp->un.ulpWord[1],
  1136. irsp->un.ulpWord[2],
  1137. irsp->un.ulpWord[3],
  1138. irsp->un.ulpWord[4],
  1139. irsp->un.ulpWord[5],
  1140. *(((uint32_t *) irsp) + 6),
  1141. *(((uint32_t *) irsp) + 7));
  1142. }
  1143. switch (type) {
  1144. case LPFC_ABORT_IOCB:
  1145. case LPFC_SOL_IOCB:
  1146. /*
  1147. * Idle exchange closed via ABTS from port. No iocb
  1148. * resources need to be recovered.
  1149. */
  1150. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1151. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1152. "0314 IOCB cmd 0x%x "
  1153. "processed. Skipping "
  1154. "completion",
  1155. irsp->ulpCommand);
  1156. break;
  1157. }
  1158. spin_lock_irqsave(&phba->hbalock, iflags);
  1159. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1160. &rspiocbq);
  1161. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1162. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1163. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1164. &rspiocbq);
  1165. }
  1166. break;
  1167. default:
  1168. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1169. char adaptermsg[LPFC_MAX_ADPTMSG];
  1170. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1171. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1172. MAX_MSG_DATA);
  1173. dev_warn(&((phba->pcidev)->dev),
  1174. "lpfc%d: %s\n",
  1175. phba->brd_no, adaptermsg);
  1176. } else {
  1177. /* Unknown IOCB command */
  1178. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1179. "0321 Unknown IOCB command "
  1180. "Data: x%x, x%x x%x x%x x%x\n",
  1181. type, irsp->ulpCommand,
  1182. irsp->ulpStatus,
  1183. irsp->ulpIoTag,
  1184. irsp->ulpContext);
  1185. }
  1186. break;
  1187. }
  1188. /*
  1189. * The response IOCB has been processed. Update the ring
  1190. * pointer in SLIM. If the port response put pointer has not
  1191. * been updated, sync the pgp->rspPutInx and fetch the new port
  1192. * response put pointer.
  1193. */
  1194. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1195. if (pring->rspidx == portRspPut)
  1196. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1197. }
  1198. ha_copy = readl(phba->HAregaddr);
  1199. ha_copy >>= (LPFC_FCP_RING * 4);
  1200. if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
  1201. spin_lock_irqsave(&phba->hbalock, iflags);
  1202. pring->stats.iocb_rsp_full++;
  1203. status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
  1204. writel(status, phba->CAregaddr);
  1205. readl(phba->CAregaddr);
  1206. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1207. }
  1208. if ((ha_copy & HA_R0CE_RSP) &&
  1209. (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1210. spin_lock_irqsave(&phba->hbalock, iflags);
  1211. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1212. pring->stats.iocb_cmd_empty++;
  1213. /* Force update of the local copy of cmdGetInx */
  1214. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1215. lpfc_sli_resume_iocb(phba, pring);
  1216. if ((pring->lpfc_sli_cmd_available))
  1217. (pring->lpfc_sli_cmd_available) (phba, pring);
  1218. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1219. }
  1220. return;
  1221. }
  1222. /*
  1223. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  1224. * to check it explicitly.
  1225. */
  1226. static int
  1227. lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
  1228. struct lpfc_sli_ring *pring, uint32_t mask)
  1229. {
  1230. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1231. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1232. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1233. IOCB_t *irsp = NULL;
  1234. IOCB_t *entry = NULL;
  1235. struct lpfc_iocbq *cmdiocbq = NULL;
  1236. struct lpfc_iocbq rspiocbq;
  1237. uint32_t status;
  1238. uint32_t portRspPut, portRspMax;
  1239. int rc = 1;
  1240. lpfc_iocb_type type;
  1241. unsigned long iflag;
  1242. uint32_t rsp_cmpl = 0;
  1243. spin_lock_irqsave(&phba->hbalock, iflag);
  1244. pring->stats.iocb_event++;
  1245. /*
  1246. * The next available response entry should never exceed the maximum
  1247. * entries. If it does, treat it as an adapter hardware error.
  1248. */
  1249. portRspMax = pring->numRiocb;
  1250. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1251. if (unlikely(portRspPut >= portRspMax)) {
  1252. lpfc_sli_rsp_pointers_error(phba, pring);
  1253. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1254. return 1;
  1255. }
  1256. rmb();
  1257. while (pring->rspidx != portRspPut) {
  1258. /*
  1259. * Fetch an entry off the ring and copy it into a local data
  1260. * structure. The copy involves a byte-swap since the
  1261. * network byte order and pci byte orders are different.
  1262. */
  1263. entry = lpfc_resp_iocb(phba, pring);
  1264. phba->last_completion_time = jiffies;
  1265. if (++pring->rspidx >= portRspMax)
  1266. pring->rspidx = 0;
  1267. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1268. (uint32_t *) &rspiocbq.iocb,
  1269. phba->iocb_rsp_size);
  1270. INIT_LIST_HEAD(&(rspiocbq.list));
  1271. irsp = &rspiocbq.iocb;
  1272. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1273. pring->stats.iocb_rsp++;
  1274. rsp_cmpl++;
  1275. if (unlikely(irsp->ulpStatus)) {
  1276. /*
  1277. * If resource errors reported from HBA, reduce
  1278. * queuedepths of the SCSI device.
  1279. */
  1280. if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
  1281. (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
  1282. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1283. lpfc_adjust_queue_depth(phba);
  1284. spin_lock_irqsave(&phba->hbalock, iflag);
  1285. }
  1286. /* Rsp ring <ringno> error: IOCB */
  1287. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1288. "0336 Rsp Ring %d error: IOCB Data: "
  1289. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1290. pring->ringno,
  1291. irsp->un.ulpWord[0],
  1292. irsp->un.ulpWord[1],
  1293. irsp->un.ulpWord[2],
  1294. irsp->un.ulpWord[3],
  1295. irsp->un.ulpWord[4],
  1296. irsp->un.ulpWord[5],
  1297. *(((uint32_t *) irsp) + 6),
  1298. *(((uint32_t *) irsp) + 7));
  1299. }
  1300. switch (type) {
  1301. case LPFC_ABORT_IOCB:
  1302. case LPFC_SOL_IOCB:
  1303. /*
  1304. * Idle exchange closed via ABTS from port. No iocb
  1305. * resources need to be recovered.
  1306. */
  1307. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1308. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1309. "0333 IOCB cmd 0x%x"
  1310. " processed. Skipping"
  1311. " completion\n",
  1312. irsp->ulpCommand);
  1313. break;
  1314. }
  1315. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1316. &rspiocbq);
  1317. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1318. if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
  1319. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1320. &rspiocbq);
  1321. } else {
  1322. spin_unlock_irqrestore(&phba->hbalock,
  1323. iflag);
  1324. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1325. &rspiocbq);
  1326. spin_lock_irqsave(&phba->hbalock,
  1327. iflag);
  1328. }
  1329. }
  1330. break;
  1331. case LPFC_UNSOL_IOCB:
  1332. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1333. lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
  1334. spin_lock_irqsave(&phba->hbalock, iflag);
  1335. break;
  1336. default:
  1337. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1338. char adaptermsg[LPFC_MAX_ADPTMSG];
  1339. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1340. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1341. MAX_MSG_DATA);
  1342. dev_warn(&((phba->pcidev)->dev),
  1343. "lpfc%d: %s\n",
  1344. phba->brd_no, adaptermsg);
  1345. } else {
  1346. /* Unknown IOCB command */
  1347. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1348. "0334 Unknown IOCB command "
  1349. "Data: x%x, x%x x%x x%x x%x\n",
  1350. type, irsp->ulpCommand,
  1351. irsp->ulpStatus,
  1352. irsp->ulpIoTag,
  1353. irsp->ulpContext);
  1354. }
  1355. break;
  1356. }
  1357. /*
  1358. * The response IOCB has been processed. Update the ring
  1359. * pointer in SLIM. If the port response put pointer has not
  1360. * been updated, sync the pgp->rspPutInx and fetch the new port
  1361. * response put pointer.
  1362. */
  1363. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1364. if (pring->rspidx == portRspPut)
  1365. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1366. }
  1367. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  1368. pring->stats.iocb_rsp_full++;
  1369. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1370. writel(status, phba->CAregaddr);
  1371. readl(phba->CAregaddr);
  1372. }
  1373. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1374. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1375. pring->stats.iocb_cmd_empty++;
  1376. /* Force update of the local copy of cmdGetInx */
  1377. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1378. lpfc_sli_resume_iocb(phba, pring);
  1379. if ((pring->lpfc_sli_cmd_available))
  1380. (pring->lpfc_sli_cmd_available) (phba, pring);
  1381. }
  1382. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1383. return rc;
  1384. }
  1385. int
  1386. lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
  1387. struct lpfc_sli_ring *pring, uint32_t mask)
  1388. {
  1389. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1390. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1391. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1392. IOCB_t *entry;
  1393. IOCB_t *irsp = NULL;
  1394. struct lpfc_iocbq *rspiocbp = NULL;
  1395. struct lpfc_iocbq *next_iocb;
  1396. struct lpfc_iocbq *cmdiocbp;
  1397. struct lpfc_iocbq *saveq;
  1398. uint8_t iocb_cmd_type;
  1399. lpfc_iocb_type type;
  1400. uint32_t status, free_saveq;
  1401. uint32_t portRspPut, portRspMax;
  1402. int rc = 1;
  1403. unsigned long iflag;
  1404. spin_lock_irqsave(&phba->hbalock, iflag);
  1405. pring->stats.iocb_event++;
  1406. /*
  1407. * The next available response entry should never exceed the maximum
  1408. * entries. If it does, treat it as an adapter hardware error.
  1409. */
  1410. portRspMax = pring->numRiocb;
  1411. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1412. if (portRspPut >= portRspMax) {
  1413. /*
  1414. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1415. * rsp ring <portRspMax>
  1416. */
  1417. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1418. "0303 Ring %d handler: portRspPut %d "
  1419. "is bigger then rsp ring %d\n",
  1420. pring->ringno, portRspPut, portRspMax);
  1421. phba->link_state = LPFC_HBA_ERROR;
  1422. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1423. phba->work_hs = HS_FFER3;
  1424. lpfc_handle_eratt(phba);
  1425. return 1;
  1426. }
  1427. rmb();
  1428. while (pring->rspidx != portRspPut) {
  1429. /*
  1430. * Build a completion list and call the appropriate handler.
  1431. * The process is to get the next available response iocb, get
  1432. * a free iocb from the list, copy the response data into the
  1433. * free iocb, insert to the continuation list, and update the
  1434. * next response index to slim. This process makes response
  1435. * iocb's in the ring available to DMA as fast as possible but
  1436. * pays a penalty for a copy operation. Since the iocb is
  1437. * only 32 bytes, this penalty is considered small relative to
  1438. * the PCI reads for register values and a slim write. When
  1439. * the ulpLe field is set, the entire Command has been
  1440. * received.
  1441. */
  1442. entry = lpfc_resp_iocb(phba, pring);
  1443. phba->last_completion_time = jiffies;
  1444. rspiocbp = __lpfc_sli_get_iocbq(phba);
  1445. if (rspiocbp == NULL) {
  1446. printk(KERN_ERR "%s: out of buffers! Failing "
  1447. "completion.\n", __FUNCTION__);
  1448. break;
  1449. }
  1450. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
  1451. phba->iocb_rsp_size);
  1452. irsp = &rspiocbp->iocb;
  1453. if (++pring->rspidx >= portRspMax)
  1454. pring->rspidx = 0;
  1455. if (pring->ringno == LPFC_ELS_RING) {
  1456. lpfc_debugfs_slow_ring_trc(phba,
  1457. "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
  1458. *(((uint32_t *) irsp) + 4),
  1459. *(((uint32_t *) irsp) + 6),
  1460. *(((uint32_t *) irsp) + 7));
  1461. }
  1462. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1463. if (list_empty(&(pring->iocb_continueq))) {
  1464. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1465. } else {
  1466. list_add_tail(&rspiocbp->list,
  1467. &(pring->iocb_continueq));
  1468. }
  1469. pring->iocb_continueq_cnt++;
  1470. if (irsp->ulpLe) {
  1471. /*
  1472. * By default, the driver expects to free all resources
  1473. * associated with this iocb completion.
  1474. */
  1475. free_saveq = 1;
  1476. saveq = list_get_first(&pring->iocb_continueq,
  1477. struct lpfc_iocbq, list);
  1478. irsp = &(saveq->iocb);
  1479. list_del_init(&pring->iocb_continueq);
  1480. pring->iocb_continueq_cnt = 0;
  1481. pring->stats.iocb_rsp++;
  1482. /*
  1483. * If resource errors reported from HBA, reduce
  1484. * queuedepths of the SCSI device.
  1485. */
  1486. if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
  1487. (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
  1488. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1489. lpfc_adjust_queue_depth(phba);
  1490. spin_lock_irqsave(&phba->hbalock, iflag);
  1491. }
  1492. if (irsp->ulpStatus) {
  1493. /* Rsp ring <ringno> error: IOCB */
  1494. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1495. "0328 Rsp Ring %d error: "
  1496. "IOCB Data: "
  1497. "x%x x%x x%x x%x "
  1498. "x%x x%x x%x x%x "
  1499. "x%x x%x x%x x%x "
  1500. "x%x x%x x%x x%x\n",
  1501. pring->ringno,
  1502. irsp->un.ulpWord[0],
  1503. irsp->un.ulpWord[1],
  1504. irsp->un.ulpWord[2],
  1505. irsp->un.ulpWord[3],
  1506. irsp->un.ulpWord[4],
  1507. irsp->un.ulpWord[5],
  1508. *(((uint32_t *) irsp) + 6),
  1509. *(((uint32_t *) irsp) + 7),
  1510. *(((uint32_t *) irsp) + 8),
  1511. *(((uint32_t *) irsp) + 9),
  1512. *(((uint32_t *) irsp) + 10),
  1513. *(((uint32_t *) irsp) + 11),
  1514. *(((uint32_t *) irsp) + 12),
  1515. *(((uint32_t *) irsp) + 13),
  1516. *(((uint32_t *) irsp) + 14),
  1517. *(((uint32_t *) irsp) + 15));
  1518. }
  1519. /*
  1520. * Fetch the IOCB command type and call the correct
  1521. * completion routine. Solicited and Unsolicited
  1522. * IOCBs on the ELS ring get freed back to the
  1523. * lpfc_iocb_list by the discovery kernel thread.
  1524. */
  1525. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1526. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1527. if (type == LPFC_SOL_IOCB) {
  1528. spin_unlock_irqrestore(&phba->hbalock,
  1529. iflag);
  1530. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1531. saveq);
  1532. spin_lock_irqsave(&phba->hbalock, iflag);
  1533. } else if (type == LPFC_UNSOL_IOCB) {
  1534. spin_unlock_irqrestore(&phba->hbalock,
  1535. iflag);
  1536. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1537. saveq);
  1538. spin_lock_irqsave(&phba->hbalock, iflag);
  1539. } else if (type == LPFC_ABORT_IOCB) {
  1540. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1541. ((cmdiocbp =
  1542. lpfc_sli_iocbq_lookup(phba, pring,
  1543. saveq)))) {
  1544. /* Call the specified completion
  1545. routine */
  1546. if (cmdiocbp->iocb_cmpl) {
  1547. spin_unlock_irqrestore(
  1548. &phba->hbalock,
  1549. iflag);
  1550. (cmdiocbp->iocb_cmpl) (phba,
  1551. cmdiocbp, saveq);
  1552. spin_lock_irqsave(
  1553. &phba->hbalock,
  1554. iflag);
  1555. } else
  1556. __lpfc_sli_release_iocbq(phba,
  1557. cmdiocbp);
  1558. }
  1559. } else if (type == LPFC_UNKNOWN_IOCB) {
  1560. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1561. char adaptermsg[LPFC_MAX_ADPTMSG];
  1562. memset(adaptermsg, 0,
  1563. LPFC_MAX_ADPTMSG);
  1564. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1565. MAX_MSG_DATA);
  1566. dev_warn(&((phba->pcidev)->dev),
  1567. "lpfc%d: %s\n",
  1568. phba->brd_no, adaptermsg);
  1569. } else {
  1570. /* Unknown IOCB command */
  1571. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1572. "0335 Unknown IOCB "
  1573. "command Data: x%x "
  1574. "x%x x%x x%x\n",
  1575. irsp->ulpCommand,
  1576. irsp->ulpStatus,
  1577. irsp->ulpIoTag,
  1578. irsp->ulpContext);
  1579. }
  1580. }
  1581. if (free_saveq) {
  1582. list_for_each_entry_safe(rspiocbp, next_iocb,
  1583. &saveq->list, list) {
  1584. list_del(&rspiocbp->list);
  1585. __lpfc_sli_release_iocbq(phba,
  1586. rspiocbp);
  1587. }
  1588. __lpfc_sli_release_iocbq(phba, saveq);
  1589. }
  1590. rspiocbp = NULL;
  1591. }
  1592. /*
  1593. * If the port response put pointer has not been updated, sync
  1594. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1595. * response put pointer.
  1596. */
  1597. if (pring->rspidx == portRspPut) {
  1598. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1599. }
  1600. } /* while (pring->rspidx != portRspPut) */
  1601. if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
  1602. /* At least one response entry has been freed */
  1603. pring->stats.iocb_rsp_full++;
  1604. /* SET RxRE_RSP in Chip Att register */
  1605. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1606. writel(status, phba->CAregaddr);
  1607. readl(phba->CAregaddr); /* flush */
  1608. }
  1609. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1610. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1611. pring->stats.iocb_cmd_empty++;
  1612. /* Force update of the local copy of cmdGetInx */
  1613. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1614. lpfc_sli_resume_iocb(phba, pring);
  1615. if ((pring->lpfc_sli_cmd_available))
  1616. (pring->lpfc_sli_cmd_available) (phba, pring);
  1617. }
  1618. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1619. return rc;
  1620. }
  1621. void
  1622. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1623. {
  1624. LIST_HEAD(completions);
  1625. struct lpfc_iocbq *iocb, *next_iocb;
  1626. IOCB_t *cmd = NULL;
  1627. if (pring->ringno == LPFC_ELS_RING) {
  1628. lpfc_fabric_abort_hba(phba);
  1629. }
  1630. /* Error everything on txq and txcmplq
  1631. * First do the txq.
  1632. */
  1633. spin_lock_irq(&phba->hbalock);
  1634. list_splice_init(&pring->txq, &completions);
  1635. pring->txq_cnt = 0;
  1636. /* Next issue ABTS for everything on the txcmplq */
  1637. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
  1638. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  1639. spin_unlock_irq(&phba->hbalock);
  1640. while (!list_empty(&completions)) {
  1641. iocb = list_get_first(&completions, struct lpfc_iocbq, list);
  1642. cmd = &iocb->iocb;
  1643. list_del_init(&iocb->list);
  1644. if (!iocb->iocb_cmpl)
  1645. lpfc_sli_release_iocbq(phba, iocb);
  1646. else {
  1647. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1648. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1649. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1650. }
  1651. }
  1652. }
  1653. int
  1654. lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
  1655. {
  1656. uint32_t status;
  1657. int i = 0;
  1658. int retval = 0;
  1659. /* Read the HBA Host Status Register */
  1660. status = readl(phba->HSregaddr);
  1661. /*
  1662. * Check status register every 100ms for 5 retries, then every
  1663. * 500ms for 5, then every 2.5 sec for 5, then reset board and
  1664. * every 2.5 sec for 4.
  1665. * Break our of the loop if errors occurred during init.
  1666. */
  1667. while (((status & mask) != mask) &&
  1668. !(status & HS_FFERM) &&
  1669. i++ < 20) {
  1670. if (i <= 5)
  1671. msleep(10);
  1672. else if (i <= 10)
  1673. msleep(500);
  1674. else
  1675. msleep(2500);
  1676. if (i == 15) {
  1677. /* Do post */
  1678. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1679. lpfc_sli_brdrestart(phba);
  1680. }
  1681. /* Read the HBA Host Status Register */
  1682. status = readl(phba->HSregaddr);
  1683. }
  1684. /* Check to see if any errors occurred during init */
  1685. if ((status & HS_FFERM) || (i >= 20)) {
  1686. phba->link_state = LPFC_HBA_ERROR;
  1687. retval = 1;
  1688. }
  1689. return retval;
  1690. }
  1691. #define BARRIER_TEST_PATTERN (0xdeadbeef)
  1692. void lpfc_reset_barrier(struct lpfc_hba *phba)
  1693. {
  1694. uint32_t __iomem *resp_buf;
  1695. uint32_t __iomem *mbox_buf;
  1696. volatile uint32_t mbox;
  1697. uint32_t hc_copy;
  1698. int i;
  1699. uint8_t hdrtype;
  1700. pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
  1701. if (hdrtype != 0x80 ||
  1702. (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
  1703. FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
  1704. return;
  1705. /*
  1706. * Tell the other part of the chip to suspend temporarily all
  1707. * its DMA activity.
  1708. */
  1709. resp_buf = phba->MBslimaddr;
  1710. /* Disable the error attention */
  1711. hc_copy = readl(phba->HCregaddr);
  1712. writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
  1713. readl(phba->HCregaddr); /* flush */
  1714. phba->link_flag |= LS_IGNORE_ERATT;
  1715. if (readl(phba->HAregaddr) & HA_ERATT) {
  1716. /* Clear Chip error bit */
  1717. writel(HA_ERATT, phba->HAregaddr);
  1718. phba->pport->stopped = 1;
  1719. }
  1720. mbox = 0;
  1721. ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
  1722. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
  1723. writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
  1724. mbox_buf = phba->MBslimaddr;
  1725. writel(mbox, mbox_buf);
  1726. for (i = 0;
  1727. readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
  1728. mdelay(1);
  1729. if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
  1730. if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
  1731. phba->pport->stopped)
  1732. goto restore_hc;
  1733. else
  1734. goto clear_errat;
  1735. }
  1736. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
  1737. for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
  1738. mdelay(1);
  1739. clear_errat:
  1740. while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
  1741. mdelay(1);
  1742. if (readl(phba->HAregaddr) & HA_ERATT) {
  1743. writel(HA_ERATT, phba->HAregaddr);
  1744. phba->pport->stopped = 1;
  1745. }
  1746. restore_hc:
  1747. phba->link_flag &= ~LS_IGNORE_ERATT;
  1748. writel(hc_copy, phba->HCregaddr);
  1749. readl(phba->HCregaddr); /* flush */
  1750. }
  1751. int
  1752. lpfc_sli_brdkill(struct lpfc_hba *phba)
  1753. {
  1754. struct lpfc_sli *psli;
  1755. LPFC_MBOXQ_t *pmb;
  1756. uint32_t status;
  1757. uint32_t ha_copy;
  1758. int retval;
  1759. int i = 0;
  1760. psli = &phba->sli;
  1761. /* Kill HBA */
  1762. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1763. "0329 Kill HBA Data: x%x x%x\n",
  1764. phba->pport->port_state, psli->sli_flag);
  1765. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1766. if (!pmb)
  1767. return 1;
  1768. /* Disable the error attention */
  1769. spin_lock_irq(&phba->hbalock);
  1770. status = readl(phba->HCregaddr);
  1771. status &= ~HC_ERINT_ENA;
  1772. writel(status, phba->HCregaddr);
  1773. readl(phba->HCregaddr); /* flush */
  1774. phba->link_flag |= LS_IGNORE_ERATT;
  1775. spin_unlock_irq(&phba->hbalock);
  1776. lpfc_kill_board(phba, pmb);
  1777. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  1778. retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  1779. if (retval != MBX_SUCCESS) {
  1780. if (retval != MBX_BUSY)
  1781. mempool_free(pmb, phba->mbox_mem_pool);
  1782. spin_lock_irq(&phba->hbalock);
  1783. phba->link_flag &= ~LS_IGNORE_ERATT;
  1784. spin_unlock_irq(&phba->hbalock);
  1785. return 1;
  1786. }
  1787. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1788. mempool_free(pmb, phba->mbox_mem_pool);
  1789. /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
  1790. * attention every 100ms for 3 seconds. If we don't get ERATT after
  1791. * 3 seconds we still set HBA_ERROR state because the status of the
  1792. * board is now undefined.
  1793. */
  1794. ha_copy = readl(phba->HAregaddr);
  1795. while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
  1796. mdelay(100);
  1797. ha_copy = readl(phba->HAregaddr);
  1798. }
  1799. del_timer_sync(&psli->mbox_tmo);
  1800. if (ha_copy & HA_ERATT) {
  1801. writel(HA_ERATT, phba->HAregaddr);
  1802. phba->pport->stopped = 1;
  1803. }
  1804. spin_lock_irq(&phba->hbalock);
  1805. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1806. phba->link_flag &= ~LS_IGNORE_ERATT;
  1807. spin_unlock_irq(&phba->hbalock);
  1808. psli->mbox_active = NULL;
  1809. lpfc_hba_down_post(phba);
  1810. phba->link_state = LPFC_HBA_ERROR;
  1811. return ha_copy & HA_ERATT ? 0 : 1;
  1812. }
  1813. int
  1814. lpfc_sli_brdreset(struct lpfc_hba *phba)
  1815. {
  1816. struct lpfc_sli *psli;
  1817. struct lpfc_sli_ring *pring;
  1818. uint16_t cfg_value;
  1819. int i;
  1820. psli = &phba->sli;
  1821. /* Reset HBA */
  1822. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1823. "0325 Reset HBA Data: x%x x%x\n",
  1824. phba->pport->port_state, psli->sli_flag);
  1825. /* perform board reset */
  1826. phba->fc_eventTag = 0;
  1827. phba->pport->fc_myDID = 0;
  1828. phba->pport->fc_prevDID = 0;
  1829. /* Turn off parity checking and serr during the physical reset */
  1830. pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
  1831. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1832. (cfg_value &
  1833. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1834. psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
  1835. /* Now toggle INITFF bit in the Host Control Register */
  1836. writel(HC_INITFF, phba->HCregaddr);
  1837. mdelay(1);
  1838. readl(phba->HCregaddr); /* flush */
  1839. writel(0, phba->HCregaddr);
  1840. readl(phba->HCregaddr); /* flush */
  1841. /* Restore PCI cmd register */
  1842. pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
  1843. /* Initialize relevant SLI info */
  1844. for (i = 0; i < psli->num_rings; i++) {
  1845. pring = &psli->ring[i];
  1846. pring->flag = 0;
  1847. pring->rspidx = 0;
  1848. pring->next_cmdidx = 0;
  1849. pring->local_getidx = 0;
  1850. pring->cmdidx = 0;
  1851. pring->missbufcnt = 0;
  1852. }
  1853. phba->link_state = LPFC_WARM_START;
  1854. return 0;
  1855. }
  1856. int
  1857. lpfc_sli_brdrestart(struct lpfc_hba *phba)
  1858. {
  1859. MAILBOX_t *mb;
  1860. struct lpfc_sli *psli;
  1861. uint16_t skip_post;
  1862. volatile uint32_t word0;
  1863. void __iomem *to_slim;
  1864. spin_lock_irq(&phba->hbalock);
  1865. psli = &phba->sli;
  1866. /* Restart HBA */
  1867. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1868. "0337 Restart HBA Data: x%x x%x\n",
  1869. phba->pport->port_state, psli->sli_flag);
  1870. word0 = 0;
  1871. mb = (MAILBOX_t *) &word0;
  1872. mb->mbxCommand = MBX_RESTART;
  1873. mb->mbxHc = 1;
  1874. lpfc_reset_barrier(phba);
  1875. to_slim = phba->MBslimaddr;
  1876. writel(*(uint32_t *) mb, to_slim);
  1877. readl(to_slim); /* flush */
  1878. /* Only skip post after fc_ffinit is completed */
  1879. if (phba->pport->port_state) {
  1880. skip_post = 1;
  1881. word0 = 1; /* This is really setting up word1 */
  1882. } else {
  1883. skip_post = 0;
  1884. word0 = 0; /* This is really setting up word1 */
  1885. }
  1886. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1887. writel(*(uint32_t *) mb, to_slim);
  1888. readl(to_slim); /* flush */
  1889. lpfc_sli_brdreset(phba);
  1890. phba->pport->stopped = 0;
  1891. phba->link_state = LPFC_INIT_START;
  1892. spin_unlock_irq(&phba->hbalock);
  1893. memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
  1894. psli->stats_start = get_seconds();
  1895. if (skip_post)
  1896. mdelay(100);
  1897. else
  1898. mdelay(2000);
  1899. lpfc_hba_down_post(phba);
  1900. return 0;
  1901. }
  1902. static int
  1903. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1904. {
  1905. uint32_t status, i = 0;
  1906. /* Read the HBA Host Status Register */
  1907. status = readl(phba->HSregaddr);
  1908. /* Check status register to see what current state is */
  1909. i = 0;
  1910. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1911. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1912. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1913. * 4.
  1914. */
  1915. if (i++ >= 20) {
  1916. /* Adapter failed to init, timeout, status reg
  1917. <status> */
  1918. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1919. "0436 Adapter failed to init, "
  1920. "timeout, status reg x%x\n", status);
  1921. phba->link_state = LPFC_HBA_ERROR;
  1922. return -ETIMEDOUT;
  1923. }
  1924. /* Check to see if any errors occurred during init */
  1925. if (status & HS_FFERM) {
  1926. /* ERROR: During chipset initialization */
  1927. /* Adapter failed to init, chipset, status reg
  1928. <status> */
  1929. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1930. "0437 Adapter failed to init, "
  1931. "chipset, status reg x%x\n", status);
  1932. phba->link_state = LPFC_HBA_ERROR;
  1933. return -EIO;
  1934. }
  1935. if (i <= 5) {
  1936. msleep(10);
  1937. } else if (i <= 10) {
  1938. msleep(500);
  1939. } else {
  1940. msleep(2500);
  1941. }
  1942. if (i == 15) {
  1943. /* Do post */
  1944. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1945. lpfc_sli_brdrestart(phba);
  1946. }
  1947. /* Read the HBA Host Status Register */
  1948. status = readl(phba->HSregaddr);
  1949. }
  1950. /* Check to see if any errors occurred during init */
  1951. if (status & HS_FFERM) {
  1952. /* ERROR: During chipset initialization */
  1953. /* Adapter failed to init, chipset, status reg <status> */
  1954. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1955. "0438 Adapter failed to init, chipset, "
  1956. "status reg x%x\n", status);
  1957. phba->link_state = LPFC_HBA_ERROR;
  1958. return -EIO;
  1959. }
  1960. /* Clear all interrupt enable conditions */
  1961. writel(0, phba->HCregaddr);
  1962. readl(phba->HCregaddr); /* flush */
  1963. /* setup host attn register */
  1964. writel(0xffffffff, phba->HAregaddr);
  1965. readl(phba->HAregaddr); /* flush */
  1966. return 0;
  1967. }
  1968. int
  1969. lpfc_sli_hbq_count(void)
  1970. {
  1971. return ARRAY_SIZE(lpfc_hbq_defs);
  1972. }
  1973. static int
  1974. lpfc_sli_hbq_entry_count(void)
  1975. {
  1976. int hbq_count = lpfc_sli_hbq_count();
  1977. int count = 0;
  1978. int i;
  1979. for (i = 0; i < hbq_count; ++i)
  1980. count += lpfc_hbq_defs[i]->entry_count;
  1981. return count;
  1982. }
  1983. int
  1984. lpfc_sli_hbq_size(void)
  1985. {
  1986. return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
  1987. }
  1988. static int
  1989. lpfc_sli_hbq_setup(struct lpfc_hba *phba)
  1990. {
  1991. int hbq_count = lpfc_sli_hbq_count();
  1992. LPFC_MBOXQ_t *pmb;
  1993. MAILBOX_t *pmbox;
  1994. uint32_t hbqno;
  1995. uint32_t hbq_entry_index;
  1996. /* Get a Mailbox buffer to setup mailbox
  1997. * commands for HBA initialization
  1998. */
  1999. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  2000. if (!pmb)
  2001. return -ENOMEM;
  2002. pmbox = &pmb->mb;
  2003. /* Initialize the struct lpfc_sli_hbq structure for each hbq */
  2004. phba->link_state = LPFC_INIT_MBX_CMDS;
  2005. hbq_entry_index = 0;
  2006. for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
  2007. phba->hbqs[hbqno].next_hbqPutIdx = 0;
  2008. phba->hbqs[hbqno].hbqPutIdx = 0;
  2009. phba->hbqs[hbqno].local_hbqGetIdx = 0;
  2010. phba->hbqs[hbqno].entry_count =
  2011. lpfc_hbq_defs[hbqno]->entry_count;
  2012. lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
  2013. hbq_entry_index, pmb);
  2014. hbq_entry_index += phba->hbqs[hbqno].entry_count;
  2015. if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
  2016. /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
  2017. mbxStatus <status>, ring <num> */
  2018. lpfc_printf_log(phba, KERN_ERR,
  2019. LOG_SLI | LOG_VPORT,
  2020. "1805 Adapter failed to init. "
  2021. "Data: x%x x%x x%x\n",
  2022. pmbox->mbxCommand,
  2023. pmbox->mbxStatus, hbqno);
  2024. phba->link_state = LPFC_HBA_ERROR;
  2025. mempool_free(pmb, phba->mbox_mem_pool);
  2026. return ENXIO;
  2027. }
  2028. }
  2029. phba->hbq_count = hbq_count;
  2030. mempool_free(pmb, phba->mbox_mem_pool);
  2031. /* Initially populate or replenish the HBQs */
  2032. for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
  2033. if (lpfc_sli_hbqbuf_init_hbqs(phba, hbqno))
  2034. return -ENOMEM;
  2035. }
  2036. return 0;
  2037. }
  2038. static int
  2039. lpfc_do_config_port(struct lpfc_hba *phba, int sli_mode)
  2040. {
  2041. LPFC_MBOXQ_t *pmb;
  2042. uint32_t resetcount = 0, rc = 0, done = 0;
  2043. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  2044. if (!pmb) {
  2045. phba->link_state = LPFC_HBA_ERROR;
  2046. return -ENOMEM;
  2047. }
  2048. phba->sli_rev = sli_mode;
  2049. while (resetcount < 2 && !done) {
  2050. spin_lock_irq(&phba->hbalock);
  2051. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  2052. spin_unlock_irq(&phba->hbalock);
  2053. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  2054. lpfc_sli_brdrestart(phba);
  2055. msleep(2500);
  2056. rc = lpfc_sli_chipset_init(phba);
  2057. if (rc)
  2058. break;
  2059. spin_lock_irq(&phba->hbalock);
  2060. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2061. spin_unlock_irq(&phba->hbalock);
  2062. resetcount++;
  2063. /* Call pre CONFIG_PORT mailbox command initialization. A
  2064. * value of 0 means the call was successful. Any other
  2065. * nonzero value is a failure, but if ERESTART is returned,
  2066. * the driver may reset the HBA and try again.
  2067. */
  2068. rc = lpfc_config_port_prep(phba);
  2069. if (rc == -ERESTART) {
  2070. phba->link_state = LPFC_LINK_UNKNOWN;
  2071. continue;
  2072. } else if (rc) {
  2073. break;
  2074. }
  2075. phba->link_state = LPFC_INIT_MBX_CMDS;
  2076. lpfc_config_port(phba, pmb);
  2077. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  2078. if (rc != MBX_SUCCESS) {
  2079. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2080. "0442 Adapter failed to init, mbxCmd x%x "
  2081. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  2082. pmb->mb.mbxCommand, pmb->mb.mbxStatus, 0);
  2083. spin_lock_irq(&phba->hbalock);
  2084. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  2085. spin_unlock_irq(&phba->hbalock);
  2086. rc = -ENXIO;
  2087. } else {
  2088. done = 1;
  2089. phba->max_vpi = (phba->max_vpi &&
  2090. pmb->mb.un.varCfgPort.gmv) != 0
  2091. ? pmb->mb.un.varCfgPort.max_vpi
  2092. : 0;
  2093. }
  2094. }
  2095. if (!done) {
  2096. rc = -EINVAL;
  2097. goto do_prep_failed;
  2098. }
  2099. if ((pmb->mb.un.varCfgPort.sli_mode == 3) &&
  2100. (!pmb->mb.un.varCfgPort.cMA)) {
  2101. rc = -ENXIO;
  2102. goto do_prep_failed;
  2103. }
  2104. return rc;
  2105. do_prep_failed:
  2106. mempool_free(pmb, phba->mbox_mem_pool);
  2107. return rc;
  2108. }
  2109. int
  2110. lpfc_sli_hba_setup(struct lpfc_hba *phba)
  2111. {
  2112. uint32_t rc;
  2113. int mode = 3;
  2114. switch (lpfc_sli_mode) {
  2115. case 2:
  2116. if (phba->cfg_enable_npiv) {
  2117. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2118. "1824 NPIV enabled: Override lpfc_sli_mode "
  2119. "parameter (%d) to auto (0).\n",
  2120. lpfc_sli_mode);
  2121. break;
  2122. }
  2123. mode = 2;
  2124. break;
  2125. case 0:
  2126. case 3:
  2127. break;
  2128. default:
  2129. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2130. "1819 Unrecognized lpfc_sli_mode "
  2131. "parameter: %d.\n", lpfc_sli_mode);
  2132. break;
  2133. }
  2134. rc = lpfc_do_config_port(phba, mode);
  2135. if (rc && lpfc_sli_mode == 3)
  2136. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2137. "1820 Unable to select SLI-3. "
  2138. "Not supported by adapter.\n");
  2139. if (rc && mode != 2)
  2140. rc = lpfc_do_config_port(phba, 2);
  2141. if (rc)
  2142. goto lpfc_sli_hba_setup_error;
  2143. if (phba->sli_rev == 3) {
  2144. phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
  2145. phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
  2146. phba->sli3_options |= LPFC_SLI3_ENABLED;
  2147. phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
  2148. } else {
  2149. phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
  2150. phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
  2151. phba->sli3_options = 0;
  2152. }
  2153. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  2154. "0444 Firmware in SLI %x mode. Max_vpi %d\n",
  2155. phba->sli_rev, phba->max_vpi);
  2156. rc = lpfc_sli_ring_map(phba);
  2157. if (rc)
  2158. goto lpfc_sli_hba_setup_error;
  2159. /* Init HBQs */
  2160. if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
  2161. rc = lpfc_sli_hbq_setup(phba);
  2162. if (rc)
  2163. goto lpfc_sli_hba_setup_error;
  2164. }
  2165. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  2166. rc = lpfc_config_port_post(phba);
  2167. if (rc)
  2168. goto lpfc_sli_hba_setup_error;
  2169. return rc;
  2170. lpfc_sli_hba_setup_error:
  2171. phba->link_state = LPFC_HBA_ERROR;
  2172. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  2173. "0445 Firmware initialization failed\n");
  2174. return rc;
  2175. }
  2176. /*! lpfc_mbox_timeout
  2177. *
  2178. * \pre
  2179. * \post
  2180. * \param hba Pointer to per struct lpfc_hba structure
  2181. * \param l1 Pointer to the driver's mailbox queue.
  2182. * \return
  2183. * void
  2184. *
  2185. * \b Description:
  2186. *
  2187. * This routine handles mailbox timeout events at timer interrupt context.
  2188. */
  2189. void
  2190. lpfc_mbox_timeout(unsigned long ptr)
  2191. {
  2192. struct lpfc_hba *phba = (struct lpfc_hba *) ptr;
  2193. unsigned long iflag;
  2194. uint32_t tmo_posted;
  2195. spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
  2196. tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
  2197. if (!tmo_posted)
  2198. phba->pport->work_port_events |= WORKER_MBOX_TMO;
  2199. spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
  2200. if (!tmo_posted) {
  2201. spin_lock_irqsave(&phba->hbalock, iflag);
  2202. if (phba->work_wait)
  2203. lpfc_worker_wake_up(phba);
  2204. spin_unlock_irqrestore(&phba->hbalock, iflag);
  2205. }
  2206. }
  2207. void
  2208. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  2209. {
  2210. LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
  2211. MAILBOX_t *mb = &pmbox->mb;
  2212. struct lpfc_sli *psli = &phba->sli;
  2213. struct lpfc_sli_ring *pring;
  2214. if (!(phba->pport->work_port_events & WORKER_MBOX_TMO)) {
  2215. return;
  2216. }
  2217. /* Mbox cmd <mbxCommand> timeout */
  2218. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  2219. "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
  2220. mb->mbxCommand,
  2221. phba->pport->port_state,
  2222. phba->sli.sli_flag,
  2223. phba->sli.mbox_active);
  2224. /* Setting state unknown so lpfc_sli_abort_iocb_ring
  2225. * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
  2226. * it to fail all oustanding SCSI IO.
  2227. */
  2228. spin_lock_irq(&phba->pport->work_port_lock);
  2229. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  2230. spin_unlock_irq(&phba->pport->work_port_lock);
  2231. spin_lock_irq(&phba->hbalock);
  2232. phba->link_state = LPFC_LINK_UNKNOWN;
  2233. phba->pport->fc_flag |= FC_ESTABLISH_LINK;
  2234. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  2235. spin_unlock_irq(&phba->hbalock);
  2236. pring = &psli->ring[psli->fcp_ring];
  2237. lpfc_sli_abort_iocb_ring(phba, pring);
  2238. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  2239. "0345 Resetting board due to mailbox timeout\n");
  2240. /*
  2241. * lpfc_offline calls lpfc_sli_hba_down which will clean up
  2242. * on oustanding mailbox commands.
  2243. */
  2244. lpfc_offline_prep(phba);
  2245. lpfc_offline(phba);
  2246. lpfc_sli_brdrestart(phba);
  2247. if (lpfc_online(phba) == 0) /* Initialize the HBA */
  2248. mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
  2249. lpfc_unblock_mgmt_io(phba);
  2250. return;
  2251. }
  2252. int
  2253. lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
  2254. {
  2255. MAILBOX_t *mb;
  2256. struct lpfc_sli *psli = &phba->sli;
  2257. uint32_t status, evtctr;
  2258. uint32_t ha_copy;
  2259. int i;
  2260. unsigned long drvr_flag = 0;
  2261. volatile uint32_t word0, ldata;
  2262. void __iomem *to_slim;
  2263. if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
  2264. pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
  2265. if(!pmbox->vport) {
  2266. lpfc_printf_log(phba, KERN_ERR,
  2267. LOG_MBOX | LOG_VPORT,
  2268. "1806 Mbox x%x failed. No vport\n",
  2269. pmbox->mb.mbxCommand);
  2270. dump_stack();
  2271. return MBXERR_ERROR;
  2272. }
  2273. }
  2274. /* If the PCI channel is in offline state, do not post mbox. */
  2275. if (unlikely(pci_channel_offline(phba->pcidev)))
  2276. return MBX_NOT_FINISHED;
  2277. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  2278. psli = &phba->sli;
  2279. mb = &pmbox->mb;
  2280. status = MBX_SUCCESS;
  2281. if (phba->link_state == LPFC_HBA_ERROR) {
  2282. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2283. /* Mbox command <mbxCommand> cannot issue */
  2284. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
  2285. return MBX_NOT_FINISHED;
  2286. }
  2287. if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
  2288. !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
  2289. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2290. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
  2291. return MBX_NOT_FINISHED;
  2292. }
  2293. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  2294. /* Polling for a mbox command when another one is already active
  2295. * is not allowed in SLI. Also, the driver must have established
  2296. * SLI2 mode to queue and process multiple mbox commands.
  2297. */
  2298. if (flag & MBX_POLL) {
  2299. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2300. /* Mbox command <mbxCommand> cannot issue */
  2301. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2302. return MBX_NOT_FINISHED;
  2303. }
  2304. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  2305. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2306. /* Mbox command <mbxCommand> cannot issue */
  2307. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2308. return MBX_NOT_FINISHED;
  2309. }
  2310. /* Another mailbox command is still being processed, queue this
  2311. * command to be processed later.
  2312. */
  2313. lpfc_mbox_put(phba, pmbox);
  2314. /* Mbox cmd issue - BUSY */
  2315. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  2316. "(%d):0308 Mbox cmd issue - BUSY Data: "
  2317. "x%x x%x x%x x%x\n",
  2318. pmbox->vport ? pmbox->vport->vpi : 0xffffff,
  2319. mb->mbxCommand, phba->pport->port_state,
  2320. psli->sli_flag, flag);
  2321. psli->slistat.mbox_busy++;
  2322. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2323. if (pmbox->vport) {
  2324. lpfc_debugfs_disc_trc(pmbox->vport,
  2325. LPFC_DISC_TRC_MBOX_VPORT,
  2326. "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
  2327. (uint32_t)mb->mbxCommand,
  2328. mb->un.varWords[0], mb->un.varWords[1]);
  2329. }
  2330. else {
  2331. lpfc_debugfs_disc_trc(phba->pport,
  2332. LPFC_DISC_TRC_MBOX,
  2333. "MBOX Bsy: cmd:x%x mb:x%x x%x",
  2334. (uint32_t)mb->mbxCommand,
  2335. mb->un.varWords[0], mb->un.varWords[1]);
  2336. }
  2337. return MBX_BUSY;
  2338. }
  2339. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  2340. /* If we are not polling, we MUST be in SLI2 mode */
  2341. if (flag != MBX_POLL) {
  2342. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
  2343. (mb->mbxCommand != MBX_KILL_BOARD)) {
  2344. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2345. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2346. /* Mbox command <mbxCommand> cannot issue */
  2347. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2348. return MBX_NOT_FINISHED;
  2349. }
  2350. /* timeout active mbox command */
  2351. mod_timer(&psli->mbox_tmo, (jiffies +
  2352. (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
  2353. }
  2354. /* Mailbox cmd <cmd> issue */
  2355. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  2356. "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
  2357. "x%x\n",
  2358. pmbox->vport ? pmbox->vport->vpi : 0,
  2359. mb->mbxCommand, phba->pport->port_state,
  2360. psli->sli_flag, flag);
  2361. if (mb->mbxCommand != MBX_HEARTBEAT) {
  2362. if (pmbox->vport) {
  2363. lpfc_debugfs_disc_trc(pmbox->vport,
  2364. LPFC_DISC_TRC_MBOX_VPORT,
  2365. "MBOX Send vport: cmd:x%x mb:x%x x%x",
  2366. (uint32_t)mb->mbxCommand,
  2367. mb->un.varWords[0], mb->un.varWords[1]);
  2368. }
  2369. else {
  2370. lpfc_debugfs_disc_trc(phba->pport,
  2371. LPFC_DISC_TRC_MBOX,
  2372. "MBOX Send: cmd:x%x mb:x%x x%x",
  2373. (uint32_t)mb->mbxCommand,
  2374. mb->un.varWords[0], mb->un.varWords[1]);
  2375. }
  2376. }
  2377. psli->slistat.mbox_cmd++;
  2378. evtctr = psli->slistat.mbox_event;
  2379. /* next set own bit for the adapter and copy over command word */
  2380. mb->mbxOwner = OWN_CHIP;
  2381. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2382. /* First copy command data to host SLIM area */
  2383. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  2384. } else {
  2385. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2386. /* copy command data into host mbox for cmpl */
  2387. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  2388. MAILBOX_CMD_SIZE);
  2389. }
  2390. /* First copy mbox command data to HBA SLIM, skip past first
  2391. word */
  2392. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  2393. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  2394. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  2395. /* Next copy over first word, with mbxOwner set */
  2396. ldata = *((volatile uint32_t *)mb);
  2397. to_slim = phba->MBslimaddr;
  2398. writel(ldata, to_slim);
  2399. readl(to_slim); /* flush */
  2400. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2401. /* switch over to host mailbox */
  2402. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  2403. }
  2404. }
  2405. wmb();
  2406. /* interrupt board to doit right away */
  2407. writel(CA_MBATT, phba->CAregaddr);
  2408. readl(phba->CAregaddr); /* flush */
  2409. switch (flag) {
  2410. case MBX_NOWAIT:
  2411. /* Don't wait for it to finish, just return */
  2412. psli->mbox_active = pmbox;
  2413. break;
  2414. case MBX_POLL:
  2415. psli->mbox_active = NULL;
  2416. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2417. /* First read mbox status word */
  2418. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  2419. word0 = le32_to_cpu(word0);
  2420. } else {
  2421. /* First read mbox status word */
  2422. word0 = readl(phba->MBslimaddr);
  2423. }
  2424. /* Read the HBA Host Attention Register */
  2425. ha_copy = readl(phba->HAregaddr);
  2426. i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
  2427. i *= 1000; /* Convert to ms */
  2428. /* Wait for command to complete */
  2429. while (((word0 & OWN_CHIP) == OWN_CHIP) ||
  2430. (!(ha_copy & HA_MBATT) &&
  2431. (phba->link_state > LPFC_WARM_START))) {
  2432. if (i-- <= 0) {
  2433. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2434. spin_unlock_irqrestore(&phba->hbalock,
  2435. drvr_flag);
  2436. return MBX_NOT_FINISHED;
  2437. }
  2438. /* Check if we took a mbox interrupt while we were
  2439. polling */
  2440. if (((word0 & OWN_CHIP) != OWN_CHIP)
  2441. && (evtctr != psli->slistat.mbox_event))
  2442. break;
  2443. spin_unlock_irqrestore(&phba->hbalock,
  2444. drvr_flag);
  2445. msleep(1);
  2446. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  2447. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2448. /* First copy command data */
  2449. word0 = *((volatile uint32_t *)
  2450. &phba->slim2p->mbx);
  2451. word0 = le32_to_cpu(word0);
  2452. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2453. MAILBOX_t *slimmb;
  2454. volatile uint32_t slimword0;
  2455. /* Check real SLIM for any errors */
  2456. slimword0 = readl(phba->MBslimaddr);
  2457. slimmb = (MAILBOX_t *) & slimword0;
  2458. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  2459. && slimmb->mbxStatus) {
  2460. psli->sli_flag &=
  2461. ~LPFC_SLI2_ACTIVE;
  2462. word0 = slimword0;
  2463. }
  2464. }
  2465. } else {
  2466. /* First copy command data */
  2467. word0 = readl(phba->MBslimaddr);
  2468. }
  2469. /* Read the HBA Host Attention Register */
  2470. ha_copy = readl(phba->HAregaddr);
  2471. }
  2472. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2473. /* copy results back to user */
  2474. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  2475. MAILBOX_CMD_SIZE);
  2476. } else {
  2477. /* First copy command data */
  2478. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  2479. MAILBOX_CMD_SIZE);
  2480. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  2481. pmbox->context2) {
  2482. lpfc_memcpy_from_slim((void *)pmbox->context2,
  2483. phba->MBslimaddr + DMP_RSP_OFFSET,
  2484. mb->un.varDmp.word_cnt);
  2485. }
  2486. }
  2487. writel(HA_MBATT, phba->HAregaddr);
  2488. readl(phba->HAregaddr); /* flush */
  2489. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2490. status = mb->mbxStatus;
  2491. }
  2492. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2493. return status;
  2494. }
  2495. /*
  2496. * Caller needs to hold lock.
  2497. */
  2498. static void
  2499. __lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2500. struct lpfc_iocbq *piocb)
  2501. {
  2502. /* Insert the caller's iocb in the txq tail for later processing. */
  2503. list_add_tail(&piocb->list, &pring->txq);
  2504. pring->txq_cnt++;
  2505. }
  2506. static struct lpfc_iocbq *
  2507. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2508. struct lpfc_iocbq **piocb)
  2509. {
  2510. struct lpfc_iocbq * nextiocb;
  2511. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  2512. if (!nextiocb) {
  2513. nextiocb = *piocb;
  2514. *piocb = NULL;
  2515. }
  2516. return nextiocb;
  2517. }
  2518. /*
  2519. * Lockless version of lpfc_sli_issue_iocb.
  2520. */
  2521. static int
  2522. __lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2523. struct lpfc_iocbq *piocb, uint32_t flag)
  2524. {
  2525. struct lpfc_iocbq *nextiocb;
  2526. IOCB_t *iocb;
  2527. if (piocb->iocb_cmpl && (!piocb->vport) &&
  2528. (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
  2529. (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
  2530. lpfc_printf_log(phba, KERN_ERR,
  2531. LOG_SLI | LOG_VPORT,
  2532. "1807 IOCB x%x failed. No vport\n",
  2533. piocb->iocb.ulpCommand);
  2534. dump_stack();
  2535. return IOCB_ERROR;
  2536. }
  2537. /* If the PCI channel is in offline state, do not post iocbs. */
  2538. if (unlikely(pci_channel_offline(phba->pcidev)))
  2539. return IOCB_ERROR;
  2540. /*
  2541. * We should never get an IOCB if we are in a < LINK_DOWN state
  2542. */
  2543. if (unlikely(phba->link_state < LPFC_LINK_DOWN))
  2544. return IOCB_ERROR;
  2545. /*
  2546. * Check to see if we are blocking IOCB processing because of a
  2547. * outstanding event.
  2548. */
  2549. if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
  2550. goto iocb_busy;
  2551. if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
  2552. /*
  2553. * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
  2554. * can be issued if the link is not up.
  2555. */
  2556. switch (piocb->iocb.ulpCommand) {
  2557. case CMD_QUE_RING_BUF_CN:
  2558. case CMD_QUE_RING_BUF64_CN:
  2559. /*
  2560. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  2561. * completion, iocb_cmpl MUST be 0.
  2562. */
  2563. if (piocb->iocb_cmpl)
  2564. piocb->iocb_cmpl = NULL;
  2565. /*FALLTHROUGH*/
  2566. case CMD_CREATE_XRI_CR:
  2567. case CMD_CLOSE_XRI_CN:
  2568. case CMD_CLOSE_XRI_CX:
  2569. break;
  2570. default:
  2571. goto iocb_busy;
  2572. }
  2573. /*
  2574. * For FCP commands, we must be in a state where we can process link
  2575. * attention events.
  2576. */
  2577. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  2578. !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
  2579. goto iocb_busy;
  2580. }
  2581. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  2582. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  2583. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  2584. if (iocb)
  2585. lpfc_sli_update_ring(phba, pring);
  2586. else
  2587. lpfc_sli_update_full_ring(phba, pring);
  2588. if (!piocb)
  2589. return IOCB_SUCCESS;
  2590. goto out_busy;
  2591. iocb_busy:
  2592. pring->stats.iocb_cmd_delay++;
  2593. out_busy:
  2594. if (!(flag & SLI_IOCB_RET_IOCB)) {
  2595. __lpfc_sli_ringtx_put(phba, pring, piocb);
  2596. return IOCB_SUCCESS;
  2597. }
  2598. return IOCB_BUSY;
  2599. }
  2600. int
  2601. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2602. struct lpfc_iocbq *piocb, uint32_t flag)
  2603. {
  2604. unsigned long iflags;
  2605. int rc;
  2606. spin_lock_irqsave(&phba->hbalock, iflags);
  2607. rc = __lpfc_sli_issue_iocb(phba, pring, piocb, flag);
  2608. spin_unlock_irqrestore(&phba->hbalock, iflags);
  2609. return rc;
  2610. }
  2611. static int
  2612. lpfc_extra_ring_setup( struct lpfc_hba *phba)
  2613. {
  2614. struct lpfc_sli *psli;
  2615. struct lpfc_sli_ring *pring;
  2616. psli = &phba->sli;
  2617. /* Adjust cmd/rsp ring iocb entries more evenly */
  2618. /* Take some away from the FCP ring */
  2619. pring = &psli->ring[psli->fcp_ring];
  2620. pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2621. pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2622. pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2623. pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2624. /* and give them to the extra ring */
  2625. pring = &psli->ring[psli->extra_ring];
  2626. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2627. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2628. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2629. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2630. /* Setup default profile for this ring */
  2631. pring->iotag_max = 4096;
  2632. pring->num_mask = 1;
  2633. pring->prt[0].profile = 0; /* Mask 0 */
  2634. pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
  2635. pring->prt[0].type = phba->cfg_multi_ring_type;
  2636. pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
  2637. return 0;
  2638. }
  2639. static void
  2640. lpfc_sli_async_event_handler(struct lpfc_hba * phba,
  2641. struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
  2642. {
  2643. IOCB_t *icmd;
  2644. uint16_t evt_code;
  2645. uint16_t temp;
  2646. struct temp_event temp_event_data;
  2647. struct Scsi_Host *shost;
  2648. icmd = &iocbq->iocb;
  2649. evt_code = icmd->un.asyncstat.evt_code;
  2650. temp = icmd->ulpContext;
  2651. if ((evt_code != ASYNC_TEMP_WARN) &&
  2652. (evt_code != ASYNC_TEMP_SAFE)) {
  2653. lpfc_printf_log(phba,
  2654. KERN_ERR,
  2655. LOG_SLI,
  2656. "0346 Ring %d handler: unexpected ASYNC_STATUS"
  2657. " evt_code 0x%x\n",
  2658. pring->ringno,
  2659. icmd->un.asyncstat.evt_code);
  2660. return;
  2661. }
  2662. temp_event_data.data = (uint32_t)temp;
  2663. temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
  2664. if (evt_code == ASYNC_TEMP_WARN) {
  2665. temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
  2666. lpfc_printf_log(phba,
  2667. KERN_WARNING,
  2668. LOG_TEMP,
  2669. "0347 Adapter is very hot, please take "
  2670. "corrective action. temperature : %d Celsius\n",
  2671. temp);
  2672. }
  2673. if (evt_code == ASYNC_TEMP_SAFE) {
  2674. temp_event_data.event_code = LPFC_NORMAL_TEMP;
  2675. lpfc_printf_log(phba,
  2676. KERN_INFO,
  2677. LOG_TEMP,
  2678. "0340 Adapter temperature is OK now. "
  2679. "temperature : %d Celsius\n",
  2680. temp);
  2681. }
  2682. /* Send temperature change event to applications */
  2683. shost = lpfc_shost_from_vport(phba->pport);
  2684. fc_host_post_vendor_event(shost, fc_get_event_number(),
  2685. sizeof(temp_event_data), (char *) &temp_event_data,
  2686. SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
  2687. }
  2688. int
  2689. lpfc_sli_setup(struct lpfc_hba *phba)
  2690. {
  2691. int i, totiocbsize = 0;
  2692. struct lpfc_sli *psli = &phba->sli;
  2693. struct lpfc_sli_ring *pring;
  2694. psli->num_rings = MAX_CONFIGURED_RINGS;
  2695. psli->sli_flag = 0;
  2696. psli->fcp_ring = LPFC_FCP_RING;
  2697. psli->next_ring = LPFC_FCP_NEXT_RING;
  2698. psli->extra_ring = LPFC_EXTRA_RING;
  2699. psli->iocbq_lookup = NULL;
  2700. psli->iocbq_lookup_len = 0;
  2701. psli->last_iotag = 0;
  2702. for (i = 0; i < psli->num_rings; i++) {
  2703. pring = &psli->ring[i];
  2704. switch (i) {
  2705. case LPFC_FCP_RING: /* ring 0 - FCP */
  2706. /* numCiocb and numRiocb are used in config_port */
  2707. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  2708. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  2709. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2710. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2711. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2712. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2713. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2714. SLI3_IOCB_CMD_SIZE :
  2715. SLI2_IOCB_CMD_SIZE;
  2716. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2717. SLI3_IOCB_RSP_SIZE :
  2718. SLI2_IOCB_RSP_SIZE;
  2719. pring->iotag_ctr = 0;
  2720. pring->iotag_max =
  2721. (phba->cfg_hba_queue_depth * 2);
  2722. pring->fast_iotag = pring->iotag_max;
  2723. pring->num_mask = 0;
  2724. break;
  2725. case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
  2726. /* numCiocb and numRiocb are used in config_port */
  2727. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  2728. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  2729. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2730. SLI3_IOCB_CMD_SIZE :
  2731. SLI2_IOCB_CMD_SIZE;
  2732. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2733. SLI3_IOCB_RSP_SIZE :
  2734. SLI2_IOCB_RSP_SIZE;
  2735. pring->iotag_max = phba->cfg_hba_queue_depth;
  2736. pring->num_mask = 0;
  2737. break;
  2738. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  2739. /* numCiocb and numRiocb are used in config_port */
  2740. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  2741. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  2742. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2743. SLI3_IOCB_CMD_SIZE :
  2744. SLI2_IOCB_CMD_SIZE;
  2745. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2746. SLI3_IOCB_RSP_SIZE :
  2747. SLI2_IOCB_RSP_SIZE;
  2748. pring->fast_iotag = 0;
  2749. pring->iotag_ctr = 0;
  2750. pring->iotag_max = 4096;
  2751. pring->lpfc_sli_rcv_async_status =
  2752. lpfc_sli_async_event_handler;
  2753. pring->num_mask = 4;
  2754. pring->prt[0].profile = 0; /* Mask 0 */
  2755. pring->prt[0].rctl = FC_ELS_REQ;
  2756. pring->prt[0].type = FC_ELS_DATA;
  2757. pring->prt[0].lpfc_sli_rcv_unsol_event =
  2758. lpfc_els_unsol_event;
  2759. pring->prt[1].profile = 0; /* Mask 1 */
  2760. pring->prt[1].rctl = FC_ELS_RSP;
  2761. pring->prt[1].type = FC_ELS_DATA;
  2762. pring->prt[1].lpfc_sli_rcv_unsol_event =
  2763. lpfc_els_unsol_event;
  2764. pring->prt[2].profile = 0; /* Mask 2 */
  2765. /* NameServer Inquiry */
  2766. pring->prt[2].rctl = FC_UNSOL_CTL;
  2767. /* NameServer */
  2768. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  2769. pring->prt[2].lpfc_sli_rcv_unsol_event =
  2770. lpfc_ct_unsol_event;
  2771. pring->prt[3].profile = 0; /* Mask 3 */
  2772. /* NameServer response */
  2773. pring->prt[3].rctl = FC_SOL_CTL;
  2774. /* NameServer */
  2775. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  2776. pring->prt[3].lpfc_sli_rcv_unsol_event =
  2777. lpfc_ct_unsol_event;
  2778. break;
  2779. }
  2780. totiocbsize += (pring->numCiocb * pring->sizeCiocb) +
  2781. (pring->numRiocb * pring->sizeRiocb);
  2782. }
  2783. if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
  2784. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  2785. printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
  2786. "SLI2 SLIM Data: x%x x%lx\n",
  2787. phba->brd_no, totiocbsize,
  2788. (unsigned long) MAX_SLIM_IOCB_SIZE);
  2789. }
  2790. if (phba->cfg_multi_ring_support == 2)
  2791. lpfc_extra_ring_setup(phba);
  2792. return 0;
  2793. }
  2794. int
  2795. lpfc_sli_queue_setup(struct lpfc_hba *phba)
  2796. {
  2797. struct lpfc_sli *psli;
  2798. struct lpfc_sli_ring *pring;
  2799. int i;
  2800. psli = &phba->sli;
  2801. spin_lock_irq(&phba->hbalock);
  2802. INIT_LIST_HEAD(&psli->mboxq);
  2803. INIT_LIST_HEAD(&psli->mboxq_cmpl);
  2804. /* Initialize list headers for txq and txcmplq as double linked lists */
  2805. for (i = 0; i < psli->num_rings; i++) {
  2806. pring = &psli->ring[i];
  2807. pring->ringno = i;
  2808. pring->next_cmdidx = 0;
  2809. pring->local_getidx = 0;
  2810. pring->cmdidx = 0;
  2811. INIT_LIST_HEAD(&pring->txq);
  2812. INIT_LIST_HEAD(&pring->txcmplq);
  2813. INIT_LIST_HEAD(&pring->iocb_continueq);
  2814. INIT_LIST_HEAD(&pring->postbufq);
  2815. }
  2816. spin_unlock_irq(&phba->hbalock);
  2817. return 1;
  2818. }
  2819. int
  2820. lpfc_sli_host_down(struct lpfc_vport *vport)
  2821. {
  2822. LIST_HEAD(completions);
  2823. struct lpfc_hba *phba = vport->phba;
  2824. struct lpfc_sli *psli = &phba->sli;
  2825. struct lpfc_sli_ring *pring;
  2826. struct lpfc_iocbq *iocb, *next_iocb;
  2827. int i;
  2828. unsigned long flags = 0;
  2829. uint16_t prev_pring_flag;
  2830. lpfc_cleanup_discovery_resources(vport);
  2831. spin_lock_irqsave(&phba->hbalock, flags);
  2832. for (i = 0; i < psli->num_rings; i++) {
  2833. pring = &psli->ring[i];
  2834. prev_pring_flag = pring->flag;
  2835. if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
  2836. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2837. /*
  2838. * Error everything on the txq since these iocbs have not been
  2839. * given to the FW yet.
  2840. */
  2841. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  2842. if (iocb->vport != vport)
  2843. continue;
  2844. list_move_tail(&iocb->list, &completions);
  2845. pring->txq_cnt--;
  2846. }
  2847. /* Next issue ABTS for everything on the txcmplq */
  2848. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
  2849. list) {
  2850. if (iocb->vport != vport)
  2851. continue;
  2852. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  2853. }
  2854. pring->flag = prev_pring_flag;
  2855. }
  2856. spin_unlock_irqrestore(&phba->hbalock, flags);
  2857. while (!list_empty(&completions)) {
  2858. list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
  2859. if (!iocb->iocb_cmpl)
  2860. lpfc_sli_release_iocbq(phba, iocb);
  2861. else {
  2862. iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
  2863. iocb->iocb.un.ulpWord[4] = IOERR_SLI_DOWN;
  2864. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2865. }
  2866. }
  2867. return 1;
  2868. }
  2869. int
  2870. lpfc_sli_hba_down(struct lpfc_hba *phba)
  2871. {
  2872. LIST_HEAD(completions);
  2873. struct lpfc_sli *psli = &phba->sli;
  2874. struct lpfc_sli_ring *pring;
  2875. struct lpfc_dmabuf *buf_ptr;
  2876. LPFC_MBOXQ_t *pmb;
  2877. struct lpfc_iocbq *iocb;
  2878. IOCB_t *cmd = NULL;
  2879. int i;
  2880. unsigned long flags = 0;
  2881. lpfc_hba_down_prep(phba);
  2882. lpfc_fabric_abort_hba(phba);
  2883. spin_lock_irqsave(&phba->hbalock, flags);
  2884. for (i = 0; i < psli->num_rings; i++) {
  2885. pring = &psli->ring[i];
  2886. if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
  2887. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2888. /*
  2889. * Error everything on the txq since these iocbs have not been
  2890. * given to the FW yet.
  2891. */
  2892. list_splice_init(&pring->txq, &completions);
  2893. pring->txq_cnt = 0;
  2894. }
  2895. spin_unlock_irqrestore(&phba->hbalock, flags);
  2896. while (!list_empty(&completions)) {
  2897. list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
  2898. cmd = &iocb->iocb;
  2899. if (!iocb->iocb_cmpl)
  2900. lpfc_sli_release_iocbq(phba, iocb);
  2901. else {
  2902. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2903. cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  2904. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2905. }
  2906. }
  2907. spin_lock_irqsave(&phba->hbalock, flags);
  2908. list_splice_init(&phba->elsbuf, &completions);
  2909. phba->elsbuf_cnt = 0;
  2910. phba->elsbuf_prev_cnt = 0;
  2911. spin_unlock_irqrestore(&phba->hbalock, flags);
  2912. while (!list_empty(&completions)) {
  2913. list_remove_head(&completions, buf_ptr,
  2914. struct lpfc_dmabuf, list);
  2915. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2916. kfree(buf_ptr);
  2917. }
  2918. /* Return any active mbox cmds */
  2919. del_timer_sync(&psli->mbox_tmo);
  2920. spin_lock_irqsave(&phba->hbalock, flags);
  2921. spin_lock(&phba->pport->work_port_lock);
  2922. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  2923. spin_unlock(&phba->pport->work_port_lock);
  2924. if (psli->mbox_active) {
  2925. list_add_tail(&psli->mbox_active->list, &completions);
  2926. psli->mbox_active = NULL;
  2927. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2928. }
  2929. /* Return any pending or completed mbox cmds */
  2930. list_splice_init(&phba->sli.mboxq, &completions);
  2931. list_splice_init(&phba->sli.mboxq_cmpl, &completions);
  2932. INIT_LIST_HEAD(&psli->mboxq);
  2933. INIT_LIST_HEAD(&psli->mboxq_cmpl);
  2934. spin_unlock_irqrestore(&phba->hbalock, flags);
  2935. while (!list_empty(&completions)) {
  2936. list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
  2937. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2938. if (pmb->mbox_cmpl) {
  2939. pmb->mbox_cmpl(phba,pmb);
  2940. }
  2941. }
  2942. return 1;
  2943. }
  2944. void
  2945. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2946. {
  2947. uint32_t *src = srcp;
  2948. uint32_t *dest = destp;
  2949. uint32_t ldata;
  2950. int i;
  2951. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2952. ldata = *src;
  2953. ldata = le32_to_cpu(ldata);
  2954. *dest = ldata;
  2955. src++;
  2956. dest++;
  2957. }
  2958. }
  2959. int
  2960. lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2961. struct lpfc_dmabuf *mp)
  2962. {
  2963. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2964. later */
  2965. spin_lock_irq(&phba->hbalock);
  2966. list_add_tail(&mp->list, &pring->postbufq);
  2967. pring->postbufq_cnt++;
  2968. spin_unlock_irq(&phba->hbalock);
  2969. return 0;
  2970. }
  2971. uint32_t
  2972. lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
  2973. {
  2974. spin_lock_irq(&phba->hbalock);
  2975. phba->buffer_tag_count++;
  2976. /*
  2977. * Always set the QUE_BUFTAG_BIT to distiguish between
  2978. * a tag assigned by HBQ.
  2979. */
  2980. phba->buffer_tag_count |= QUE_BUFTAG_BIT;
  2981. spin_unlock_irq(&phba->hbalock);
  2982. return phba->buffer_tag_count;
  2983. }
  2984. struct lpfc_dmabuf *
  2985. lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2986. uint32_t tag)
  2987. {
  2988. struct lpfc_dmabuf *mp, *next_mp;
  2989. struct list_head *slp = &pring->postbufq;
  2990. /* Search postbufq, from the begining, looking for a match on tag */
  2991. spin_lock_irq(&phba->hbalock);
  2992. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2993. if (mp->buffer_tag == tag) {
  2994. list_del_init(&mp->list);
  2995. pring->postbufq_cnt--;
  2996. spin_unlock_irq(&phba->hbalock);
  2997. return mp;
  2998. }
  2999. }
  3000. spin_unlock_irq(&phba->hbalock);
  3001. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  3002. "0410 Cannot find virtual addr for buffer tag on "
  3003. "ring %d Data x%lx x%p x%p x%x\n",
  3004. pring->ringno, (unsigned long) tag,
  3005. slp->next, slp->prev, pring->postbufq_cnt);
  3006. return NULL;
  3007. }
  3008. struct lpfc_dmabuf *
  3009. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  3010. dma_addr_t phys)
  3011. {
  3012. struct lpfc_dmabuf *mp, *next_mp;
  3013. struct list_head *slp = &pring->postbufq;
  3014. /* Search postbufq, from the begining, looking for a match on phys */
  3015. spin_lock_irq(&phba->hbalock);
  3016. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  3017. if (mp->phys == phys) {
  3018. list_del_init(&mp->list);
  3019. pring->postbufq_cnt--;
  3020. spin_unlock_irq(&phba->hbalock);
  3021. return mp;
  3022. }
  3023. }
  3024. spin_unlock_irq(&phba->hbalock);
  3025. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  3026. "0410 Cannot find virtual addr for mapped buf on "
  3027. "ring %d Data x%llx x%p x%p x%x\n",
  3028. pring->ringno, (unsigned long long)phys,
  3029. slp->next, slp->prev, pring->postbufq_cnt);
  3030. return NULL;
  3031. }
  3032. static void
  3033. lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  3034. struct lpfc_iocbq *rspiocb)
  3035. {
  3036. IOCB_t *irsp = &rspiocb->iocb;
  3037. uint16_t abort_iotag, abort_context;
  3038. struct lpfc_iocbq *abort_iocb;
  3039. struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
  3040. abort_iocb = NULL;
  3041. if (irsp->ulpStatus) {
  3042. abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
  3043. abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
  3044. spin_lock_irq(&phba->hbalock);
  3045. if (abort_iotag != 0 && abort_iotag <= phba->sli.last_iotag)
  3046. abort_iocb = phba->sli.iocbq_lookup[abort_iotag];
  3047. lpfc_printf_log(phba, KERN_INFO, LOG_ELS | LOG_SLI,
  3048. "0327 Cannot abort els iocb %p "
  3049. "with tag %x context %x, abort status %x, "
  3050. "abort code %x\n",
  3051. abort_iocb, abort_iotag, abort_context,
  3052. irsp->ulpStatus, irsp->un.ulpWord[4]);
  3053. /*
  3054. * make sure we have the right iocbq before taking it
  3055. * off the txcmplq and try to call completion routine.
  3056. */
  3057. if (!abort_iocb ||
  3058. abort_iocb->iocb.ulpContext != abort_context ||
  3059. (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0)
  3060. spin_unlock_irq(&phba->hbalock);
  3061. else {
  3062. list_del_init(&abort_iocb->list);
  3063. pring->txcmplq_cnt--;
  3064. spin_unlock_irq(&phba->hbalock);
  3065. /* Firmware could still be in progress of DMAing
  3066. * payload, so don't free data buffer till after
  3067. * a hbeat.
  3068. */
  3069. abort_iocb->iocb_flag |= LPFC_DELAY_MEM_FREE;
  3070. abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED;
  3071. abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
  3072. abort_iocb->iocb.un.ulpWord[4] = IOERR_SLI_ABORTED;
  3073. (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb);
  3074. }
  3075. }
  3076. lpfc_sli_release_iocbq(phba, cmdiocb);
  3077. return;
  3078. }
  3079. static void
  3080. lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  3081. struct lpfc_iocbq *rspiocb)
  3082. {
  3083. IOCB_t *irsp = &rspiocb->iocb;
  3084. /* ELS cmd tag <ulpIoTag> completes */
  3085. lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
  3086. "0133 Ignoring ELS cmd tag x%x completion Data: "
  3087. "x%x x%x x%x\n",
  3088. irsp->ulpIoTag, irsp->ulpStatus,
  3089. irsp->un.ulpWord[4], irsp->ulpTimeout);
  3090. if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
  3091. lpfc_ct_free_iocb(phba, cmdiocb);
  3092. else
  3093. lpfc_els_free_iocb(phba, cmdiocb);
  3094. return;
  3095. }
  3096. int
  3097. lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  3098. struct lpfc_iocbq *cmdiocb)
  3099. {
  3100. struct lpfc_vport *vport = cmdiocb->vport;
  3101. struct lpfc_iocbq *abtsiocbp;
  3102. IOCB_t *icmd = NULL;
  3103. IOCB_t *iabt = NULL;
  3104. int retval = IOCB_ERROR;
  3105. /*
  3106. * There are certain command types we don't want to abort. And we
  3107. * don't want to abort commands that are already in the process of
  3108. * being aborted.
  3109. */
  3110. icmd = &cmdiocb->iocb;
  3111. if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
  3112. icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
  3113. (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
  3114. return 0;
  3115. /* If we're unloading, don't abort iocb on the ELS ring, but change the
  3116. * callback so that nothing happens when it finishes.
  3117. */
  3118. if ((vport->load_flag & FC_UNLOADING) &&
  3119. (pring->ringno == LPFC_ELS_RING)) {
  3120. if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
  3121. cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
  3122. else
  3123. cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
  3124. goto abort_iotag_exit;
  3125. }
  3126. /* issue ABTS for this IOCB based on iotag */
  3127. abtsiocbp = __lpfc_sli_get_iocbq(phba);
  3128. if (abtsiocbp == NULL)
  3129. return 0;
  3130. /* This signals the response to set the correct status
  3131. * before calling the completion handler.
  3132. */
  3133. cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
  3134. iabt = &abtsiocbp->iocb;
  3135. iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
  3136. iabt->un.acxri.abortContextTag = icmd->ulpContext;
  3137. iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
  3138. iabt->ulpLe = 1;
  3139. iabt->ulpClass = icmd->ulpClass;
  3140. if (phba->link_state >= LPFC_LINK_UP)
  3141. iabt->ulpCommand = CMD_ABORT_XRI_CN;
  3142. else
  3143. iabt->ulpCommand = CMD_CLOSE_XRI_CN;
  3144. abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
  3145. lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
  3146. "0339 Abort xri x%x, original iotag x%x, "
  3147. "abort cmd iotag x%x\n",
  3148. iabt->un.acxri.abortContextTag,
  3149. iabt->un.acxri.abortIoTag, abtsiocbp->iotag);
  3150. retval = __lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
  3151. abort_iotag_exit:
  3152. /*
  3153. * Caller to this routine should check for IOCB_ERROR
  3154. * and handle it properly. This routine no longer removes
  3155. * iocb off txcmplq and call compl in case of IOCB_ERROR.
  3156. */
  3157. return retval;
  3158. }
  3159. static int
  3160. lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
  3161. uint16_t tgt_id, uint64_t lun_id,
  3162. lpfc_ctx_cmd ctx_cmd)
  3163. {
  3164. struct lpfc_scsi_buf *lpfc_cmd;
  3165. struct scsi_cmnd *cmnd;
  3166. int rc = 1;
  3167. if (!(iocbq->iocb_flag & LPFC_IO_FCP))
  3168. return rc;
  3169. if (iocbq->vport != vport)
  3170. return rc;
  3171. lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
  3172. cmnd = lpfc_cmd->pCmd;
  3173. if (cmnd == NULL)
  3174. return rc;
  3175. switch (ctx_cmd) {
  3176. case LPFC_CTX_LUN:
  3177. if ((cmnd->device->id == tgt_id) &&
  3178. (cmnd->device->lun == lun_id))
  3179. rc = 0;
  3180. break;
  3181. case LPFC_CTX_TGT:
  3182. if (cmnd->device->id == tgt_id)
  3183. rc = 0;
  3184. break;
  3185. case LPFC_CTX_HOST:
  3186. rc = 0;
  3187. break;
  3188. default:
  3189. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  3190. __FUNCTION__, ctx_cmd);
  3191. break;
  3192. }
  3193. return rc;
  3194. }
  3195. int
  3196. lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
  3197. lpfc_ctx_cmd ctx_cmd)
  3198. {
  3199. struct lpfc_hba *phba = vport->phba;
  3200. struct lpfc_iocbq *iocbq;
  3201. int sum, i;
  3202. for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
  3203. iocbq = phba->sli.iocbq_lookup[i];
  3204. if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
  3205. ctx_cmd) == 0)
  3206. sum++;
  3207. }
  3208. return sum;
  3209. }
  3210. void
  3211. lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  3212. struct lpfc_iocbq *rspiocb)
  3213. {
  3214. lpfc_sli_release_iocbq(phba, cmdiocb);
  3215. return;
  3216. }
  3217. int
  3218. lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
  3219. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
  3220. {
  3221. struct lpfc_hba *phba = vport->phba;
  3222. struct lpfc_iocbq *iocbq;
  3223. struct lpfc_iocbq *abtsiocb;
  3224. IOCB_t *cmd = NULL;
  3225. int errcnt = 0, ret_val = 0;
  3226. int i;
  3227. for (i = 1; i <= phba->sli.last_iotag; i++) {
  3228. iocbq = phba->sli.iocbq_lookup[i];
  3229. if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
  3230. abort_cmd) != 0)
  3231. continue;
  3232. /* issue ABTS for this IOCB based on iotag */
  3233. abtsiocb = lpfc_sli_get_iocbq(phba);
  3234. if (abtsiocb == NULL) {
  3235. errcnt++;
  3236. continue;
  3237. }
  3238. cmd = &iocbq->iocb;
  3239. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  3240. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  3241. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  3242. abtsiocb->iocb.ulpLe = 1;
  3243. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  3244. abtsiocb->vport = phba->pport;
  3245. if (lpfc_is_link_up(phba))
  3246. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  3247. else
  3248. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  3249. /* Setup callback routine and issue the command. */
  3250. abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
  3251. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  3252. if (ret_val == IOCB_ERROR) {
  3253. lpfc_sli_release_iocbq(phba, abtsiocb);
  3254. errcnt++;
  3255. continue;
  3256. }
  3257. }
  3258. return errcnt;
  3259. }
  3260. static void
  3261. lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
  3262. struct lpfc_iocbq *cmdiocbq,
  3263. struct lpfc_iocbq *rspiocbq)
  3264. {
  3265. wait_queue_head_t *pdone_q;
  3266. unsigned long iflags;
  3267. spin_lock_irqsave(&phba->hbalock, iflags);
  3268. cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
  3269. if (cmdiocbq->context2 && rspiocbq)
  3270. memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
  3271. &rspiocbq->iocb, sizeof(IOCB_t));
  3272. pdone_q = cmdiocbq->context_un.wait_queue;
  3273. if (pdone_q)
  3274. wake_up(pdone_q);
  3275. spin_unlock_irqrestore(&phba->hbalock, iflags);
  3276. return;
  3277. }
  3278. /*
  3279. * Issue the caller's iocb and wait for its completion, but no longer than the
  3280. * caller's timeout. Note that iocb_flags is cleared before the
  3281. * lpfc_sli_issue_call since the wake routine sets a unique value and by
  3282. * definition this is a wait function.
  3283. */
  3284. int
  3285. lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
  3286. struct lpfc_sli_ring *pring,
  3287. struct lpfc_iocbq *piocb,
  3288. struct lpfc_iocbq *prspiocbq,
  3289. uint32_t timeout)
  3290. {
  3291. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  3292. long timeleft, timeout_req = 0;
  3293. int retval = IOCB_SUCCESS;
  3294. uint32_t creg_val;
  3295. /*
  3296. * If the caller has provided a response iocbq buffer, then context2
  3297. * is NULL or its an error.
  3298. */
  3299. if (prspiocbq) {
  3300. if (piocb->context2)
  3301. return IOCB_ERROR;
  3302. piocb->context2 = prspiocbq;
  3303. }
  3304. piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
  3305. piocb->context_un.wait_queue = &done_q;
  3306. piocb->iocb_flag &= ~LPFC_IO_WAKE;
  3307. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  3308. creg_val = readl(phba->HCregaddr);
  3309. creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
  3310. writel(creg_val, phba->HCregaddr);
  3311. readl(phba->HCregaddr); /* flush */
  3312. }
  3313. retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
  3314. if (retval == IOCB_SUCCESS) {
  3315. timeout_req = timeout * HZ;
  3316. timeleft = wait_event_timeout(done_q,
  3317. piocb->iocb_flag & LPFC_IO_WAKE,
  3318. timeout_req);
  3319. if (piocb->iocb_flag & LPFC_IO_WAKE) {
  3320. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3321. "0331 IOCB wake signaled\n");
  3322. } else if (timeleft == 0) {
  3323. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  3324. "0338 IOCB wait timeout error - no "
  3325. "wake response Data x%x\n", timeout);
  3326. retval = IOCB_TIMEDOUT;
  3327. } else {
  3328. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  3329. "0330 IOCB wake NOT set, "
  3330. "Data x%x x%lx\n",
  3331. timeout, (timeleft / jiffies));
  3332. retval = IOCB_TIMEDOUT;
  3333. }
  3334. } else {
  3335. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3336. ":0332 IOCB wait issue failed, Data x%x\n",
  3337. retval);
  3338. retval = IOCB_ERROR;
  3339. }
  3340. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  3341. creg_val = readl(phba->HCregaddr);
  3342. creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
  3343. writel(creg_val, phba->HCregaddr);
  3344. readl(phba->HCregaddr); /* flush */
  3345. }
  3346. if (prspiocbq)
  3347. piocb->context2 = NULL;
  3348. piocb->context_un.wait_queue = NULL;
  3349. piocb->iocb_cmpl = NULL;
  3350. return retval;
  3351. }
  3352. int
  3353. lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
  3354. uint32_t timeout)
  3355. {
  3356. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  3357. int retval;
  3358. unsigned long flag;
  3359. /* The caller must leave context1 empty. */
  3360. if (pmboxq->context1)
  3361. return MBX_NOT_FINISHED;
  3362. /* setup wake call as IOCB callback */
  3363. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  3364. /* setup context field to pass wait_queue pointer to wake function */
  3365. pmboxq->context1 = &done_q;
  3366. /* now issue the command */
  3367. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  3368. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  3369. wait_event_interruptible_timeout(done_q,
  3370. pmboxq->mbox_flag & LPFC_MBX_WAKE,
  3371. timeout * HZ);
  3372. spin_lock_irqsave(&phba->hbalock, flag);
  3373. pmboxq->context1 = NULL;
  3374. /*
  3375. * if LPFC_MBX_WAKE flag is set the mailbox is completed
  3376. * else do not free the resources.
  3377. */
  3378. if (pmboxq->mbox_flag & LPFC_MBX_WAKE)
  3379. retval = MBX_SUCCESS;
  3380. else {
  3381. retval = MBX_TIMEOUT;
  3382. pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  3383. }
  3384. spin_unlock_irqrestore(&phba->hbalock, flag);
  3385. }
  3386. return retval;
  3387. }
  3388. int
  3389. lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
  3390. {
  3391. struct lpfc_vport *vport = phba->pport;
  3392. int i = 0;
  3393. uint32_t ha_copy;
  3394. while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !vport->stopped) {
  3395. if (i++ > LPFC_MBOX_TMO * 1000)
  3396. return 1;
  3397. /*
  3398. * Call lpfc_sli_handle_mb_event only if a mailbox cmd
  3399. * did finish. This way we won't get the misleading
  3400. * "Stray Mailbox Interrupt" message.
  3401. */
  3402. spin_lock_irq(&phba->hbalock);
  3403. ha_copy = phba->work_ha;
  3404. phba->work_ha &= ~HA_MBATT;
  3405. spin_unlock_irq(&phba->hbalock);
  3406. if (ha_copy & HA_MBATT)
  3407. if (lpfc_sli_handle_mb_event(phba) == 0)
  3408. i = 0;
  3409. msleep(1);
  3410. }
  3411. return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
  3412. }
  3413. irqreturn_t
  3414. lpfc_intr_handler(int irq, void *dev_id)
  3415. {
  3416. struct lpfc_hba *phba;
  3417. uint32_t ha_copy;
  3418. uint32_t work_ha_copy;
  3419. unsigned long status;
  3420. uint32_t control;
  3421. MAILBOX_t *mbox, *pmbox;
  3422. struct lpfc_vport *vport;
  3423. struct lpfc_nodelist *ndlp;
  3424. struct lpfc_dmabuf *mp;
  3425. LPFC_MBOXQ_t *pmb;
  3426. int rc;
  3427. /*
  3428. * Get the driver's phba structure from the dev_id and
  3429. * assume the HBA is not interrupting.
  3430. */
  3431. phba = (struct lpfc_hba *) dev_id;
  3432. if (unlikely(!phba))
  3433. return IRQ_NONE;
  3434. /* If the pci channel is offline, ignore all the interrupts. */
  3435. if (unlikely(pci_channel_offline(phba->pcidev)))
  3436. return IRQ_NONE;
  3437. phba->sli.slistat.sli_intr++;
  3438. /*
  3439. * Call the HBA to see if it is interrupting. If not, don't claim
  3440. * the interrupt
  3441. */
  3442. /* Ignore all interrupts during initialization. */
  3443. if (unlikely(phba->link_state < LPFC_LINK_DOWN))
  3444. return IRQ_NONE;
  3445. /*
  3446. * Read host attention register to determine interrupt source
  3447. * Clear Attention Sources, except Error Attention (to
  3448. * preserve status) and Link Attention
  3449. */
  3450. spin_lock(&phba->hbalock);
  3451. ha_copy = readl(phba->HAregaddr);
  3452. /* If somebody is waiting to handle an eratt don't process it
  3453. * here. The brdkill function will do this.
  3454. */
  3455. if (phba->link_flag & LS_IGNORE_ERATT)
  3456. ha_copy &= ~HA_ERATT;
  3457. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  3458. readl(phba->HAregaddr); /* flush */
  3459. spin_unlock(&phba->hbalock);
  3460. if (unlikely(!ha_copy))
  3461. return IRQ_NONE;
  3462. work_ha_copy = ha_copy & phba->work_ha_mask;
  3463. if (unlikely(work_ha_copy)) {
  3464. if (work_ha_copy & HA_LATT) {
  3465. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  3466. /*
  3467. * Turn off Link Attention interrupts
  3468. * until CLEAR_LA done
  3469. */
  3470. spin_lock(&phba->hbalock);
  3471. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  3472. control = readl(phba->HCregaddr);
  3473. control &= ~HC_LAINT_ENA;
  3474. writel(control, phba->HCregaddr);
  3475. readl(phba->HCregaddr); /* flush */
  3476. spin_unlock(&phba->hbalock);
  3477. }
  3478. else
  3479. work_ha_copy &= ~HA_LATT;
  3480. }
  3481. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  3482. /*
  3483. * Turn off Slow Rings interrupts, LPFC_ELS_RING is
  3484. * the only slow ring.
  3485. */
  3486. status = (work_ha_copy &
  3487. (HA_RXMASK << (4*LPFC_ELS_RING)));
  3488. status >>= (4*LPFC_ELS_RING);
  3489. if (status & HA_RXMASK) {
  3490. spin_lock(&phba->hbalock);
  3491. control = readl(phba->HCregaddr);
  3492. lpfc_debugfs_slow_ring_trc(phba,
  3493. "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
  3494. control, status,
  3495. (uint32_t)phba->sli.slistat.sli_intr);
  3496. if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
  3497. lpfc_debugfs_slow_ring_trc(phba,
  3498. "ISR Disable ring:"
  3499. "pwork:x%x hawork:x%x wait:x%x",
  3500. phba->work_ha, work_ha_copy,
  3501. (uint32_t)((unsigned long)
  3502. phba->work_wait));
  3503. control &=
  3504. ~(HC_R0INT_ENA << LPFC_ELS_RING);
  3505. writel(control, phba->HCregaddr);
  3506. readl(phba->HCregaddr); /* flush */
  3507. }
  3508. else {
  3509. lpfc_debugfs_slow_ring_trc(phba,
  3510. "ISR slow ring: pwork:"
  3511. "x%x hawork:x%x wait:x%x",
  3512. phba->work_ha, work_ha_copy,
  3513. (uint32_t)((unsigned long)
  3514. phba->work_wait));
  3515. }
  3516. spin_unlock(&phba->hbalock);
  3517. }
  3518. }
  3519. if (work_ha_copy & HA_ERATT) {
  3520. phba->link_state = LPFC_HBA_ERROR;
  3521. /*
  3522. * There was a link/board error. Read the
  3523. * status register to retrieve the error event
  3524. * and process it.
  3525. */
  3526. phba->sli.slistat.err_attn_event++;
  3527. /* Save status info */
  3528. phba->work_hs = readl(phba->HSregaddr);
  3529. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  3530. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  3531. /* Clear Chip error bit */
  3532. writel(HA_ERATT, phba->HAregaddr);
  3533. readl(phba->HAregaddr); /* flush */
  3534. phba->pport->stopped = 1;
  3535. }
  3536. if ((work_ha_copy & HA_MBATT) &&
  3537. (phba->sli.mbox_active)) {
  3538. pmb = phba->sli.mbox_active;
  3539. pmbox = &pmb->mb;
  3540. mbox = &phba->slim2p->mbx;
  3541. vport = pmb->vport;
  3542. /* First check out the status word */
  3543. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
  3544. if (pmbox->mbxOwner != OWN_HOST) {
  3545. /*
  3546. * Stray Mailbox Interrupt, mbxCommand <cmd>
  3547. * mbxStatus <status>
  3548. */
  3549. lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX |
  3550. LOG_SLI,
  3551. "(%d):0304 Stray Mailbox "
  3552. "Interrupt mbxCommand x%x "
  3553. "mbxStatus x%x\n",
  3554. (vport ? vport->vpi : 0),
  3555. pmbox->mbxCommand,
  3556. pmbox->mbxStatus);
  3557. }
  3558. phba->last_completion_time = jiffies;
  3559. del_timer_sync(&phba->sli.mbox_tmo);
  3560. phba->sli.mbox_active = NULL;
  3561. if (pmb->mbox_cmpl) {
  3562. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  3563. MAILBOX_CMD_SIZE);
  3564. }
  3565. if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
  3566. pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
  3567. lpfc_debugfs_disc_trc(vport,
  3568. LPFC_DISC_TRC_MBOX_VPORT,
  3569. "MBOX dflt rpi: : status:x%x rpi:x%x",
  3570. (uint32_t)pmbox->mbxStatus,
  3571. pmbox->un.varWords[0], 0);
  3572. if ( !pmbox->mbxStatus) {
  3573. mp = (struct lpfc_dmabuf *)
  3574. (pmb->context1);
  3575. ndlp = (struct lpfc_nodelist *)
  3576. pmb->context2;
  3577. /* Reg_LOGIN of dflt RPI was successful.
  3578. * new lets get rid of the RPI using the
  3579. * same mbox buffer.
  3580. */
  3581. lpfc_unreg_login(phba, vport->vpi,
  3582. pmbox->un.varWords[0], pmb);
  3583. pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
  3584. pmb->context1 = mp;
  3585. pmb->context2 = ndlp;
  3586. pmb->vport = vport;
  3587. spin_lock(&phba->hbalock);
  3588. phba->sli.sli_flag &=
  3589. ~LPFC_SLI_MBOX_ACTIVE;
  3590. spin_unlock(&phba->hbalock);
  3591. goto send_current_mbox;
  3592. }
  3593. }
  3594. spin_lock(&phba->pport->work_port_lock);
  3595. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  3596. spin_unlock(&phba->pport->work_port_lock);
  3597. lpfc_mbox_cmpl_put(phba, pmb);
  3598. }
  3599. if ((work_ha_copy & HA_MBATT) &&
  3600. (phba->sli.mbox_active == NULL)) {
  3601. send_next_mbox:
  3602. spin_lock(&phba->hbalock);
  3603. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  3604. pmb = lpfc_mbox_get(phba);
  3605. spin_unlock(&phba->hbalock);
  3606. send_current_mbox:
  3607. /* Process next mailbox command if there is one */
  3608. if (pmb != NULL) {
  3609. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  3610. if (rc == MBX_NOT_FINISHED) {
  3611. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  3612. lpfc_mbox_cmpl_put(phba, pmb);
  3613. goto send_next_mbox;
  3614. }
  3615. }
  3616. }
  3617. spin_lock(&phba->hbalock);
  3618. phba->work_ha |= work_ha_copy;
  3619. if (phba->work_wait)
  3620. lpfc_worker_wake_up(phba);
  3621. spin_unlock(&phba->hbalock);
  3622. }
  3623. ha_copy &= ~(phba->work_ha_mask);
  3624. /*
  3625. * Process all events on FCP ring. Take the optimized path for
  3626. * FCP IO. Any other IO is slow path and is handled by
  3627. * the worker thread.
  3628. */
  3629. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  3630. status >>= (4*LPFC_FCP_RING);
  3631. if (status & HA_RXMASK)
  3632. lpfc_sli_handle_fast_ring_event(phba,
  3633. &phba->sli.ring[LPFC_FCP_RING],
  3634. status);
  3635. if (phba->cfg_multi_ring_support == 2) {
  3636. /*
  3637. * Process all events on extra ring. Take the optimized path
  3638. * for extra ring IO. Any other IO is slow path and is handled
  3639. * by the worker thread.
  3640. */
  3641. status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
  3642. status >>= (4*LPFC_EXTRA_RING);
  3643. if (status & HA_RXMASK) {
  3644. lpfc_sli_handle_fast_ring_event(phba,
  3645. &phba->sli.ring[LPFC_EXTRA_RING],
  3646. status);
  3647. }
  3648. }
  3649. return IRQ_HANDLED;
  3650. } /* lpfc_intr_handler */