Kconfig 52 KB

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  1. config ARM
  2. bool
  3. default y
  4. select HAVE_AOUT
  5. select HAVE_DMA_API_DEBUG
  6. select HAVE_IDE
  7. select HAVE_MEMBLOCK
  8. select RTC_LIB
  9. select SYS_SUPPORTS_APM_EMULATION
  10. select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
  11. select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12. select HAVE_ARCH_KGDB
  13. select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
  14. select HAVE_KRETPROBES if (HAVE_KPROBES)
  15. select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16. select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17. select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18. select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19. select HAVE_GENERIC_DMA_COHERENT
  20. select HAVE_KERNEL_GZIP
  21. select HAVE_KERNEL_LZO
  22. select HAVE_KERNEL_LZMA
  23. select HAVE_IRQ_WORK
  24. select HAVE_PERF_EVENTS
  25. select PERF_USE_VMALLOC
  26. select HAVE_REGS_AND_STACK_ACCESS_API
  27. select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
  28. select HAVE_C_RECORDMCOUNT
  29. select HAVE_GENERIC_HARDIRQS
  30. select HAVE_SPARSE_IRQ
  31. help
  32. The ARM series is a line of low-power-consumption RISC chip designs
  33. licensed by ARM Ltd and targeted at embedded applications and
  34. handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
  35. manufactured, but legacy ARM-based PC hardware remains popular in
  36. Europe. There is an ARM Linux project with a web page at
  37. <http://www.arm.linux.org.uk/>.
  38. config HAVE_PWM
  39. bool
  40. config MIGHT_HAVE_PCI
  41. bool
  42. config SYS_SUPPORTS_APM_EMULATION
  43. bool
  44. config HAVE_SCHED_CLOCK
  45. bool
  46. config GENERIC_GPIO
  47. bool
  48. config ARCH_USES_GETTIMEOFFSET
  49. bool
  50. default n
  51. config GENERIC_CLOCKEVENTS
  52. bool
  53. config GENERIC_CLOCKEVENTS_BROADCAST
  54. bool
  55. depends on GENERIC_CLOCKEVENTS
  56. default y if SMP
  57. config HAVE_TCM
  58. bool
  59. select GENERIC_ALLOCATOR
  60. config HAVE_PROC_CPU
  61. bool
  62. config NO_IOPORT
  63. bool
  64. config EISA
  65. bool
  66. ---help---
  67. The Extended Industry Standard Architecture (EISA) bus was
  68. developed as an open alternative to the IBM MicroChannel bus.
  69. The EISA bus provided some of the features of the IBM MicroChannel
  70. bus while maintaining backward compatibility with cards made for
  71. the older ISA bus. The EISA bus saw limited use between 1988 and
  72. 1995 when it was made obsolete by the PCI bus.
  73. Say Y here if you are building a kernel for an EISA-based machine.
  74. Otherwise, say N.
  75. config SBUS
  76. bool
  77. config MCA
  78. bool
  79. help
  80. MicroChannel Architecture is found in some IBM PS/2 machines and
  81. laptops. It is a bus system similar to PCI or ISA. See
  82. <file:Documentation/mca.txt> (and especially the web page given
  83. there) before attempting to build an MCA bus kernel.
  84. config STACKTRACE_SUPPORT
  85. bool
  86. default y
  87. config HAVE_LATENCYTOP_SUPPORT
  88. bool
  89. depends on !SMP
  90. default y
  91. config LOCKDEP_SUPPORT
  92. bool
  93. default y
  94. config TRACE_IRQFLAGS_SUPPORT
  95. bool
  96. default y
  97. config HARDIRQS_SW_RESEND
  98. bool
  99. default y
  100. config GENERIC_IRQ_PROBE
  101. bool
  102. default y
  103. config GENERIC_LOCKBREAK
  104. bool
  105. default y
  106. depends on SMP && PREEMPT
  107. config RWSEM_GENERIC_SPINLOCK
  108. bool
  109. default y
  110. config RWSEM_XCHGADD_ALGORITHM
  111. bool
  112. config ARCH_HAS_ILOG2_U32
  113. bool
  114. config ARCH_HAS_ILOG2_U64
  115. bool
  116. config ARCH_HAS_CPUFREQ
  117. bool
  118. help
  119. Internal node to signify that the ARCH has CPUFREQ support
  120. and that the relevant menu configurations are displayed for
  121. it.
  122. config ARCH_HAS_CPU_IDLE_WAIT
  123. def_bool y
  124. config GENERIC_HWEIGHT
  125. bool
  126. default y
  127. config GENERIC_CALIBRATE_DELAY
  128. bool
  129. default y
  130. config ARCH_MAY_HAVE_PC_FDC
  131. bool
  132. config ZONE_DMA
  133. bool
  134. config NEED_DMA_MAP_STATE
  135. def_bool y
  136. config GENERIC_ISA_DMA
  137. bool
  138. config FIQ
  139. bool
  140. config ARCH_MTD_XIP
  141. bool
  142. config ARM_L1_CACHE_SHIFT_6
  143. bool
  144. help
  145. Setting ARM L1 cache line size to 64 Bytes.
  146. config VECTORS_BASE
  147. hex
  148. default 0xffff0000 if MMU || CPU_HIGH_VECTOR
  149. default DRAM_BASE if REMAP_VECTORS_TO_RAM
  150. default 0x00000000
  151. help
  152. The base address of exception vectors.
  153. source "init/Kconfig"
  154. source "kernel/Kconfig.freezer"
  155. menu "System Type"
  156. config MMU
  157. bool "MMU-based Paged Memory Management Support"
  158. default y
  159. help
  160. Select if you want MMU-based virtualised addressing space
  161. support by paged memory management. If unsure, say 'Y'.
  162. #
  163. # The "ARM system type" choice list is ordered alphabetically by option
  164. # text. Please add new entries in the option alphabetic order.
  165. #
  166. choice
  167. prompt "ARM system type"
  168. default ARCH_VERSATILE
  169. config ARCH_AAEC2000
  170. bool "Agilent AAEC-2000 based"
  171. select CPU_ARM920T
  172. select ARM_AMBA
  173. select HAVE_CLK
  174. select ARCH_USES_GETTIMEOFFSET
  175. help
  176. This enables support for systems based on the Agilent AAEC-2000
  177. config ARCH_INTEGRATOR
  178. bool "ARM Ltd. Integrator family"
  179. select ARM_AMBA
  180. select ARCH_HAS_CPUFREQ
  181. select CLKDEV_LOOKUP
  182. select ICST
  183. select GENERIC_CLOCKEVENTS
  184. select PLAT_VERSATILE
  185. help
  186. Support for ARM's Integrator platform.
  187. config ARCH_REALVIEW
  188. bool "ARM Ltd. RealView family"
  189. select ARM_AMBA
  190. select CLKDEV_LOOKUP
  191. select HAVE_SCHED_CLOCK
  192. select ICST
  193. select GENERIC_CLOCKEVENTS
  194. select ARCH_WANT_OPTIONAL_GPIOLIB
  195. select PLAT_VERSATILE
  196. select PLAT_VERSATILE_CLCD
  197. select ARM_TIMER_SP804
  198. select GPIO_PL061 if GPIOLIB
  199. help
  200. This enables support for ARM Ltd RealView boards.
  201. config ARCH_VERSATILE
  202. bool "ARM Ltd. Versatile family"
  203. select ARM_AMBA
  204. select ARM_VIC
  205. select CLKDEV_LOOKUP
  206. select HAVE_SCHED_CLOCK
  207. select ICST
  208. select GENERIC_CLOCKEVENTS
  209. select ARCH_WANT_OPTIONAL_GPIOLIB
  210. select PLAT_VERSATILE
  211. select PLAT_VERSATILE_CLCD
  212. select ARM_TIMER_SP804
  213. help
  214. This enables support for ARM Ltd Versatile board.
  215. config ARCH_VEXPRESS
  216. bool "ARM Ltd. Versatile Express family"
  217. select ARCH_WANT_OPTIONAL_GPIOLIB
  218. select ARM_AMBA
  219. select ARM_TIMER_SP804
  220. select CLKDEV_LOOKUP
  221. select GENERIC_CLOCKEVENTS
  222. select HAVE_CLK
  223. select HAVE_SCHED_CLOCK
  224. select HAVE_PATA_PLATFORM
  225. select ICST
  226. select PLAT_VERSATILE
  227. select PLAT_VERSATILE_CLCD
  228. help
  229. This enables support for the ARM Ltd Versatile Express boards.
  230. config ARCH_AT91
  231. bool "Atmel AT91"
  232. select ARCH_REQUIRE_GPIOLIB
  233. select HAVE_CLK
  234. help
  235. This enables support for systems based on the Atmel AT91RM9200,
  236. AT91SAM9 and AT91CAP9 processors.
  237. config ARCH_BCMRING
  238. bool "Broadcom BCMRING"
  239. depends on MMU
  240. select CPU_V6
  241. select ARM_AMBA
  242. select CLKDEV_LOOKUP
  243. select GENERIC_CLOCKEVENTS
  244. select ARCH_WANT_OPTIONAL_GPIOLIB
  245. help
  246. Support for Broadcom's BCMRing platform.
  247. config ARCH_CLPS711X
  248. bool "Cirrus Logic CLPS711x/EP721x-based"
  249. select CPU_ARM720T
  250. select ARCH_USES_GETTIMEOFFSET
  251. help
  252. Support for Cirrus Logic 711x/721x based boards.
  253. config ARCH_CNS3XXX
  254. bool "Cavium Networks CNS3XXX family"
  255. select CPU_V6
  256. select GENERIC_CLOCKEVENTS
  257. select ARM_GIC
  258. select MIGHT_HAVE_PCI
  259. select PCI_DOMAINS if PCI
  260. help
  261. Support for Cavium Networks CNS3XXX platform.
  262. config ARCH_GEMINI
  263. bool "Cortina Systems Gemini"
  264. select CPU_FA526
  265. select ARCH_REQUIRE_GPIOLIB
  266. select ARCH_USES_GETTIMEOFFSET
  267. help
  268. Support for the Cortina Systems Gemini family SoCs
  269. config ARCH_EBSA110
  270. bool "EBSA-110"
  271. select CPU_SA110
  272. select ISA
  273. select NO_IOPORT
  274. select ARCH_USES_GETTIMEOFFSET
  275. help
  276. This is an evaluation board for the StrongARM processor available
  277. from Digital. It has limited hardware on-board, including an
  278. Ethernet interface, two PCMCIA sockets, two serial ports and a
  279. parallel port.
  280. config ARCH_EP93XX
  281. bool "EP93xx-based"
  282. select CPU_ARM920T
  283. select ARM_AMBA
  284. select ARM_VIC
  285. select CLKDEV_LOOKUP
  286. select ARCH_REQUIRE_GPIOLIB
  287. select ARCH_HAS_HOLES_MEMORYMODEL
  288. select ARCH_USES_GETTIMEOFFSET
  289. help
  290. This enables support for the Cirrus EP93xx series of CPUs.
  291. config ARCH_FOOTBRIDGE
  292. bool "FootBridge"
  293. select CPU_SA110
  294. select FOOTBRIDGE
  295. select ARCH_USES_GETTIMEOFFSET
  296. help
  297. Support for systems based on the DC21285 companion chip
  298. ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
  299. config ARCH_MXC
  300. bool "Freescale MXC/iMX-based"
  301. select GENERIC_CLOCKEVENTS
  302. select ARCH_REQUIRE_GPIOLIB
  303. select CLKDEV_LOOKUP
  304. help
  305. Support for Freescale MXC/iMX-based family of processors
  306. config ARCH_MXS
  307. bool "Freescale MXS-based"
  308. select GENERIC_CLOCKEVENTS
  309. select ARCH_REQUIRE_GPIOLIB
  310. select CLKDEV_LOOKUP
  311. help
  312. Support for Freescale MXS-based family of processors
  313. config ARCH_STMP3XXX
  314. bool "Freescale STMP3xxx"
  315. select CPU_ARM926T
  316. select CLKDEV_LOOKUP
  317. select ARCH_REQUIRE_GPIOLIB
  318. select GENERIC_CLOCKEVENTS
  319. select USB_ARCH_HAS_EHCI
  320. help
  321. Support for systems based on the Freescale 3xxx CPUs.
  322. config ARCH_NETX
  323. bool "Hilscher NetX based"
  324. select CPU_ARM926T
  325. select ARM_VIC
  326. select GENERIC_CLOCKEVENTS
  327. help
  328. This enables support for systems based on the Hilscher NetX Soc
  329. config ARCH_H720X
  330. bool "Hynix HMS720x-based"
  331. select CPU_ARM720T
  332. select ISA_DMA_API
  333. select ARCH_USES_GETTIMEOFFSET
  334. help
  335. This enables support for systems based on the Hynix HMS720x
  336. config ARCH_IOP13XX
  337. bool "IOP13xx-based"
  338. depends on MMU
  339. select CPU_XSC3
  340. select PLAT_IOP
  341. select PCI
  342. select ARCH_SUPPORTS_MSI
  343. select VMSPLIT_1G
  344. help
  345. Support for Intel's IOP13XX (XScale) family of processors.
  346. config ARCH_IOP32X
  347. bool "IOP32x-based"
  348. depends on MMU
  349. select CPU_XSCALE
  350. select PLAT_IOP
  351. select PCI
  352. select ARCH_REQUIRE_GPIOLIB
  353. help
  354. Support for Intel's 80219 and IOP32X (XScale) family of
  355. processors.
  356. config ARCH_IOP33X
  357. bool "IOP33x-based"
  358. depends on MMU
  359. select CPU_XSCALE
  360. select PLAT_IOP
  361. select PCI
  362. select ARCH_REQUIRE_GPIOLIB
  363. help
  364. Support for Intel's IOP33X (XScale) family of processors.
  365. config ARCH_IXP23XX
  366. bool "IXP23XX-based"
  367. depends on MMU
  368. select CPU_XSC3
  369. select PCI
  370. select ARCH_USES_GETTIMEOFFSET
  371. help
  372. Support for Intel's IXP23xx (XScale) family of processors.
  373. config ARCH_IXP2000
  374. bool "IXP2400/2800-based"
  375. depends on MMU
  376. select CPU_XSCALE
  377. select PCI
  378. select ARCH_USES_GETTIMEOFFSET
  379. help
  380. Support for Intel's IXP2400/2800 (XScale) family of processors.
  381. config ARCH_IXP4XX
  382. bool "IXP4xx-based"
  383. depends on MMU
  384. select CPU_XSCALE
  385. select GENERIC_GPIO
  386. select GENERIC_CLOCKEVENTS
  387. select HAVE_SCHED_CLOCK
  388. select MIGHT_HAVE_PCI
  389. select DMABOUNCE if PCI
  390. help
  391. Support for Intel's IXP4XX (XScale) family of processors.
  392. config ARCH_DOVE
  393. bool "Marvell Dove"
  394. select PCI
  395. select ARCH_REQUIRE_GPIOLIB
  396. select GENERIC_CLOCKEVENTS
  397. select PLAT_ORION
  398. help
  399. Support for the Marvell Dove SoC 88AP510
  400. config ARCH_KIRKWOOD
  401. bool "Marvell Kirkwood"
  402. select CPU_FEROCEON
  403. select PCI
  404. select ARCH_REQUIRE_GPIOLIB
  405. select GENERIC_CLOCKEVENTS
  406. select PLAT_ORION
  407. help
  408. Support for the following Marvell Kirkwood series SoCs:
  409. 88F6180, 88F6192 and 88F6281.
  410. config ARCH_LOKI
  411. bool "Marvell Loki (88RC8480)"
  412. select CPU_FEROCEON
  413. select GENERIC_CLOCKEVENTS
  414. select PLAT_ORION
  415. help
  416. Support for the Marvell Loki (88RC8480) SoC.
  417. config ARCH_LPC32XX
  418. bool "NXP LPC32XX"
  419. select CPU_ARM926T
  420. select ARCH_REQUIRE_GPIOLIB
  421. select HAVE_IDE
  422. select ARM_AMBA
  423. select USB_ARCH_HAS_OHCI
  424. select CLKDEV_LOOKUP
  425. select GENERIC_TIME
  426. select GENERIC_CLOCKEVENTS
  427. help
  428. Support for the NXP LPC32XX family of processors
  429. config ARCH_MV78XX0
  430. bool "Marvell MV78xx0"
  431. select CPU_FEROCEON
  432. select PCI
  433. select ARCH_REQUIRE_GPIOLIB
  434. select GENERIC_CLOCKEVENTS
  435. select PLAT_ORION
  436. help
  437. Support for the following Marvell MV78xx0 series SoCs:
  438. MV781x0, MV782x0.
  439. config ARCH_ORION5X
  440. bool "Marvell Orion"
  441. depends on MMU
  442. select CPU_FEROCEON
  443. select PCI
  444. select ARCH_REQUIRE_GPIOLIB
  445. select GENERIC_CLOCKEVENTS
  446. select PLAT_ORION
  447. help
  448. Support for the following Marvell Orion 5x series SoCs:
  449. Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
  450. Orion-2 (5281), Orion-1-90 (6183).
  451. config ARCH_MMP
  452. bool "Marvell PXA168/910/MMP2"
  453. depends on MMU
  454. select ARCH_REQUIRE_GPIOLIB
  455. select CLKDEV_LOOKUP
  456. select GENERIC_CLOCKEVENTS
  457. select HAVE_SCHED_CLOCK
  458. select TICK_ONESHOT
  459. select PLAT_PXA
  460. select SPARSE_IRQ
  461. help
  462. Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
  463. config ARCH_KS8695
  464. bool "Micrel/Kendin KS8695"
  465. select CPU_ARM922T
  466. select ARCH_REQUIRE_GPIOLIB
  467. select ARCH_USES_GETTIMEOFFSET
  468. help
  469. Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
  470. System-on-Chip devices.
  471. config ARCH_NS9XXX
  472. bool "NetSilicon NS9xxx"
  473. select CPU_ARM926T
  474. select GENERIC_GPIO
  475. select GENERIC_CLOCKEVENTS
  476. select HAVE_CLK
  477. help
  478. Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
  479. System.
  480. <http://www.digi.com/products/microprocessors/index.jsp>
  481. config ARCH_W90X900
  482. bool "Nuvoton W90X900 CPU"
  483. select CPU_ARM926T
  484. select ARCH_REQUIRE_GPIOLIB
  485. select CLKDEV_LOOKUP
  486. select GENERIC_CLOCKEVENTS
  487. help
  488. Support for Nuvoton (Winbond logic dept.) ARM9 processor,
  489. At present, the w90x900 has been renamed nuc900, regarding
  490. the ARM series product line, you can login the following
  491. link address to know more.
  492. <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
  493. ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
  494. config ARCH_NUC93X
  495. bool "Nuvoton NUC93X CPU"
  496. select CPU_ARM926T
  497. select CLKDEV_LOOKUP
  498. help
  499. Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
  500. low-power and high performance MPEG-4/JPEG multimedia controller chip.
  501. config ARCH_TEGRA
  502. bool "NVIDIA Tegra"
  503. select CLKDEV_LOOKUP
  504. select GENERIC_TIME
  505. select GENERIC_CLOCKEVENTS
  506. select GENERIC_GPIO
  507. select HAVE_CLK
  508. select HAVE_SCHED_CLOCK
  509. select ARCH_HAS_BARRIERS if CACHE_L2X0
  510. select ARCH_HAS_CPUFREQ
  511. help
  512. This enables support for NVIDIA Tegra based systems (Tegra APX,
  513. Tegra 6xx and Tegra 2 series).
  514. config ARCH_PNX4008
  515. bool "Philips Nexperia PNX4008 Mobile"
  516. select CPU_ARM926T
  517. select CLKDEV_LOOKUP
  518. select ARCH_USES_GETTIMEOFFSET
  519. help
  520. This enables support for Philips PNX4008 mobile platform.
  521. config ARCH_PXA
  522. bool "PXA2xx/PXA3xx-based"
  523. depends on MMU
  524. select ARCH_MTD_XIP
  525. select ARCH_HAS_CPUFREQ
  526. select CLKDEV_LOOKUP
  527. select ARCH_REQUIRE_GPIOLIB
  528. select GENERIC_CLOCKEVENTS
  529. select HAVE_SCHED_CLOCK
  530. select TICK_ONESHOT
  531. select PLAT_PXA
  532. select SPARSE_IRQ
  533. help
  534. Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
  535. config ARCH_MSM
  536. bool "Qualcomm MSM"
  537. select HAVE_CLK
  538. select GENERIC_CLOCKEVENTS
  539. select ARCH_REQUIRE_GPIOLIB
  540. help
  541. Support for Qualcomm MSM/QSD based systems. This runs on the
  542. apps processor of the MSM/QSD and depends on a shared memory
  543. interface to the modem processor which runs the baseband
  544. stack and controls some vital subsystems
  545. (clock and power control, etc).
  546. config ARCH_SHMOBILE
  547. bool "Renesas SH-Mobile / R-Mobile"
  548. select HAVE_CLK
  549. select CLKDEV_LOOKUP
  550. select GENERIC_CLOCKEVENTS
  551. select NO_IOPORT
  552. select SPARSE_IRQ
  553. select MULTI_IRQ_HANDLER
  554. help
  555. Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
  556. config ARCH_RPC
  557. bool "RiscPC"
  558. select ARCH_ACORN
  559. select FIQ
  560. select TIMER_ACORN
  561. select ARCH_MAY_HAVE_PC_FDC
  562. select HAVE_PATA_PLATFORM
  563. select ISA_DMA_API
  564. select NO_IOPORT
  565. select ARCH_SPARSEMEM_ENABLE
  566. select ARCH_USES_GETTIMEOFFSET
  567. help
  568. On the Acorn Risc-PC, Linux can support the internal IDE disk and
  569. CD-ROM interface, serial and parallel port, and the floppy drive.
  570. config ARCH_SA1100
  571. bool "SA1100-based"
  572. select CPU_SA1100
  573. select ISA
  574. select ARCH_SPARSEMEM_ENABLE
  575. select ARCH_MTD_XIP
  576. select ARCH_HAS_CPUFREQ
  577. select CPU_FREQ
  578. select GENERIC_CLOCKEVENTS
  579. select HAVE_CLK
  580. select HAVE_SCHED_CLOCK
  581. select TICK_ONESHOT
  582. select ARCH_REQUIRE_GPIOLIB
  583. help
  584. Support for StrongARM 11x0 based boards.
  585. config ARCH_S3C2410
  586. bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
  587. select GENERIC_GPIO
  588. select ARCH_HAS_CPUFREQ
  589. select HAVE_CLK
  590. select ARCH_USES_GETTIMEOFFSET
  591. select HAVE_S3C2410_I2C if I2C
  592. help
  593. Samsung S3C2410X CPU based systems, such as the Simtec Electronics
  594. BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
  595. the Samsung SMDK2410 development board (and derivatives).
  596. Note, the S3C2416 and the S3C2450 are so close that they even share
  597. the same SoC ID code. This means that there is no seperate machine
  598. directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
  599. config ARCH_S3C64XX
  600. bool "Samsung S3C64XX"
  601. select PLAT_SAMSUNG
  602. select CPU_V6
  603. select ARM_VIC
  604. select HAVE_CLK
  605. select NO_IOPORT
  606. select ARCH_USES_GETTIMEOFFSET
  607. select ARCH_HAS_CPUFREQ
  608. select ARCH_REQUIRE_GPIOLIB
  609. select SAMSUNG_CLKSRC
  610. select SAMSUNG_IRQ_VIC_TIMER
  611. select SAMSUNG_IRQ_UART
  612. select S3C_GPIO_TRACK
  613. select S3C_GPIO_PULL_UPDOWN
  614. select S3C_GPIO_CFG_S3C24XX
  615. select S3C_GPIO_CFG_S3C64XX
  616. select S3C_DEV_NAND
  617. select USB_ARCH_HAS_OHCI
  618. select SAMSUNG_GPIOLIB_4BIT
  619. select HAVE_S3C2410_I2C if I2C
  620. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  621. help
  622. Samsung S3C64XX series based systems
  623. config ARCH_S5P64X0
  624. bool "Samsung S5P6440 S5P6450"
  625. select CPU_V6
  626. select GENERIC_GPIO
  627. select HAVE_CLK
  628. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  629. select ARCH_USES_GETTIMEOFFSET
  630. select HAVE_S3C2410_I2C if I2C
  631. select HAVE_S3C_RTC if RTC_CLASS
  632. help
  633. Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
  634. SMDK6450.
  635. config ARCH_S5P6442
  636. bool "Samsung S5P6442"
  637. select CPU_V6
  638. select GENERIC_GPIO
  639. select HAVE_CLK
  640. select ARCH_USES_GETTIMEOFFSET
  641. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  642. help
  643. Samsung S5P6442 CPU based systems
  644. config ARCH_S5PC100
  645. bool "Samsung S5PC100"
  646. select GENERIC_GPIO
  647. select HAVE_CLK
  648. select CPU_V7
  649. select ARM_L1_CACHE_SHIFT_6
  650. select ARCH_USES_GETTIMEOFFSET
  651. select HAVE_S3C2410_I2C if I2C
  652. select HAVE_S3C_RTC if RTC_CLASS
  653. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  654. help
  655. Samsung S5PC100 series based systems
  656. config ARCH_S5PV210
  657. bool "Samsung S5PV210/S5PC110"
  658. select CPU_V7
  659. select ARCH_SPARSEMEM_ENABLE
  660. select GENERIC_GPIO
  661. select HAVE_CLK
  662. select ARM_L1_CACHE_SHIFT_6
  663. select ARCH_HAS_CPUFREQ
  664. select ARCH_USES_GETTIMEOFFSET
  665. select HAVE_S3C2410_I2C if I2C
  666. select HAVE_S3C_RTC if RTC_CLASS
  667. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  668. help
  669. Samsung S5PV210/S5PC110 series based systems
  670. config ARCH_S5PV310
  671. bool "Samsung S5PV310/S5PC210"
  672. select CPU_V7
  673. select ARCH_SPARSEMEM_ENABLE
  674. select GENERIC_GPIO
  675. select HAVE_CLK
  676. select ARCH_HAS_CPUFREQ
  677. select GENERIC_CLOCKEVENTS
  678. select HAVE_S3C_RTC if RTC_CLASS
  679. select HAVE_S3C2410_I2C if I2C
  680. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  681. help
  682. Samsung S5PV310 series based systems
  683. config ARCH_SHARK
  684. bool "Shark"
  685. select CPU_SA110
  686. select ISA
  687. select ISA_DMA
  688. select ZONE_DMA
  689. select PCI
  690. select ARCH_USES_GETTIMEOFFSET
  691. help
  692. Support for the StrongARM based Digital DNARD machine, also known
  693. as "Shark" (<http://www.shark-linux.de/shark.html>).
  694. config ARCH_TCC_926
  695. bool "Telechips TCC ARM926-based systems"
  696. select CPU_ARM926T
  697. select HAVE_CLK
  698. select CLKDEV_LOOKUP
  699. select GENERIC_CLOCKEVENTS
  700. help
  701. Support for Telechips TCC ARM926-based systems.
  702. config ARCH_LH7A40X
  703. bool "Sharp LH7A40X"
  704. select CPU_ARM922T
  705. select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
  706. select ARCH_USES_GETTIMEOFFSET
  707. help
  708. Say Y here for systems based on one of the Sharp LH7A40X
  709. System on a Chip processors. These CPUs include an ARM922T
  710. core with a wide array of integrated devices for
  711. hand-held and low-power applications.
  712. config ARCH_U300
  713. bool "ST-Ericsson U300 Series"
  714. depends on MMU
  715. select CPU_ARM926T
  716. select HAVE_SCHED_CLOCK
  717. select HAVE_TCM
  718. select ARM_AMBA
  719. select ARM_VIC
  720. select GENERIC_CLOCKEVENTS
  721. select CLKDEV_LOOKUP
  722. select GENERIC_GPIO
  723. help
  724. Support for ST-Ericsson U300 series mobile platforms.
  725. config ARCH_U8500
  726. bool "ST-Ericsson U8500 Series"
  727. select CPU_V7
  728. select ARM_AMBA
  729. select GENERIC_CLOCKEVENTS
  730. select CLKDEV_LOOKUP
  731. select ARCH_REQUIRE_GPIOLIB
  732. select ARCH_HAS_CPUFREQ
  733. help
  734. Support for ST-Ericsson's Ux500 architecture
  735. config ARCH_NOMADIK
  736. bool "STMicroelectronics Nomadik"
  737. select ARM_AMBA
  738. select ARM_VIC
  739. select CPU_ARM926T
  740. select CLKDEV_LOOKUP
  741. select GENERIC_CLOCKEVENTS
  742. select ARCH_REQUIRE_GPIOLIB
  743. help
  744. Support for the Nomadik platform by ST-Ericsson
  745. config ARCH_DAVINCI
  746. bool "TI DaVinci"
  747. select GENERIC_CLOCKEVENTS
  748. select ARCH_REQUIRE_GPIOLIB
  749. select ZONE_DMA
  750. select HAVE_IDE
  751. select CLKDEV_LOOKUP
  752. select GENERIC_ALLOCATOR
  753. select ARCH_HAS_HOLES_MEMORYMODEL
  754. help
  755. Support for TI's DaVinci platform.
  756. config ARCH_OMAP
  757. bool "TI OMAP"
  758. select HAVE_CLK
  759. select ARCH_REQUIRE_GPIOLIB
  760. select ARCH_HAS_CPUFREQ
  761. select GENERIC_CLOCKEVENTS
  762. select HAVE_SCHED_CLOCK
  763. select ARCH_HAS_HOLES_MEMORYMODEL
  764. help
  765. Support for TI's OMAP platform (OMAP1/2/3/4).
  766. config PLAT_SPEAR
  767. bool "ST SPEAr"
  768. select ARM_AMBA
  769. select ARCH_REQUIRE_GPIOLIB
  770. select CLKDEV_LOOKUP
  771. select GENERIC_CLOCKEVENTS
  772. select HAVE_CLK
  773. help
  774. Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
  775. endchoice
  776. #
  777. # This is sorted alphabetically by mach-* pathname. However, plat-*
  778. # Kconfigs may be included either alphabetically (according to the
  779. # plat- suffix) or along side the corresponding mach-* source.
  780. #
  781. source "arch/arm/mach-aaec2000/Kconfig"
  782. source "arch/arm/mach-at91/Kconfig"
  783. source "arch/arm/mach-bcmring/Kconfig"
  784. source "arch/arm/mach-clps711x/Kconfig"
  785. source "arch/arm/mach-cns3xxx/Kconfig"
  786. source "arch/arm/mach-davinci/Kconfig"
  787. source "arch/arm/mach-dove/Kconfig"
  788. source "arch/arm/mach-ep93xx/Kconfig"
  789. source "arch/arm/mach-footbridge/Kconfig"
  790. source "arch/arm/mach-gemini/Kconfig"
  791. source "arch/arm/mach-h720x/Kconfig"
  792. source "arch/arm/mach-integrator/Kconfig"
  793. source "arch/arm/mach-iop32x/Kconfig"
  794. source "arch/arm/mach-iop33x/Kconfig"
  795. source "arch/arm/mach-iop13xx/Kconfig"
  796. source "arch/arm/mach-ixp4xx/Kconfig"
  797. source "arch/arm/mach-ixp2000/Kconfig"
  798. source "arch/arm/mach-ixp23xx/Kconfig"
  799. source "arch/arm/mach-kirkwood/Kconfig"
  800. source "arch/arm/mach-ks8695/Kconfig"
  801. source "arch/arm/mach-lh7a40x/Kconfig"
  802. source "arch/arm/mach-loki/Kconfig"
  803. source "arch/arm/mach-lpc32xx/Kconfig"
  804. source "arch/arm/mach-msm/Kconfig"
  805. source "arch/arm/mach-mv78xx0/Kconfig"
  806. source "arch/arm/plat-mxc/Kconfig"
  807. source "arch/arm/mach-mxs/Kconfig"
  808. source "arch/arm/mach-netx/Kconfig"
  809. source "arch/arm/mach-nomadik/Kconfig"
  810. source "arch/arm/plat-nomadik/Kconfig"
  811. source "arch/arm/mach-ns9xxx/Kconfig"
  812. source "arch/arm/mach-nuc93x/Kconfig"
  813. source "arch/arm/plat-omap/Kconfig"
  814. source "arch/arm/mach-omap1/Kconfig"
  815. source "arch/arm/mach-omap2/Kconfig"
  816. source "arch/arm/mach-orion5x/Kconfig"
  817. source "arch/arm/mach-pxa/Kconfig"
  818. source "arch/arm/plat-pxa/Kconfig"
  819. source "arch/arm/mach-mmp/Kconfig"
  820. source "arch/arm/mach-realview/Kconfig"
  821. source "arch/arm/mach-sa1100/Kconfig"
  822. source "arch/arm/plat-samsung/Kconfig"
  823. source "arch/arm/plat-s3c24xx/Kconfig"
  824. source "arch/arm/plat-s5p/Kconfig"
  825. source "arch/arm/plat-spear/Kconfig"
  826. source "arch/arm/plat-tcc/Kconfig"
  827. if ARCH_S3C2410
  828. source "arch/arm/mach-s3c2400/Kconfig"
  829. source "arch/arm/mach-s3c2410/Kconfig"
  830. source "arch/arm/mach-s3c2412/Kconfig"
  831. source "arch/arm/mach-s3c2416/Kconfig"
  832. source "arch/arm/mach-s3c2440/Kconfig"
  833. source "arch/arm/mach-s3c2443/Kconfig"
  834. endif
  835. if ARCH_S3C64XX
  836. source "arch/arm/mach-s3c64xx/Kconfig"
  837. endif
  838. source "arch/arm/mach-s5p64x0/Kconfig"
  839. source "arch/arm/mach-s5p6442/Kconfig"
  840. source "arch/arm/mach-s5pc100/Kconfig"
  841. source "arch/arm/mach-s5pv210/Kconfig"
  842. source "arch/arm/mach-s5pv310/Kconfig"
  843. source "arch/arm/mach-shmobile/Kconfig"
  844. source "arch/arm/plat-stmp3xxx/Kconfig"
  845. source "arch/arm/mach-tegra/Kconfig"
  846. source "arch/arm/mach-u300/Kconfig"
  847. source "arch/arm/mach-ux500/Kconfig"
  848. source "arch/arm/mach-versatile/Kconfig"
  849. source "arch/arm/mach-vexpress/Kconfig"
  850. source "arch/arm/plat-versatile/Kconfig"
  851. source "arch/arm/mach-w90x900/Kconfig"
  852. # Definitions to make life easier
  853. config ARCH_ACORN
  854. bool
  855. config PLAT_IOP
  856. bool
  857. select GENERIC_CLOCKEVENTS
  858. select HAVE_SCHED_CLOCK
  859. config PLAT_ORION
  860. bool
  861. select HAVE_SCHED_CLOCK
  862. config PLAT_PXA
  863. bool
  864. config PLAT_VERSATILE
  865. bool
  866. config ARM_TIMER_SP804
  867. bool
  868. source arch/arm/mm/Kconfig
  869. config IWMMXT
  870. bool "Enable iWMMXt support"
  871. depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
  872. default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
  873. help
  874. Enable support for iWMMXt context switching at run time if
  875. running on a CPU that supports it.
  876. # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
  877. config XSCALE_PMU
  878. bool
  879. depends on CPU_XSCALE && !XSCALE_PMU_TIMER
  880. default y
  881. config CPU_HAS_PMU
  882. depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
  883. (!ARCH_OMAP3 || OMAP3_EMU)
  884. default y
  885. bool
  886. config MULTI_IRQ_HANDLER
  887. bool
  888. help
  889. Allow each machine to specify it's own IRQ handler at run time.
  890. if !MMU
  891. source "arch/arm/Kconfig-nommu"
  892. endif
  893. config ARM_ERRATA_411920
  894. bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
  895. depends on CPU_V6
  896. help
  897. Invalidation of the Instruction Cache operation can
  898. fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
  899. It does not affect the MPCore. This option enables the ARM Ltd.
  900. recommended workaround.
  901. config ARM_ERRATA_430973
  902. bool "ARM errata: Stale prediction on replaced interworking branch"
  903. depends on CPU_V7
  904. help
  905. This option enables the workaround for the 430973 Cortex-A8
  906. (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
  907. interworking branch is replaced with another code sequence at the
  908. same virtual address, whether due to self-modifying code or virtual
  909. to physical address re-mapping, Cortex-A8 does not recover from the
  910. stale interworking branch prediction. This results in Cortex-A8
  911. executing the new code sequence in the incorrect ARM or Thumb state.
  912. The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
  913. and also flushes the branch target cache at every context switch.
  914. Note that setting specific bits in the ACTLR register may not be
  915. available in non-secure mode.
  916. config ARM_ERRATA_458693
  917. bool "ARM errata: Processor deadlock when a false hazard is created"
  918. depends on CPU_V7
  919. help
  920. This option enables the workaround for the 458693 Cortex-A8 (r2p0)
  921. erratum. For very specific sequences of memory operations, it is
  922. possible for a hazard condition intended for a cache line to instead
  923. be incorrectly associated with a different cache line. This false
  924. hazard might then cause a processor deadlock. The workaround enables
  925. the L1 caching of the NEON accesses and disables the PLD instruction
  926. in the ACTLR register. Note that setting specific bits in the ACTLR
  927. register may not be available in non-secure mode.
  928. config ARM_ERRATA_460075
  929. bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
  930. depends on CPU_V7
  931. help
  932. This option enables the workaround for the 460075 Cortex-A8 (r2p0)
  933. erratum. Any asynchronous access to the L2 cache may encounter a
  934. situation in which recent store transactions to the L2 cache are lost
  935. and overwritten with stale memory contents from external memory. The
  936. workaround disables the write-allocate mode for the L2 cache via the
  937. ACTLR register. Note that setting specific bits in the ACTLR register
  938. may not be available in non-secure mode.
  939. config ARM_ERRATA_742230
  940. bool "ARM errata: DMB operation may be faulty"
  941. depends on CPU_V7 && SMP
  942. help
  943. This option enables the workaround for the 742230 Cortex-A9
  944. (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
  945. between two write operations may not ensure the correct visibility
  946. ordering of the two writes. This workaround sets a specific bit in
  947. the diagnostic register of the Cortex-A9 which causes the DMB
  948. instruction to behave as a DSB, ensuring the correct behaviour of
  949. the two writes.
  950. config ARM_ERRATA_742231
  951. bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
  952. depends on CPU_V7 && SMP
  953. help
  954. This option enables the workaround for the 742231 Cortex-A9
  955. (r2p0..r2p2) erratum. Under certain conditions, specific to the
  956. Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
  957. accessing some data located in the same cache line, may get corrupted
  958. data due to bad handling of the address hazard when the line gets
  959. replaced from one of the CPUs at the same time as another CPU is
  960. accessing it. This workaround sets specific bits in the diagnostic
  961. register of the Cortex-A9 which reduces the linefill issuing
  962. capabilities of the processor.
  963. config PL310_ERRATA_588369
  964. bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
  965. depends on CACHE_L2X0 && ARCH_OMAP4
  966. help
  967. The PL310 L2 cache controller implements three types of Clean &
  968. Invalidate maintenance operations: by Physical Address
  969. (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
  970. They are architecturally defined to behave as the execution of a
  971. clean operation followed immediately by an invalidate operation,
  972. both performing to the same memory location. This functionality
  973. is not correctly implemented in PL310 as clean lines are not
  974. invalidated as a result of these operations. Note that this errata
  975. uses Texas Instrument's secure monitor api.
  976. config ARM_ERRATA_720789
  977. bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
  978. depends on CPU_V7 && SMP
  979. help
  980. This option enables the workaround for the 720789 Cortex-A9 (prior to
  981. r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
  982. broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
  983. As a consequence of this erratum, some TLB entries which should be
  984. invalidated are not, resulting in an incoherency in the system page
  985. tables. The workaround changes the TLB flushing routines to invalidate
  986. entries regardless of the ASID.
  987. config ARM_ERRATA_743622
  988. bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
  989. depends on CPU_V7
  990. help
  991. This option enables the workaround for the 743622 Cortex-A9
  992. (r2p0..r2p2) erratum. Under very rare conditions, a faulty
  993. optimisation in the Cortex-A9 Store Buffer may lead to data
  994. corruption. This workaround sets a specific bit in the diagnostic
  995. register of the Cortex-A9 which disables the Store Buffer
  996. optimisation, preventing the defect from occurring. This has no
  997. visible impact on the overall performance or power consumption of the
  998. processor.
  999. endmenu
  1000. source "arch/arm/common/Kconfig"
  1001. menu "Bus support"
  1002. config ARM_AMBA
  1003. bool
  1004. config ISA
  1005. bool
  1006. help
  1007. Find out whether you have ISA slots on your motherboard. ISA is the
  1008. name of a bus system, i.e. the way the CPU talks to the other stuff
  1009. inside your box. Other bus systems are PCI, EISA, MicroChannel
  1010. (MCA) or VESA. ISA is an older system, now being displaced by PCI;
  1011. newer boards don't support it. If you have ISA, say Y, otherwise N.
  1012. # Select ISA DMA controller support
  1013. config ISA_DMA
  1014. bool
  1015. select ISA_DMA_API
  1016. # Select ISA DMA interface
  1017. config ISA_DMA_API
  1018. bool
  1019. config PCI
  1020. bool "PCI support" if MIGHT_HAVE_PCI
  1021. help
  1022. Find out whether you have a PCI motherboard. PCI is the name of a
  1023. bus system, i.e. the way the CPU talks to the other stuff inside
  1024. your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
  1025. VESA. If you have PCI, say Y, otherwise N.
  1026. config PCI_DOMAINS
  1027. bool
  1028. depends on PCI
  1029. config PCI_NANOENGINE
  1030. bool "BSE nanoEngine PCI support"
  1031. depends on SA1100_NANOENGINE
  1032. help
  1033. Enable PCI on the BSE nanoEngine board.
  1034. config PCI_SYSCALL
  1035. def_bool PCI
  1036. # Select the host bridge type
  1037. config PCI_HOST_VIA82C505
  1038. bool
  1039. depends on PCI && ARCH_SHARK
  1040. default y
  1041. config PCI_HOST_ITE8152
  1042. bool
  1043. depends on PCI && MACH_ARMCORE
  1044. default y
  1045. select DMABOUNCE
  1046. source "drivers/pci/Kconfig"
  1047. source "drivers/pcmcia/Kconfig"
  1048. endmenu
  1049. menu "Kernel Features"
  1050. source "kernel/time/Kconfig"
  1051. config SMP
  1052. bool "Symmetric Multi-Processing (EXPERIMENTAL)"
  1053. depends on EXPERIMENTAL
  1054. depends on GENERIC_CLOCKEVENTS
  1055. depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
  1056. MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
  1057. ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
  1058. ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
  1059. select USE_GENERIC_SMP_HELPERS
  1060. select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
  1061. help
  1062. This enables support for systems with more than one CPU. If you have
  1063. a system with only one CPU, like most personal computers, say N. If
  1064. you have a system with more than one CPU, say Y.
  1065. If you say N here, the kernel will run on single and multiprocessor
  1066. machines, but will use only one CPU of a multiprocessor machine. If
  1067. you say Y here, the kernel will run on many, but not all, single
  1068. processor machines. On a single processor machine, the kernel will
  1069. run faster if you say N here.
  1070. See also <file:Documentation/i386/IO-APIC.txt>,
  1071. <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
  1072. <http://tldp.org/HOWTO/SMP-HOWTO.html>.
  1073. If you don't know what to do here, say N.
  1074. config SMP_ON_UP
  1075. bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
  1076. depends on EXPERIMENTAL
  1077. depends on SMP && !XIP_KERNEL
  1078. default y
  1079. help
  1080. SMP kernels contain instructions which fail on non-SMP processors.
  1081. Enabling this option allows the kernel to modify itself to make
  1082. these instructions safe. Disabling it allows about 1K of space
  1083. savings.
  1084. If you don't know what to do here, say Y.
  1085. config HAVE_ARM_SCU
  1086. bool
  1087. depends on SMP
  1088. help
  1089. This option enables support for the ARM system coherency unit
  1090. config HAVE_ARM_TWD
  1091. bool
  1092. depends on SMP
  1093. select TICK_ONESHOT
  1094. help
  1095. This options enables support for the ARM timer and watchdog unit
  1096. choice
  1097. prompt "Memory split"
  1098. default VMSPLIT_3G
  1099. help
  1100. Select the desired split between kernel and user memory.
  1101. If you are not absolutely sure what you are doing, leave this
  1102. option alone!
  1103. config VMSPLIT_3G
  1104. bool "3G/1G user/kernel split"
  1105. config VMSPLIT_2G
  1106. bool "2G/2G user/kernel split"
  1107. config VMSPLIT_1G
  1108. bool "1G/3G user/kernel split"
  1109. endchoice
  1110. config PAGE_OFFSET
  1111. hex
  1112. default 0x40000000 if VMSPLIT_1G
  1113. default 0x80000000 if VMSPLIT_2G
  1114. default 0xC0000000
  1115. config NR_CPUS
  1116. int "Maximum number of CPUs (2-32)"
  1117. range 2 32
  1118. depends on SMP
  1119. default "4"
  1120. config HOTPLUG_CPU
  1121. bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
  1122. depends on SMP && HOTPLUG && EXPERIMENTAL
  1123. depends on !ARCH_MSM
  1124. help
  1125. Say Y here to experiment with turning CPUs off and on. CPUs
  1126. can be controlled through /sys/devices/system/cpu.
  1127. config LOCAL_TIMERS
  1128. bool "Use local timer interrupts"
  1129. depends on SMP
  1130. default y
  1131. select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
  1132. help
  1133. Enable support for local timers on SMP platforms, rather then the
  1134. legacy IPI broadcast method. Local timers allows the system
  1135. accounting to be spread across the timer interval, preventing a
  1136. "thundering herd" at every timer tick.
  1137. source kernel/Kconfig.preempt
  1138. config HZ
  1139. int
  1140. default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
  1141. ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
  1142. default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
  1143. default AT91_TIMER_HZ if ARCH_AT91
  1144. default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
  1145. default 100
  1146. config THUMB2_KERNEL
  1147. bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
  1148. depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
  1149. select AEABI
  1150. select ARM_ASM_UNIFIED
  1151. help
  1152. By enabling this option, the kernel will be compiled in
  1153. Thumb-2 mode. A compiler/assembler that understand the unified
  1154. ARM-Thumb syntax is needed.
  1155. If unsure, say N.
  1156. config ARM_ASM_UNIFIED
  1157. bool
  1158. config AEABI
  1159. bool "Use the ARM EABI to compile the kernel"
  1160. help
  1161. This option allows for the kernel to be compiled using the latest
  1162. ARM ABI (aka EABI). This is only useful if you are using a user
  1163. space environment that is also compiled with EABI.
  1164. Since there are major incompatibilities between the legacy ABI and
  1165. EABI, especially with regard to structure member alignment, this
  1166. option also changes the kernel syscall calling convention to
  1167. disambiguate both ABIs and allow for backward compatibility support
  1168. (selected with CONFIG_OABI_COMPAT).
  1169. To use this you need GCC version 4.0.0 or later.
  1170. config OABI_COMPAT
  1171. bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
  1172. depends on AEABI && EXPERIMENTAL
  1173. default y
  1174. help
  1175. This option preserves the old syscall interface along with the
  1176. new (ARM EABI) one. It also provides a compatibility layer to
  1177. intercept syscalls that have structure arguments which layout
  1178. in memory differs between the legacy ABI and the new ARM EABI
  1179. (only for non "thumb" binaries). This option adds a tiny
  1180. overhead to all syscalls and produces a slightly larger kernel.
  1181. If you know you'll be using only pure EABI user space then you
  1182. can say N here. If this option is not selected and you attempt
  1183. to execute a legacy ABI binary then the result will be
  1184. UNPREDICTABLE (in fact it can be predicted that it won't work
  1185. at all). If in doubt say Y.
  1186. config ARCH_HAS_HOLES_MEMORYMODEL
  1187. bool
  1188. config ARCH_SPARSEMEM_ENABLE
  1189. bool
  1190. config ARCH_SPARSEMEM_DEFAULT
  1191. def_bool ARCH_SPARSEMEM_ENABLE
  1192. config ARCH_SELECT_MEMORY_MODEL
  1193. def_bool ARCH_SPARSEMEM_ENABLE
  1194. config HIGHMEM
  1195. bool "High Memory Support (EXPERIMENTAL)"
  1196. depends on MMU && EXPERIMENTAL
  1197. help
  1198. The address space of ARM processors is only 4 Gigabytes large
  1199. and it has to accommodate user address space, kernel address
  1200. space as well as some memory mapped IO. That means that, if you
  1201. have a large amount of physical memory and/or IO, not all of the
  1202. memory can be "permanently mapped" by the kernel. The physical
  1203. memory that is not permanently mapped is called "high memory".
  1204. Depending on the selected kernel/user memory split, minimum
  1205. vmalloc space and actual amount of RAM, you may not need this
  1206. option which should result in a slightly faster kernel.
  1207. If unsure, say n.
  1208. config HIGHPTE
  1209. bool "Allocate 2nd-level pagetables from highmem"
  1210. depends on HIGHMEM
  1211. depends on !OUTER_CACHE
  1212. config HW_PERF_EVENTS
  1213. bool "Enable hardware performance counter support for perf events"
  1214. depends on PERF_EVENTS && CPU_HAS_PMU
  1215. default y
  1216. help
  1217. Enable hardware performance counter support for perf events. If
  1218. disabled, perf events will use software events only.
  1219. source "mm/Kconfig"
  1220. config FORCE_MAX_ZONEORDER
  1221. int "Maximum zone order" if ARCH_SHMOBILE
  1222. range 11 64 if ARCH_SHMOBILE
  1223. default "9" if SA1111
  1224. default "11"
  1225. help
  1226. The kernel memory allocator divides physically contiguous memory
  1227. blocks into "zones", where each zone is a power of two number of
  1228. pages. This option selects the largest power of two that the kernel
  1229. keeps in the memory allocator. If you need to allocate very large
  1230. blocks of physically contiguous memory, then you may need to
  1231. increase this value.
  1232. This config option is actually maximum order plus one. For example,
  1233. a value of 11 means that the largest free memory block is 2^10 pages.
  1234. config LEDS
  1235. bool "Timer and CPU usage LEDs"
  1236. depends on ARCH_CDB89712 || ARCH_EBSA110 || \
  1237. ARCH_EBSA285 || ARCH_INTEGRATOR || \
  1238. ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
  1239. ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
  1240. ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
  1241. ARCH_AT91 || ARCH_DAVINCI || \
  1242. ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
  1243. help
  1244. If you say Y here, the LEDs on your machine will be used
  1245. to provide useful information about your current system status.
  1246. If you are compiling a kernel for a NetWinder or EBSA-285, you will
  1247. be able to select which LEDs are active using the options below. If
  1248. you are compiling a kernel for the EBSA-110 or the LART however, the
  1249. red LED will simply flash regularly to indicate that the system is
  1250. still functional. It is safe to say Y here if you have a CATS
  1251. system, but the driver will do nothing.
  1252. config LEDS_TIMER
  1253. bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
  1254. OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1255. || MACH_OMAP_PERSEUS2
  1256. depends on LEDS
  1257. depends on !GENERIC_CLOCKEVENTS
  1258. default y if ARCH_EBSA110
  1259. help
  1260. If you say Y here, one of the system LEDs (the green one on the
  1261. NetWinder, the amber one on the EBSA285, or the red one on the LART)
  1262. will flash regularly to indicate that the system is still
  1263. operational. This is mainly useful to kernel hackers who are
  1264. debugging unstable kernels.
  1265. The LART uses the same LED for both Timer LED and CPU usage LED
  1266. functions. You may choose to use both, but the Timer LED function
  1267. will overrule the CPU usage LED.
  1268. config LEDS_CPU
  1269. bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
  1270. !ARCH_OMAP) \
  1271. || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1272. || MACH_OMAP_PERSEUS2
  1273. depends on LEDS
  1274. help
  1275. If you say Y here, the red LED will be used to give a good real
  1276. time indication of CPU usage, by lighting whenever the idle task
  1277. is not currently executing.
  1278. The LART uses the same LED for both Timer LED and CPU usage LED
  1279. functions. You may choose to use both, but the Timer LED function
  1280. will overrule the CPU usage LED.
  1281. config ALIGNMENT_TRAP
  1282. bool
  1283. depends on CPU_CP15_MMU
  1284. default y if !ARCH_EBSA110
  1285. select HAVE_PROC_CPU if PROC_FS
  1286. help
  1287. ARM processors cannot fetch/store information which is not
  1288. naturally aligned on the bus, i.e., a 4 byte fetch must start at an
  1289. address divisible by 4. On 32-bit ARM processors, these non-aligned
  1290. fetch/store instructions will be emulated in software if you say
  1291. here, which has a severe performance impact. This is necessary for
  1292. correct operation of some network protocols. With an IP-only
  1293. configuration it is safe to say N, otherwise say Y.
  1294. config UACCESS_WITH_MEMCPY
  1295. bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
  1296. depends on MMU && EXPERIMENTAL
  1297. default y if CPU_FEROCEON
  1298. help
  1299. Implement faster copy_to_user and clear_user methods for CPU
  1300. cores where a 8-word STM instruction give significantly higher
  1301. memory write throughput than a sequence of individual 32bit stores.
  1302. A possible side effect is a slight increase in scheduling latency
  1303. between threads sharing the same address space if they invoke
  1304. such copy operations with large buffers.
  1305. However, if the CPU data cache is using a write-allocate mode,
  1306. this option is unlikely to provide any performance gain.
  1307. config SECCOMP
  1308. bool
  1309. prompt "Enable seccomp to safely compute untrusted bytecode"
  1310. ---help---
  1311. This kernel feature is useful for number crunching applications
  1312. that may need to compute untrusted bytecode during their
  1313. execution. By using pipes or other transports made available to
  1314. the process as file descriptors supporting the read/write
  1315. syscalls, it's possible to isolate those applications in
  1316. their own address space using seccomp. Once seccomp is
  1317. enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
  1318. and the task is only allowed to execute a few safe syscalls
  1319. defined by each seccomp mode.
  1320. config CC_STACKPROTECTOR
  1321. bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
  1322. depends on EXPERIMENTAL
  1323. help
  1324. This option turns on the -fstack-protector GCC feature. This
  1325. feature puts, at the beginning of functions, a canary value on
  1326. the stack just before the return address, and validates
  1327. the value just before actually returning. Stack based buffer
  1328. overflows (that need to overwrite this return address) now also
  1329. overwrite the canary, which gets detected and the attack is then
  1330. neutralized via a kernel panic.
  1331. This feature requires gcc version 4.2 or above.
  1332. config DEPRECATED_PARAM_STRUCT
  1333. bool "Provide old way to pass kernel parameters"
  1334. help
  1335. This was deprecated in 2001 and announced to live on for 5 years.
  1336. Some old boot loaders still use this way.
  1337. endmenu
  1338. menu "Boot options"
  1339. # Compressed boot loader in ROM. Yes, we really want to ask about
  1340. # TEXT and BSS so we preserve their values in the config files.
  1341. config ZBOOT_ROM_TEXT
  1342. hex "Compressed ROM boot loader base address"
  1343. default "0"
  1344. help
  1345. The physical address at which the ROM-able zImage is to be
  1346. placed in the target. Platforms which normally make use of
  1347. ROM-able zImage formats normally set this to a suitable
  1348. value in their defconfig file.
  1349. If ZBOOT_ROM is not enabled, this has no effect.
  1350. config ZBOOT_ROM_BSS
  1351. hex "Compressed ROM boot loader BSS address"
  1352. default "0"
  1353. help
  1354. The base address of an area of read/write memory in the target
  1355. for the ROM-able zImage which must be available while the
  1356. decompressor is running. It must be large enough to hold the
  1357. entire decompressed kernel plus an additional 128 KiB.
  1358. Platforms which normally make use of ROM-able zImage formats
  1359. normally set this to a suitable value in their defconfig file.
  1360. If ZBOOT_ROM is not enabled, this has no effect.
  1361. config ZBOOT_ROM
  1362. bool "Compressed boot loader in ROM/flash"
  1363. depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
  1364. help
  1365. Say Y here if you intend to execute your compressed kernel image
  1366. (zImage) directly from ROM or flash. If unsure, say N.
  1367. config CMDLINE
  1368. string "Default kernel command string"
  1369. default ""
  1370. help
  1371. On some architectures (EBSA110 and CATS), there is currently no way
  1372. for the boot loader to pass arguments to the kernel. For these
  1373. architectures, you should supply some command-line options at build
  1374. time by entering them here. As a minimum, you should specify the
  1375. memory size and the root device (e.g., mem=64M root=/dev/nfs).
  1376. config CMDLINE_FORCE
  1377. bool "Always use the default kernel command string"
  1378. depends on CMDLINE != ""
  1379. help
  1380. Always use the default kernel command string, even if the boot
  1381. loader passes other arguments to the kernel.
  1382. This is useful if you cannot or don't want to change the
  1383. command-line options your boot loader passes to the kernel.
  1384. If unsure, say N.
  1385. config XIP_KERNEL
  1386. bool "Kernel Execute-In-Place from ROM"
  1387. depends on !ZBOOT_ROM
  1388. help
  1389. Execute-In-Place allows the kernel to run from non-volatile storage
  1390. directly addressable by the CPU, such as NOR flash. This saves RAM
  1391. space since the text section of the kernel is not loaded from flash
  1392. to RAM. Read-write sections, such as the data section and stack,
  1393. are still copied to RAM. The XIP kernel is not compressed since
  1394. it has to run directly from flash, so it will take more space to
  1395. store it. The flash address used to link the kernel object files,
  1396. and for storing it, is configuration dependent. Therefore, if you
  1397. say Y here, you must know the proper physical address where to
  1398. store the kernel image depending on your own flash memory usage.
  1399. Also note that the make target becomes "make xipImage" rather than
  1400. "make zImage" or "make Image". The final kernel binary to put in
  1401. ROM memory will be arch/arm/boot/xipImage.
  1402. If unsure, say N.
  1403. config XIP_PHYS_ADDR
  1404. hex "XIP Kernel Physical Location"
  1405. depends on XIP_KERNEL
  1406. default "0x00080000"
  1407. help
  1408. This is the physical address in your flash memory the kernel will
  1409. be linked for and stored to. This address is dependent on your
  1410. own flash usage.
  1411. config KEXEC
  1412. bool "Kexec system call (EXPERIMENTAL)"
  1413. depends on EXPERIMENTAL
  1414. help
  1415. kexec is a system call that implements the ability to shutdown your
  1416. current kernel, and to start another kernel. It is like a reboot
  1417. but it is independent of the system firmware. And like a reboot
  1418. you can start any kernel with it, not just Linux.
  1419. It is an ongoing process to be certain the hardware in a machine
  1420. is properly shutdown, so do not be surprised if this code does not
  1421. initially work for you. It may help to enable device hotplugging
  1422. support.
  1423. config ATAGS_PROC
  1424. bool "Export atags in procfs"
  1425. depends on KEXEC
  1426. default y
  1427. help
  1428. Should the atags used to boot the kernel be exported in an "atags"
  1429. file in procfs. Useful with kexec.
  1430. config CRASH_DUMP
  1431. bool "Build kdump crash kernel (EXPERIMENTAL)"
  1432. depends on EXPERIMENTAL
  1433. help
  1434. Generate crash dump after being started by kexec. This should
  1435. be normally only set in special crash dump kernels which are
  1436. loaded in the main kernel with kexec-tools into a specially
  1437. reserved region and then later executed after a crash by
  1438. kdump/kexec. The crash dump kernel must be compiled to a
  1439. memory address not used by the main kernel
  1440. For more details see Documentation/kdump/kdump.txt
  1441. config AUTO_ZRELADDR
  1442. bool "Auto calculation of the decompressed kernel image address"
  1443. depends on !ZBOOT_ROM && !ARCH_U300
  1444. help
  1445. ZRELADDR is the physical address where the decompressed kernel
  1446. image will be placed. If AUTO_ZRELADDR is selected, the address
  1447. will be determined at run-time by masking the current IP with
  1448. 0xf8000000. This assumes the zImage being placed in the first 128MB
  1449. from start of memory.
  1450. endmenu
  1451. menu "CPU Power Management"
  1452. if ARCH_HAS_CPUFREQ
  1453. source "drivers/cpufreq/Kconfig"
  1454. config CPU_FREQ_IMX
  1455. tristate "CPUfreq driver for i.MX CPUs"
  1456. depends on ARCH_MXC && CPU_FREQ
  1457. help
  1458. This enables the CPUfreq driver for i.MX CPUs.
  1459. config CPU_FREQ_SA1100
  1460. bool
  1461. config CPU_FREQ_SA1110
  1462. bool
  1463. config CPU_FREQ_INTEGRATOR
  1464. tristate "CPUfreq driver for ARM Integrator CPUs"
  1465. depends on ARCH_INTEGRATOR && CPU_FREQ
  1466. default y
  1467. help
  1468. This enables the CPUfreq driver for ARM Integrator CPUs.
  1469. For details, take a look at <file:Documentation/cpu-freq>.
  1470. If in doubt, say Y.
  1471. config CPU_FREQ_PXA
  1472. bool
  1473. depends on CPU_FREQ && ARCH_PXA && PXA25x
  1474. default y
  1475. select CPU_FREQ_DEFAULT_GOV_USERSPACE
  1476. config CPU_FREQ_S3C64XX
  1477. bool "CPUfreq support for Samsung S3C64XX CPUs"
  1478. depends on CPU_FREQ && CPU_S3C6410
  1479. config CPU_FREQ_S3C
  1480. bool
  1481. help
  1482. Internal configuration node for common cpufreq on Samsung SoC
  1483. config CPU_FREQ_S3C24XX
  1484. bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
  1485. depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
  1486. select CPU_FREQ_S3C
  1487. help
  1488. This enables the CPUfreq driver for the Samsung S3C24XX family
  1489. of CPUs.
  1490. For details, take a look at <file:Documentation/cpu-freq>.
  1491. If in doubt, say N.
  1492. config CPU_FREQ_S3C24XX_PLL
  1493. bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
  1494. depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
  1495. help
  1496. Compile in support for changing the PLL frequency from the
  1497. S3C24XX series CPUfreq driver. The PLL takes time to settle
  1498. after a frequency change, so by default it is not enabled.
  1499. This also means that the PLL tables for the selected CPU(s) will
  1500. be built which may increase the size of the kernel image.
  1501. config CPU_FREQ_S3C24XX_DEBUG
  1502. bool "Debug CPUfreq Samsung driver core"
  1503. depends on CPU_FREQ_S3C24XX
  1504. help
  1505. Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
  1506. config CPU_FREQ_S3C24XX_IODEBUG
  1507. bool "Debug CPUfreq Samsung driver IO timing"
  1508. depends on CPU_FREQ_S3C24XX
  1509. help
  1510. Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
  1511. config CPU_FREQ_S3C24XX_DEBUGFS
  1512. bool "Export debugfs for CPUFreq"
  1513. depends on CPU_FREQ_S3C24XX && DEBUG_FS
  1514. help
  1515. Export status information via debugfs.
  1516. endif
  1517. source "drivers/cpuidle/Kconfig"
  1518. endmenu
  1519. menu "Floating point emulation"
  1520. comment "At least one emulation must be selected"
  1521. config FPE_NWFPE
  1522. bool "NWFPE math emulation"
  1523. depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
  1524. ---help---
  1525. Say Y to include the NWFPE floating point emulator in the kernel.
  1526. This is necessary to run most binaries. Linux does not currently
  1527. support floating point hardware so you need to say Y here even if
  1528. your machine has an FPA or floating point co-processor podule.
  1529. You may say N here if you are going to load the Acorn FPEmulator
  1530. early in the bootup.
  1531. config FPE_NWFPE_XP
  1532. bool "Support extended precision"
  1533. depends on FPE_NWFPE
  1534. help
  1535. Say Y to include 80-bit support in the kernel floating-point
  1536. emulator. Otherwise, only 32 and 64-bit support is compiled in.
  1537. Note that gcc does not generate 80-bit operations by default,
  1538. so in most cases this option only enlarges the size of the
  1539. floating point emulator without any good reason.
  1540. You almost surely want to say N here.
  1541. config FPE_FASTFPE
  1542. bool "FastFPE math emulation (EXPERIMENTAL)"
  1543. depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
  1544. ---help---
  1545. Say Y here to include the FAST floating point emulator in the kernel.
  1546. This is an experimental much faster emulator which now also has full
  1547. precision for the mantissa. It does not support any exceptions.
  1548. It is very simple, and approximately 3-6 times faster than NWFPE.
  1549. It should be sufficient for most programs. It may be not suitable
  1550. for scientific calculations, but you have to check this for yourself.
  1551. If you do not feel you need a faster FP emulation you should better
  1552. choose NWFPE.
  1553. config VFP
  1554. bool "VFP-format floating point maths"
  1555. depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
  1556. help
  1557. Say Y to include VFP support code in the kernel. This is needed
  1558. if your hardware includes a VFP unit.
  1559. Please see <file:Documentation/arm/VFP/release-notes.txt> for
  1560. release notes and additional status information.
  1561. Say N if your target does not have VFP hardware.
  1562. config VFPv3
  1563. bool
  1564. depends on VFP
  1565. default y if CPU_V7
  1566. config NEON
  1567. bool "Advanced SIMD (NEON) Extension support"
  1568. depends on VFPv3 && CPU_V7
  1569. help
  1570. Say Y to include support code for NEON, the ARMv7 Advanced SIMD
  1571. Extension.
  1572. endmenu
  1573. menu "Userspace binary formats"
  1574. source "fs/Kconfig.binfmt"
  1575. config ARTHUR
  1576. tristate "RISC OS personality"
  1577. depends on !AEABI
  1578. help
  1579. Say Y here to include the kernel code necessary if you want to run
  1580. Acorn RISC OS/Arthur binaries under Linux. This code is still very
  1581. experimental; if this sounds frightening, say N and sleep in peace.
  1582. You can also say M here to compile this support as a module (which
  1583. will be called arthur).
  1584. endmenu
  1585. menu "Power management options"
  1586. source "kernel/power/Kconfig"
  1587. config ARCH_SUSPEND_POSSIBLE
  1588. def_bool y
  1589. endmenu
  1590. source "net/Kconfig"
  1591. source "drivers/Kconfig"
  1592. source "fs/Kconfig"
  1593. source "arch/arm/Kconfig.debug"
  1594. source "security/Kconfig"
  1595. source "crypto/Kconfig"
  1596. source "lib/Kconfig"