Kconfig 4.6 KB

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  1. if ARCH_IXP4XX
  2. config ARCH_SUPPORTS_BIG_ENDIAN
  3. bool
  4. default y
  5. menu "Intel IXP4xx Implementation Options"
  6. comment "IXP4xx Platforms"
  7. config MACH_NSLU2
  8. bool
  9. prompt "Linksys NSLU2"
  10. select PCI
  11. help
  12. Say 'Y' here if you want your kernel to support Linksys's
  13. NSLU2 NAS device. For more information on this platform,
  14. see http://www.nslu2-linux.org
  15. config MACH_AVILA
  16. bool "Avila"
  17. select PCI
  18. help
  19. Say 'Y' here if you want your kernel to support the Gateworks
  20. Avila Network Platform. For more information on this platform,
  21. see <file:Documentation/arm/IXP4xx>.
  22. config MACH_LOFT
  23. bool "Loft"
  24. depends on MACH_AVILA
  25. help
  26. Say 'Y' here if you want your kernel to support the Giant
  27. Shoulder Inc Loft board (a minor variation on the standard
  28. Gateworks Avila Network Platform).
  29. config ARCH_ADI_COYOTE
  30. bool "Coyote"
  31. select PCI
  32. help
  33. Say 'Y' here if you want your kernel to support the ADI
  34. Engineering Coyote Gateway Reference Platform. For more
  35. information on this platform, see <file:Documentation/arm/IXP4xx>.
  36. config ARCH_IXDP425
  37. bool "IXDP425"
  38. help
  39. Say 'Y' here if you want your kernel to support Intel's
  40. IXDP425 Development Platform (Also known as Richfield).
  41. For more information on this platform, see <file:Documentation/arm/IXP4xx>.
  42. config MACH_IXDPG425
  43. bool "IXDPG425"
  44. help
  45. Say 'Y' here if you want your kernel to support Intel's
  46. IXDPG425 Development Platform (Also known as Montajade).
  47. For more information on this platform, see <file:Documentation/arm/IXP4xx>.
  48. config MACH_IXDP465
  49. bool "IXDP465"
  50. help
  51. Say 'Y' here if you want your kernel to support Intel's
  52. IXDP465 Development Platform (Also known as BMP).
  53. For more information on this platform, see <file:Documentation/arm/IXP4xx>.
  54. #
  55. # IXCDP1100 is the exact same HW as IXDP425, but with a different machine
  56. # number from the bootloader due to marketing monkeys, so we just enable it
  57. # by default if IXDP425 is enabled.
  58. #
  59. config ARCH_IXCDP1100
  60. bool
  61. depends on ARCH_IXDP425
  62. default y
  63. config ARCH_PRPMC1100
  64. bool "PrPMC1100"
  65. help
  66. Say 'Y' here if you want your kernel to support the Motorola
  67. PrPCM1100 Processor Mezanine Module. For more information on
  68. this platform, see <file:Documentation/arm/IXP4xx>.
  69. config MACH_NAS100D
  70. bool
  71. prompt "NAS100D"
  72. select PCI
  73. help
  74. Say 'Y' here if you want your kernel to support Iomega's
  75. NAS 100d device. For more information on this platform,
  76. see http://www.nslu2-linux.org/wiki/NAS100d/HomePage
  77. #
  78. # Avila and IXDP share the same source for now. Will change in future
  79. #
  80. config ARCH_IXDP4XX
  81. bool
  82. depends on ARCH_IXDP425 || MACH_IXDP465
  83. default y
  84. #
  85. # Certain registers and IRQs are only enabled if supporting IXP465 CPUs
  86. #
  87. config CPU_IXP46X
  88. bool
  89. depends on MACH_IXDP465
  90. default y
  91. config MACH_GTWX5715
  92. bool "Gemtek WX5715 (Linksys WRV54G)"
  93. depends on ARCH_IXP4XX
  94. select PCI
  95. help
  96. This board is currently inside the Linksys WRV54G Gateways.
  97. IXP425 - 266mhz
  98. 32mb SDRAM
  99. 8mb Flash
  100. miniPCI slot 0 does not have a card connector soldered to the board
  101. miniPCI slot 1 has an ISL3880 802.11g card (Prism54)
  102. npe0 is connected to a Kendin KS8995M Switch (4 ports)
  103. npe1 is the "wan" port
  104. "Console" UART is available on J11 as console
  105. "High Speed" UART is n/c (as far as I can tell)
  106. 20 Pin ARM/Xscale JTAG interface on J2
  107. comment "IXP4xx Options"
  108. config DMABOUNCE
  109. bool
  110. default y
  111. depends on PCI
  112. config IXP4XX_INDIRECT_PCI
  113. bool "Use indirect PCI memory access"
  114. depends on PCI
  115. help
  116. IXP4xx provides two methods of accessing PCI memory space:
  117. 1) A direct mapped window from 0x48000000 to 0x4bffffff (64MB).
  118. To access PCI via this space, we simply ioremap() the BAR
  119. into the kernel and we can use the standard read[bwl]/write[bwl]
  120. macros. This is the preferred method due to speed but it
  121. limits the system to just 64MB of PCI memory. This can be
  122. problematic if using video cards and other memory-heavy devices.
  123. 2) If > 64MB of memory space is required, the IXP4xx can be
  124. configured to use indirect registers to access PCI This allows
  125. for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus.
  126. The disadvantage of this is that every PCI access requires
  127. three local register accesses plus a spinlock, but in some
  128. cases the performance hit is acceptable. In addition, you cannot
  129. mmap() PCI devices in this case due to the indirect nature
  130. of the PCI window.
  131. By default, the direct method is used. Choose this option if you
  132. need to use the indirect method instead. If you don't know
  133. what you need, leave this option unselected.
  134. endmenu
  135. endif