cx88-dvb.c 27 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-xc2028.h"
  46. #include "tuner-xc2028-types.h"
  47. #include "tuner-simple.h"
  48. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  49. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  50. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  51. MODULE_LICENSE("GPL");
  52. static unsigned int debug;
  53. module_param(debug, int, 0644);
  54. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  55. #define dprintk(level,fmt, arg...) if (debug >= level) \
  56. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  57. /* ------------------------------------------------------------------ */
  58. static int dvb_buf_setup(struct videobuf_queue *q,
  59. unsigned int *count, unsigned int *size)
  60. {
  61. struct cx8802_dev *dev = q->priv_data;
  62. dev->ts_packet_size = 188 * 4;
  63. dev->ts_packet_count = 32;
  64. *size = dev->ts_packet_size * dev->ts_packet_count;
  65. *count = 32;
  66. return 0;
  67. }
  68. static int dvb_buf_prepare(struct videobuf_queue *q,
  69. struct videobuf_buffer *vb, enum v4l2_field field)
  70. {
  71. struct cx8802_dev *dev = q->priv_data;
  72. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  73. }
  74. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  75. {
  76. struct cx8802_dev *dev = q->priv_data;
  77. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  78. }
  79. static void dvb_buf_release(struct videobuf_queue *q,
  80. struct videobuf_buffer *vb)
  81. {
  82. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  83. }
  84. static struct videobuf_queue_ops dvb_qops = {
  85. .buf_setup = dvb_buf_setup,
  86. .buf_prepare = dvb_buf_prepare,
  87. .buf_queue = dvb_buf_queue,
  88. .buf_release = dvb_buf_release,
  89. };
  90. /* ------------------------------------------------------------------ */
  91. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  92. {
  93. struct cx8802_dev *dev= fe->dvb->priv;
  94. struct cx8802_driver *drv = NULL;
  95. int ret = 0;
  96. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  97. if (drv) {
  98. if (acquire)
  99. ret = drv->request_acquire(drv);
  100. else
  101. ret = drv->request_release(drv);
  102. }
  103. return ret;
  104. }
  105. /* ------------------------------------------------------------------ */
  106. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  107. {
  108. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  109. static u8 reset [] = { RESET, 0x80 };
  110. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  111. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  112. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  113. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  114. mt352_write(fe, clock_config, sizeof(clock_config));
  115. udelay(200);
  116. mt352_write(fe, reset, sizeof(reset));
  117. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  118. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  119. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  120. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  121. return 0;
  122. }
  123. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  124. {
  125. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  126. static u8 reset [] = { RESET, 0x80 };
  127. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  128. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  129. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  130. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  131. mt352_write(fe, clock_config, sizeof(clock_config));
  132. udelay(200);
  133. mt352_write(fe, reset, sizeof(reset));
  134. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  135. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  136. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  137. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  138. return 0;
  139. }
  140. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  141. {
  142. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  143. static u8 reset [] = { 0x50, 0x80 };
  144. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  145. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  146. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  147. static u8 dntv_extra[] = { 0xB5, 0x7A };
  148. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  149. mt352_write(fe, clock_config, sizeof(clock_config));
  150. udelay(2000);
  151. mt352_write(fe, reset, sizeof(reset));
  152. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  153. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  154. udelay(2000);
  155. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  156. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  157. return 0;
  158. }
  159. static struct mt352_config dvico_fusionhdtv = {
  160. .demod_address = 0x0f,
  161. .demod_init = dvico_fusionhdtv_demod_init,
  162. };
  163. static struct mt352_config dntv_live_dvbt_config = {
  164. .demod_address = 0x0f,
  165. .demod_init = dntv_live_dvbt_demod_init,
  166. };
  167. static struct mt352_config dvico_fusionhdtv_dual = {
  168. .demod_address = 0x0f,
  169. .demod_init = dvico_dual_demod_init,
  170. };
  171. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  172. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  173. {
  174. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  175. static u8 reset [] = { 0x50, 0x80 };
  176. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  177. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  178. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  179. static u8 dntv_extra[] = { 0xB5, 0x7A };
  180. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  181. mt352_write(fe, clock_config, sizeof(clock_config));
  182. udelay(2000);
  183. mt352_write(fe, reset, sizeof(reset));
  184. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  185. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  186. udelay(2000);
  187. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  188. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  189. return 0;
  190. }
  191. static struct mt352_config dntv_live_dvbt_pro_config = {
  192. .demod_address = 0x0f,
  193. .no_tuner = 1,
  194. .demod_init = dntv_live_dvbt_pro_demod_init,
  195. };
  196. #endif
  197. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  198. .demod_address = 0x0f,
  199. .no_tuner = 1,
  200. };
  201. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  202. .demod_address = 0x0f,
  203. .if2 = 45600,
  204. .no_tuner = 1,
  205. };
  206. static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  207. .demod_address = 0x0f,
  208. .if2 = 4560,
  209. .no_tuner = 1,
  210. .demod_init = dvico_fusionhdtv_demod_init,
  211. };
  212. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  213. .demod_address = 0x0f,
  214. };
  215. static struct cx22702_config connexant_refboard_config = {
  216. .demod_address = 0x43,
  217. .output_mode = CX22702_SERIAL_OUTPUT,
  218. };
  219. static struct cx22702_config hauppauge_hvr_config = {
  220. .demod_address = 0x63,
  221. .output_mode = CX22702_SERIAL_OUTPUT,
  222. };
  223. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  224. {
  225. struct cx8802_dev *dev= fe->dvb->priv;
  226. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  227. return 0;
  228. }
  229. static struct or51132_config pchdtv_hd3000 = {
  230. .demod_address = 0x15,
  231. .set_ts_params = or51132_set_ts_param,
  232. };
  233. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  234. {
  235. struct cx8802_dev *dev= fe->dvb->priv;
  236. struct cx88_core *core = dev->core;
  237. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  238. if (index == 0)
  239. cx_clear(MO_GP0_IO, 8);
  240. else
  241. cx_set(MO_GP0_IO, 8);
  242. return 0;
  243. }
  244. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  245. {
  246. struct cx8802_dev *dev= fe->dvb->priv;
  247. if (is_punctured)
  248. dev->ts_gen_cntrl |= 0x04;
  249. else
  250. dev->ts_gen_cntrl &= ~0x04;
  251. return 0;
  252. }
  253. static struct lgdt330x_config fusionhdtv_3_gold = {
  254. .demod_address = 0x0e,
  255. .demod_chip = LGDT3302,
  256. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  257. .set_ts_params = lgdt330x_set_ts_param,
  258. };
  259. static struct lgdt330x_config fusionhdtv_5_gold = {
  260. .demod_address = 0x0e,
  261. .demod_chip = LGDT3303,
  262. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  263. .set_ts_params = lgdt330x_set_ts_param,
  264. };
  265. static struct lgdt330x_config pchdtv_hd5500 = {
  266. .demod_address = 0x59,
  267. .demod_chip = LGDT3303,
  268. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  269. .set_ts_params = lgdt330x_set_ts_param,
  270. };
  271. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  272. {
  273. struct cx8802_dev *dev= fe->dvb->priv;
  274. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  275. return 0;
  276. }
  277. static struct nxt200x_config ati_hdtvwonder = {
  278. .demod_address = 0x0a,
  279. .set_ts_params = nxt200x_set_ts_param,
  280. };
  281. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  282. int is_punctured)
  283. {
  284. struct cx8802_dev *dev= fe->dvb->priv;
  285. dev->ts_gen_cntrl = 0x02;
  286. return 0;
  287. }
  288. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  289. fe_sec_voltage_t voltage)
  290. {
  291. struct cx8802_dev *dev= fe->dvb->priv;
  292. struct cx88_core *core = dev->core;
  293. if (voltage == SEC_VOLTAGE_OFF)
  294. cx_write(MO_GP0_IO, 0x000006fb);
  295. else
  296. cx_write(MO_GP0_IO, 0x000006f9);
  297. if (core->prev_set_voltage)
  298. return core->prev_set_voltage(fe, voltage);
  299. return 0;
  300. }
  301. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  302. fe_sec_voltage_t voltage)
  303. {
  304. struct cx8802_dev *dev= fe->dvb->priv;
  305. struct cx88_core *core = dev->core;
  306. if (voltage == SEC_VOLTAGE_OFF) {
  307. dprintk(1,"LNB Voltage OFF\n");
  308. cx_write(MO_GP0_IO, 0x0000efff);
  309. }
  310. if (core->prev_set_voltage)
  311. return core->prev_set_voltage(fe, voltage);
  312. return 0;
  313. }
  314. static int cx88_pci_nano_callback(void *ptr, int command, int arg)
  315. {
  316. struct cx88_core *core = ptr;
  317. switch (command) {
  318. case XC2028_TUNER_RESET:
  319. /* Send the tuner in then out of reset */
  320. dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __FUNCTION__, arg);
  321. switch (core->boardnr) {
  322. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  323. /* GPIO-4 xc3028 tuner */
  324. cx_set(MO_GP0_IO, 0x00001000);
  325. cx_clear(MO_GP0_IO, 0x00000010);
  326. msleep(100);
  327. cx_set(MO_GP0_IO, 0x00000010);
  328. msleep(100);
  329. break;
  330. }
  331. break;
  332. case XC2028_RESET_CLK:
  333. dprintk(1, "%s: XC2028_RESET_CLK %d\n", __FUNCTION__, arg);
  334. break;
  335. default:
  336. dprintk(1, "%s: unknown command %d, arg %d\n", __FUNCTION__,
  337. command, arg);
  338. return -EINVAL;
  339. }
  340. return 0;
  341. }
  342. static struct cx24123_config geniatech_dvbs_config = {
  343. .demod_address = 0x55,
  344. .set_ts_params = cx24123_set_ts_param,
  345. };
  346. static struct cx24123_config hauppauge_novas_config = {
  347. .demod_address = 0x55,
  348. .set_ts_params = cx24123_set_ts_param,
  349. };
  350. static struct cx24123_config kworld_dvbs_100_config = {
  351. .demod_address = 0x15,
  352. .set_ts_params = cx24123_set_ts_param,
  353. .lnb_polarity = 1,
  354. };
  355. static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  356. .demod_address = 0x32 >> 1,
  357. .output_mode = S5H1409_PARALLEL_OUTPUT,
  358. .gpio = S5H1409_GPIO_ON,
  359. .qam_if = 44000,
  360. .inversion = S5H1409_INVERSION_OFF,
  361. .status_mode = S5H1409_DEMODLOCKING,
  362. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  363. };
  364. static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  365. .demod_address = 0x32 >> 1,
  366. .output_mode = S5H1409_SERIAL_OUTPUT,
  367. .gpio = S5H1409_GPIO_OFF,
  368. .inversion = S5H1409_INVERSION_OFF,
  369. .status_mode = S5H1409_DEMODLOCKING,
  370. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  371. };
  372. static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  373. .i2c_address = 0x64,
  374. .if_khz = 5380,
  375. .tuner_callback = cx88_tuner_callback,
  376. };
  377. static struct zl10353_config cx88_geniatech_x8000_mt = {
  378. .demod_address = (0x1e >> 1),
  379. .no_tuner = 1,
  380. };
  381. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  382. {
  383. struct dvb_frontend *fe;
  384. struct xc2028_config cfg = {
  385. .i2c_adap = &dev->core->i2c_adap,
  386. .i2c_addr = addr,
  387. };
  388. if (!dev->dvb.frontend) {
  389. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  390. "Can't attach xc3028\n",
  391. dev->core->name);
  392. return -EINVAL;
  393. }
  394. fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
  395. if (!fe) {
  396. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  397. dev->core->name);
  398. dvb_frontend_detach(dev->dvb.frontend);
  399. dvb_unregister_frontend(dev->dvb.frontend);
  400. dev->dvb.frontend = NULL;
  401. return -EINVAL;
  402. }
  403. printk(KERN_INFO "%s/2: xc3028 attached\n",
  404. dev->core->name);
  405. return 0;
  406. }
  407. static int dvb_register(struct cx8802_dev *dev)
  408. {
  409. /* init struct videobuf_dvb */
  410. dev->dvb.name = dev->core->name;
  411. dev->ts_gen_cntrl = 0x0c;
  412. /* init frontend */
  413. switch (dev->core->boardnr) {
  414. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  415. dev->dvb.frontend = dvb_attach(cx22702_attach,
  416. &connexant_refboard_config,
  417. &dev->core->i2c_adap);
  418. if (dev->dvb.frontend != NULL) {
  419. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  420. &dev->core->i2c_adap,
  421. DVB_PLL_THOMSON_DTT759X);
  422. }
  423. break;
  424. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  425. case CX88_BOARD_CONEXANT_DVB_T1:
  426. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  427. case CX88_BOARD_WINFAST_DTV1000:
  428. dev->dvb.frontend = dvb_attach(cx22702_attach,
  429. &connexant_refboard_config,
  430. &dev->core->i2c_adap);
  431. if (dev->dvb.frontend != NULL) {
  432. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  433. &dev->core->i2c_adap,
  434. DVB_PLL_THOMSON_DTT7579);
  435. }
  436. break;
  437. case CX88_BOARD_WINFAST_DTV2000H:
  438. case CX88_BOARD_HAUPPAUGE_HVR1100:
  439. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  440. case CX88_BOARD_HAUPPAUGE_HVR1300:
  441. case CX88_BOARD_HAUPPAUGE_HVR3000:
  442. dev->dvb.frontend = dvb_attach(cx22702_attach,
  443. &hauppauge_hvr_config,
  444. &dev->core->i2c_adap);
  445. if (dev->dvb.frontend != NULL) {
  446. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  447. &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
  448. }
  449. break;
  450. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  451. dev->dvb.frontend = dvb_attach(mt352_attach,
  452. &dvico_fusionhdtv,
  453. &dev->core->i2c_adap);
  454. if (dev->dvb.frontend != NULL) {
  455. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  456. NULL, DVB_PLL_THOMSON_DTT7579);
  457. break;
  458. }
  459. /* ZL10353 replaces MT352 on later cards */
  460. dev->dvb.frontend = dvb_attach(zl10353_attach,
  461. &dvico_fusionhdtv_plus_v1_1,
  462. &dev->core->i2c_adap);
  463. if (dev->dvb.frontend != NULL) {
  464. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  465. NULL, DVB_PLL_THOMSON_DTT7579);
  466. }
  467. break;
  468. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  469. /* The tin box says DEE1601, but it seems to be DTT7579
  470. * compatible, with a slightly different MT352 AGC gain. */
  471. dev->dvb.frontend = dvb_attach(mt352_attach,
  472. &dvico_fusionhdtv_dual,
  473. &dev->core->i2c_adap);
  474. if (dev->dvb.frontend != NULL) {
  475. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  476. NULL, DVB_PLL_THOMSON_DTT7579);
  477. break;
  478. }
  479. /* ZL10353 replaces MT352 on later cards */
  480. dev->dvb.frontend = dvb_attach(zl10353_attach,
  481. &dvico_fusionhdtv_plus_v1_1,
  482. &dev->core->i2c_adap);
  483. if (dev->dvb.frontend != NULL) {
  484. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  485. NULL, DVB_PLL_THOMSON_DTT7579);
  486. }
  487. break;
  488. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  489. dev->dvb.frontend = dvb_attach(mt352_attach,
  490. &dvico_fusionhdtv,
  491. &dev->core->i2c_adap);
  492. if (dev->dvb.frontend != NULL) {
  493. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  494. NULL, DVB_PLL_LG_Z201);
  495. }
  496. break;
  497. case CX88_BOARD_KWORLD_DVB_T:
  498. case CX88_BOARD_DNTV_LIVE_DVB_T:
  499. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  500. dev->dvb.frontend = dvb_attach(mt352_attach,
  501. &dntv_live_dvbt_config,
  502. &dev->core->i2c_adap);
  503. if (dev->dvb.frontend != NULL) {
  504. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  505. NULL, DVB_PLL_UNKNOWN_1);
  506. }
  507. break;
  508. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  509. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  510. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  511. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  512. &dev->vp3054->adap);
  513. if (dev->dvb.frontend != NULL) {
  514. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  515. &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
  516. }
  517. #else
  518. printk(KERN_ERR "%s/2: built without vp3054 support\n", dev->core->name);
  519. #endif
  520. break;
  521. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  522. dev->dvb.frontend = dvb_attach(zl10353_attach,
  523. &dvico_fusionhdtv_hybrid,
  524. &dev->core->i2c_adap);
  525. if (dev->dvb.frontend != NULL) {
  526. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  527. &dev->core->i2c_adap, 0x61,
  528. TUNER_THOMSON_FE6600);
  529. }
  530. break;
  531. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  532. dev->dvb.frontend = dvb_attach(zl10353_attach,
  533. &dvico_fusionhdtv_xc3028,
  534. &dev->core->i2c_adap);
  535. if (dev->dvb.frontend == NULL)
  536. dev->dvb.frontend = dvb_attach(mt352_attach,
  537. &dvico_fusionhdtv_mt352_xc3028,
  538. &dev->core->i2c_adap);
  539. /*
  540. * On this board, the demod provides the I2C bus pullup.
  541. * We must not permit gate_ctrl to be performed, or
  542. * the xc3028 cannot communicate on the bus.
  543. */
  544. if (dev->dvb.frontend)
  545. dev->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  546. if (attach_xc3028(0x61, dev) < 0)
  547. return -EINVAL;
  548. break;
  549. case CX88_BOARD_PCHDTV_HD3000:
  550. dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  551. &dev->core->i2c_adap);
  552. if (dev->dvb.frontend != NULL) {
  553. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  554. &dev->core->i2c_adap, 0x61,
  555. TUNER_THOMSON_DTT761X);
  556. }
  557. break;
  558. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  559. dev->ts_gen_cntrl = 0x08;
  560. {
  561. /* Do a hardware reset of chip before using it. */
  562. struct cx88_core *core = dev->core;
  563. cx_clear(MO_GP0_IO, 1);
  564. mdelay(100);
  565. cx_set(MO_GP0_IO, 1);
  566. mdelay(200);
  567. /* Select RF connector callback */
  568. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  569. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  570. &fusionhdtv_3_gold,
  571. &dev->core->i2c_adap);
  572. if (dev->dvb.frontend != NULL) {
  573. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  574. &dev->core->i2c_adap, 0x61,
  575. TUNER_MICROTUNE_4042FI5);
  576. }
  577. }
  578. break;
  579. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  580. dev->ts_gen_cntrl = 0x08;
  581. {
  582. /* Do a hardware reset of chip before using it. */
  583. struct cx88_core *core = dev->core;
  584. cx_clear(MO_GP0_IO, 1);
  585. mdelay(100);
  586. cx_set(MO_GP0_IO, 9);
  587. mdelay(200);
  588. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  589. &fusionhdtv_3_gold,
  590. &dev->core->i2c_adap);
  591. if (dev->dvb.frontend != NULL) {
  592. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  593. &dev->core->i2c_adap, 0x61,
  594. TUNER_THOMSON_DTT761X);
  595. }
  596. }
  597. break;
  598. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  599. dev->ts_gen_cntrl = 0x08;
  600. {
  601. /* Do a hardware reset of chip before using it. */
  602. struct cx88_core *core = dev->core;
  603. cx_clear(MO_GP0_IO, 1);
  604. mdelay(100);
  605. cx_set(MO_GP0_IO, 1);
  606. mdelay(200);
  607. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  608. &fusionhdtv_5_gold,
  609. &dev->core->i2c_adap);
  610. if (dev->dvb.frontend != NULL) {
  611. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  612. &dev->core->i2c_adap,
  613. DVB_PLL_LG_TDVS_H06XF);
  614. }
  615. }
  616. break;
  617. case CX88_BOARD_PCHDTV_HD5500:
  618. dev->ts_gen_cntrl = 0x08;
  619. {
  620. /* Do a hardware reset of chip before using it. */
  621. struct cx88_core *core = dev->core;
  622. cx_clear(MO_GP0_IO, 1);
  623. mdelay(100);
  624. cx_set(MO_GP0_IO, 1);
  625. mdelay(200);
  626. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  627. &pchdtv_hd5500,
  628. &dev->core->i2c_adap);
  629. if (dev->dvb.frontend != NULL) {
  630. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  631. &dev->core->i2c_adap,
  632. DVB_PLL_LG_TDVS_H06XF);
  633. }
  634. }
  635. break;
  636. case CX88_BOARD_ATI_HDTVWONDER:
  637. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  638. &ati_hdtvwonder,
  639. &dev->core->i2c_adap);
  640. if (dev->dvb.frontend != NULL) {
  641. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  642. NULL, DVB_PLL_TUV1236D);
  643. }
  644. break;
  645. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  646. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  647. dev->dvb.frontend = dvb_attach(cx24123_attach,
  648. &hauppauge_novas_config,
  649. &dev->core->i2c_adap);
  650. if (dev->dvb.frontend) {
  651. dvb_attach(isl6421_attach, dev->dvb.frontend,
  652. &dev->core->i2c_adap, 0x08, 0x00, 0x00);
  653. }
  654. break;
  655. case CX88_BOARD_KWORLD_DVBS_100:
  656. dev->dvb.frontend = dvb_attach(cx24123_attach,
  657. &kworld_dvbs_100_config,
  658. &dev->core->i2c_adap);
  659. if (dev->dvb.frontend) {
  660. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  661. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  662. }
  663. break;
  664. case CX88_BOARD_GENIATECH_DVBS:
  665. dev->dvb.frontend = dvb_attach(cx24123_attach,
  666. &geniatech_dvbs_config,
  667. &dev->core->i2c_adap);
  668. if (dev->dvb.frontend) {
  669. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  670. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  671. }
  672. break;
  673. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  674. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  675. &pinnacle_pctv_hd_800i_config,
  676. &dev->core->i2c_adap);
  677. if (dev->dvb.frontend != NULL) {
  678. /* tuner_config.video_dev must point to
  679. * i2c_adap.algo_data
  680. */
  681. pinnacle_pctv_hd_800i_tuner_config.priv =
  682. dev->core->i2c_adap.algo_data;
  683. dvb_attach(xc5000_attach, dev->dvb.frontend,
  684. &dev->core->i2c_adap,
  685. &pinnacle_pctv_hd_800i_tuner_config);
  686. }
  687. break;
  688. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  689. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  690. &dvico_hdtv5_pci_nano_config,
  691. &dev->core->i2c_adap);
  692. if (dev->dvb.frontend != NULL) {
  693. struct dvb_frontend *fe;
  694. struct xc2028_config cfg = {
  695. .i2c_adap = &dev->core->i2c_adap,
  696. .i2c_addr = 0x61,
  697. .callback = cx88_pci_nano_callback,
  698. };
  699. static struct xc2028_ctrl ctl = {
  700. .fname = "xc3028-v27.fw",
  701. .max_len = 64,
  702. .scode_table = OREN538,
  703. };
  704. fe = dvb_attach(xc2028_attach,
  705. dev->dvb.frontend, &cfg);
  706. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  707. fe->ops.tuner_ops.set_config(fe, &ctl);
  708. }
  709. break;
  710. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  711. dev->dvb.frontend = dvb_attach(zl10353_attach,
  712. &cx88_geniatech_x8000_mt,
  713. &dev->core->i2c_adap);
  714. if (attach_xc3028(0x61, dev) < 0)
  715. return -EINVAL;
  716. break;
  717. case CX88_BOARD_GENIATECH_X8000_MT:
  718. dev->ts_gen_cntrl = 0x00;
  719. dev->dvb.frontend = dvb_attach(zl10353_attach,
  720. &cx88_geniatech_x8000_mt,
  721. &dev->core->i2c_adap);
  722. if (attach_xc3028(0x61, dev) < 0)
  723. return -EINVAL;
  724. break;
  725. default:
  726. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  727. dev->core->name);
  728. break;
  729. }
  730. if (NULL == dev->dvb.frontend) {
  731. printk(KERN_ERR
  732. "%s/2: frontend initialization failed\n",
  733. dev->core->name);
  734. return -EINVAL;
  735. }
  736. /* Ensure all frontends negotiate bus access */
  737. dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  738. /* Put the analog decoder in standby to keep it quiet */
  739. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  740. /* register everything */
  741. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  742. }
  743. /* ----------------------------------------------------------- */
  744. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  745. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  746. {
  747. struct cx88_core *core = drv->core;
  748. int err = 0;
  749. dprintk( 1, "%s\n", __FUNCTION__);
  750. switch (core->boardnr) {
  751. case CX88_BOARD_HAUPPAUGE_HVR1300:
  752. /* We arrive here with either the cx23416 or the cx22702
  753. * on the bus. Take the bus from the cx23416 and enable the
  754. * cx22702 demod
  755. */
  756. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
  757. cx_clear(MO_GP0_IO, 0x00000004);
  758. udelay(1000);
  759. break;
  760. default:
  761. err = -ENODEV;
  762. }
  763. return err;
  764. }
  765. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  766. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  767. {
  768. struct cx88_core *core = drv->core;
  769. int err = 0;
  770. dprintk( 1, "%s\n", __FUNCTION__);
  771. switch (core->boardnr) {
  772. case CX88_BOARD_HAUPPAUGE_HVR1300:
  773. /* Do Nothing, leave the cx22702 on the bus. */
  774. break;
  775. default:
  776. err = -ENODEV;
  777. }
  778. return err;
  779. }
  780. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  781. {
  782. struct cx88_core *core = drv->core;
  783. struct cx8802_dev *dev = drv->core->dvbdev;
  784. int err;
  785. dprintk( 1, "%s\n", __FUNCTION__);
  786. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  787. core->boardnr,
  788. core->name,
  789. core->pci_bus,
  790. core->pci_slot);
  791. err = -ENODEV;
  792. if (!(core->board.mpeg & CX88_MPEG_DVB))
  793. goto fail_core;
  794. /* If vp3054 isn't enabled, a stub will just return 0 */
  795. err = vp3054_i2c_probe(dev);
  796. if (0 != err)
  797. goto fail_core;
  798. /* dvb stuff */
  799. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  800. videobuf_queue_sg_init(&dev->dvb.dvbq, &dvb_qops,
  801. &dev->pci->dev, &dev->slock,
  802. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  803. V4L2_FIELD_TOP,
  804. sizeof(struct cx88_buffer),
  805. dev);
  806. err = dvb_register(dev);
  807. if (err != 0)
  808. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  809. core->name, err);
  810. fail_core:
  811. return err;
  812. }
  813. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  814. {
  815. struct cx8802_dev *dev = drv->core->dvbdev;
  816. /* dvb */
  817. videobuf_dvb_unregister(&dev->dvb);
  818. vp3054_i2c_remove(dev);
  819. return 0;
  820. }
  821. static struct cx8802_driver cx8802_dvb_driver = {
  822. .type_id = CX88_MPEG_DVB,
  823. .hw_access = CX8802_DRVCTL_SHARED,
  824. .probe = cx8802_dvb_probe,
  825. .remove = cx8802_dvb_remove,
  826. .advise_acquire = cx8802_dvb_advise_acquire,
  827. .advise_release = cx8802_dvb_advise_release,
  828. };
  829. static int dvb_init(void)
  830. {
  831. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  832. (CX88_VERSION_CODE >> 16) & 0xff,
  833. (CX88_VERSION_CODE >> 8) & 0xff,
  834. CX88_VERSION_CODE & 0xff);
  835. #ifdef SNAPSHOT
  836. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  837. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  838. #endif
  839. return cx8802_register_driver(&cx8802_dvb_driver);
  840. }
  841. static void dvb_fini(void)
  842. {
  843. cx8802_unregister_driver(&cx8802_dvb_driver);
  844. }
  845. module_init(dvb_init);
  846. module_exit(dvb_fini);
  847. /*
  848. * Local variables:
  849. * c-basic-offset: 8
  850. * compile-command: "make DVB=1"
  851. * End:
  852. */