board-mx51_efikamx.c 8.9 KB

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  1. /*
  2. * Copyright (C) 2010 Linaro Limited
  3. *
  4. * based on code from the following
  5. * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
  6. * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved.
  7. * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved.
  8. *
  9. * The code contained herein is licensed under the GNU General Public
  10. * License. You may obtain a copy of the GNU General Public License
  11. * Version 2 or later at the following locations:
  12. *
  13. * http://www.opensource.org/licenses/gpl-license.html
  14. * http://www.gnu.org/copyleft/gpl.html
  15. */
  16. #include <linux/init.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/i2c.h>
  19. #include <linux/gpio.h>
  20. #include <linux/leds.h>
  21. #include <linux/input.h>
  22. #include <linux/delay.h>
  23. #include <linux/io.h>
  24. #include <linux/fsl_devices.h>
  25. #include <linux/spi/flash.h>
  26. #include <linux/spi/spi.h>
  27. #include <mach/common.h>
  28. #include <mach/hardware.h>
  29. #include <mach/iomux-mx51.h>
  30. #include <mach/i2c.h>
  31. #include <mach/mxc_ehci.h>
  32. #include <asm/irq.h>
  33. #include <asm/setup.h>
  34. #include <asm/mach-types.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach/time.h>
  37. #include "devices-imx51.h"
  38. #include "devices.h"
  39. #define MX51_USB_PLL_DIV_24_MHZ 0x01
  40. #define EFIKAMX_PCBID0 (2*32 + 16)
  41. #define EFIKAMX_PCBID1 (2*32 + 17)
  42. #define EFIKAMX_PCBID2 (2*32 + 11)
  43. #define EFIKAMX_BLUE_LED (2*32 + 13)
  44. #define EFIKAMX_GREEN_LED (2*32 + 14)
  45. #define EFIKAMX_RED_LED (2*32 + 15)
  46. #define EFIKAMX_POWER_KEY (1*32 + 31)
  47. #define EFIKAMX_SPI_CS0 (3*32 + 24)
  48. #define EFIKAMX_SPI_CS1 (3*32 + 25)
  49. /* board 1.1 doesn't have same reset gpio */
  50. #define EFIKAMX_RESET1_1 (2*32 + 2)
  51. #define EFIKAMX_RESET (0*32 + 4)
  52. /* the pci ids pin have pull up. they're driven low according to board id */
  53. #define MX51_PAD_PCBID0 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
  54. #define MX51_PAD_PCBID1 IOMUX_PAD(0x51C, 0x134, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
  55. #define MX51_PAD_PCBID2 IOMUX_PAD(0x504, 0x128, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
  56. #define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE)
  57. static iomux_v3_cfg_t mx51efikamx_pads[] = {
  58. /* UART1 */
  59. MX51_PAD_UART1_RXD__UART1_RXD,
  60. MX51_PAD_UART1_TXD__UART1_TXD,
  61. MX51_PAD_UART1_RTS__UART1_RTS,
  62. MX51_PAD_UART1_CTS__UART1_CTS,
  63. /* board id */
  64. MX51_PAD_PCBID0,
  65. MX51_PAD_PCBID1,
  66. MX51_PAD_PCBID2,
  67. /* SD 1 */
  68. MX51_PAD_SD1_CMD__SD1_CMD,
  69. MX51_PAD_SD1_CLK__SD1_CLK,
  70. MX51_PAD_SD1_DATA0__SD1_DATA0,
  71. MX51_PAD_SD1_DATA1__SD1_DATA1,
  72. MX51_PAD_SD1_DATA2__SD1_DATA2,
  73. MX51_PAD_SD1_DATA3__SD1_DATA3,
  74. /* SD 2 */
  75. MX51_PAD_SD2_CMD__SD2_CMD,
  76. MX51_PAD_SD2_CLK__SD2_CLK,
  77. MX51_PAD_SD2_DATA0__SD2_DATA0,
  78. MX51_PAD_SD2_DATA1__SD2_DATA1,
  79. MX51_PAD_SD2_DATA2__SD2_DATA2,
  80. MX51_PAD_SD2_DATA3__SD2_DATA3,
  81. /* SD/MMC WP/CD */
  82. MX51_PAD_GPIO_1_0__ESDHC1_CD,
  83. MX51_PAD_GPIO_1_1__ESDHC1_WP,
  84. MX51_PAD_GPIO_1_7__ESDHC2_WP,
  85. MX51_PAD_GPIO_1_8__ESDHC2_CD,
  86. /* leds */
  87. MX51_PAD_CSI1_D9__GPIO_3_13,
  88. MX51_PAD_CSI1_VSYNC__GPIO_3_14,
  89. MX51_PAD_CSI1_HSYNC__GPIO_3_15,
  90. /* power key */
  91. MX51_PAD_PWRKEY,
  92. /* spi */
  93. MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
  94. MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
  95. MX51_PAD_CSPI1_SS0__GPIO_4_24,
  96. MX51_PAD_CSPI1_SS1__GPIO_4_25,
  97. MX51_PAD_CSPI1_RDY__ECSPI1_RDY,
  98. MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
  99. /* reset */
  100. MX51_PAD_DI1_PIN13__GPIO_3_2,
  101. MX51_PAD_GPIO_1_4__GPIO_1_4,
  102. };
  103. /* Serial ports */
  104. #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
  105. static const struct imxuart_platform_data uart_pdata = {
  106. .flags = IMXUART_HAVE_RTSCTS,
  107. };
  108. static inline void mxc_init_imx_uart(void)
  109. {
  110. imx51_add_imx_uart(0, &uart_pdata);
  111. imx51_add_imx_uart(1, &uart_pdata);
  112. imx51_add_imx_uart(2, &uart_pdata);
  113. }
  114. #else /* !SERIAL_IMX */
  115. static inline void mxc_init_imx_uart(void)
  116. {
  117. }
  118. #endif /* SERIAL_IMX */
  119. /* This function is board specific as the bit mask for the plldiv will also
  120. * be different for other Freescale SoCs, thus a common bitmask is not
  121. * possible and cannot get place in /plat-mxc/ehci.c.
  122. */
  123. static int initialize_otg_port(struct platform_device *pdev)
  124. {
  125. u32 v;
  126. void __iomem *usb_base;
  127. void __iomem *usbother_base;
  128. usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
  129. usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
  130. /* Set the PHY clock to 19.2MHz */
  131. v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
  132. v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
  133. v |= MX51_USB_PLL_DIV_24_MHZ;
  134. __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
  135. iounmap(usb_base);
  136. return 0;
  137. }
  138. static struct mxc_usbh_platform_data dr_utmi_config = {
  139. .init = initialize_otg_port,
  140. .portsc = MXC_EHCI_UTMI_16BIT,
  141. .flags = MXC_EHCI_INTERNAL_PHY,
  142. };
  143. /* PCBID2 PCBID1 PCBID0 STATE
  144. 1 1 1 ER1:rev1.1
  145. 1 1 0 ER2:rev1.2
  146. 1 0 1 ER3:rev1.3
  147. 1 0 0 ER4:rev1.4
  148. */
  149. static void __init mx51_efikamx_board_id(void)
  150. {
  151. int id;
  152. /* things are taking time to settle */
  153. msleep(150);
  154. gpio_request(EFIKAMX_PCBID0, "pcbid0");
  155. gpio_direction_input(EFIKAMX_PCBID0);
  156. gpio_request(EFIKAMX_PCBID1, "pcbid1");
  157. gpio_direction_input(EFIKAMX_PCBID1);
  158. gpio_request(EFIKAMX_PCBID2, "pcbid2");
  159. gpio_direction_input(EFIKAMX_PCBID2);
  160. id = gpio_get_value(EFIKAMX_PCBID0);
  161. id |= gpio_get_value(EFIKAMX_PCBID1) << 1;
  162. id |= gpio_get_value(EFIKAMX_PCBID2) << 2;
  163. switch (id) {
  164. case 7:
  165. system_rev = 0x11;
  166. break;
  167. case 6:
  168. system_rev = 0x12;
  169. break;
  170. case 5:
  171. system_rev = 0x13;
  172. break;
  173. case 4:
  174. system_rev = 0x14;
  175. break;
  176. default:
  177. system_rev = 0x10;
  178. break;
  179. }
  180. if ((system_rev == 0x10)
  181. || (system_rev == 0x12)
  182. || (system_rev == 0x14)) {
  183. printk(KERN_WARNING
  184. "EfikaMX: Unsupported board revision 1.%u!\n",
  185. system_rev & 0xf);
  186. }
  187. }
  188. static struct gpio_led mx51_efikamx_leds[] = {
  189. {
  190. .name = "efikamx:green",
  191. .default_trigger = "default-on",
  192. .gpio = EFIKAMX_GREEN_LED,
  193. },
  194. {
  195. .name = "efikamx:red",
  196. .default_trigger = "ide-disk",
  197. .gpio = EFIKAMX_RED_LED,
  198. },
  199. {
  200. .name = "efikamx:blue",
  201. .default_trigger = "mmc0",
  202. .gpio = EFIKAMX_BLUE_LED,
  203. },
  204. };
  205. static struct gpio_led_platform_data mx51_efikamx_leds_data = {
  206. .leds = mx51_efikamx_leds,
  207. .num_leds = ARRAY_SIZE(mx51_efikamx_leds),
  208. };
  209. static struct platform_device mx51_efikamx_leds_device = {
  210. .name = "leds-gpio",
  211. .id = -1,
  212. .dev = {
  213. .platform_data = &mx51_efikamx_leds_data,
  214. },
  215. };
  216. static struct gpio_keys_button mx51_efikamx_powerkey[] = {
  217. {
  218. .code = KEY_POWER,
  219. .gpio = EFIKAMX_POWER_KEY,
  220. .type = EV_PWR,
  221. .desc = "Power Button (CM)",
  222. .wakeup = 1,
  223. .debounce_interval = 10, /* ms */
  224. },
  225. };
  226. static const struct gpio_keys_platform_data mx51_efikamx_powerkey_data __initconst = {
  227. .buttons = mx51_efikamx_powerkey,
  228. .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey),
  229. };
  230. static struct mtd_partition mx51_efikamx_spi_nor_partitions[] = {
  231. {
  232. .name = "u-boot",
  233. .offset = 0,
  234. .size = SZ_256K,
  235. },
  236. {
  237. .name = "config",
  238. .offset = MTDPART_OFS_APPEND,
  239. .size = SZ_64K,
  240. },
  241. };
  242. static struct flash_platform_data mx51_efikamx_spi_flash_data = {
  243. .name = "spi_flash",
  244. .parts = mx51_efikamx_spi_nor_partitions,
  245. .nr_parts = ARRAY_SIZE(mx51_efikamx_spi_nor_partitions),
  246. .type = "sst25vf032b",
  247. };
  248. static struct spi_board_info mx51_efikamx_spi_board_info[] __initdata = {
  249. {
  250. .modalias = "m25p80",
  251. .max_speed_hz = 25000000,
  252. .bus_num = 0,
  253. .chip_select = 1,
  254. .platform_data = &mx51_efikamx_spi_flash_data,
  255. .irq = -1,
  256. },
  257. };
  258. static int mx51_efikamx_spi_cs[] = {
  259. EFIKAMX_SPI_CS0,
  260. EFIKAMX_SPI_CS1,
  261. };
  262. static const struct spi_imx_master mx51_efikamx_spi_pdata __initconst = {
  263. .chipselect = mx51_efikamx_spi_cs,
  264. .num_chipselect = ARRAY_SIZE(mx51_efikamx_spi_cs),
  265. };
  266. void mx51_efikamx_reset(void)
  267. {
  268. if (system_rev == 0x11)
  269. gpio_direction_output(EFIKAMX_RESET1_1, 0);
  270. else
  271. gpio_direction_output(EFIKAMX_RESET, 0);
  272. }
  273. static void __init mxc_board_init(void)
  274. {
  275. mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads,
  276. ARRAY_SIZE(mx51efikamx_pads));
  277. mx51_efikamx_board_id();
  278. mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
  279. mxc_init_imx_uart();
  280. imx51_add_sdhci_esdhc_imx(0, NULL);
  281. /* on < 1.2 boards both SD controllers are used */
  282. if (system_rev < 0x12) {
  283. imx51_add_sdhci_esdhc_imx(1, NULL);
  284. mx51_efikamx_leds[2].default_trigger = "mmc1";
  285. }
  286. platform_device_register(&mx51_efikamx_leds_device);
  287. imx51_add_gpio_keys(&mx51_efikamx_powerkey_data);
  288. spi_register_board_info(mx51_efikamx_spi_board_info,
  289. ARRAY_SIZE(mx51_efikamx_spi_board_info));
  290. imx51_add_ecspi(0, &mx51_efikamx_spi_pdata);
  291. if (system_rev == 0x11) {
  292. gpio_request(EFIKAMX_RESET1_1, "reset");
  293. gpio_direction_output(EFIKAMX_RESET1_1, 1);
  294. } else {
  295. gpio_request(EFIKAMX_RESET, "reset");
  296. gpio_direction_output(EFIKAMX_RESET, 1);
  297. }
  298. }
  299. static void __init mx51_efikamx_timer_init(void)
  300. {
  301. mx51_clocks_init(32768, 24000000, 22579200, 24576000);
  302. }
  303. static struct sys_timer mxc_timer = {
  304. .init = mx51_efikamx_timer_init,
  305. };
  306. MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop")
  307. /* Maintainer: Amit Kucheria <amit.kucheria@linaro.org> */
  308. .boot_params = MX51_PHYS_OFFSET + 0x100,
  309. .map_io = mx51_map_io,
  310. .init_irq = mx51_init_irq,
  311. .init_machine = mxc_board_init,
  312. .timer = &mxc_timer,
  313. MACHINE_END