stradis.c 64 KB

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  1. /*
  2. * stradis.c - stradis 4:2:2 mpeg decoder driver
  3. *
  4. * Stradis 4:2:2 MPEG-2 Decoder Driver
  5. * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/module.h>
  22. #include <linux/delay.h>
  23. #include <linux/errno.h>
  24. #include <linux/fs.h>
  25. #include <linux/kernel.h>
  26. #include <linux/major.h>
  27. #include <linux/slab.h>
  28. #include <linux/mm.h>
  29. #include <linux/init.h>
  30. #include <linux/poll.h>
  31. #include <linux/pci.h>
  32. #include <linux/signal.h>
  33. #include <asm/io.h>
  34. #include <linux/ioport.h>
  35. #include <asm/pgtable.h>
  36. #include <asm/page.h>
  37. #include <linux/sched.h>
  38. #include <asm/types.h>
  39. #include <linux/types.h>
  40. #include <linux/interrupt.h>
  41. #include <asm/uaccess.h>
  42. #include <linux/vmalloc.h>
  43. #include <linux/videodev.h>
  44. #include <media/v4l2-common.h>
  45. #include <media/v4l2-ioctl.h>
  46. #include "saa7146.h"
  47. #include "saa7146reg.h"
  48. #include "ibmmpeg2.h"
  49. #include "saa7121.h"
  50. #include "cs8420.h"
  51. #define DEBUG(x) /* debug driver */
  52. #undef IDEBUG /* debug irq handler */
  53. #undef MDEBUG /* debug memory management */
  54. #define SAA7146_MAX 6
  55. static struct saa7146 saa7146s[SAA7146_MAX];
  56. static int saa_num; /* number of SAA7146s in use */
  57. static int video_nr = -1;
  58. module_param(video_nr, int, 0);
  59. MODULE_LICENSE("GPL");
  60. #define nDebNormal 0x00480000
  61. #define nDebNoInc 0x00480000
  62. #define nDebVideo 0xd0480000
  63. #define nDebAudio 0xd0400000
  64. #define nDebDMA 0x02c80000
  65. #define oDebNormal 0x13c80000
  66. #define oDebNoInc 0x13c80000
  67. #define oDebVideo 0xd1080000
  68. #define oDebAudio 0xd1080000
  69. #define oDebDMA 0x03080000
  70. #define NewCard (saa->boardcfg[3])
  71. #define ChipControl (saa->boardcfg[1])
  72. #define NTSCFirstActive (saa->boardcfg[4])
  73. #define PALFirstActive (saa->boardcfg[5])
  74. #define NTSCLastActive (saa->boardcfg[54])
  75. #define PALLastActive (saa->boardcfg[55])
  76. #define Have2MB (saa->boardcfg[18] & 0x40)
  77. #define HaveCS8420 (saa->boardcfg[18] & 0x04)
  78. #define IBMMPEGCD20 (saa->boardcfg[18] & 0x20)
  79. #define HaveCS3310 (saa->boardcfg[18] & 0x01)
  80. #define CS3310MaxLvl ((saa->boardcfg[30] << 8) | saa->boardcfg[31])
  81. #define HaveCS4341 (saa->boardcfg[40] == 2)
  82. #define SDIType (saa->boardcfg[27])
  83. #define CurrentMode (saa->boardcfg[2])
  84. #define debNormal (NewCard ? nDebNormal : oDebNormal)
  85. #define debNoInc (NewCard ? nDebNoInc : oDebNoInc)
  86. #define debVideo (NewCard ? nDebVideo : oDebVideo)
  87. #define debAudio (NewCard ? nDebAudio : oDebAudio)
  88. #define debDMA (NewCard ? nDebDMA : oDebDMA)
  89. #ifdef USE_RESCUE_EEPROM_SDM275
  90. static unsigned char rescue_eeprom[64] = {
  91. 0x00, 0x01, 0x04, 0x13, 0x26, 0x0f, 0x10, 0x00, 0x00, 0x00, 0x43, 0x63,
  92. 0x22, 0x01, 0x29, 0x15, 0x73, 0x00, 0x1f, 'd', 'e', 'c', 'x', 'l',
  93. 'd', 'v', 'a', 0x02, 0x00, 0x01, 0x00, 0xcc, 0xa4, 0x63, 0x09, 0xe2,
  94. 0x10, 0x00, 0x0a, 0x00, 0x02, 0x02, 'd', 'e', 'c', 'x', 'l', 'a',
  95. 0x00, 0x00, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  96. 0x00, 0x00, 0x00, 0x00,
  97. };
  98. #endif
  99. /* ----------------------------------------------------------------------- */
  100. /* Hardware I2C functions */
  101. static void I2CWipe(struct saa7146 *saa)
  102. {
  103. int i;
  104. /* set i2c to ~=100kHz, abort transfer, clear busy */
  105. saawrite(0x600 | SAA7146_I2C_ABORT, SAA7146_I2C_STATUS);
  106. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  107. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  108. /* wait for i2c registers to be programmed */
  109. for (i = 0; i < 1000 &&
  110. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  111. schedule();
  112. saawrite(0x600, SAA7146_I2C_STATUS);
  113. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  114. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  115. /* wait for i2c registers to be programmed */
  116. for (i = 0; i < 1000 &&
  117. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  118. schedule();
  119. saawrite(0x600, SAA7146_I2C_STATUS);
  120. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  121. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  122. /* wait for i2c registers to be programmed */
  123. for (i = 0; i < 1000 &&
  124. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  125. schedule();
  126. }
  127. /* read I2C */
  128. static int I2CRead(struct saa7146 *saa, unsigned char addr,
  129. unsigned char subaddr, int dosub)
  130. {
  131. int i;
  132. if (saaread(SAA7146_I2C_STATUS) & 0x3c)
  133. I2CWipe(saa);
  134. for (i = 0;
  135. i < 1000 && (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY);
  136. i++)
  137. schedule();
  138. if (i == 1000)
  139. I2CWipe(saa);
  140. if (dosub)
  141. saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 8) |
  142. ((subaddr & 0xff) << 16) | 0xed, SAA7146_I2C_TRANSFER);
  143. else
  144. saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 16) |
  145. 0xf1, SAA7146_I2C_TRANSFER);
  146. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  147. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  148. /* wait for i2c registers to be programmed */
  149. for (i = 0; i < 1000 &&
  150. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  151. schedule();
  152. /* wait for valid data */
  153. for (i = 0; i < 1000 &&
  154. (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
  155. schedule();
  156. if (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_ERR)
  157. return -1;
  158. if (i == 1000)
  159. printk("i2c setup read timeout\n");
  160. saawrite(0x41, SAA7146_I2C_TRANSFER);
  161. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  162. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  163. /* wait for i2c registers to be programmed */
  164. for (i = 0; i < 1000 &&
  165. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  166. schedule();
  167. /* wait for valid data */
  168. for (i = 0; i < 1000 &&
  169. (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_BUSY); i++)
  170. schedule();
  171. if (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_ERR)
  172. return -1;
  173. if (i == 1000)
  174. printk("i2c read timeout\n");
  175. return ((saaread(SAA7146_I2C_TRANSFER) >> 24) & 0xff);
  176. }
  177. /* set both to write both bytes, reset it to write only b1 */
  178. static int I2CWrite(struct saa7146 *saa, unsigned char addr, unsigned char b1,
  179. unsigned char b2, int both)
  180. {
  181. int i;
  182. u32 data;
  183. if (saaread(SAA7146_I2C_STATUS) & 0x3c)
  184. I2CWipe(saa);
  185. for (i = 0; i < 1000 &&
  186. (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
  187. schedule();
  188. if (i == 1000)
  189. I2CWipe(saa);
  190. data = ((addr & 0xfe) << 24) | ((b1 & 0xff) << 16);
  191. if (both)
  192. data |= ((b2 & 0xff) << 8) | 0xe5;
  193. else
  194. data |= 0xd1;
  195. saawrite(data, SAA7146_I2C_TRANSFER);
  196. saawrite((SAA7146_MC2_UPLD_I2C << 16) | SAA7146_MC2_UPLD_I2C,
  197. SAA7146_MC2);
  198. return 0;
  199. }
  200. static void attach_inform(struct saa7146 *saa, int id)
  201. {
  202. int i;
  203. DEBUG(printk(KERN_DEBUG "stradis%d: i2c: device found=%02x\n", saa->nr,
  204. id));
  205. if (id == 0xa0) { /* we have rev2 or later board, fill in info */
  206. for (i = 0; i < 64; i++)
  207. saa->boardcfg[i] = I2CRead(saa, 0xa0, i, 1);
  208. #ifdef USE_RESCUE_EEPROM_SDM275
  209. if (saa->boardcfg[0] != 0) {
  210. printk("stradis%d: WARNING: EEPROM STORED VALUES HAVE "
  211. "BEEN IGNORED\n", saa->nr);
  212. for (i = 0; i < 64; i++)
  213. saa->boardcfg[i] = rescue_eeprom[i];
  214. }
  215. #endif
  216. printk("stradis%d: config =", saa->nr);
  217. for (i = 0; i < 51; i++) {
  218. printk(" %02x", saa->boardcfg[i]);
  219. }
  220. printk("\n");
  221. }
  222. }
  223. static void I2CBusScan(struct saa7146 *saa)
  224. {
  225. int i;
  226. for (i = 0; i < 0xff; i += 2)
  227. if ((I2CRead(saa, i, 0, 0)) >= 0)
  228. attach_inform(saa, i);
  229. }
  230. static int debiwait_maxwait;
  231. static int wait_for_debi_done(struct saa7146 *saa)
  232. {
  233. int i;
  234. /* wait for registers to be programmed */
  235. for (i = 0; i < 100000 &&
  236. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_DEBI); i++)
  237. saaread(SAA7146_MC2);
  238. /* wait for transfer to complete */
  239. for (i = 0; i < 500000 &&
  240. (saaread(SAA7146_PSR) & SAA7146_PSR_DEBI_S); i++)
  241. saaread(SAA7146_MC2);
  242. if (i > debiwait_maxwait)
  243. printk("wait-for-debi-done maxwait: %d\n",
  244. debiwait_maxwait = i);
  245. if (i == 500000)
  246. return -1;
  247. return 0;
  248. }
  249. static int debiwrite(struct saa7146 *saa, u32 config, int addr,
  250. u32 val, int count)
  251. {
  252. u32 cmd;
  253. if (count <= 0 || count > 32764)
  254. return -1;
  255. if (wait_for_debi_done(saa) < 0)
  256. return -1;
  257. saawrite(config, SAA7146_DEBI_CONFIG);
  258. if (count <= 4) /* immediate transfer */
  259. saawrite(val, SAA7146_DEBI_AD);
  260. else /* block transfer */
  261. saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
  262. saawrite((cmd = (count << 17) | (addr & 0xffff)), SAA7146_DEBI_COMMAND);
  263. saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
  264. SAA7146_MC2);
  265. return 0;
  266. }
  267. static u32 debiread(struct saa7146 *saa, u32 config, int addr, int count)
  268. {
  269. u32 result = 0;
  270. if (count > 32764 || count <= 0)
  271. return 0;
  272. if (wait_for_debi_done(saa) < 0)
  273. return 0;
  274. saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
  275. saawrite((count << 17) | 0x10000 | (addr & 0xffff),
  276. SAA7146_DEBI_COMMAND);
  277. saawrite(config, SAA7146_DEBI_CONFIG);
  278. saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
  279. SAA7146_MC2);
  280. if (count > 4) /* not an immediate transfer */
  281. return count;
  282. wait_for_debi_done(saa);
  283. result = saaread(SAA7146_DEBI_AD);
  284. if (count == 1)
  285. result &= 0xff;
  286. if (count == 2)
  287. result &= 0xffff;
  288. if (count == 3)
  289. result &= 0xffffff;
  290. return result;
  291. }
  292. static void do_irq_send_data(struct saa7146 *saa)
  293. {
  294. int split, audbytes, vidbytes;
  295. saawrite(SAA7146_PSR_PIN1, SAA7146_IER);
  296. /* if special feature mode in effect, disable audio sending */
  297. if (saa->playmode != VID_PLAY_NORMAL)
  298. saa->audtail = saa->audhead = 0;
  299. if (saa->audhead <= saa->audtail)
  300. audbytes = saa->audtail - saa->audhead;
  301. else
  302. audbytes = 65536 - (saa->audhead - saa->audtail);
  303. if (saa->vidhead <= saa->vidtail)
  304. vidbytes = saa->vidtail - saa->vidhead;
  305. else
  306. vidbytes = 524288 - (saa->vidhead - saa->vidtail);
  307. if (audbytes == 0 && vidbytes == 0 && saa->osdtail == saa->osdhead) {
  308. saawrite(0, SAA7146_IER);
  309. return;
  310. }
  311. /* if at least 1 block audio waiting and audio fifo isn't full */
  312. if (audbytes >= 2048 && (debiread(saa, debNormal, IBM_MP2_AUD_FIFO, 2)
  313. & 0xff) < 60) {
  314. if (saa->audhead > saa->audtail)
  315. split = 65536 - saa->audhead;
  316. else
  317. split = 0;
  318. audbytes = 2048;
  319. if (split > 0 && split < 2048) {
  320. memcpy(saa->dmadebi, saa->audbuf + saa->audhead, split);
  321. saa->audhead = 0;
  322. audbytes -= split;
  323. } else
  324. split = 0;
  325. memcpy(saa->dmadebi + split, saa->audbuf + saa->audhead,
  326. audbytes);
  327. saa->audhead += audbytes;
  328. saa->audhead &= 0xffff;
  329. debiwrite(saa, debAudio, (NewCard ? IBM_MP2_AUD_FIFO :
  330. IBM_MP2_AUD_FIFOW), 0, 2048);
  331. wake_up_interruptible(&saa->audq);
  332. /* if at least 1 block video waiting and video fifo isn't full */
  333. } else if (vidbytes >= 30720 && (debiread(saa, debNormal,
  334. IBM_MP2_FIFO, 2)) < 16384) {
  335. if (saa->vidhead > saa->vidtail)
  336. split = 524288 - saa->vidhead;
  337. else
  338. split = 0;
  339. vidbytes = 30720;
  340. if (split > 0 && split < 30720) {
  341. memcpy(saa->dmadebi, saa->vidbuf + saa->vidhead, split);
  342. saa->vidhead = 0;
  343. vidbytes -= split;
  344. } else
  345. split = 0;
  346. memcpy(saa->dmadebi + split, saa->vidbuf + saa->vidhead,
  347. vidbytes);
  348. saa->vidhead += vidbytes;
  349. saa->vidhead &= 0x7ffff;
  350. debiwrite(saa, debVideo, (NewCard ? IBM_MP2_FIFO :
  351. IBM_MP2_FIFOW), 0, 30720);
  352. wake_up_interruptible(&saa->vidq);
  353. }
  354. saawrite(SAA7146_PSR_DEBI_S | SAA7146_PSR_PIN1, SAA7146_IER);
  355. }
  356. static void send_osd_data(struct saa7146 *saa)
  357. {
  358. int size = saa->osdtail - saa->osdhead;
  359. if (size > 30720)
  360. size = 30720;
  361. /* ensure some multiple of 8 bytes is transferred */
  362. size = 8 * ((size + 8) >> 3);
  363. if (size) {
  364. debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR,
  365. (saa->osdhead >> 3), 2);
  366. memcpy(saa->dmadebi, &saa->osdbuf[saa->osdhead], size);
  367. saa->osdhead += size;
  368. /* block transfer of next 8 bytes to ~32k bytes */
  369. debiwrite(saa, debNormal, IBM_MP2_OSD_DATA, 0, size);
  370. }
  371. if (saa->osdhead >= saa->osdtail) {
  372. saa->osdhead = saa->osdtail = 0;
  373. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
  374. }
  375. }
  376. static irqreturn_t saa7146_irq(int irq, void *dev_id)
  377. {
  378. struct saa7146 *saa = dev_id;
  379. u32 stat, astat;
  380. int count;
  381. int handled = 0;
  382. count = 0;
  383. while (1) {
  384. /* get/clear interrupt status bits */
  385. stat = saaread(SAA7146_ISR);
  386. astat = stat & saaread(SAA7146_IER);
  387. if (!astat)
  388. break;
  389. handled = 1;
  390. saawrite(astat, SAA7146_ISR);
  391. if (astat & SAA7146_PSR_DEBI_S) {
  392. do_irq_send_data(saa);
  393. }
  394. if (astat & SAA7146_PSR_PIN1) {
  395. int istat;
  396. /* the following read will trigger DEBI_S */
  397. istat = debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
  398. if (istat & 1) {
  399. saawrite(0, SAA7146_IER);
  400. send_osd_data(saa);
  401. saawrite(SAA7146_PSR_DEBI_S |
  402. SAA7146_PSR_PIN1, SAA7146_IER);
  403. }
  404. if (istat & 0x20) { /* Video Start */
  405. saa->vidinfo.frame_count++;
  406. }
  407. if (istat & 0x400) { /* Picture Start */
  408. /* update temporal reference */
  409. }
  410. if (istat & 0x200) { /* Picture Resolution Change */
  411. /* read new resolution */
  412. }
  413. if (istat & 0x100) { /* New User Data found */
  414. /* read new user data */
  415. }
  416. if (istat & 0x1000) { /* new GOP/SMPTE */
  417. /* read new SMPTE */
  418. }
  419. if (istat & 0x8000) { /* Sequence Start Code */
  420. /* reset frame counter, load sizes */
  421. saa->vidinfo.frame_count = 0;
  422. saa->vidinfo.h_size = 704;
  423. saa->vidinfo.v_size = 480;
  424. #if 0
  425. if (saa->endmarkhead != saa->endmarktail) {
  426. saa->audhead =
  427. saa->endmark[saa->endmarkhead];
  428. saa->endmarkhead++;
  429. if (saa->endmarkhead >= MAX_MARKS)
  430. saa->endmarkhead = 0;
  431. }
  432. #endif
  433. }
  434. if (istat & 0x4000) { /* Sequence Error Code */
  435. if (saa->endmarkhead != saa->endmarktail) {
  436. saa->audhead =
  437. saa->endmark[saa->endmarkhead];
  438. saa->endmarkhead++;
  439. if (saa->endmarkhead >= MAX_MARKS)
  440. saa->endmarkhead = 0;
  441. }
  442. }
  443. }
  444. #ifdef IDEBUG
  445. if (astat & SAA7146_PSR_PPEF) {
  446. IDEBUG(printk("stradis%d irq: PPEF\n", saa->nr));
  447. }
  448. if (astat & SAA7146_PSR_PABO) {
  449. IDEBUG(printk("stradis%d irq: PABO\n", saa->nr));
  450. }
  451. if (astat & SAA7146_PSR_PPED) {
  452. IDEBUG(printk("stradis%d irq: PPED\n", saa->nr));
  453. }
  454. if (astat & SAA7146_PSR_RPS_I1) {
  455. IDEBUG(printk("stradis%d irq: RPS_I1\n", saa->nr));
  456. }
  457. if (astat & SAA7146_PSR_RPS_I0) {
  458. IDEBUG(printk("stradis%d irq: RPS_I0\n", saa->nr));
  459. }
  460. if (astat & SAA7146_PSR_RPS_LATE1) {
  461. IDEBUG(printk("stradis%d irq: RPS_LATE1\n", saa->nr));
  462. }
  463. if (astat & SAA7146_PSR_RPS_LATE0) {
  464. IDEBUG(printk("stradis%d irq: RPS_LATE0\n", saa->nr));
  465. }
  466. if (astat & SAA7146_PSR_RPS_E1) {
  467. IDEBUG(printk("stradis%d irq: RPS_E1\n", saa->nr));
  468. }
  469. if (astat & SAA7146_PSR_RPS_E0) {
  470. IDEBUG(printk("stradis%d irq: RPS_E0\n", saa->nr));
  471. }
  472. if (astat & SAA7146_PSR_RPS_TO1) {
  473. IDEBUG(printk("stradis%d irq: RPS_TO1\n", saa->nr));
  474. }
  475. if (astat & SAA7146_PSR_RPS_TO0) {
  476. IDEBUG(printk("stradis%d irq: RPS_TO0\n", saa->nr));
  477. }
  478. if (astat & SAA7146_PSR_UPLD) {
  479. IDEBUG(printk("stradis%d irq: UPLD\n", saa->nr));
  480. }
  481. if (astat & SAA7146_PSR_DEBI_E) {
  482. IDEBUG(printk("stradis%d irq: DEBI_E\n", saa->nr));
  483. }
  484. if (astat & SAA7146_PSR_I2C_S) {
  485. IDEBUG(printk("stradis%d irq: I2C_S\n", saa->nr));
  486. }
  487. if (astat & SAA7146_PSR_I2C_E) {
  488. IDEBUG(printk("stradis%d irq: I2C_E\n", saa->nr));
  489. }
  490. if (astat & SAA7146_PSR_A2_IN) {
  491. IDEBUG(printk("stradis%d irq: A2_IN\n", saa->nr));
  492. }
  493. if (astat & SAA7146_PSR_A2_OUT) {
  494. IDEBUG(printk("stradis%d irq: A2_OUT\n", saa->nr));
  495. }
  496. if (astat & SAA7146_PSR_A1_IN) {
  497. IDEBUG(printk("stradis%d irq: A1_IN\n", saa->nr));
  498. }
  499. if (astat & SAA7146_PSR_A1_OUT) {
  500. IDEBUG(printk("stradis%d irq: A1_OUT\n", saa->nr));
  501. }
  502. if (astat & SAA7146_PSR_AFOU) {
  503. IDEBUG(printk("stradis%d irq: AFOU\n", saa->nr));
  504. }
  505. if (astat & SAA7146_PSR_V_PE) {
  506. IDEBUG(printk("stradis%d irq: V_PE\n", saa->nr));
  507. }
  508. if (astat & SAA7146_PSR_VFOU) {
  509. IDEBUG(printk("stradis%d irq: VFOU\n", saa->nr));
  510. }
  511. if (astat & SAA7146_PSR_FIDA) {
  512. IDEBUG(printk("stradis%d irq: FIDA\n", saa->nr));
  513. }
  514. if (astat & SAA7146_PSR_FIDB) {
  515. IDEBUG(printk("stradis%d irq: FIDB\n", saa->nr));
  516. }
  517. if (astat & SAA7146_PSR_PIN3) {
  518. IDEBUG(printk("stradis%d irq: PIN3\n", saa->nr));
  519. }
  520. if (astat & SAA7146_PSR_PIN2) {
  521. IDEBUG(printk("stradis%d irq: PIN2\n", saa->nr));
  522. }
  523. if (astat & SAA7146_PSR_PIN0) {
  524. IDEBUG(printk("stradis%d irq: PIN0\n", saa->nr));
  525. }
  526. if (astat & SAA7146_PSR_ECS) {
  527. IDEBUG(printk("stradis%d irq: ECS\n", saa->nr));
  528. }
  529. if (astat & SAA7146_PSR_EC3S) {
  530. IDEBUG(printk("stradis%d irq: EC3S\n", saa->nr));
  531. }
  532. if (astat & SAA7146_PSR_EC0S) {
  533. IDEBUG(printk("stradis%d irq: EC0S\n", saa->nr));
  534. }
  535. #endif
  536. count++;
  537. if (count > 15)
  538. printk(KERN_WARNING "stradis%d: irq loop %d\n",
  539. saa->nr, count);
  540. if (count > 20) {
  541. saawrite(0, SAA7146_IER);
  542. printk(KERN_ERR
  543. "stradis%d: IRQ loop cleared\n", saa->nr);
  544. }
  545. }
  546. return IRQ_RETVAL(handled);
  547. }
  548. static int ibm_send_command(struct saa7146 *saa,
  549. int command, int data, int chain)
  550. {
  551. int i;
  552. if (chain)
  553. debiwrite(saa, debNormal, IBM_MP2_COMMAND, (command << 1)| 1,2);
  554. else
  555. debiwrite(saa, debNormal, IBM_MP2_COMMAND, command << 1, 2);
  556. debiwrite(saa, debNormal, IBM_MP2_CMD_DATA, data, 2);
  557. debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 1, 2);
  558. for (i = 0; i < 100 &&
  559. (debiread(saa, debNormal, IBM_MP2_CMD_STAT, 2) & 1); i++)
  560. schedule();
  561. if (i == 100)
  562. return -1;
  563. return 0;
  564. }
  565. static void cs4341_setlevel(struct saa7146 *saa, int left, int right)
  566. {
  567. I2CWrite(saa, 0x22, 0x03, left > 94 ? 94 : left, 2);
  568. I2CWrite(saa, 0x22, 0x04, right > 94 ? 94 : right, 2);
  569. }
  570. static void initialize_cs4341(struct saa7146 *saa)
  571. {
  572. int i;
  573. for (i = 0; i < 200; i++) {
  574. /* auto mute off, power on, no de-emphasis */
  575. /* I2S data up to 24-bit 64xFs internal SCLK */
  576. I2CWrite(saa, 0x22, 0x01, 0x11, 2);
  577. /* ATAPI mixer settings */
  578. I2CWrite(saa, 0x22, 0x02, 0x49, 2);
  579. /* attenuation left 3db */
  580. I2CWrite(saa, 0x22, 0x03, 0x00, 2);
  581. /* attenuation right 3db */
  582. I2CWrite(saa, 0x22, 0x04, 0x00, 2);
  583. I2CWrite(saa, 0x22, 0x01, 0x10, 2);
  584. if (I2CRead(saa, 0x22, 0x02, 1) == 0x49)
  585. break;
  586. schedule();
  587. }
  588. printk("stradis%d: CS4341 initialized (%d)\n", saa->nr, i);
  589. return;
  590. }
  591. static void initialize_cs8420(struct saa7146 *saa, int pro)
  592. {
  593. int i;
  594. u8 *sequence;
  595. if (pro)
  596. sequence = mode8420pro;
  597. else
  598. sequence = mode8420con;
  599. for (i = 0; i < INIT8420LEN; i++)
  600. I2CWrite(saa, 0x20, init8420[i * 2], init8420[i * 2 + 1], 2);
  601. for (i = 0; i < MODE8420LEN; i++)
  602. I2CWrite(saa, 0x20, sequence[i * 2], sequence[i * 2 + 1], 2);
  603. printk("stradis%d: CS8420 initialized\n", saa->nr);
  604. }
  605. static void initialize_saa7121(struct saa7146 *saa, int dopal)
  606. {
  607. int i, mod;
  608. u8 *sequence;
  609. if (dopal)
  610. sequence = init7121pal;
  611. else
  612. sequence = init7121ntsc;
  613. mod = saaread(SAA7146_PSR) & 0x08;
  614. /* initialize PAL/NTSC video encoder */
  615. for (i = 0; i < INIT7121LEN; i++) {
  616. if (NewCard) { /* handle new card encoder differences */
  617. if (sequence[i * 2] == 0x3a)
  618. I2CWrite(saa, 0x88, 0x3a, 0x13, 2);
  619. else if (sequence[i * 2] == 0x6b)
  620. I2CWrite(saa, 0x88, 0x6b, 0x20, 2);
  621. else if (sequence[i * 2] == 0x6c)
  622. I2CWrite(saa, 0x88, 0x6c,
  623. dopal ? 0x09 : 0xf5, 2);
  624. else if (sequence[i * 2] == 0x6d)
  625. I2CWrite(saa, 0x88, 0x6d,
  626. dopal ? 0x20 : 0x00, 2);
  627. else if (sequence[i * 2] == 0x7a)
  628. I2CWrite(saa, 0x88, 0x7a,
  629. dopal ? (PALFirstActive - 1) :
  630. (NTSCFirstActive - 4), 2);
  631. else if (sequence[i * 2] == 0x7b)
  632. I2CWrite(saa, 0x88, 0x7b,
  633. dopal ? PALLastActive :
  634. NTSCLastActive, 2);
  635. else
  636. I2CWrite(saa, 0x88, sequence[i * 2],
  637. sequence[i * 2 + 1], 2);
  638. } else {
  639. if (sequence[i * 2] == 0x6b && mod)
  640. I2CWrite(saa, 0x88, 0x6b,
  641. (sequence[i * 2 + 1] ^ 0x09), 2);
  642. else if (sequence[i * 2] == 0x7a)
  643. I2CWrite(saa, 0x88, 0x7a,
  644. dopal ? (PALFirstActive - 1) :
  645. (NTSCFirstActive - 4), 2);
  646. else if (sequence[i * 2] == 0x7b)
  647. I2CWrite(saa, 0x88, 0x7b,
  648. dopal ? PALLastActive :
  649. NTSCLastActive, 2);
  650. else
  651. I2CWrite(saa, 0x88, sequence[i * 2],
  652. sequence[i * 2 + 1], 2);
  653. }
  654. }
  655. }
  656. static void set_genlock_offset(struct saa7146 *saa, int noffset)
  657. {
  658. int nCode;
  659. int PixelsPerLine = 858;
  660. if (CurrentMode == VIDEO_MODE_PAL)
  661. PixelsPerLine = 864;
  662. if (noffset > 500)
  663. noffset = 500;
  664. else if (noffset < -500)
  665. noffset = -500;
  666. nCode = noffset + 0x100;
  667. if (nCode == 1)
  668. nCode = 0x401;
  669. else if (nCode < 1)
  670. nCode = 0x400 + PixelsPerLine + nCode;
  671. debiwrite(saa, debNormal, XILINX_GLDELAY, nCode, 2);
  672. }
  673. static void set_out_format(struct saa7146 *saa, int mode)
  674. {
  675. initialize_saa7121(saa, (mode == VIDEO_MODE_NTSC ? 0 : 1));
  676. saa->boardcfg[2] = mode;
  677. /* do not adjust analog video parameters here, use saa7121 init */
  678. /* you will affect the SDI output on the new card */
  679. if (mode == VIDEO_MODE_PAL) { /* PAL */
  680. debiwrite(saa, debNormal, XILINX_CTL0, 0x0808, 2);
  681. mdelay(50);
  682. saawrite(0x012002c0, SAA7146_NUM_LINE_BYTE1);
  683. if (NewCard) {
  684. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 0xe100, 2);
  685. mdelay(50);
  686. }
  687. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
  688. NewCard ? 0xe500 : 0x6500, 2);
  689. debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
  690. (1 << 8) |
  691. (NewCard ? PALFirstActive : PALFirstActive - 6), 2);
  692. } else { /* NTSC */
  693. debiwrite(saa, debNormal, XILINX_CTL0, 0x0800, 2);
  694. mdelay(50);
  695. saawrite(0x00f002c0, SAA7146_NUM_LINE_BYTE1);
  696. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
  697. NewCard ? 0xe100 : 0x6100, 2);
  698. debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
  699. (1 << 8) |
  700. (NewCard ? NTSCFirstActive : NTSCFirstActive - 6), 2);
  701. }
  702. }
  703. /* Intialize bitmangler to map from a byte value to the mangled word that
  704. * must be output to program the Xilinx part through the DEBI port.
  705. * Xilinx Data Bit->DEBI Bit: 0->15 1->7 2->6 3->12 4->11 5->2 6->1 7->0
  706. * transfer FPGA code, init IBM chip, transfer IBM microcode
  707. * rev2 card mangles: 0->7 1->6 2->5 3->4 4->3 5->2 6->1 7->0
  708. */
  709. static u16 bitmangler[256];
  710. static int initialize_fpga(struct video_code *bitdata)
  711. {
  712. int i, num, startindex, failure = 0, loadtwo, loadfile = 0;
  713. u16 *dmabuf;
  714. u8 *newdma;
  715. struct saa7146 *saa;
  716. /* verify fpga code */
  717. for (startindex = 0; startindex < bitdata->datasize; startindex++)
  718. if (bitdata->data[startindex] == 255)
  719. break;
  720. if (startindex == bitdata->datasize) {
  721. printk(KERN_INFO "stradis: bad fpga code\n");
  722. return -1;
  723. }
  724. /* initialize all detected cards */
  725. for (num = 0; num < saa_num; num++) {
  726. saa = &saa7146s[num];
  727. if (saa->boardcfg[0] > 20)
  728. continue; /* card was programmed */
  729. loadtwo = (saa->boardcfg[18] & 0x10);
  730. if (!NewCard) /* we have an old board */
  731. for (i = 0; i < 256; i++)
  732. bitmangler[i] = ((i & 0x01) << 15) |
  733. ((i & 0x02) << 6) | ((i & 0x04) << 4) |
  734. ((i & 0x08) << 9) | ((i & 0x10) << 7) |
  735. ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
  736. ((i & 0x80) >> 7);
  737. else /* else we have a new board */
  738. for (i = 0; i < 256; i++)
  739. bitmangler[i] = ((i & 0x01) << 7) |
  740. ((i & 0x02) << 5) | ((i & 0x04) << 3) |
  741. ((i & 0x08) << 1) | ((i & 0x10) >> 1) |
  742. ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
  743. ((i & 0x80) >> 7);
  744. dmabuf = (u16 *) saa->dmadebi;
  745. newdma = (u8 *) saa->dmadebi;
  746. if (NewCard) { /* SDM2xxx */
  747. if (!strncmp(bitdata->loadwhat, "decoder2", 8))
  748. continue; /* fpga not for this card */
  749. if (!strncmp(&saa->boardcfg[42], bitdata->loadwhat, 8))
  750. loadfile = 1;
  751. else if (loadtwo && !strncmp(&saa->boardcfg[19],
  752. bitdata->loadwhat, 8))
  753. loadfile = 2;
  754. else if (!saa->boardcfg[42] && !strncmp("decxl",
  755. bitdata->loadwhat, 8))
  756. loadfile = 1; /* special */
  757. else
  758. continue; /* fpga not for this card */
  759. if (loadfile != 1 && loadfile != 2)
  760. continue; /* skip to next card */
  761. if (saa->boardcfg[0] && loadfile == 1)
  762. continue; /* skip to next card */
  763. if (saa->boardcfg[0] != 1 && loadfile == 2)
  764. continue; /* skip to next card */
  765. saa->boardcfg[0]++; /* mark fpga handled */
  766. printk("stradis%d: loading %s\n", saa->nr,
  767. bitdata->loadwhat);
  768. if (loadtwo && loadfile == 2)
  769. goto send_fpga_stuff;
  770. /* turn on the Audio interface to set PROG low */
  771. saawrite(0x00400040, SAA7146_GPIO_CTRL);
  772. saaread(SAA7146_PSR); /* ensure posted write */
  773. /* wait for everyone to reset */
  774. mdelay(10);
  775. saawrite(0x00400000, SAA7146_GPIO_CTRL);
  776. } else { /* original card */
  777. if (strncmp(bitdata->loadwhat, "decoder2", 8))
  778. continue; /* fpga not for this card */
  779. /* Pull the Xilinx PROG signal WS3 low */
  780. saawrite(0x02000200, SAA7146_MC1);
  781. /* Turn on the Audio interface so can set PROG low */
  782. saawrite(0x000000c0, SAA7146_ACON1);
  783. /* Pull the Xilinx INIT signal (GPIO2) low */
  784. saawrite(0x00400000, SAA7146_GPIO_CTRL);
  785. /* Make sure everybody resets */
  786. saaread(SAA7146_PSR); /* ensure posted write */
  787. mdelay(10);
  788. /* Release the Xilinx PROG signal */
  789. saawrite(0x00000000, SAA7146_ACON1);
  790. /* Turn off the Audio interface */
  791. saawrite(0x02000000, SAA7146_MC1);
  792. }
  793. /* Release Xilinx INIT signal (WS2) */
  794. saawrite(0x00000000, SAA7146_GPIO_CTRL);
  795. /* Wait for the INIT to go High */
  796. for (i = 0;
  797. i < 10000 && !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2);
  798. i++)
  799. schedule();
  800. if (i == 1000) {
  801. printk(KERN_INFO "stradis%d: no fpga INIT\n", saa->nr);
  802. return -1;
  803. }
  804. send_fpga_stuff:
  805. if (NewCard) {
  806. for (i = startindex; i < bitdata->datasize; i++)
  807. newdma[i - startindex] =
  808. bitmangler[bitdata->data[i]];
  809. debiwrite(saa, 0x01420000, 0, 0,
  810. ((bitdata->datasize - startindex) + 5));
  811. if (loadtwo && loadfile == 1) {
  812. printk("stradis%d: awaiting 2nd FPGA bitfile\n",
  813. saa->nr);
  814. continue; /* skip to next card */
  815. }
  816. } else {
  817. for (i = startindex; i < bitdata->datasize; i++)
  818. dmabuf[i - startindex] =
  819. bitmangler[bitdata->data[i]];
  820. debiwrite(saa, 0x014a0000, 0, 0,
  821. ((bitdata->datasize - startindex) + 5) * 2);
  822. }
  823. for (i = 0;
  824. i < 1000 && !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2);
  825. i++)
  826. schedule();
  827. if (i == 1000) {
  828. printk(KERN_INFO "stradis%d: FPGA load failed\n",
  829. saa->nr);
  830. failure++;
  831. continue;
  832. }
  833. if (!NewCard) {
  834. /* Pull the Xilinx INIT signal (GPIO2) low */
  835. saawrite(0x00400000, SAA7146_GPIO_CTRL);
  836. saaread(SAA7146_PSR); /* ensure posted write */
  837. mdelay(2);
  838. saawrite(0x00000000, SAA7146_GPIO_CTRL);
  839. mdelay(2);
  840. }
  841. printk(KERN_INFO "stradis%d: FPGA Loaded\n", saa->nr);
  842. saa->boardcfg[0] = 26; /* mark fpga programmed */
  843. /* set VXCO to its lowest frequency */
  844. debiwrite(saa, debNormal, XILINX_PWM, 0, 2);
  845. if (NewCard) {
  846. /* mute CS3310 */
  847. if (HaveCS3310)
  848. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT,
  849. 0, 2);
  850. /* set VXCO to PWM mode, release reset, blank on */
  851. debiwrite(saa, debNormal, XILINX_CTL0, 0xffc4, 2);
  852. mdelay(10);
  853. /* unmute CS3310 */
  854. if (HaveCS3310)
  855. debiwrite(saa, debNormal, XILINX_CTL0,
  856. 0x2020, 2);
  857. }
  858. /* set source Black */
  859. debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
  860. saa->boardcfg[4] = 22; /* set NTSC First Active Line */
  861. saa->boardcfg[5] = 23; /* set PAL First Active Line */
  862. saa->boardcfg[54] = 2; /* set NTSC Last Active Line - 256 */
  863. saa->boardcfg[55] = 54; /* set PAL Last Active Line - 256 */
  864. set_out_format(saa, VIDEO_MODE_NTSC);
  865. mdelay(50);
  866. /* begin IBM chip init */
  867. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
  868. saaread(SAA7146_PSR); /* wait for reset */
  869. mdelay(5);
  870. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
  871. debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
  872. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0x10, 2);
  873. debiwrite(saa, debNormal, IBM_MP2_CMD_ADDR, 0, 2);
  874. debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
  875. if (NewCard) {
  876. mdelay(5);
  877. /* set i2s rate converter to 48KHz */
  878. debiwrite(saa, debNormal, 0x80c0, 6, 2);
  879. /* we must init CS8420 first since rev b pulls i2s */
  880. /* master clock low and CS4341 needs i2s master to */
  881. /* run the i2c port. */
  882. if (HaveCS8420)
  883. /* 0=consumer, 1=pro */
  884. initialize_cs8420(saa, 0);
  885. mdelay(5);
  886. if (HaveCS4341)
  887. initialize_cs4341(saa);
  888. }
  889. debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
  890. debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
  891. debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
  892. debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
  893. if (NewCard)
  894. set_genlock_offset(saa, 0);
  895. debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
  896. #if 0
  897. /* enable genlock */
  898. debiwrite(saa, debNormal, XILINX_CTL0, 0x8000, 2);
  899. #else
  900. /* disable genlock */
  901. debiwrite(saa, debNormal, XILINX_CTL0, 0x8080, 2);
  902. #endif
  903. }
  904. return failure;
  905. }
  906. static int do_ibm_reset(struct saa7146 *saa)
  907. {
  908. /* failure if decoder not previously programmed */
  909. if (saa->boardcfg[0] < 37)
  910. return -EIO;
  911. /* mute CS3310 */
  912. if (HaveCS3310)
  913. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 0, 2);
  914. /* disable interrupts */
  915. saawrite(0, SAA7146_IER);
  916. saa->audhead = saa->audtail = 0;
  917. saa->vidhead = saa->vidtail = 0;
  918. /* tristate debi bus, disable debi transfers */
  919. saawrite(0x00880000, SAA7146_MC1);
  920. /* ensure posted write */
  921. saaread(SAA7146_MC1);
  922. mdelay(50);
  923. /* re-enable debi transfers */
  924. saawrite(0x00880088, SAA7146_MC1);
  925. /* set source Black */
  926. debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
  927. /* begin IBM chip init */
  928. set_out_format(saa, CurrentMode);
  929. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
  930. saaread(SAA7146_PSR); /* wait for reset */
  931. mdelay(5);
  932. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
  933. debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
  934. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  935. debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
  936. if (NewCard) {
  937. mdelay(5);
  938. /* set i2s rate converter to 48KHz */
  939. debiwrite(saa, debNormal, 0x80c0, 6, 2);
  940. /* we must init CS8420 first since rev b pulls i2s */
  941. /* master clock low and CS4341 needs i2s master to */
  942. /* run the i2c port. */
  943. if (HaveCS8420)
  944. /* 0=consumer, 1=pro */
  945. initialize_cs8420(saa, 1);
  946. mdelay(5);
  947. if (HaveCS4341)
  948. initialize_cs4341(saa);
  949. }
  950. debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
  951. debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
  952. debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
  953. debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
  954. if (NewCard)
  955. set_genlock_offset(saa, 0);
  956. debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
  957. debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
  958. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
  959. if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
  960. (ChipControl == 0x43 ? 0xe800 : 0xe000), 1)) {
  961. printk(KERN_ERR "stradis%d: IBM config failed\n", saa->nr);
  962. }
  963. if (HaveCS3310) {
  964. int i = CS3310MaxLvl;
  965. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, ((i << 8)| i),2);
  966. }
  967. /* start video decoder */
  968. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  969. /* 256k vid, 3520 bytes aud */
  970. debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037, 2);
  971. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
  972. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  973. /* enable buffer threshold irq */
  974. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
  975. /* clear pending interrupts */
  976. debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
  977. debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
  978. return 0;
  979. }
  980. /* load the decoder microcode */
  981. static int initialize_ibmmpeg2(struct video_code *microcode)
  982. {
  983. int i, num;
  984. struct saa7146 *saa;
  985. for (num = 0; num < saa_num; num++) {
  986. saa = &saa7146s[num];
  987. /* check that FPGA is loaded */
  988. debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0xa55a, 2);
  989. i = debiread(saa, debNormal, IBM_MP2_OSD_SIZE, 2);
  990. if (i != 0xa55a) {
  991. printk(KERN_INFO "stradis%d: %04x != 0xa55a\n",
  992. saa->nr, i);
  993. #if 0
  994. return -1;
  995. #endif
  996. }
  997. if (!strncmp(microcode->loadwhat, "decoder.vid", 11)) {
  998. if (saa->boardcfg[0] > 27)
  999. continue; /* skip to next card */
  1000. /* load video control store */
  1001. saa->boardcfg[1] = 0x13; /* no-sync default */
  1002. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
  1003. debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
  1004. for (i = 0; i < microcode->datasize / 2; i++)
  1005. debiwrite(saa, debNormal, IBM_MP2_PROC_IDATA,
  1006. (microcode->data[i * 2] << 8) |
  1007. microcode->data[i * 2 + 1], 2);
  1008. debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
  1009. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
  1010. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1011. ChipControl, 2);
  1012. saa->boardcfg[0] = 28;
  1013. }
  1014. if (!strncmp(microcode->loadwhat, "decoder.aud", 11)) {
  1015. if (saa->boardcfg[0] > 35)
  1016. continue; /* skip to next card */
  1017. /* load audio control store */
  1018. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
  1019. debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
  1020. for (i = 0; i < microcode->datasize; i++)
  1021. debiwrite(saa, debNormal, IBM_MP2_AUD_IDATA,
  1022. microcode->data[i], 1);
  1023. debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
  1024. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
  1025. debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
  1026. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
  1027. if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
  1028. 0xe000, 1)) {
  1029. printk(KERN_ERR "stradis%d: IBM config "
  1030. "failed\n", saa->nr);
  1031. return -1;
  1032. }
  1033. /* set PWM to center value */
  1034. if (NewCard) {
  1035. debiwrite(saa, debNormal, XILINX_PWM,
  1036. saa->boardcfg[14] +
  1037. (saa->boardcfg[13] << 8), 2);
  1038. } else
  1039. debiwrite(saa, debNormal, XILINX_PWM, 0x46, 2);
  1040. if (HaveCS3310) {
  1041. i = CS3310MaxLvl;
  1042. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT,
  1043. (i << 8) | i, 2);
  1044. }
  1045. printk(KERN_INFO "stradis%d: IBM MPEGCD%d Inited\n",
  1046. saa->nr, 18 + (debiread(saa, debNormal,
  1047. IBM_MP2_CHIP_CONTROL, 2) >> 12));
  1048. /* start video decoder */
  1049. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1050. ChipControl, 2);
  1051. debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037,
  1052. 2); /* 256k vid, 3520 bytes aud */
  1053. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
  1054. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  1055. /* enable buffer threshold irq */
  1056. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
  1057. debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
  1058. /* enable gpio irq */
  1059. saawrite(0x00002000, SAA7146_GPIO_CTRL);
  1060. /* enable decoder output to HPS */
  1061. debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
  1062. saa->boardcfg[0] = 37;
  1063. }
  1064. }
  1065. return 0;
  1066. }
  1067. static u32 palette2fmt[] = { /* some of these YUV translations are wrong */
  1068. 0xffffffff, 0x86000000, 0x87000000, 0x80000000, 0x8100000, 0x82000000,
  1069. 0x83000000, 0x00000000, 0x03000000, 0x03000000, 0x0a00000, 0x03000000,
  1070. 0x06000000, 0x00000000, 0x03000000, 0x0a000000, 0x0300000
  1071. };
  1072. static int bpp2fmt[4] = {
  1073. VIDEO_PALETTE_HI240, VIDEO_PALETTE_RGB565, VIDEO_PALETTE_RGB24,
  1074. VIDEO_PALETTE_RGB32
  1075. };
  1076. /* I wish I could find a formula to calculate these... */
  1077. static u32 h_prescale[64] = {
  1078. 0x10000000, 0x18040202, 0x18080000, 0x380c0606, 0x38100204, 0x38140808,
  1079. 0x38180000, 0x381c0000, 0x3820161c, 0x38242a3b, 0x38281230, 0x382c4460,
  1080. 0x38301040, 0x38340080, 0x38380000, 0x383c0000, 0x3840fefe, 0x3844ee9f,
  1081. 0x3848ee9f, 0x384cee9f, 0x3850ee9f, 0x38542a3b, 0x38581230, 0x385c0000,
  1082. 0x38600000, 0x38640000, 0x38680000, 0x386c0000, 0x38700000, 0x38740000,
  1083. 0x38780000, 0x387c0000, 0x30800000, 0x38840000, 0x38880000, 0x388c0000,
  1084. 0x38900000, 0x38940000, 0x38980000, 0x389c0000, 0x38a00000, 0x38a40000,
  1085. 0x38a80000, 0x38ac0000, 0x38b00000, 0x38b40000, 0x38b80000, 0x38bc0000,
  1086. 0x38c00000, 0x38c40000, 0x38c80000, 0x38cc0000, 0x38d00000, 0x38d40000,
  1087. 0x38d80000, 0x38dc0000, 0x38e00000, 0x38e40000, 0x38e80000, 0x38ec0000,
  1088. 0x38f00000, 0x38f40000, 0x38f80000, 0x38fc0000,
  1089. };
  1090. static u32 v_gain[64] = {
  1091. 0x016000ff, 0x016100ff, 0x016100ff, 0x016200ff, 0x016200ff, 0x016200ff,
  1092. 0x016200ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff,
  1093. 0x016300ff, 0x016300ff, 0x016300ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1094. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1095. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1096. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1097. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1098. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1099. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1100. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1101. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1102. };
  1103. static void saa7146_set_winsize(struct saa7146 *saa)
  1104. {
  1105. u32 format;
  1106. int offset, yacl, ysci;
  1107. saa->win.color_fmt = format =
  1108. (saa->win.depth == 15) ? palette2fmt[VIDEO_PALETTE_RGB555] :
  1109. palette2fmt[bpp2fmt[(saa->win.bpp - 1) & 3]];
  1110. offset = saa->win.x * saa->win.bpp + saa->win.y * saa->win.bpl;
  1111. saawrite(saa->win.vidadr + offset, SAA7146_BASE_EVEN1);
  1112. saawrite(saa->win.vidadr + offset + saa->win.bpl, SAA7146_BASE_ODD1);
  1113. saawrite(saa->win.bpl * 2, SAA7146_PITCH1);
  1114. saawrite(saa->win.vidadr + saa->win.bpl * saa->win.sheight,
  1115. SAA7146_PROT_ADDR1);
  1116. saawrite(0, SAA7146_PAGE1);
  1117. saawrite(format | 0x60, SAA7146_CLIP_FORMAT_CTRL);
  1118. offset = (704 / (saa->win.width - 1)) & 0x3f;
  1119. saawrite(h_prescale[offset], SAA7146_HPS_H_PRESCALE);
  1120. offset = (720896 / saa->win.width) / (offset + 1);
  1121. saawrite((offset << 12) | 0x0c, SAA7146_HPS_H_SCALE);
  1122. if (CurrentMode == VIDEO_MODE_NTSC) {
  1123. yacl = /*(480 / saa->win.height - 1) & 0x3f */ 0;
  1124. ysci = 1024 - (saa->win.height * 1024 / 480);
  1125. } else {
  1126. yacl = /*(576 / saa->win.height - 1) & 0x3f */ 0;
  1127. ysci = 1024 - (saa->win.height * 1024 / 576);
  1128. }
  1129. saawrite((1 << 31) | (ysci << 21) | (yacl << 15), SAA7146_HPS_V_SCALE);
  1130. saawrite(v_gain[yacl], SAA7146_HPS_V_GAIN);
  1131. saawrite(((SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_HPS_V |
  1132. SAA7146_MC2_UPLD_HPS_H) << 16) | (SAA7146_MC2_UPLD_DMA1 |
  1133. SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_HPS_H), SAA7146_MC2);
  1134. }
  1135. /* clip_draw_rectangle(cm,x,y,w,h) -- handle clipping an area
  1136. * bitmap is fixed width, 128 bytes (1024 pixels represented)
  1137. * arranged most-sigificant-bit-left in 32-bit words
  1138. * based on saa7146 clipping hardware, it swaps bytes if LE
  1139. * much of this makes up for egcs brain damage -- so if you
  1140. * are wondering "why did he do this?" it is because the C
  1141. * was adjusted to generate the optimal asm output without
  1142. * writing non-portable __asm__ directives.
  1143. */
  1144. static void clip_draw_rectangle(u32 *clipmap, int x, int y, int w, int h)
  1145. {
  1146. register int startword, endword;
  1147. register u32 bitsleft, bitsright;
  1148. u32 *temp;
  1149. if (x < 0) {
  1150. w += x;
  1151. x = 0;
  1152. }
  1153. if (y < 0) {
  1154. h += y;
  1155. y = 0;
  1156. }
  1157. if (w <= 0 || h <= 0 || x > 1023 || y > 639)
  1158. return; /* throw away bad clips */
  1159. if (x + w > 1024)
  1160. w = 1024 - x;
  1161. if (y + h > 640)
  1162. h = 640 - y;
  1163. startword = (x >> 5);
  1164. endword = ((x + w) >> 5);
  1165. bitsleft = (0xffffffff >> (x & 31));
  1166. bitsright = (0xffffffff << (~((x + w) - (endword << 5))));
  1167. temp = &clipmap[(y << 5) + startword];
  1168. w = endword - startword;
  1169. if (!w) {
  1170. bitsleft |= bitsright;
  1171. for (y = 0; y < h; y++) {
  1172. *temp |= bitsleft;
  1173. temp += 32;
  1174. }
  1175. } else {
  1176. for (y = 0; y < h; y++) {
  1177. *temp++ |= bitsleft;
  1178. for (x = 1; x < w; x++)
  1179. *temp++ = 0xffffffff;
  1180. *temp |= bitsright;
  1181. temp += (32 - w);
  1182. }
  1183. }
  1184. }
  1185. static void make_clip_tab(struct saa7146 *saa, struct video_clip *cr, int ncr)
  1186. {
  1187. int i, width, height;
  1188. u32 *clipmap;
  1189. clipmap = saa->dmavid2;
  1190. if ((width = saa->win.width) > 1023)
  1191. width = 1023; /* sanity check */
  1192. if ((height = saa->win.height) > 640)
  1193. height = 639; /* sanity check */
  1194. if (ncr > 0) { /* rectangles pased */
  1195. /* convert rectangular clips to a bitmap */
  1196. memset(clipmap, 0, VIDEO_CLIPMAP_SIZE); /* clear map */
  1197. for (i = 0; i < ncr; i++)
  1198. clip_draw_rectangle(clipmap, cr[i].x, cr[i].y,
  1199. cr[i].width, cr[i].height);
  1200. }
  1201. /* clip against viewing window AND screen
  1202. so we do not have to rely on the user program
  1203. */
  1204. clip_draw_rectangle(clipmap, (saa->win.x + width > saa->win.swidth) ?
  1205. (saa->win.swidth - saa->win.x) : width, 0, 1024, 768);
  1206. clip_draw_rectangle(clipmap, 0,
  1207. (saa->win.y + height > saa->win.sheight) ?
  1208. (saa->win.sheight - saa->win.y) : height, 1024, 768);
  1209. if (saa->win.x < 0)
  1210. clip_draw_rectangle(clipmap, 0, 0, -saa->win.x, 768);
  1211. if (saa->win.y < 0)
  1212. clip_draw_rectangle(clipmap, 0, 0, 1024, -saa->win.y);
  1213. }
  1214. static int saa_ioctl(struct inode *inode, struct file *file,
  1215. unsigned int cmd, unsigned long argl)
  1216. {
  1217. struct saa7146 *saa = file->private_data;
  1218. void __user *arg = (void __user *)argl;
  1219. switch (cmd) {
  1220. case VIDIOCGCAP:
  1221. {
  1222. struct video_capability b;
  1223. strcpy(b.name, saa->video_dev.name);
  1224. b.type = VID_TYPE_CAPTURE | VID_TYPE_OVERLAY |
  1225. VID_TYPE_CLIPPING | VID_TYPE_FRAMERAM |
  1226. VID_TYPE_SCALES;
  1227. b.channels = 1;
  1228. b.audios = 1;
  1229. b.maxwidth = 768;
  1230. b.maxheight = 576;
  1231. b.minwidth = 32;
  1232. b.minheight = 32;
  1233. if (copy_to_user(arg, &b, sizeof(b)))
  1234. return -EFAULT;
  1235. return 0;
  1236. }
  1237. case VIDIOCGPICT:
  1238. {
  1239. struct video_picture p = saa->picture;
  1240. if (saa->win.depth == 8)
  1241. p.palette = VIDEO_PALETTE_HI240;
  1242. if (saa->win.depth == 15)
  1243. p.palette = VIDEO_PALETTE_RGB555;
  1244. if (saa->win.depth == 16)
  1245. p.palette = VIDEO_PALETTE_RGB565;
  1246. if (saa->win.depth == 24)
  1247. p.palette = VIDEO_PALETTE_RGB24;
  1248. if (saa->win.depth == 32)
  1249. p.palette = VIDEO_PALETTE_RGB32;
  1250. if (copy_to_user(arg, &p, sizeof(p)))
  1251. return -EFAULT;
  1252. return 0;
  1253. }
  1254. case VIDIOCSPICT:
  1255. {
  1256. struct video_picture p;
  1257. u32 format;
  1258. if (copy_from_user(&p, arg, sizeof(p)))
  1259. return -EFAULT;
  1260. if (p.palette < ARRAY_SIZE(palette2fmt)) {
  1261. format = palette2fmt[p.palette];
  1262. saa->win.color_fmt = format;
  1263. saawrite(format | 0x60,
  1264. SAA7146_CLIP_FORMAT_CTRL);
  1265. }
  1266. saawrite(((p.brightness & 0xff00) << 16) |
  1267. ((p.contrast & 0xfe00) << 7) |
  1268. ((p.colour & 0xfe00) >> 9), SAA7146_BCS_CTRL);
  1269. saa->picture = p;
  1270. /* upload changed registers */
  1271. saawrite(((SAA7146_MC2_UPLD_HPS_H |
  1272. SAA7146_MC2_UPLD_HPS_V) << 16) |
  1273. SAA7146_MC2_UPLD_HPS_H |
  1274. SAA7146_MC2_UPLD_HPS_V, SAA7146_MC2);
  1275. return 0;
  1276. }
  1277. case VIDIOCSWIN:
  1278. {
  1279. struct video_window vw;
  1280. struct video_clip *vcp = NULL;
  1281. if (copy_from_user(&vw, arg, sizeof(vw)))
  1282. return -EFAULT;
  1283. /* stop capture */
  1284. if (vw.flags || vw.width < 16 || vw.height < 16) {
  1285. saawrite((SAA7146_MC1_TR_E_1 << 16),
  1286. SAA7146_MC1);
  1287. return -EINVAL;
  1288. }
  1289. /* 32-bit align start and adjust width */
  1290. if (saa->win.bpp < 4) {
  1291. int i = vw.x;
  1292. vw.x = (vw.x + 3) & ~3;
  1293. i = vw.x - i;
  1294. vw.width -= i;
  1295. }
  1296. saa->win.x = vw.x;
  1297. saa->win.y = vw.y;
  1298. saa->win.width = vw.width;
  1299. if (saa->win.width > 768)
  1300. saa->win.width = 768;
  1301. saa->win.height = vw.height;
  1302. if (CurrentMode == VIDEO_MODE_NTSC) {
  1303. if (saa->win.height > 480)
  1304. saa->win.height = 480;
  1305. } else {
  1306. if (saa->win.height > 576)
  1307. saa->win.height = 576;
  1308. }
  1309. /* stop capture */
  1310. saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
  1311. saa7146_set_winsize(saa);
  1312. /*
  1313. * Do any clips.
  1314. */
  1315. if (vw.clipcount < 0) {
  1316. if (copy_from_user(saa->dmavid2, vw.clips,
  1317. VIDEO_CLIPMAP_SIZE))
  1318. return -EFAULT;
  1319. } else if (vw.clipcount > 16384) {
  1320. return -EINVAL;
  1321. } else if (vw.clipcount > 0) {
  1322. vcp = vmalloc(sizeof(struct video_clip) *
  1323. vw.clipcount);
  1324. if (vcp == NULL)
  1325. return -ENOMEM;
  1326. if (copy_from_user(vcp, vw.clips,
  1327. sizeof(struct video_clip) *
  1328. vw.clipcount)) {
  1329. vfree(vcp);
  1330. return -EFAULT;
  1331. }
  1332. } else /* nothing clipped */
  1333. memset(saa->dmavid2, 0, VIDEO_CLIPMAP_SIZE);
  1334. make_clip_tab(saa, vcp, vw.clipcount);
  1335. if (vw.clipcount > 0)
  1336. vfree(vcp);
  1337. /* start capture & clip dma if we have an address */
  1338. if ((saa->cap & 3) && saa->win.vidadr != 0)
  1339. saawrite(((SAA7146_MC1_TR_E_1 |
  1340. SAA7146_MC1_TR_E_2) << 16) | 0xffff,
  1341. SAA7146_MC1);
  1342. return 0;
  1343. }
  1344. case VIDIOCGWIN:
  1345. {
  1346. struct video_window vw;
  1347. vw.x = saa->win.x;
  1348. vw.y = saa->win.y;
  1349. vw.width = saa->win.width;
  1350. vw.height = saa->win.height;
  1351. vw.chromakey = 0;
  1352. vw.flags = 0;
  1353. if (copy_to_user(arg, &vw, sizeof(vw)))
  1354. return -EFAULT;
  1355. return 0;
  1356. }
  1357. case VIDIOCCAPTURE:
  1358. {
  1359. int v;
  1360. if (copy_from_user(&v, arg, sizeof(v)))
  1361. return -EFAULT;
  1362. if (v == 0) {
  1363. saa->cap &= ~1;
  1364. saawrite((SAA7146_MC1_TR_E_1 << 16),
  1365. SAA7146_MC1);
  1366. } else {
  1367. if (saa->win.vidadr == 0 || saa->win.width == 0
  1368. || saa->win.height == 0)
  1369. return -EINVAL;
  1370. saa->cap |= 1;
  1371. saawrite((SAA7146_MC1_TR_E_1 << 16) | 0xffff,
  1372. SAA7146_MC1);
  1373. }
  1374. return 0;
  1375. }
  1376. case VIDIOCGFBUF:
  1377. {
  1378. struct video_buffer v;
  1379. v.base = (void *)saa->win.vidadr;
  1380. v.height = saa->win.sheight;
  1381. v.width = saa->win.swidth;
  1382. v.depth = saa->win.depth;
  1383. v.bytesperline = saa->win.bpl;
  1384. if (copy_to_user(arg, &v, sizeof(v)))
  1385. return -EFAULT;
  1386. return 0;
  1387. }
  1388. case VIDIOCSFBUF:
  1389. {
  1390. struct video_buffer v;
  1391. if (!capable(CAP_SYS_ADMIN))
  1392. return -EPERM;
  1393. if (copy_from_user(&v, arg, sizeof(v)))
  1394. return -EFAULT;
  1395. if (v.depth != 8 && v.depth != 15 && v.depth != 16 &&
  1396. v.depth != 24 && v.depth != 32 && v.width > 16 &&
  1397. v.height > 16 && v.bytesperline > 16)
  1398. return -EINVAL;
  1399. if (v.base)
  1400. saa->win.vidadr = (unsigned long)v.base;
  1401. saa->win.sheight = v.height;
  1402. saa->win.swidth = v.width;
  1403. saa->win.bpp = ((v.depth + 7) & 0x38) / 8;
  1404. saa->win.depth = v.depth;
  1405. saa->win.bpl = v.bytesperline;
  1406. DEBUG(printk("Display at %p is %d by %d, bytedepth %d, "
  1407. "bpl %d\n", v.base, v.width, v.height,
  1408. saa->win.bpp, saa->win.bpl));
  1409. saa7146_set_winsize(saa);
  1410. return 0;
  1411. }
  1412. case VIDIOCKEY:
  1413. {
  1414. /* Will be handled higher up .. */
  1415. return 0;
  1416. }
  1417. case VIDIOCGAUDIO:
  1418. {
  1419. struct video_audio v;
  1420. v = saa->audio_dev;
  1421. v.flags &= ~(VIDEO_AUDIO_MUTE | VIDEO_AUDIO_MUTABLE);
  1422. v.flags |= VIDEO_AUDIO_MUTABLE | VIDEO_AUDIO_VOLUME;
  1423. strcpy(v.name, "MPEG");
  1424. v.mode = VIDEO_SOUND_STEREO;
  1425. if (copy_to_user(arg, &v, sizeof(v)))
  1426. return -EFAULT;
  1427. return 0;
  1428. }
  1429. case VIDIOCSAUDIO:
  1430. {
  1431. struct video_audio v;
  1432. int i;
  1433. if (copy_from_user(&v, arg, sizeof(v)))
  1434. return -EFAULT;
  1435. i = (~(v.volume >> 8)) & 0xff;
  1436. if (!HaveCS4341) {
  1437. if (v.flags & VIDEO_AUDIO_MUTE)
  1438. debiwrite(saa, debNormal,
  1439. IBM_MP2_FRNT_ATTEN, 0xffff, 2);
  1440. if (!(v.flags & VIDEO_AUDIO_MUTE))
  1441. debiwrite(saa, debNormal,
  1442. IBM_MP2_FRNT_ATTEN, 0x0000, 2);
  1443. if (v.flags & VIDEO_AUDIO_VOLUME)
  1444. debiwrite(saa, debNormal,
  1445. IBM_MP2_FRNT_ATTEN,
  1446. (i << 8) | i, 2);
  1447. } else {
  1448. if (v.flags & VIDEO_AUDIO_MUTE)
  1449. cs4341_setlevel(saa, 0xff, 0xff);
  1450. if (!(v.flags & VIDEO_AUDIO_MUTE))
  1451. cs4341_setlevel(saa, 0, 0);
  1452. if (v.flags & VIDEO_AUDIO_VOLUME)
  1453. cs4341_setlevel(saa, i, i);
  1454. }
  1455. saa->audio_dev = v;
  1456. return 0;
  1457. }
  1458. case VIDIOCGUNIT:
  1459. {
  1460. struct video_unit vu;
  1461. vu.video = saa->video_dev.minor;
  1462. vu.vbi = VIDEO_NO_UNIT;
  1463. vu.radio = VIDEO_NO_UNIT;
  1464. vu.audio = VIDEO_NO_UNIT;
  1465. vu.teletext = VIDEO_NO_UNIT;
  1466. if (copy_to_user(arg, &vu, sizeof(vu)))
  1467. return -EFAULT;
  1468. return 0;
  1469. }
  1470. case VIDIOCSPLAYMODE:
  1471. {
  1472. struct video_play_mode pmode;
  1473. if (copy_from_user((void *)&pmode, arg,
  1474. sizeof(struct video_play_mode)))
  1475. return -EFAULT;
  1476. switch (pmode.mode) {
  1477. case VID_PLAY_VID_OUT_MODE:
  1478. if (pmode.p1 != VIDEO_MODE_NTSC &&
  1479. pmode.p1 != VIDEO_MODE_PAL)
  1480. return -EINVAL;
  1481. set_out_format(saa, pmode.p1);
  1482. return 0;
  1483. case VID_PLAY_GENLOCK:
  1484. debiwrite(saa, debNormal, XILINX_CTL0,
  1485. pmode.p1 ? 0x8000 : 0x8080, 2);
  1486. if (NewCard)
  1487. set_genlock_offset(saa, pmode.p2);
  1488. return 0;
  1489. case VID_PLAY_NORMAL:
  1490. debiwrite(saa, debNormal,
  1491. IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  1492. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  1493. saa->playmode = pmode.mode;
  1494. return 0;
  1495. case VID_PLAY_PAUSE:
  1496. /* IBM removed the PAUSE command */
  1497. /* they say use SINGLE_FRAME now */
  1498. case VID_PLAY_SINGLE_FRAME:
  1499. ibm_send_command(saa, IBM_MP2_SINGLE_FRAME,0,0);
  1500. if (saa->playmode == pmode.mode) {
  1501. debiwrite(saa, debNormal,
  1502. IBM_MP2_CHIP_CONTROL,
  1503. ChipControl, 2);
  1504. }
  1505. saa->playmode = pmode.mode;
  1506. return 0;
  1507. case VID_PLAY_FAST_FORWARD:
  1508. ibm_send_command(saa, IBM_MP2_FAST_FORWARD,0,0);
  1509. saa->playmode = pmode.mode;
  1510. return 0;
  1511. case VID_PLAY_SLOW_MOTION:
  1512. ibm_send_command(saa, IBM_MP2_SLOW_MOTION,
  1513. pmode.p1, 0);
  1514. saa->playmode = pmode.mode;
  1515. return 0;
  1516. case VID_PLAY_IMMEDIATE_NORMAL:
  1517. /* ensure transfers resume */
  1518. debiwrite(saa, debNormal,
  1519. IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  1520. ibm_send_command(saa, IBM_MP2_IMED_NORM_PLAY,
  1521. 0, 0);
  1522. saa->playmode = VID_PLAY_NORMAL;
  1523. return 0;
  1524. case VID_PLAY_SWITCH_CHANNELS:
  1525. saa->audhead = saa->audtail = 0;
  1526. saa->vidhead = saa->vidtail = 0;
  1527. ibm_send_command(saa, IBM_MP2_FREEZE_FRAME,0,1);
  1528. ibm_send_command(saa, IBM_MP2_RESET_AUD_RATE,
  1529. 0, 1);
  1530. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1531. 0, 2);
  1532. ibm_send_command(saa, IBM_MP2_CHANNEL_SWITCH,
  1533. 0, 1);
  1534. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1535. ChipControl, 2);
  1536. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  1537. saa->playmode = VID_PLAY_NORMAL;
  1538. return 0;
  1539. case VID_PLAY_FREEZE_FRAME:
  1540. ibm_send_command(saa, IBM_MP2_FREEZE_FRAME,0,0);
  1541. saa->playmode = pmode.mode;
  1542. return 0;
  1543. case VID_PLAY_STILL_MODE:
  1544. ibm_send_command(saa, IBM_MP2_SET_STILL_MODE,
  1545. 0, 0);
  1546. saa->playmode = pmode.mode;
  1547. return 0;
  1548. case VID_PLAY_MASTER_MODE:
  1549. if (pmode.p1 == VID_PLAY_MASTER_NONE)
  1550. saa->boardcfg[1] = 0x13;
  1551. else if (pmode.p1 == VID_PLAY_MASTER_VIDEO)
  1552. saa->boardcfg[1] = 0x23;
  1553. else if (pmode.p1 == VID_PLAY_MASTER_AUDIO)
  1554. saa->boardcfg[1] = 0x43;
  1555. else
  1556. return -EINVAL;
  1557. debiwrite(saa, debNormal,
  1558. IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  1559. return 0;
  1560. case VID_PLAY_ACTIVE_SCANLINES:
  1561. if (CurrentMode == VIDEO_MODE_PAL) {
  1562. if (pmode.p1 < 1 || pmode.p2 > 625)
  1563. return -EINVAL;
  1564. saa->boardcfg[5] = pmode.p1;
  1565. saa->boardcfg[55] = (pmode.p1 +
  1566. (pmode.p2 / 2) - 1) & 0xff;
  1567. } else {
  1568. if (pmode.p1 < 4 || pmode.p2 > 525)
  1569. return -EINVAL;
  1570. saa->boardcfg[4] = pmode.p1;
  1571. saa->boardcfg[54] = (pmode.p1 +
  1572. (pmode.p2 / 2) - 4) & 0xff;
  1573. }
  1574. set_out_format(saa, CurrentMode);
  1575. case VID_PLAY_RESET:
  1576. return do_ibm_reset(saa);
  1577. case VID_PLAY_END_MARK:
  1578. if (saa->endmarktail < saa->endmarkhead) {
  1579. if (saa->endmarkhead -
  1580. saa->endmarktail < 2)
  1581. return -ENOSPC;
  1582. } else if (saa->endmarkhead <=saa->endmarktail){
  1583. if (saa->endmarktail - saa->endmarkhead
  1584. > (MAX_MARKS - 2))
  1585. return -ENOSPC;
  1586. } else
  1587. return -ENOSPC;
  1588. saa->endmark[saa->endmarktail] = saa->audtail;
  1589. saa->endmarktail++;
  1590. if (saa->endmarktail >= MAX_MARKS)
  1591. saa->endmarktail = 0;
  1592. }
  1593. return -EINVAL;
  1594. }
  1595. case VIDIOCSWRITEMODE:
  1596. {
  1597. int mode;
  1598. if (copy_from_user((void *)&mode, arg, sizeof(int)))
  1599. return -EFAULT;
  1600. if (mode == VID_WRITE_MPEG_AUD ||
  1601. mode == VID_WRITE_MPEG_VID ||
  1602. mode == VID_WRITE_CC ||
  1603. mode == VID_WRITE_TTX ||
  1604. mode == VID_WRITE_OSD) {
  1605. saa->writemode = mode;
  1606. return 0;
  1607. }
  1608. return -EINVAL;
  1609. }
  1610. case VIDIOCSMICROCODE:
  1611. {
  1612. struct video_code ucode;
  1613. __u8 *udata;
  1614. int i;
  1615. if (copy_from_user(&ucode, arg, sizeof(ucode)))
  1616. return -EFAULT;
  1617. if (ucode.datasize > 65536 || ucode.datasize < 1024 ||
  1618. strncmp(ucode.loadwhat, "dec", 3))
  1619. return -EINVAL;
  1620. if ((udata = vmalloc(ucode.datasize)) == NULL)
  1621. return -ENOMEM;
  1622. if (copy_from_user(udata, ucode.data, ucode.datasize)) {
  1623. vfree(udata);
  1624. return -EFAULT;
  1625. }
  1626. ucode.data = udata;
  1627. if (!strncmp(ucode.loadwhat, "decoder.aud", 11) ||
  1628. !strncmp(ucode.loadwhat, "decoder.vid", 11))
  1629. i = initialize_ibmmpeg2(&ucode);
  1630. else
  1631. i = initialize_fpga(&ucode);
  1632. vfree(udata);
  1633. if (i)
  1634. return -EINVAL;
  1635. return 0;
  1636. }
  1637. case VIDIOCGCHAN: /* this makes xawtv happy */
  1638. {
  1639. struct video_channel v;
  1640. if (copy_from_user(&v, arg, sizeof(v)))
  1641. return -EFAULT;
  1642. v.flags = VIDEO_VC_AUDIO;
  1643. v.tuners = 0;
  1644. v.type = VID_TYPE_MPEG_DECODER;
  1645. v.norm = CurrentMode;
  1646. strcpy(v.name, "MPEG2");
  1647. if (copy_to_user(arg, &v, sizeof(v)))
  1648. return -EFAULT;
  1649. return 0;
  1650. }
  1651. case VIDIOCSCHAN: /* this makes xawtv happy */
  1652. {
  1653. struct video_channel v;
  1654. if (copy_from_user(&v, arg, sizeof(v)))
  1655. return -EFAULT;
  1656. /* do nothing */
  1657. return 0;
  1658. }
  1659. default:
  1660. return -ENOIOCTLCMD;
  1661. }
  1662. return 0;
  1663. }
  1664. static int saa_mmap(struct file *file, struct vm_area_struct *vma)
  1665. {
  1666. struct saa7146 *saa = file->private_data;
  1667. printk(KERN_DEBUG "stradis%d: saa_mmap called\n", saa->nr);
  1668. return -EINVAL;
  1669. }
  1670. static ssize_t saa_read(struct file *file, char __user * buf,
  1671. size_t count, loff_t * ppos)
  1672. {
  1673. return -EINVAL;
  1674. }
  1675. static ssize_t saa_write(struct file *file, const char __user * buf,
  1676. size_t count, loff_t * ppos)
  1677. {
  1678. struct saa7146 *saa = file->private_data;
  1679. unsigned long todo = count;
  1680. int blocksize, split;
  1681. unsigned long flags;
  1682. while (todo > 0) {
  1683. if (saa->writemode == VID_WRITE_MPEG_AUD) {
  1684. spin_lock_irqsave(&saa->lock, flags);
  1685. if (saa->audhead <= saa->audtail)
  1686. blocksize = 65536 -
  1687. (saa->audtail - saa->audhead);
  1688. else
  1689. blocksize = saa->audhead - saa->audtail;
  1690. spin_unlock_irqrestore(&saa->lock, flags);
  1691. if (blocksize < 16384) {
  1692. saawrite(SAA7146_PSR_DEBI_S |
  1693. SAA7146_PSR_PIN1, SAA7146_IER);
  1694. saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
  1695. /* wait for buffer space to open */
  1696. interruptible_sleep_on(&saa->audq);
  1697. }
  1698. spin_lock_irqsave(&saa->lock, flags);
  1699. if (saa->audhead <= saa->audtail) {
  1700. blocksize = 65536 -
  1701. (saa->audtail - saa->audhead);
  1702. split = 65536 - saa->audtail;
  1703. } else {
  1704. blocksize = saa->audhead - saa->audtail;
  1705. split = 65536;
  1706. }
  1707. spin_unlock_irqrestore(&saa->lock, flags);
  1708. blocksize--;
  1709. if (blocksize > todo)
  1710. blocksize = todo;
  1711. /* double check that we really have space */
  1712. if (!blocksize)
  1713. return -ENOSPC;
  1714. if (split < blocksize) {
  1715. if (copy_from_user(saa->audbuf +
  1716. saa->audtail, buf, split))
  1717. return -EFAULT;
  1718. buf += split;
  1719. todo -= split;
  1720. blocksize -= split;
  1721. saa->audtail = 0;
  1722. }
  1723. if (copy_from_user(saa->audbuf + saa->audtail, buf,
  1724. blocksize))
  1725. return -EFAULT;
  1726. saa->audtail += blocksize;
  1727. todo -= blocksize;
  1728. buf += blocksize;
  1729. saa->audtail &= 0xffff;
  1730. } else if (saa->writemode == VID_WRITE_MPEG_VID) {
  1731. spin_lock_irqsave(&saa->lock, flags);
  1732. if (saa->vidhead <= saa->vidtail)
  1733. blocksize = 524288 -
  1734. (saa->vidtail - saa->vidhead);
  1735. else
  1736. blocksize = saa->vidhead - saa->vidtail;
  1737. spin_unlock_irqrestore(&saa->lock, flags);
  1738. if (blocksize < 65536) {
  1739. saawrite(SAA7146_PSR_DEBI_S |
  1740. SAA7146_PSR_PIN1, SAA7146_IER);
  1741. saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
  1742. /* wait for buffer space to open */
  1743. interruptible_sleep_on(&saa->vidq);
  1744. }
  1745. spin_lock_irqsave(&saa->lock, flags);
  1746. if (saa->vidhead <= saa->vidtail) {
  1747. blocksize = 524288 -
  1748. (saa->vidtail - saa->vidhead);
  1749. split = 524288 - saa->vidtail;
  1750. } else {
  1751. blocksize = saa->vidhead - saa->vidtail;
  1752. split = 524288;
  1753. }
  1754. spin_unlock_irqrestore(&saa->lock, flags);
  1755. blocksize--;
  1756. if (blocksize > todo)
  1757. blocksize = todo;
  1758. /* double check that we really have space */
  1759. if (!blocksize)
  1760. return -ENOSPC;
  1761. if (split < blocksize) {
  1762. if (copy_from_user(saa->vidbuf +
  1763. saa->vidtail, buf, split))
  1764. return -EFAULT;
  1765. buf += split;
  1766. todo -= split;
  1767. blocksize -= split;
  1768. saa->vidtail = 0;
  1769. }
  1770. if (copy_from_user(saa->vidbuf + saa->vidtail, buf,
  1771. blocksize))
  1772. return -EFAULT;
  1773. saa->vidtail += blocksize;
  1774. todo -= blocksize;
  1775. buf += blocksize;
  1776. saa->vidtail &= 0x7ffff;
  1777. } else if (saa->writemode == VID_WRITE_OSD) {
  1778. if (count > 131072)
  1779. return -ENOSPC;
  1780. if (copy_from_user(saa->osdbuf, buf, count))
  1781. return -EFAULT;
  1782. buf += count;
  1783. saa->osdhead = 0;
  1784. saa->osdtail = count;
  1785. debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 0, 2);
  1786. debiwrite(saa, debNormal, IBM_MP2_OSD_LINK_ADDR, 0, 2);
  1787. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00d, 2);
  1788. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
  1789. debiread(saa, debNormal,
  1790. IBM_MP2_DISP_MODE, 2) | 1, 2);
  1791. /* trigger osd data transfer */
  1792. saawrite(SAA7146_PSR_DEBI_S |
  1793. SAA7146_PSR_PIN1, SAA7146_IER);
  1794. saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
  1795. }
  1796. }
  1797. return count;
  1798. }
  1799. static int saa_open(struct inode *inode, struct file *file)
  1800. {
  1801. struct video_device *vdev = video_devdata(file);
  1802. struct saa7146 *saa = container_of(vdev, struct saa7146, video_dev);
  1803. file->private_data = saa;
  1804. saa->user++;
  1805. if (saa->user > 1)
  1806. return 0; /* device open already, don't reset */
  1807. saa->writemode = VID_WRITE_MPEG_VID; /* default to video */
  1808. return 0;
  1809. }
  1810. static int saa_release(struct inode *inode, struct file *file)
  1811. {
  1812. struct saa7146 *saa = file->private_data;
  1813. saa->user--;
  1814. if (saa->user > 0) /* still someone using device */
  1815. return 0;
  1816. saawrite(0x007f0000, SAA7146_MC1); /* stop all overlay dma */
  1817. return 0;
  1818. }
  1819. static const struct file_operations saa_fops = {
  1820. .owner = THIS_MODULE,
  1821. .open = saa_open,
  1822. .release = saa_release,
  1823. .ioctl = saa_ioctl,
  1824. #ifdef CONFIG_COMPAT
  1825. .compat_ioctl = v4l_compat_ioctl32,
  1826. #endif
  1827. .read = saa_read,
  1828. .llseek = no_llseek,
  1829. .write = saa_write,
  1830. .mmap = saa_mmap,
  1831. };
  1832. /* template for video_device-structure */
  1833. static struct video_device saa_template = {
  1834. .name = "SAA7146A",
  1835. .fops = &saa_fops,
  1836. .minor = -1,
  1837. };
  1838. static int __devinit configure_saa7146(struct pci_dev *pdev, int num)
  1839. {
  1840. int retval;
  1841. struct saa7146 *saa = pci_get_drvdata(pdev);
  1842. saa->endmarkhead = saa->endmarktail = 0;
  1843. saa->win.x = saa->win.y = 0;
  1844. saa->win.width = saa->win.cropwidth = 720;
  1845. saa->win.height = saa->win.cropheight = 480;
  1846. saa->win.cropx = saa->win.cropy = 0;
  1847. saa->win.bpp = 2;
  1848. saa->win.depth = 16;
  1849. saa->win.color_fmt = palette2fmt[VIDEO_PALETTE_RGB565];
  1850. saa->win.bpl = 1024 * saa->win.bpp;
  1851. saa->win.swidth = 1024;
  1852. saa->win.sheight = 768;
  1853. saa->picture.brightness = 32768;
  1854. saa->picture.contrast = 38768;
  1855. saa->picture.colour = 32768;
  1856. saa->cap = 0;
  1857. saa->nr = num;
  1858. saa->playmode = VID_PLAY_NORMAL;
  1859. memset(saa->boardcfg, 0, 64); /* clear board config area */
  1860. saa->saa7146_mem = NULL;
  1861. saa->dmavid1 = saa->dmavid2 = saa->dmavid3 = saa->dmaa1in =
  1862. saa->dmaa1out = saa->dmaa2in = saa->dmaa2out =
  1863. saa->pagevid1 = saa->pagevid2 = saa->pagevid3 = saa->pagea1in =
  1864. saa->pagea1out = saa->pagea2in = saa->pagea2out =
  1865. saa->pagedebi = saa->dmaRPS1 = saa->dmaRPS2 = saa->pageRPS1 =
  1866. saa->pageRPS2 = NULL;
  1867. saa->audbuf = saa->vidbuf = saa->osdbuf = saa->dmadebi = NULL;
  1868. saa->audhead = saa->vidtail = 0;
  1869. init_waitqueue_head(&saa->i2cq);
  1870. init_waitqueue_head(&saa->audq);
  1871. init_waitqueue_head(&saa->debiq);
  1872. init_waitqueue_head(&saa->vidq);
  1873. spin_lock_init(&saa->lock);
  1874. retval = pci_enable_device(pdev);
  1875. if (retval) {
  1876. dev_err(&pdev->dev, "%d: pci_enable_device failed!\n", num);
  1877. goto err;
  1878. }
  1879. saa->id = pdev->device;
  1880. saa->irq = pdev->irq;
  1881. saa->video_dev.minor = -1;
  1882. saa->saa7146_adr = pci_resource_start(pdev, 0);
  1883. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &saa->revision);
  1884. saa->saa7146_mem = ioremap(saa->saa7146_adr, 0x200);
  1885. if (saa->saa7146_mem == NULL) {
  1886. dev_err(&pdev->dev, "%d: ioremap failed!\n", num);
  1887. retval = -EIO;
  1888. goto err;
  1889. }
  1890. memcpy(&saa->video_dev, &saa_template, sizeof(saa_template));
  1891. saawrite(0, SAA7146_IER); /* turn off all interrupts */
  1892. retval = request_irq(saa->irq, saa7146_irq, IRQF_SHARED | IRQF_DISABLED,
  1893. "stradis", saa);
  1894. if (retval == -EINVAL)
  1895. dev_err(&pdev->dev, "%d: Bad irq number or handler\n", num);
  1896. else if (retval == -EBUSY)
  1897. dev_err(&pdev->dev, "%d: IRQ %ld busy, change your PnP config "
  1898. "in BIOS\n", num, saa->irq);
  1899. if (retval < 0)
  1900. goto errio;
  1901. pci_set_master(pdev);
  1902. retval = video_register_device(&saa->video_dev, VFL_TYPE_GRABBER,
  1903. video_nr);
  1904. if (retval < 0) {
  1905. dev_err(&pdev->dev, "%d: error in registering video device!\n",
  1906. num);
  1907. goto errio;
  1908. }
  1909. return 0;
  1910. errio:
  1911. iounmap(saa->saa7146_mem);
  1912. err:
  1913. return retval;
  1914. }
  1915. static int __devinit init_saa7146(struct pci_dev *pdev)
  1916. {
  1917. struct saa7146 *saa = pci_get_drvdata(pdev);
  1918. saa->user = 0;
  1919. /* reset the saa7146 */
  1920. saawrite(0xffff0000, SAA7146_MC1);
  1921. mdelay(5);
  1922. /* enable debi and i2c transfers and pins */
  1923. saawrite(((SAA7146_MC1_EDP | SAA7146_MC1_EI2C |
  1924. SAA7146_MC1_TR_E_DEBI) << 16) | 0xffff, SAA7146_MC1);
  1925. /* ensure proper state of chip */
  1926. saawrite(0x00000000, SAA7146_PAGE1);
  1927. saawrite(0x00f302c0, SAA7146_NUM_LINE_BYTE1);
  1928. saawrite(0x00000000, SAA7146_PAGE2);
  1929. saawrite(0x01400080, SAA7146_NUM_LINE_BYTE2);
  1930. saawrite(0x00000000, SAA7146_DD1_INIT);
  1931. saawrite(0x00000000, SAA7146_DD1_STREAM_B);
  1932. saawrite(0x00000000, SAA7146_DD1_STREAM_A);
  1933. saawrite(0x00000000, SAA7146_BRS_CTRL);
  1934. saawrite(0x80400040, SAA7146_BCS_CTRL);
  1935. saawrite(0x0000e000 /*| (1<<29) */ , SAA7146_HPS_CTRL);
  1936. saawrite(0x00000060, SAA7146_CLIP_FORMAT_CTRL);
  1937. saawrite(0x00000000, SAA7146_ACON1);
  1938. saawrite(0x00000000, SAA7146_ACON2);
  1939. saawrite(0x00000600, SAA7146_I2C_STATUS);
  1940. saawrite(((SAA7146_MC2_UPLD_D1_B | SAA7146_MC2_UPLD_D1_A |
  1941. SAA7146_MC2_UPLD_BRS | SAA7146_MC2_UPLD_HPS_H |
  1942. SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_DMA2 |
  1943. SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_I2C) << 16) | 0xffff,
  1944. SAA7146_MC2);
  1945. /* setup arbitration control registers */
  1946. saawrite(0x1412121a, SAA7146_PCI_BT_V1);
  1947. /* allocate 32k dma buffer + 4k for page table */
  1948. if ((saa->dmadebi = kmalloc(32768 + 4096, GFP_KERNEL)) == NULL) {
  1949. dev_err(&pdev->dev, "%d: debi kmalloc failed\n", saa->nr);
  1950. goto err;
  1951. }
  1952. #if 0
  1953. saa->pagedebi = saa->dmadebi + 32768; /* top 4k is for mmu */
  1954. saawrite(virt_to_bus(saa->pagedebi) /*|0x800 */ , SAA7146_DEBI_PAGE);
  1955. for (i = 0; i < 12; i++) /* setup mmu page table */
  1956. saa->pagedebi[i] = virt_to_bus((saa->dmadebi + i * 4096));
  1957. #endif
  1958. saa->audhead = saa->vidhead = saa->osdhead = 0;
  1959. saa->audtail = saa->vidtail = saa->osdtail = 0;
  1960. if (saa->vidbuf == NULL && (saa->vidbuf = vmalloc(524288)) == NULL) {
  1961. dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
  1962. goto err;
  1963. }
  1964. if (saa->audbuf == NULL && (saa->audbuf = vmalloc(65536)) == NULL) {
  1965. dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
  1966. goto errfree;
  1967. }
  1968. if (saa->osdbuf == NULL && (saa->osdbuf = vmalloc(131072)) == NULL) {
  1969. dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
  1970. goto errfree;
  1971. }
  1972. /* allocate 81920 byte buffer for clipping */
  1973. if ((saa->dmavid2 = kzalloc(VIDEO_CLIPMAP_SIZE, GFP_KERNEL)) == NULL) {
  1974. dev_err(&pdev->dev, "%d: clip kmalloc failed\n", saa->nr);
  1975. goto errfree;
  1976. }
  1977. /* setup clipping registers */
  1978. saawrite(virt_to_bus(saa->dmavid2), SAA7146_BASE_EVEN2);
  1979. saawrite(virt_to_bus(saa->dmavid2) + 128, SAA7146_BASE_ODD2);
  1980. saawrite(virt_to_bus(saa->dmavid2) + VIDEO_CLIPMAP_SIZE,
  1981. SAA7146_PROT_ADDR2);
  1982. saawrite(256, SAA7146_PITCH2);
  1983. saawrite(4, SAA7146_PAGE2); /* dma direction: read, no byteswap */
  1984. saawrite(((SAA7146_MC2_UPLD_DMA2) << 16) | SAA7146_MC2_UPLD_DMA2,
  1985. SAA7146_MC2);
  1986. I2CBusScan(saa);
  1987. return 0;
  1988. errfree:
  1989. vfree(saa->osdbuf);
  1990. vfree(saa->audbuf);
  1991. vfree(saa->vidbuf);
  1992. saa->audbuf = saa->osdbuf = saa->vidbuf = NULL;
  1993. err:
  1994. return -ENOMEM;
  1995. }
  1996. static void stradis_release_saa(struct pci_dev *pdev)
  1997. {
  1998. u8 command;
  1999. struct saa7146 *saa = pci_get_drvdata(pdev);
  2000. /* turn off all capturing, DMA and IRQs */
  2001. saawrite(0xffff0000, SAA7146_MC1); /* reset chip */
  2002. saawrite(0, SAA7146_MC2);
  2003. saawrite(0, SAA7146_IER);
  2004. saawrite(0xffffffffUL, SAA7146_ISR);
  2005. /* disable PCI bus-mastering */
  2006. pci_read_config_byte(pdev, PCI_COMMAND, &command);
  2007. command &= ~PCI_COMMAND_MASTER;
  2008. pci_write_config_byte(pdev, PCI_COMMAND, command);
  2009. /* unmap and free memory */
  2010. saa->audhead = saa->audtail = saa->osdhead = 0;
  2011. saa->vidhead = saa->vidtail = saa->osdtail = 0;
  2012. vfree(saa->vidbuf);
  2013. vfree(saa->audbuf);
  2014. vfree(saa->osdbuf);
  2015. kfree(saa->dmavid2);
  2016. saa->audbuf = saa->vidbuf = saa->osdbuf = NULL;
  2017. saa->dmavid2 = NULL;
  2018. kfree(saa->dmadebi);
  2019. kfree(saa->dmavid1);
  2020. kfree(saa->dmavid3);
  2021. kfree(saa->dmaa1in);
  2022. kfree(saa->dmaa1out);
  2023. kfree(saa->dmaa2in);
  2024. kfree(saa->dmaa2out);
  2025. kfree(saa->dmaRPS1);
  2026. kfree(saa->dmaRPS2);
  2027. free_irq(saa->irq, saa);
  2028. if (saa->saa7146_mem)
  2029. iounmap(saa->saa7146_mem);
  2030. if (saa->video_dev.minor != -1)
  2031. video_unregister_device(&saa->video_dev);
  2032. }
  2033. static int __devinit stradis_probe(struct pci_dev *pdev,
  2034. const struct pci_device_id *ent)
  2035. {
  2036. int retval = -EINVAL;
  2037. if (saa_num >= SAA7146_MAX)
  2038. goto err;
  2039. if (!pdev->subsystem_vendor)
  2040. dev_info(&pdev->dev, "%d: rev1 decoder\n", saa_num);
  2041. else
  2042. dev_info(&pdev->dev, "%d: SDM2xx found\n", saa_num);
  2043. pci_set_drvdata(pdev, &saa7146s[saa_num]);
  2044. retval = configure_saa7146(pdev, saa_num);
  2045. if (retval) {
  2046. dev_err(&pdev->dev, "%d: error in configuring\n", saa_num);
  2047. goto err;
  2048. }
  2049. if (init_saa7146(pdev) < 0) {
  2050. dev_err(&pdev->dev, "%d: error in initialization\n", saa_num);
  2051. retval = -EIO;
  2052. goto errrel;
  2053. }
  2054. saa_num++;
  2055. return 0;
  2056. errrel:
  2057. stradis_release_saa(pdev);
  2058. err:
  2059. return retval;
  2060. }
  2061. static void __devexit stradis_remove(struct pci_dev *pdev)
  2062. {
  2063. stradis_release_saa(pdev);
  2064. }
  2065. static struct pci_device_id stradis_pci_tbl[] = {
  2066. { PCI_DEVICE(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA7146) },
  2067. { 0 }
  2068. };
  2069. static struct pci_driver stradis_driver = {
  2070. .name = "stradis",
  2071. .id_table = stradis_pci_tbl,
  2072. .probe = stradis_probe,
  2073. .remove = __devexit_p(stradis_remove)
  2074. };
  2075. static int __init stradis_init(void)
  2076. {
  2077. int retval;
  2078. saa_num = 0;
  2079. retval = pci_register_driver(&stradis_driver);
  2080. if (retval)
  2081. printk(KERN_ERR "stradis: Unable to register pci driver.\n");
  2082. return retval;
  2083. }
  2084. static void __exit stradis_exit(void)
  2085. {
  2086. pci_unregister_driver(&stradis_driver);
  2087. printk(KERN_INFO "stradis: module cleanup complete\n");
  2088. }
  2089. module_init(stradis_init);
  2090. module_exit(stradis_exit);