mach-imx6q.c 5.5 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/clkdev.h>
  14. #include <linux/cpuidle.h>
  15. #include <linux/delay.h>
  16. #include <linux/export.h>
  17. #include <linux/init.h>
  18. #include <linux/io.h>
  19. #include <linux/irq.h>
  20. #include <linux/of.h>
  21. #include <linux/of_address.h>
  22. #include <linux/of_irq.h>
  23. #include <linux/of_platform.h>
  24. #include <linux/pinctrl/machine.h>
  25. #include <linux/phy.h>
  26. #include <linux/micrel_phy.h>
  27. #include <linux/mfd/anatop.h>
  28. #include <asm/cpuidle.h>
  29. #include <asm/smp_twd.h>
  30. #include <asm/hardware/cache-l2x0.h>
  31. #include <asm/hardware/gic.h>
  32. #include <asm/mach/arch.h>
  33. #include <asm/mach/time.h>
  34. #include <asm/system_misc.h>
  35. #include <mach/common.h>
  36. #include <mach/cpuidle.h>
  37. #include <mach/hardware.h>
  38. void imx6q_restart(char mode, const char *cmd)
  39. {
  40. struct device_node *np;
  41. void __iomem *wdog_base;
  42. np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
  43. wdog_base = of_iomap(np, 0);
  44. if (!wdog_base)
  45. goto soft;
  46. imx_src_prepare_restart();
  47. /* enable wdog */
  48. writew_relaxed(1 << 2, wdog_base);
  49. /* write twice to ensure the request will not get ignored */
  50. writew_relaxed(1 << 2, wdog_base);
  51. /* wait for reset to assert ... */
  52. mdelay(500);
  53. pr_err("Watchdog reset failed to assert reset\n");
  54. /* delay to allow the serial port to show the message */
  55. mdelay(50);
  56. soft:
  57. /* we'll take a jump through zero as a poor second */
  58. soft_restart(0);
  59. }
  60. /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
  61. static int ksz9021rn_phy_fixup(struct phy_device *phydev)
  62. {
  63. if (IS_ENABLED(CONFIG_PHYLIB)) {
  64. /* min rx data delay */
  65. phy_write(phydev, 0x0b, 0x8105);
  66. phy_write(phydev, 0x0c, 0x0000);
  67. /* max rx/tx clock delay, min rx/tx control delay */
  68. phy_write(phydev, 0x0b, 0x8104);
  69. phy_write(phydev, 0x0c, 0xf0f0);
  70. phy_write(phydev, 0x0b, 0x104);
  71. }
  72. return 0;
  73. }
  74. static void __init imx6q_sabrelite_cko1_setup(void)
  75. {
  76. struct clk *cko1_sel, *ahb, *cko1;
  77. unsigned long rate;
  78. cko1_sel = clk_get_sys(NULL, "cko1_sel");
  79. ahb = clk_get_sys(NULL, "ahb");
  80. cko1 = clk_get_sys(NULL, "cko1");
  81. if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) {
  82. pr_err("cko1 setup failed!\n");
  83. goto put_clk;
  84. }
  85. clk_set_parent(cko1_sel, ahb);
  86. rate = clk_round_rate(cko1, 16000000);
  87. clk_set_rate(cko1, rate);
  88. put_clk:
  89. if (!IS_ERR(cko1_sel))
  90. clk_put(cko1_sel);
  91. if (!IS_ERR(ahb))
  92. clk_put(ahb);
  93. if (!IS_ERR(cko1))
  94. clk_put(cko1);
  95. }
  96. static void __init imx6q_sabrelite_init(void)
  97. {
  98. if (IS_ENABLED(CONFIG_PHYLIB))
  99. phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
  100. ksz9021rn_phy_fixup);
  101. imx6q_sabrelite_cko1_setup();
  102. }
  103. static void __init imx6q_usb_init(void)
  104. {
  105. struct device_node *np;
  106. struct platform_device *pdev = NULL;
  107. struct anatop *adata = NULL;
  108. np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
  109. if (np)
  110. pdev = of_find_device_by_node(np);
  111. if (pdev)
  112. adata = platform_get_drvdata(pdev);
  113. if (!adata) {
  114. if (np)
  115. of_node_put(np);
  116. return;
  117. }
  118. #define HW_ANADIG_USB1_CHRG_DETECT 0x000001b0
  119. #define HW_ANADIG_USB2_CHRG_DETECT 0x00000210
  120. #define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x00100000
  121. #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x00080000
  122. /*
  123. * The external charger detector needs to be disabled,
  124. * or the signal at DP will be poor
  125. */
  126. anatop_write_reg(adata, HW_ANADIG_USB1_CHRG_DETECT,
  127. BM_ANADIG_USB_CHRG_DETECT_EN_B
  128. | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B,
  129. ~0);
  130. anatop_write_reg(adata, HW_ANADIG_USB2_CHRG_DETECT,
  131. BM_ANADIG_USB_CHRG_DETECT_EN_B |
  132. BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B,
  133. ~0);
  134. of_node_put(np);
  135. }
  136. static void __init imx6q_init_machine(void)
  137. {
  138. /*
  139. * This should be removed when all imx6q boards have pinctrl
  140. * states for devices defined in device tree.
  141. */
  142. pinctrl_provide_dummies();
  143. if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
  144. imx6q_sabrelite_init();
  145. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  146. imx6q_pm_init();
  147. imx6q_usb_init();
  148. }
  149. static struct cpuidle_driver imx6q_cpuidle_driver = {
  150. .name = "imx6q_cpuidle",
  151. .owner = THIS_MODULE,
  152. .en_core_tk_irqen = 1,
  153. .states[0] = ARM_CPUIDLE_WFI_STATE,
  154. .state_count = 1,
  155. };
  156. static void __init imx6q_init_late(void)
  157. {
  158. imx_cpuidle_init(&imx6q_cpuidle_driver);
  159. }
  160. static void __init imx6q_map_io(void)
  161. {
  162. imx_lluart_map_io();
  163. imx_scu_map_io();
  164. imx6q_clock_map_io();
  165. }
  166. static const struct of_device_id imx6q_irq_match[] __initconst = {
  167. { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
  168. { /* sentinel */ }
  169. };
  170. static void __init imx6q_init_irq(void)
  171. {
  172. l2x0_of_init(0, ~0UL);
  173. imx_src_init();
  174. imx_gpc_init();
  175. of_irq_init(imx6q_irq_match);
  176. }
  177. static void __init imx6q_timer_init(void)
  178. {
  179. mx6q_clocks_init();
  180. twd_local_timer_of_register();
  181. }
  182. static struct sys_timer imx6q_timer = {
  183. .init = imx6q_timer_init,
  184. };
  185. static const char *imx6q_dt_compat[] __initdata = {
  186. "fsl,imx6q-arm2",
  187. "fsl,imx6q-sabrelite",
  188. "fsl,imx6q-sabresd",
  189. "fsl,imx6q",
  190. NULL,
  191. };
  192. DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
  193. .map_io = imx6q_map_io,
  194. .init_irq = imx6q_init_irq,
  195. .handle_irq = imx6q_handle_irq,
  196. .timer = &imx6q_timer,
  197. .init_machine = imx6q_init_machine,
  198. .init_late = imx6q_init_late,
  199. .dt_compat = imx6q_dt_compat,
  200. .restart = imx6q_restart,
  201. MACHINE_END