mach-cpuimx27.c 6.0 KB

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  1. /*
  2. * Copyright (C) 2009 Eric Benard - eric@eukrea.com
  3. *
  4. * Based on pcm038.c which is :
  5. * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
  6. * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * as published by the Free Software Foundation; either version 2
  11. * of the License, or (at your option) any later version.
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  20. * MA 02110-1301, USA.
  21. */
  22. #include <linux/i2c.h>
  23. #include <linux/io.h>
  24. #include <linux/mtd/plat-ram.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/serial_8250.h>
  28. #include <asm/mach-types.h>
  29. #include <asm/mach/arch.h>
  30. #include <asm/mach/time.h>
  31. #include <asm/mach/map.h>
  32. #include <mach/board-eukrea_cpuimx27.h>
  33. #include <mach/common.h>
  34. #include <mach/hardware.h>
  35. #include <mach/i2c.h>
  36. #include <mach/iomux-mx27.h>
  37. #include <mach/imx-uart.h>
  38. #include <mach/mxc_nand.h>
  39. #include "devices-imx27.h"
  40. #include "devices.h"
  41. static int eukrea_cpuimx27_pins[] = {
  42. /* UART1 */
  43. PE12_PF_UART1_TXD,
  44. PE13_PF_UART1_RXD,
  45. PE14_PF_UART1_CTS,
  46. PE15_PF_UART1_RTS,
  47. /* UART4 */
  48. PB26_AF_UART4_RTS,
  49. PB28_AF_UART4_TXD,
  50. PB29_AF_UART4_CTS,
  51. PB31_AF_UART4_RXD,
  52. /* FEC */
  53. PD0_AIN_FEC_TXD0,
  54. PD1_AIN_FEC_TXD1,
  55. PD2_AIN_FEC_TXD2,
  56. PD3_AIN_FEC_TXD3,
  57. PD4_AOUT_FEC_RX_ER,
  58. PD5_AOUT_FEC_RXD1,
  59. PD6_AOUT_FEC_RXD2,
  60. PD7_AOUT_FEC_RXD3,
  61. PD8_AF_FEC_MDIO,
  62. PD9_AIN_FEC_MDC,
  63. PD10_AOUT_FEC_CRS,
  64. PD11_AOUT_FEC_TX_CLK,
  65. PD12_AOUT_FEC_RXD0,
  66. PD13_AOUT_FEC_RX_DV,
  67. PD14_AOUT_FEC_RX_CLK,
  68. PD15_AOUT_FEC_COL,
  69. PD16_AIN_FEC_TX_ER,
  70. PF23_AIN_FEC_TX_EN,
  71. /* I2C1 */
  72. PD17_PF_I2C_DATA,
  73. PD18_PF_I2C_CLK,
  74. /* SDHC2 */
  75. PB4_PF_SD2_D0,
  76. PB5_PF_SD2_D1,
  77. PB6_PF_SD2_D2,
  78. PB7_PF_SD2_D3,
  79. PB8_PF_SD2_CMD,
  80. PB9_PF_SD2_CLK,
  81. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  82. /* Quad UART's IRQ */
  83. GPIO_PORTD | 22 | GPIO_GPIO | GPIO_IN,
  84. GPIO_PORTD | 23 | GPIO_GPIO | GPIO_IN,
  85. GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN,
  86. GPIO_PORTD | 30 | GPIO_GPIO | GPIO_IN,
  87. #endif
  88. };
  89. static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
  90. .width = 2,
  91. };
  92. static struct resource eukrea_cpuimx27_flash_resource = {
  93. .start = 0xc0000000,
  94. .end = 0xc3ffffff,
  95. .flags = IORESOURCE_MEM,
  96. };
  97. static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
  98. .name = "physmap-flash",
  99. .id = 0,
  100. .dev = {
  101. .platform_data = &eukrea_cpuimx27_flash_data,
  102. },
  103. .num_resources = 1,
  104. .resource = &eukrea_cpuimx27_flash_resource,
  105. };
  106. static struct imxuart_platform_data uart_pdata[] = {
  107. {
  108. .flags = IMXUART_HAVE_RTSCTS,
  109. }, {
  110. .flags = IMXUART_HAVE_RTSCTS,
  111. },
  112. };
  113. static const struct mxc_nand_platform_data
  114. cpuimx27_nand_board_info __initconst = {
  115. .width = 1,
  116. .hw_ecc = 1,
  117. };
  118. static struct platform_device *platform_devices[] __initdata = {
  119. &eukrea_cpuimx27_nor_mtd_device,
  120. &mxc_fec_device,
  121. };
  122. static struct imxi2c_platform_data eukrea_cpuimx27_i2c_1_data = {
  123. .bitrate = 100000,
  124. };
  125. static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
  126. {
  127. I2C_BOARD_INFO("pcf8563", 0x51),
  128. },
  129. };
  130. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  131. static struct plat_serial8250_port serial_platform_data[] = {
  132. {
  133. .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
  134. .irq = IRQ_GPIOB(23),
  135. .uartclk = 14745600,
  136. .regshift = 1,
  137. .iotype = UPIO_MEM,
  138. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
  139. }, {
  140. .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
  141. .irq = IRQ_GPIOB(22),
  142. .uartclk = 14745600,
  143. .regshift = 1,
  144. .iotype = UPIO_MEM,
  145. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
  146. }, {
  147. .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
  148. .irq = IRQ_GPIOB(27),
  149. .uartclk = 14745600,
  150. .regshift = 1,
  151. .iotype = UPIO_MEM,
  152. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
  153. }, {
  154. .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
  155. .irq = IRQ_GPIOB(30),
  156. .uartclk = 14745600,
  157. .regshift = 1,
  158. .iotype = UPIO_MEM,
  159. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
  160. }, {
  161. }
  162. };
  163. static struct platform_device serial_device = {
  164. .name = "serial8250",
  165. .id = 0,
  166. .dev = {
  167. .platform_data = serial_platform_data,
  168. },
  169. };
  170. #endif
  171. static void __init eukrea_cpuimx27_init(void)
  172. {
  173. mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
  174. ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
  175. mxc_register_device(&imx2x_uart_device0, &uart_pdata[0]);
  176. imx27_add_mxc_nand(&cpuimx27_nand_board_info);
  177. i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
  178. ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
  179. mxc_register_device(&mxc_i2c_device0, &eukrea_cpuimx27_i2c_1_data);
  180. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  181. #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
  182. /* SDHC2 can be used for Wifi */
  183. mxc_register_device(&mxc_sdhc_device1, NULL);
  184. /* in which case UART4 is also used for Bluetooth */
  185. mxc_register_device(&imx2x_uart_device3, &uart_pdata[1]);
  186. #endif
  187. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  188. platform_device_register(&serial_device);
  189. #endif
  190. #ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
  191. eukrea_mbimx27_baseboard_init();
  192. #endif
  193. }
  194. static void __init eukrea_cpuimx27_timer_init(void)
  195. {
  196. mx27_clocks_init(26000000);
  197. }
  198. static struct sys_timer eukrea_cpuimx27_timer = {
  199. .init = eukrea_cpuimx27_timer_init,
  200. };
  201. MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
  202. .phys_io = MX27_AIPI_BASE_ADDR,
  203. .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
  204. .boot_params = MX27_PHYS_OFFSET + 0x100,
  205. .map_io = mx27_map_io,
  206. .init_irq = mx27_init_irq,
  207. .init_machine = eukrea_cpuimx27_init,
  208. .timer = &eukrea_cpuimx27_timer,
  209. MACHINE_END