e1000_main.c 105 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2004 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 5.3.12 6/7/04
  23. * - kcompat NETIF_MSG for older kernels (2.4.9) <sean.p.mcdermott@intel.com>
  24. * - if_mii support and associated kcompat for older kernels
  25. * - More errlogging support from Jon Mason <jonmason@us.ibm.com>
  26. * - Fix TSO issues on PPC64 machines -- Jon Mason <jonmason@us.ibm.com>
  27. *
  28. * 5.7.1 12/16/04
  29. * - Resurrect 82547EI/GI related fix in e1000_intr to avoid deadlocks. This
  30. * fix was removed as it caused system instability. The suspected cause of
  31. * this is the called to e1000_irq_disable in e1000_intr. Inlined the
  32. * required piece of e1000_irq_disable into e1000_intr - Anton Blanchard
  33. * 5.7.0 12/10/04
  34. * - include fix to the condition that determines when to quit NAPI - Robert Olsson
  35. * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
  36. * 5.6.5 11/01/04
  37. * - Enabling NETIF_F_SG without checksum offload is illegal -
  38. John Mason <jdmason@us.ibm.com>
  39. * 5.6.3 10/26/04
  40. * - Remove redundant initialization - Jamal Hadi
  41. * - Reset buffer_info->dma in tx resource cleanup logic
  42. * 5.6.2 10/12/04
  43. * - Avoid filling tx_ring completely - shemminger@osdl.org
  44. * - Replace schedule_timeout() with msleep()/msleep_interruptible() -
  45. * nacc@us.ibm.com
  46. * - Sparse cleanup - shemminger@osdl.org
  47. * - Fix tx resource cleanup logic
  48. * - LLTX support - ak@suse.de and hadi@cyberus.ca
  49. */
  50. char e1000_driver_name[] = "e1000";
  51. char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  52. #ifndef CONFIG_E1000_NAPI
  53. #define DRIVERNAPI
  54. #else
  55. #define DRIVERNAPI "-NAPI"
  56. #endif
  57. #define DRV_VERSION "5.7.6-k2"DRIVERNAPI
  58. char e1000_driver_version[] = DRV_VERSION;
  59. char e1000_copyright[] = "Copyright (c) 1999-2004 Intel Corporation.";
  60. /* e1000_pci_tbl - PCI Device ID Table
  61. *
  62. * Last entry must be all 0s
  63. *
  64. * Macro expands to...
  65. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  66. */
  67. static struct pci_device_id e1000_pci_tbl[] = {
  68. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  69. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  70. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  71. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  72. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  73. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  74. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  75. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  76. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  77. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  78. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  79. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  80. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  81. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  82. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  83. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  84. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  85. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  86. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  87. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  88. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  89. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  90. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  91. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  92. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  93. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  94. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  95. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  96. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  97. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  98. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  99. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  100. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  101. /* required last entry */
  102. {0,}
  103. };
  104. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  105. int e1000_up(struct e1000_adapter *adapter);
  106. void e1000_down(struct e1000_adapter *adapter);
  107. void e1000_reset(struct e1000_adapter *adapter);
  108. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  109. int e1000_setup_tx_resources(struct e1000_adapter *adapter);
  110. int e1000_setup_rx_resources(struct e1000_adapter *adapter);
  111. void e1000_free_tx_resources(struct e1000_adapter *adapter);
  112. void e1000_free_rx_resources(struct e1000_adapter *adapter);
  113. void e1000_update_stats(struct e1000_adapter *adapter);
  114. /* Local Function Prototypes */
  115. static int e1000_init_module(void);
  116. static void e1000_exit_module(void);
  117. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  118. static void __devexit e1000_remove(struct pci_dev *pdev);
  119. static int e1000_sw_init(struct e1000_adapter *adapter);
  120. static int e1000_open(struct net_device *netdev);
  121. static int e1000_close(struct net_device *netdev);
  122. static void e1000_configure_tx(struct e1000_adapter *adapter);
  123. static void e1000_configure_rx(struct e1000_adapter *adapter);
  124. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  125. static void e1000_clean_tx_ring(struct e1000_adapter *adapter);
  126. static void e1000_clean_rx_ring(struct e1000_adapter *adapter);
  127. static void e1000_set_multi(struct net_device *netdev);
  128. static void e1000_update_phy_info(unsigned long data);
  129. static void e1000_watchdog(unsigned long data);
  130. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  131. static void e1000_82547_tx_fifo_stall(unsigned long data);
  132. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  133. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  134. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  135. static int e1000_set_mac(struct net_device *netdev, void *p);
  136. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  137. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter);
  138. #ifdef CONFIG_E1000_NAPI
  139. static int e1000_clean(struct net_device *netdev, int *budget);
  140. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  141. int *work_done, int work_to_do);
  142. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  143. int *work_done, int work_to_do);
  144. #else
  145. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter);
  146. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter);
  147. #endif
  148. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter);
  149. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter);
  150. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  151. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  152. int cmd);
  153. void e1000_set_ethtool_ops(struct net_device *netdev);
  154. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  155. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  156. static void e1000_tx_timeout(struct net_device *dev);
  157. static void e1000_tx_timeout_task(struct net_device *dev);
  158. static void e1000_smartspeed(struct e1000_adapter *adapter);
  159. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  160. struct sk_buff *skb);
  161. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  162. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  163. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  164. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  165. static int e1000_notify_reboot(struct notifier_block *, unsigned long event, void *ptr);
  166. static int e1000_suspend(struct pci_dev *pdev, uint32_t state);
  167. #ifdef CONFIG_PM
  168. static int e1000_resume(struct pci_dev *pdev);
  169. #endif
  170. #ifdef CONFIG_NET_POLL_CONTROLLER
  171. /* for netdump / net console */
  172. static void e1000_netpoll (struct net_device *netdev);
  173. #endif
  174. struct notifier_block e1000_notifier_reboot = {
  175. .notifier_call = e1000_notify_reboot,
  176. .next = NULL,
  177. .priority = 0
  178. };
  179. /* Exported from other modules */
  180. extern void e1000_check_options(struct e1000_adapter *adapter);
  181. static struct pci_driver e1000_driver = {
  182. .name = e1000_driver_name,
  183. .id_table = e1000_pci_tbl,
  184. .probe = e1000_probe,
  185. .remove = __devexit_p(e1000_remove),
  186. /* Power Managment Hooks */
  187. #ifdef CONFIG_PM
  188. .suspend = e1000_suspend,
  189. .resume = e1000_resume
  190. #endif
  191. };
  192. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  193. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  194. MODULE_LICENSE("GPL");
  195. MODULE_VERSION(DRV_VERSION);
  196. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  197. module_param(debug, int, 0);
  198. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  199. /**
  200. * e1000_init_module - Driver Registration Routine
  201. *
  202. * e1000_init_module is the first routine called when the driver is
  203. * loaded. All it does is register with the PCI subsystem.
  204. **/
  205. static int __init
  206. e1000_init_module(void)
  207. {
  208. int ret;
  209. printk(KERN_INFO "%s - version %s\n",
  210. e1000_driver_string, e1000_driver_version);
  211. printk(KERN_INFO "%s\n", e1000_copyright);
  212. ret = pci_module_init(&e1000_driver);
  213. if(ret >= 0) {
  214. register_reboot_notifier(&e1000_notifier_reboot);
  215. }
  216. return ret;
  217. }
  218. module_init(e1000_init_module);
  219. /**
  220. * e1000_exit_module - Driver Exit Cleanup Routine
  221. *
  222. * e1000_exit_module is called just before the driver is removed
  223. * from memory.
  224. **/
  225. static void __exit
  226. e1000_exit_module(void)
  227. {
  228. unregister_reboot_notifier(&e1000_notifier_reboot);
  229. pci_unregister_driver(&e1000_driver);
  230. }
  231. module_exit(e1000_exit_module);
  232. /**
  233. * e1000_irq_disable - Mask off interrupt generation on the NIC
  234. * @adapter: board private structure
  235. **/
  236. static inline void
  237. e1000_irq_disable(struct e1000_adapter *adapter)
  238. {
  239. atomic_inc(&adapter->irq_sem);
  240. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  241. E1000_WRITE_FLUSH(&adapter->hw);
  242. synchronize_irq(adapter->pdev->irq);
  243. }
  244. /**
  245. * e1000_irq_enable - Enable default interrupt generation settings
  246. * @adapter: board private structure
  247. **/
  248. static inline void
  249. e1000_irq_enable(struct e1000_adapter *adapter)
  250. {
  251. if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
  252. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  253. E1000_WRITE_FLUSH(&adapter->hw);
  254. }
  255. }
  256. void
  257. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  258. {
  259. struct net_device *netdev = adapter->netdev;
  260. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  261. uint16_t old_vid = adapter->mng_vlan_id;
  262. if(adapter->vlgrp) {
  263. if(!adapter->vlgrp->vlan_devices[vid]) {
  264. if(adapter->hw.mng_cookie.status &
  265. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  266. e1000_vlan_rx_add_vid(netdev, vid);
  267. adapter->mng_vlan_id = vid;
  268. } else
  269. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  270. if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  271. (vid != old_vid) &&
  272. !adapter->vlgrp->vlan_devices[old_vid])
  273. e1000_vlan_rx_kill_vid(netdev, old_vid);
  274. }
  275. }
  276. }
  277. int
  278. e1000_up(struct e1000_adapter *adapter)
  279. {
  280. struct net_device *netdev = adapter->netdev;
  281. int err;
  282. /* hardware has been reset, we need to reload some things */
  283. /* Reset the PHY if it was previously powered down */
  284. if(adapter->hw.media_type == e1000_media_type_copper) {
  285. uint16_t mii_reg;
  286. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  287. if(mii_reg & MII_CR_POWER_DOWN)
  288. e1000_phy_reset(&adapter->hw);
  289. }
  290. e1000_set_multi(netdev);
  291. e1000_restore_vlan(adapter);
  292. e1000_configure_tx(adapter);
  293. e1000_setup_rctl(adapter);
  294. e1000_configure_rx(adapter);
  295. adapter->alloc_rx_buf(adapter);
  296. #ifdef CONFIG_PCI_MSI
  297. if(adapter->hw.mac_type > e1000_82547_rev_2) {
  298. adapter->have_msi = TRUE;
  299. if((err = pci_enable_msi(adapter->pdev))) {
  300. DPRINTK(PROBE, ERR,
  301. "Unable to allocate MSI interrupt Error: %d\n", err);
  302. adapter->have_msi = FALSE;
  303. }
  304. }
  305. #endif
  306. if((err = request_irq(adapter->pdev->irq, &e1000_intr,
  307. SA_SHIRQ | SA_SAMPLE_RANDOM,
  308. netdev->name, netdev)))
  309. return err;
  310. mod_timer(&adapter->watchdog_timer, jiffies);
  311. #ifdef CONFIG_E1000_NAPI
  312. netif_poll_enable(netdev);
  313. #endif
  314. e1000_irq_enable(adapter);
  315. return 0;
  316. }
  317. void
  318. e1000_down(struct e1000_adapter *adapter)
  319. {
  320. struct net_device *netdev = adapter->netdev;
  321. e1000_irq_disable(adapter);
  322. free_irq(adapter->pdev->irq, netdev);
  323. #ifdef CONFIG_PCI_MSI
  324. if(adapter->hw.mac_type > e1000_82547_rev_2 &&
  325. adapter->have_msi == TRUE)
  326. pci_disable_msi(adapter->pdev);
  327. #endif
  328. del_timer_sync(&adapter->tx_fifo_stall_timer);
  329. del_timer_sync(&adapter->watchdog_timer);
  330. del_timer_sync(&adapter->phy_info_timer);
  331. #ifdef CONFIG_E1000_NAPI
  332. netif_poll_disable(netdev);
  333. #endif
  334. adapter->link_speed = 0;
  335. adapter->link_duplex = 0;
  336. netif_carrier_off(netdev);
  337. netif_stop_queue(netdev);
  338. e1000_reset(adapter);
  339. e1000_clean_tx_ring(adapter);
  340. e1000_clean_rx_ring(adapter);
  341. /* If WoL is not enabled
  342. * and management mode is not IAMT
  343. * Power down the PHY so no link is implied when interface is down */
  344. if(!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  345. adapter->hw.media_type == e1000_media_type_copper &&
  346. !e1000_check_mng_mode(&adapter->hw) &&
  347. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN)) {
  348. uint16_t mii_reg;
  349. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  350. mii_reg |= MII_CR_POWER_DOWN;
  351. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  352. mdelay(1);
  353. }
  354. }
  355. void
  356. e1000_reset(struct e1000_adapter *adapter)
  357. {
  358. uint32_t pba, manc;
  359. /* Repartition Pba for greater than 9k mtu
  360. * To take effect CTRL.RST is required.
  361. */
  362. switch (adapter->hw.mac_type) {
  363. case e1000_82547:
  364. case e1000_82547_rev_2:
  365. pba = E1000_PBA_30K;
  366. break;
  367. case e1000_82573:
  368. pba = E1000_PBA_12K;
  369. break;
  370. default:
  371. pba = E1000_PBA_48K;
  372. break;
  373. }
  374. if(adapter->hw.mac_type == e1000_82547) {
  375. adapter->tx_fifo_head = 0;
  376. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  377. adapter->tx_fifo_size =
  378. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  379. atomic_set(&adapter->tx_fifo_stall, 0);
  380. }
  381. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  382. /* flow control settings */
  383. adapter->hw.fc_high_water = (pba << E1000_PBA_BYTES_SHIFT) -
  384. E1000_FC_HIGH_DIFF;
  385. adapter->hw.fc_low_water = (pba << E1000_PBA_BYTES_SHIFT) -
  386. E1000_FC_LOW_DIFF;
  387. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  388. adapter->hw.fc_send_xon = 1;
  389. adapter->hw.fc = adapter->hw.original_fc;
  390. /* Allow time for pending master requests to run */
  391. e1000_reset_hw(&adapter->hw);
  392. if(adapter->hw.mac_type >= e1000_82544)
  393. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  394. if(e1000_init_hw(&adapter->hw))
  395. DPRINTK(PROBE, ERR, "Hardware Error\n");
  396. e1000_update_mng_vlan(adapter);
  397. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  398. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  399. e1000_reset_adaptive(&adapter->hw);
  400. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  401. if (adapter->en_mng_pt) {
  402. manc = E1000_READ_REG(&adapter->hw, MANC);
  403. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  404. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  405. }
  406. }
  407. /**
  408. * e1000_probe - Device Initialization Routine
  409. * @pdev: PCI device information struct
  410. * @ent: entry in e1000_pci_tbl
  411. *
  412. * Returns 0 on success, negative on failure
  413. *
  414. * e1000_probe initializes an adapter identified by a pci_dev structure.
  415. * The OS initialization, configuring of the adapter private structure,
  416. * and a hardware reset occur.
  417. **/
  418. static int __devinit
  419. e1000_probe(struct pci_dev *pdev,
  420. const struct pci_device_id *ent)
  421. {
  422. struct net_device *netdev;
  423. struct e1000_adapter *adapter;
  424. unsigned long mmio_start, mmio_len;
  425. uint32_t swsm;
  426. static int cards_found = 0;
  427. int i, err, pci_using_dac;
  428. uint16_t eeprom_data;
  429. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  430. if((err = pci_enable_device(pdev)))
  431. return err;
  432. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  433. pci_using_dac = 1;
  434. } else {
  435. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  436. E1000_ERR("No usable DMA configuration, aborting\n");
  437. return err;
  438. }
  439. pci_using_dac = 0;
  440. }
  441. if((err = pci_request_regions(pdev, e1000_driver_name)))
  442. return err;
  443. pci_set_master(pdev);
  444. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  445. if(!netdev) {
  446. err = -ENOMEM;
  447. goto err_alloc_etherdev;
  448. }
  449. SET_MODULE_OWNER(netdev);
  450. SET_NETDEV_DEV(netdev, &pdev->dev);
  451. pci_set_drvdata(pdev, netdev);
  452. adapter = netdev->priv;
  453. adapter->netdev = netdev;
  454. adapter->pdev = pdev;
  455. adapter->hw.back = adapter;
  456. adapter->msg_enable = (1 << debug) - 1;
  457. mmio_start = pci_resource_start(pdev, BAR_0);
  458. mmio_len = pci_resource_len(pdev, BAR_0);
  459. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  460. if(!adapter->hw.hw_addr) {
  461. err = -EIO;
  462. goto err_ioremap;
  463. }
  464. for(i = BAR_1; i <= BAR_5; i++) {
  465. if(pci_resource_len(pdev, i) == 0)
  466. continue;
  467. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  468. adapter->hw.io_base = pci_resource_start(pdev, i);
  469. break;
  470. }
  471. }
  472. netdev->open = &e1000_open;
  473. netdev->stop = &e1000_close;
  474. netdev->hard_start_xmit = &e1000_xmit_frame;
  475. netdev->get_stats = &e1000_get_stats;
  476. netdev->set_multicast_list = &e1000_set_multi;
  477. netdev->set_mac_address = &e1000_set_mac;
  478. netdev->change_mtu = &e1000_change_mtu;
  479. netdev->do_ioctl = &e1000_ioctl;
  480. e1000_set_ethtool_ops(netdev);
  481. netdev->tx_timeout = &e1000_tx_timeout;
  482. netdev->watchdog_timeo = 5 * HZ;
  483. #ifdef CONFIG_E1000_NAPI
  484. netdev->poll = &e1000_clean;
  485. netdev->weight = 64;
  486. #endif
  487. netdev->vlan_rx_register = e1000_vlan_rx_register;
  488. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  489. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  490. #ifdef CONFIG_NET_POLL_CONTROLLER
  491. netdev->poll_controller = e1000_netpoll;
  492. #endif
  493. strcpy(netdev->name, pci_name(pdev));
  494. netdev->mem_start = mmio_start;
  495. netdev->mem_end = mmio_start + mmio_len;
  496. netdev->base_addr = adapter->hw.io_base;
  497. adapter->bd_number = cards_found;
  498. /* setup the private structure */
  499. if((err = e1000_sw_init(adapter)))
  500. goto err_sw_init;
  501. if((err = e1000_check_phy_reset_block(&adapter->hw)))
  502. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  503. if(adapter->hw.mac_type >= e1000_82543) {
  504. netdev->features = NETIF_F_SG |
  505. NETIF_F_HW_CSUM |
  506. NETIF_F_HW_VLAN_TX |
  507. NETIF_F_HW_VLAN_RX |
  508. NETIF_F_HW_VLAN_FILTER;
  509. }
  510. #ifdef NETIF_F_TSO
  511. if((adapter->hw.mac_type >= e1000_82544) &&
  512. (adapter->hw.mac_type != e1000_82547))
  513. netdev->features |= NETIF_F_TSO;
  514. #ifdef NETIF_F_TSO_IPV6
  515. if(adapter->hw.mac_type > e1000_82547_rev_2)
  516. netdev->features |= NETIF_F_TSO_IPV6;
  517. #endif
  518. #endif
  519. if(pci_using_dac)
  520. netdev->features |= NETIF_F_HIGHDMA;
  521. /* hard_start_xmit is safe against parallel locking */
  522. netdev->features |= NETIF_F_LLTX;
  523. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  524. /* before reading the EEPROM, reset the controller to
  525. * put the device in a known good starting state */
  526. e1000_reset_hw(&adapter->hw);
  527. /* make sure the EEPROM is good */
  528. if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  529. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  530. err = -EIO;
  531. goto err_eeprom;
  532. }
  533. /* copy the MAC address out of the EEPROM */
  534. if (e1000_read_mac_addr(&adapter->hw))
  535. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  536. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  537. if(!is_valid_ether_addr(netdev->dev_addr)) {
  538. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  539. err = -EIO;
  540. goto err_eeprom;
  541. }
  542. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  543. e1000_get_bus_info(&adapter->hw);
  544. init_timer(&adapter->tx_fifo_stall_timer);
  545. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  546. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  547. init_timer(&adapter->watchdog_timer);
  548. adapter->watchdog_timer.function = &e1000_watchdog;
  549. adapter->watchdog_timer.data = (unsigned long) adapter;
  550. INIT_WORK(&adapter->watchdog_task,
  551. (void (*)(void *))e1000_watchdog_task, adapter);
  552. init_timer(&adapter->phy_info_timer);
  553. adapter->phy_info_timer.function = &e1000_update_phy_info;
  554. adapter->phy_info_timer.data = (unsigned long) adapter;
  555. INIT_WORK(&adapter->tx_timeout_task,
  556. (void (*)(void *))e1000_tx_timeout_task, netdev);
  557. /* we're going to reset, so assume we have no link for now */
  558. netif_carrier_off(netdev);
  559. netif_stop_queue(netdev);
  560. e1000_check_options(adapter);
  561. /* Initial Wake on LAN setting
  562. * If APM wake is enabled in the EEPROM,
  563. * enable the ACPI Magic Packet filter
  564. */
  565. switch(adapter->hw.mac_type) {
  566. case e1000_82542_rev2_0:
  567. case e1000_82542_rev2_1:
  568. case e1000_82543:
  569. break;
  570. case e1000_82544:
  571. e1000_read_eeprom(&adapter->hw,
  572. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  573. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  574. break;
  575. case e1000_82546:
  576. case e1000_82546_rev_3:
  577. if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
  578. && (adapter->hw.media_type == e1000_media_type_copper)) {
  579. e1000_read_eeprom(&adapter->hw,
  580. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  581. break;
  582. }
  583. /* Fall Through */
  584. default:
  585. e1000_read_eeprom(&adapter->hw,
  586. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  587. break;
  588. }
  589. if(eeprom_data & eeprom_apme_mask)
  590. adapter->wol |= E1000_WUFC_MAG;
  591. /* reset the hardware with the new settings */
  592. e1000_reset(adapter);
  593. /* Let firmware know the driver has taken over */
  594. switch(adapter->hw.mac_type) {
  595. case e1000_82573:
  596. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  597. E1000_WRITE_REG(&adapter->hw, SWSM,
  598. swsm | E1000_SWSM_DRV_LOAD);
  599. break;
  600. default:
  601. break;
  602. }
  603. strcpy(netdev->name, "eth%d");
  604. if((err = register_netdev(netdev)))
  605. goto err_register;
  606. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  607. cards_found++;
  608. return 0;
  609. err_register:
  610. err_sw_init:
  611. err_eeprom:
  612. iounmap(adapter->hw.hw_addr);
  613. err_ioremap:
  614. free_netdev(netdev);
  615. err_alloc_etherdev:
  616. pci_release_regions(pdev);
  617. return err;
  618. }
  619. /**
  620. * e1000_remove - Device Removal Routine
  621. * @pdev: PCI device information struct
  622. *
  623. * e1000_remove is called by the PCI subsystem to alert the driver
  624. * that it should release a PCI device. The could be caused by a
  625. * Hot-Plug event, or because the driver is going to be removed from
  626. * memory.
  627. **/
  628. static void __devexit
  629. e1000_remove(struct pci_dev *pdev)
  630. {
  631. struct net_device *netdev = pci_get_drvdata(pdev);
  632. struct e1000_adapter *adapter = netdev->priv;
  633. uint32_t manc, swsm;
  634. flush_scheduled_work();
  635. if(adapter->hw.mac_type >= e1000_82540 &&
  636. adapter->hw.media_type == e1000_media_type_copper) {
  637. manc = E1000_READ_REG(&adapter->hw, MANC);
  638. if(manc & E1000_MANC_SMBUS_EN) {
  639. manc |= E1000_MANC_ARP_EN;
  640. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  641. }
  642. }
  643. switch(adapter->hw.mac_type) {
  644. case e1000_82573:
  645. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  646. E1000_WRITE_REG(&adapter->hw, SWSM,
  647. swsm & ~E1000_SWSM_DRV_LOAD);
  648. break;
  649. default:
  650. break;
  651. }
  652. unregister_netdev(netdev);
  653. if(!e1000_check_phy_reset_block(&adapter->hw))
  654. e1000_phy_hw_reset(&adapter->hw);
  655. iounmap(adapter->hw.hw_addr);
  656. pci_release_regions(pdev);
  657. free_netdev(netdev);
  658. pci_disable_device(pdev);
  659. }
  660. /**
  661. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  662. * @adapter: board private structure to initialize
  663. *
  664. * e1000_sw_init initializes the Adapter private data structure.
  665. * Fields are initialized based on PCI device information and
  666. * OS network device settings (MTU size).
  667. **/
  668. static int __devinit
  669. e1000_sw_init(struct e1000_adapter *adapter)
  670. {
  671. struct e1000_hw *hw = &adapter->hw;
  672. struct net_device *netdev = adapter->netdev;
  673. struct pci_dev *pdev = adapter->pdev;
  674. /* PCI config space info */
  675. hw->vendor_id = pdev->vendor;
  676. hw->device_id = pdev->device;
  677. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  678. hw->subsystem_id = pdev->subsystem_device;
  679. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  680. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  681. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  682. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  683. hw->max_frame_size = netdev->mtu +
  684. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  685. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  686. /* identify the MAC */
  687. if(e1000_set_mac_type(hw)) {
  688. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  689. return -EIO;
  690. }
  691. /* initialize eeprom parameters */
  692. if(e1000_init_eeprom_params(hw)) {
  693. E1000_ERR("EEPROM initialization failed\n");
  694. return -EIO;
  695. }
  696. switch(hw->mac_type) {
  697. default:
  698. break;
  699. case e1000_82541:
  700. case e1000_82547:
  701. case e1000_82541_rev_2:
  702. case e1000_82547_rev_2:
  703. hw->phy_init_script = 1;
  704. break;
  705. }
  706. e1000_set_media_type(hw);
  707. hw->wait_autoneg_complete = FALSE;
  708. hw->tbi_compatibility_en = TRUE;
  709. hw->adaptive_ifs = TRUE;
  710. /* Copper options */
  711. if(hw->media_type == e1000_media_type_copper) {
  712. hw->mdix = AUTO_ALL_MODES;
  713. hw->disable_polarity_correction = FALSE;
  714. hw->master_slave = E1000_MASTER_SLAVE;
  715. }
  716. atomic_set(&adapter->irq_sem, 1);
  717. spin_lock_init(&adapter->stats_lock);
  718. spin_lock_init(&adapter->tx_lock);
  719. return 0;
  720. }
  721. /**
  722. * e1000_open - Called when a network interface is made active
  723. * @netdev: network interface device structure
  724. *
  725. * Returns 0 on success, negative value on failure
  726. *
  727. * The open entry point is called when a network interface is made
  728. * active by the system (IFF_UP). At this point all resources needed
  729. * for transmit and receive operations are allocated, the interrupt
  730. * handler is registered with the OS, the watchdog timer is started,
  731. * and the stack is notified that the interface is ready.
  732. **/
  733. static int
  734. e1000_open(struct net_device *netdev)
  735. {
  736. struct e1000_adapter *adapter = netdev->priv;
  737. int err;
  738. /* allocate transmit descriptors */
  739. if((err = e1000_setup_tx_resources(adapter)))
  740. goto err_setup_tx;
  741. /* allocate receive descriptors */
  742. if((err = e1000_setup_rx_resources(adapter)))
  743. goto err_setup_rx;
  744. if((err = e1000_up(adapter)))
  745. goto err_up;
  746. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  747. if((adapter->hw.mng_cookie.status &
  748. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  749. e1000_update_mng_vlan(adapter);
  750. }
  751. return E1000_SUCCESS;
  752. err_up:
  753. e1000_free_rx_resources(adapter);
  754. err_setup_rx:
  755. e1000_free_tx_resources(adapter);
  756. err_setup_tx:
  757. e1000_reset(adapter);
  758. return err;
  759. }
  760. /**
  761. * e1000_close - Disables a network interface
  762. * @netdev: network interface device structure
  763. *
  764. * Returns 0, this is not allowed to fail
  765. *
  766. * The close entry point is called when an interface is de-activated
  767. * by the OS. The hardware is still under the drivers control, but
  768. * needs to be disabled. A global MAC reset is issued to stop the
  769. * hardware, and all transmit and receive resources are freed.
  770. **/
  771. static int
  772. e1000_close(struct net_device *netdev)
  773. {
  774. struct e1000_adapter *adapter = netdev->priv;
  775. e1000_down(adapter);
  776. e1000_free_tx_resources(adapter);
  777. e1000_free_rx_resources(adapter);
  778. if((adapter->hw.mng_cookie.status &
  779. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  780. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  781. }
  782. return 0;
  783. }
  784. /**
  785. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  786. * @adapter: address of board private structure
  787. * @start: address of beginning of memory
  788. * @len: length of memory
  789. **/
  790. static inline boolean_t
  791. e1000_check_64k_bound(struct e1000_adapter *adapter,
  792. void *start, unsigned long len)
  793. {
  794. unsigned long begin = (unsigned long) start;
  795. unsigned long end = begin + len;
  796. /* first rev 82545 and 82546 need to not allow any memory
  797. * write location to cross a 64k boundary due to errata 23 */
  798. if (adapter->hw.mac_type == e1000_82545 ||
  799. adapter->hw.mac_type == e1000_82546 ) {
  800. /* check buffer doesn't cross 64kB */
  801. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  802. }
  803. return TRUE;
  804. }
  805. /**
  806. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  807. * @adapter: board private structure
  808. *
  809. * Return 0 on success, negative on failure
  810. **/
  811. int
  812. e1000_setup_tx_resources(struct e1000_adapter *adapter)
  813. {
  814. struct e1000_desc_ring *txdr = &adapter->tx_ring;
  815. struct pci_dev *pdev = adapter->pdev;
  816. int size;
  817. size = sizeof(struct e1000_buffer) * txdr->count;
  818. txdr->buffer_info = vmalloc(size);
  819. if(!txdr->buffer_info) {
  820. DPRINTK(PROBE, ERR,
  821. "Unable to Allocate Memory for the Transmit descriptor ring\n");
  822. return -ENOMEM;
  823. }
  824. memset(txdr->buffer_info, 0, size);
  825. /* round up to nearest 4K */
  826. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  827. E1000_ROUNDUP(txdr->size, 4096);
  828. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  829. if(!txdr->desc) {
  830. setup_tx_desc_die:
  831. DPRINTK(PROBE, ERR,
  832. "Unable to Allocate Memory for the Transmit descriptor ring\n");
  833. vfree(txdr->buffer_info);
  834. return -ENOMEM;
  835. }
  836. /* fix for errata 23, cant cross 64kB boundary */
  837. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  838. void *olddesc = txdr->desc;
  839. dma_addr_t olddma = txdr->dma;
  840. DPRINTK(TX_ERR,ERR,"txdr align check failed: %u bytes at %p\n",
  841. txdr->size, txdr->desc);
  842. /* try again, without freeing the previous */
  843. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  844. /* failed allocation, critial failure */
  845. if(!txdr->desc) {
  846. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  847. goto setup_tx_desc_die;
  848. }
  849. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  850. /* give up */
  851. pci_free_consistent(pdev, txdr->size,
  852. txdr->desc, txdr->dma);
  853. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  854. DPRINTK(PROBE, ERR,
  855. "Unable to Allocate aligned Memory for the Transmit"
  856. " descriptor ring\n");
  857. vfree(txdr->buffer_info);
  858. return -ENOMEM;
  859. } else {
  860. /* free old, move on with the new one since its okay */
  861. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  862. }
  863. }
  864. memset(txdr->desc, 0, txdr->size);
  865. txdr->next_to_use = 0;
  866. txdr->next_to_clean = 0;
  867. return 0;
  868. }
  869. /**
  870. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  871. * @adapter: board private structure
  872. *
  873. * Configure the Tx unit of the MAC after a reset.
  874. **/
  875. static void
  876. e1000_configure_tx(struct e1000_adapter *adapter)
  877. {
  878. uint64_t tdba = adapter->tx_ring.dma;
  879. uint32_t tdlen = adapter->tx_ring.count * sizeof(struct e1000_tx_desc);
  880. uint32_t tctl, tipg;
  881. E1000_WRITE_REG(&adapter->hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  882. E1000_WRITE_REG(&adapter->hw, TDBAH, (tdba >> 32));
  883. E1000_WRITE_REG(&adapter->hw, TDLEN, tdlen);
  884. /* Setup the HW Tx Head and Tail descriptor pointers */
  885. E1000_WRITE_REG(&adapter->hw, TDH, 0);
  886. E1000_WRITE_REG(&adapter->hw, TDT, 0);
  887. /* Set the default values for the Tx Inter Packet Gap timer */
  888. switch (adapter->hw.mac_type) {
  889. case e1000_82542_rev2_0:
  890. case e1000_82542_rev2_1:
  891. tipg = DEFAULT_82542_TIPG_IPGT;
  892. tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
  893. tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
  894. break;
  895. default:
  896. if(adapter->hw.media_type == e1000_media_type_fiber ||
  897. adapter->hw.media_type == e1000_media_type_internal_serdes)
  898. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  899. else
  900. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  901. tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
  902. tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
  903. }
  904. E1000_WRITE_REG(&adapter->hw, TIPG, tipg);
  905. /* Set the Tx Interrupt Delay register */
  906. E1000_WRITE_REG(&adapter->hw, TIDV, adapter->tx_int_delay);
  907. if(adapter->hw.mac_type >= e1000_82540)
  908. E1000_WRITE_REG(&adapter->hw, TADV, adapter->tx_abs_int_delay);
  909. /* Program the Transmit Control Register */
  910. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  911. tctl &= ~E1000_TCTL_CT;
  912. tctl |= E1000_TCTL_EN | E1000_TCTL_PSP |
  913. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  914. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  915. e1000_config_collision_dist(&adapter->hw);
  916. /* Setup Transmit Descriptor Settings for eop descriptor */
  917. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  918. E1000_TXD_CMD_IFCS;
  919. if(adapter->hw.mac_type < e1000_82543)
  920. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  921. else
  922. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  923. /* Cache if we're 82544 running in PCI-X because we'll
  924. * need this to apply a workaround later in the send path. */
  925. if(adapter->hw.mac_type == e1000_82544 &&
  926. adapter->hw.bus_type == e1000_bus_type_pcix)
  927. adapter->pcix_82544 = 1;
  928. }
  929. /**
  930. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  931. * @adapter: board private structure
  932. *
  933. * Returns 0 on success, negative on failure
  934. **/
  935. int
  936. e1000_setup_rx_resources(struct e1000_adapter *adapter)
  937. {
  938. struct e1000_desc_ring *rxdr = &adapter->rx_ring;
  939. struct pci_dev *pdev = adapter->pdev;
  940. int size, desc_len;
  941. size = sizeof(struct e1000_buffer) * rxdr->count;
  942. rxdr->buffer_info = vmalloc(size);
  943. if(!rxdr->buffer_info) {
  944. DPRINTK(PROBE, ERR,
  945. "Unable to Allocate Memory for the Recieve descriptor ring\n");
  946. return -ENOMEM;
  947. }
  948. memset(rxdr->buffer_info, 0, size);
  949. size = sizeof(struct e1000_ps_page) * rxdr->count;
  950. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  951. if(!rxdr->ps_page) {
  952. vfree(rxdr->buffer_info);
  953. DPRINTK(PROBE, ERR,
  954. "Unable to allocate memory for the receive descriptor ring\n");
  955. return -ENOMEM;
  956. }
  957. memset(rxdr->ps_page, 0, size);
  958. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  959. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  960. if(!rxdr->ps_page_dma) {
  961. vfree(rxdr->buffer_info);
  962. kfree(rxdr->ps_page);
  963. DPRINTK(PROBE, ERR,
  964. "Unable to allocate memory for the receive descriptor ring\n");
  965. return -ENOMEM;
  966. }
  967. memset(rxdr->ps_page_dma, 0, size);
  968. if(adapter->hw.mac_type <= e1000_82547_rev_2)
  969. desc_len = sizeof(struct e1000_rx_desc);
  970. else
  971. desc_len = sizeof(union e1000_rx_desc_packet_split);
  972. /* Round up to nearest 4K */
  973. rxdr->size = rxdr->count * desc_len;
  974. E1000_ROUNDUP(rxdr->size, 4096);
  975. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  976. if(!rxdr->desc) {
  977. setup_rx_desc_die:
  978. DPRINTK(PROBE, ERR,
  979. "Unble to Allocate Memory for the Recieve descriptor ring\n");
  980. vfree(rxdr->buffer_info);
  981. kfree(rxdr->ps_page);
  982. kfree(rxdr->ps_page_dma);
  983. return -ENOMEM;
  984. }
  985. /* fix for errata 23, cant cross 64kB boundary */
  986. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  987. void *olddesc = rxdr->desc;
  988. dma_addr_t olddma = rxdr->dma;
  989. DPRINTK(RX_ERR,ERR,
  990. "rxdr align check failed: %u bytes at %p\n",
  991. rxdr->size, rxdr->desc);
  992. /* try again, without freeing the previous */
  993. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  994. /* failed allocation, critial failure */
  995. if(!rxdr->desc) {
  996. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  997. goto setup_rx_desc_die;
  998. }
  999. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1000. /* give up */
  1001. pci_free_consistent(pdev, rxdr->size,
  1002. rxdr->desc, rxdr->dma);
  1003. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1004. DPRINTK(PROBE, ERR,
  1005. "Unable to Allocate aligned Memory for the"
  1006. " Receive descriptor ring\n");
  1007. vfree(rxdr->buffer_info);
  1008. kfree(rxdr->ps_page);
  1009. kfree(rxdr->ps_page_dma);
  1010. return -ENOMEM;
  1011. } else {
  1012. /* free old, move on with the new one since its okay */
  1013. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1014. }
  1015. }
  1016. memset(rxdr->desc, 0, rxdr->size);
  1017. rxdr->next_to_clean = 0;
  1018. rxdr->next_to_use = 0;
  1019. return 0;
  1020. }
  1021. /**
  1022. * e1000_setup_rctl - configure the receive control register
  1023. * @adapter: Board private structure
  1024. **/
  1025. static void
  1026. e1000_setup_rctl(struct e1000_adapter *adapter)
  1027. {
  1028. uint32_t rctl, rfctl;
  1029. uint32_t psrctl = 0;
  1030. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1031. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1032. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1033. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1034. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1035. if(adapter->hw.tbi_compatibility_on == 1)
  1036. rctl |= E1000_RCTL_SBP;
  1037. else
  1038. rctl &= ~E1000_RCTL_SBP;
  1039. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1040. rctl &= ~E1000_RCTL_LPE;
  1041. else
  1042. rctl |= E1000_RCTL_LPE;
  1043. /* Setup buffer sizes */
  1044. if(adapter->hw.mac_type == e1000_82573) {
  1045. /* We can now specify buffers in 1K increments.
  1046. * BSIZE and BSEX are ignored in this case. */
  1047. rctl |= adapter->rx_buffer_len << 0x11;
  1048. } else {
  1049. rctl &= ~E1000_RCTL_SZ_4096;
  1050. rctl |= E1000_RCTL_BSEX;
  1051. switch (adapter->rx_buffer_len) {
  1052. case E1000_RXBUFFER_2048:
  1053. default:
  1054. rctl |= E1000_RCTL_SZ_2048;
  1055. rctl &= ~E1000_RCTL_BSEX;
  1056. break;
  1057. case E1000_RXBUFFER_4096:
  1058. rctl |= E1000_RCTL_SZ_4096;
  1059. break;
  1060. case E1000_RXBUFFER_8192:
  1061. rctl |= E1000_RCTL_SZ_8192;
  1062. break;
  1063. case E1000_RXBUFFER_16384:
  1064. rctl |= E1000_RCTL_SZ_16384;
  1065. break;
  1066. }
  1067. }
  1068. #ifdef CONFIG_E1000_PACKET_SPLIT
  1069. /* 82571 and greater support packet-split where the protocol
  1070. * header is placed in skb->data and the packet data is
  1071. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1072. * In the case of a non-split, skb->data is linearly filled,
  1073. * followed by the page buffers. Therefore, skb->data is
  1074. * sized to hold the largest protocol header.
  1075. */
  1076. adapter->rx_ps = (adapter->hw.mac_type > e1000_82547_rev_2)
  1077. && (adapter->netdev->mtu
  1078. < ((3 * PAGE_SIZE) + adapter->rx_ps_bsize0));
  1079. #endif
  1080. if(adapter->rx_ps) {
  1081. /* Configure extra packet-split registers */
  1082. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1083. rfctl |= E1000_RFCTL_EXTEN;
  1084. /* disable IPv6 packet split support */
  1085. rfctl |= E1000_RFCTL_IPV6_DIS;
  1086. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1087. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1088. psrctl |= adapter->rx_ps_bsize0 >>
  1089. E1000_PSRCTL_BSIZE0_SHIFT;
  1090. psrctl |= PAGE_SIZE >>
  1091. E1000_PSRCTL_BSIZE1_SHIFT;
  1092. psrctl |= PAGE_SIZE <<
  1093. E1000_PSRCTL_BSIZE2_SHIFT;
  1094. psrctl |= PAGE_SIZE <<
  1095. E1000_PSRCTL_BSIZE3_SHIFT;
  1096. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1097. }
  1098. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1099. }
  1100. /**
  1101. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1102. * @adapter: board private structure
  1103. *
  1104. * Configure the Rx unit of the MAC after a reset.
  1105. **/
  1106. static void
  1107. e1000_configure_rx(struct e1000_adapter *adapter)
  1108. {
  1109. uint64_t rdba = adapter->rx_ring.dma;
  1110. uint32_t rdlen, rctl, rxcsum;
  1111. if(adapter->rx_ps) {
  1112. rdlen = adapter->rx_ring.count *
  1113. sizeof(union e1000_rx_desc_packet_split);
  1114. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1115. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1116. } else {
  1117. rdlen = adapter->rx_ring.count * sizeof(struct e1000_rx_desc);
  1118. adapter->clean_rx = e1000_clean_rx_irq;
  1119. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1120. }
  1121. /* disable receives while setting up the descriptors */
  1122. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1123. E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
  1124. /* set the Receive Delay Timer Register */
  1125. E1000_WRITE_REG(&adapter->hw, RDTR, adapter->rx_int_delay);
  1126. if(adapter->hw.mac_type >= e1000_82540) {
  1127. E1000_WRITE_REG(&adapter->hw, RADV, adapter->rx_abs_int_delay);
  1128. if(adapter->itr > 1)
  1129. E1000_WRITE_REG(&adapter->hw, ITR,
  1130. 1000000000 / (adapter->itr * 256));
  1131. }
  1132. /* Setup the Base and Length of the Rx Descriptor Ring */
  1133. E1000_WRITE_REG(&adapter->hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1134. E1000_WRITE_REG(&adapter->hw, RDBAH, (rdba >> 32));
  1135. E1000_WRITE_REG(&adapter->hw, RDLEN, rdlen);
  1136. /* Setup the HW Rx Head and Tail Descriptor Pointers */
  1137. E1000_WRITE_REG(&adapter->hw, RDH, 0);
  1138. E1000_WRITE_REG(&adapter->hw, RDT, 0);
  1139. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1140. if(adapter->hw.mac_type >= e1000_82543) {
  1141. rxcsum = E1000_READ_REG(&adapter->hw, RXCSUM);
  1142. if(adapter->rx_csum == TRUE) {
  1143. rxcsum |= E1000_RXCSUM_TUOFL;
  1144. /* Enable 82573 IPv4 payload checksum for UDP fragments
  1145. * Must be used in conjunction with packet-split. */
  1146. if((adapter->hw.mac_type > e1000_82547_rev_2) &&
  1147. (adapter->rx_ps)) {
  1148. rxcsum |= E1000_RXCSUM_IPPCSE;
  1149. }
  1150. } else {
  1151. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1152. /* don't need to clear IPPCSE as it defaults to 0 */
  1153. }
  1154. E1000_WRITE_REG(&adapter->hw, RXCSUM, rxcsum);
  1155. }
  1156. if (adapter->hw.mac_type == e1000_82573)
  1157. E1000_WRITE_REG(&adapter->hw, ERT, 0x0100);
  1158. /* Enable Receives */
  1159. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1160. }
  1161. /**
  1162. * e1000_free_tx_resources - Free Tx Resources
  1163. * @adapter: board private structure
  1164. *
  1165. * Free all transmit software resources
  1166. **/
  1167. void
  1168. e1000_free_tx_resources(struct e1000_adapter *adapter)
  1169. {
  1170. struct pci_dev *pdev = adapter->pdev;
  1171. e1000_clean_tx_ring(adapter);
  1172. vfree(adapter->tx_ring.buffer_info);
  1173. adapter->tx_ring.buffer_info = NULL;
  1174. pci_free_consistent(pdev, adapter->tx_ring.size,
  1175. adapter->tx_ring.desc, adapter->tx_ring.dma);
  1176. adapter->tx_ring.desc = NULL;
  1177. }
  1178. static inline void
  1179. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1180. struct e1000_buffer *buffer_info)
  1181. {
  1182. struct pci_dev *pdev = adapter->pdev;
  1183. if(buffer_info->dma) {
  1184. pci_unmap_page(pdev,
  1185. buffer_info->dma,
  1186. buffer_info->length,
  1187. PCI_DMA_TODEVICE);
  1188. buffer_info->dma = 0;
  1189. }
  1190. if(buffer_info->skb) {
  1191. dev_kfree_skb_any(buffer_info->skb);
  1192. buffer_info->skb = NULL;
  1193. }
  1194. }
  1195. /**
  1196. * e1000_clean_tx_ring - Free Tx Buffers
  1197. * @adapter: board private structure
  1198. **/
  1199. static void
  1200. e1000_clean_tx_ring(struct e1000_adapter *adapter)
  1201. {
  1202. struct e1000_desc_ring *tx_ring = &adapter->tx_ring;
  1203. struct e1000_buffer *buffer_info;
  1204. unsigned long size;
  1205. unsigned int i;
  1206. /* Free all the Tx ring sk_buffs */
  1207. if (likely(adapter->previous_buffer_info.skb != NULL)) {
  1208. e1000_unmap_and_free_tx_resource(adapter,
  1209. &adapter->previous_buffer_info);
  1210. }
  1211. for(i = 0; i < tx_ring->count; i++) {
  1212. buffer_info = &tx_ring->buffer_info[i];
  1213. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1214. }
  1215. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1216. memset(tx_ring->buffer_info, 0, size);
  1217. /* Zero out the descriptor ring */
  1218. memset(tx_ring->desc, 0, tx_ring->size);
  1219. tx_ring->next_to_use = 0;
  1220. tx_ring->next_to_clean = 0;
  1221. E1000_WRITE_REG(&adapter->hw, TDH, 0);
  1222. E1000_WRITE_REG(&adapter->hw, TDT, 0);
  1223. }
  1224. /**
  1225. * e1000_free_rx_resources - Free Rx Resources
  1226. * @adapter: board private structure
  1227. *
  1228. * Free all receive software resources
  1229. **/
  1230. void
  1231. e1000_free_rx_resources(struct e1000_adapter *adapter)
  1232. {
  1233. struct e1000_desc_ring *rx_ring = &adapter->rx_ring;
  1234. struct pci_dev *pdev = adapter->pdev;
  1235. e1000_clean_rx_ring(adapter);
  1236. vfree(rx_ring->buffer_info);
  1237. rx_ring->buffer_info = NULL;
  1238. kfree(rx_ring->ps_page);
  1239. rx_ring->ps_page = NULL;
  1240. kfree(rx_ring->ps_page_dma);
  1241. rx_ring->ps_page_dma = NULL;
  1242. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1243. rx_ring->desc = NULL;
  1244. }
  1245. /**
  1246. * e1000_clean_rx_ring - Free Rx Buffers
  1247. * @adapter: board private structure
  1248. **/
  1249. static void
  1250. e1000_clean_rx_ring(struct e1000_adapter *adapter)
  1251. {
  1252. struct e1000_desc_ring *rx_ring = &adapter->rx_ring;
  1253. struct e1000_buffer *buffer_info;
  1254. struct e1000_ps_page *ps_page;
  1255. struct e1000_ps_page_dma *ps_page_dma;
  1256. struct pci_dev *pdev = adapter->pdev;
  1257. unsigned long size;
  1258. unsigned int i, j;
  1259. /* Free all the Rx ring sk_buffs */
  1260. for(i = 0; i < rx_ring->count; i++) {
  1261. buffer_info = &rx_ring->buffer_info[i];
  1262. if(buffer_info->skb) {
  1263. ps_page = &rx_ring->ps_page[i];
  1264. ps_page_dma = &rx_ring->ps_page_dma[i];
  1265. pci_unmap_single(pdev,
  1266. buffer_info->dma,
  1267. buffer_info->length,
  1268. PCI_DMA_FROMDEVICE);
  1269. dev_kfree_skb(buffer_info->skb);
  1270. buffer_info->skb = NULL;
  1271. for(j = 0; j < PS_PAGE_BUFFERS; j++) {
  1272. if(!ps_page->ps_page[j]) break;
  1273. pci_unmap_single(pdev,
  1274. ps_page_dma->ps_page_dma[j],
  1275. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1276. ps_page_dma->ps_page_dma[j] = 0;
  1277. put_page(ps_page->ps_page[j]);
  1278. ps_page->ps_page[j] = NULL;
  1279. }
  1280. }
  1281. }
  1282. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1283. memset(rx_ring->buffer_info, 0, size);
  1284. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1285. memset(rx_ring->ps_page, 0, size);
  1286. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1287. memset(rx_ring->ps_page_dma, 0, size);
  1288. /* Zero out the descriptor ring */
  1289. memset(rx_ring->desc, 0, rx_ring->size);
  1290. rx_ring->next_to_clean = 0;
  1291. rx_ring->next_to_use = 0;
  1292. E1000_WRITE_REG(&adapter->hw, RDH, 0);
  1293. E1000_WRITE_REG(&adapter->hw, RDT, 0);
  1294. }
  1295. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1296. * and memory write and invalidate disabled for certain operations
  1297. */
  1298. static void
  1299. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1300. {
  1301. struct net_device *netdev = adapter->netdev;
  1302. uint32_t rctl;
  1303. e1000_pci_clear_mwi(&adapter->hw);
  1304. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1305. rctl |= E1000_RCTL_RST;
  1306. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1307. E1000_WRITE_FLUSH(&adapter->hw);
  1308. mdelay(5);
  1309. if(netif_running(netdev))
  1310. e1000_clean_rx_ring(adapter);
  1311. }
  1312. static void
  1313. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1314. {
  1315. struct net_device *netdev = adapter->netdev;
  1316. uint32_t rctl;
  1317. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1318. rctl &= ~E1000_RCTL_RST;
  1319. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1320. E1000_WRITE_FLUSH(&adapter->hw);
  1321. mdelay(5);
  1322. if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1323. e1000_pci_set_mwi(&adapter->hw);
  1324. if(netif_running(netdev)) {
  1325. e1000_configure_rx(adapter);
  1326. e1000_alloc_rx_buffers(adapter);
  1327. }
  1328. }
  1329. /**
  1330. * e1000_set_mac - Change the Ethernet Address of the NIC
  1331. * @netdev: network interface device structure
  1332. * @p: pointer to an address structure
  1333. *
  1334. * Returns 0 on success, negative on failure
  1335. **/
  1336. static int
  1337. e1000_set_mac(struct net_device *netdev, void *p)
  1338. {
  1339. struct e1000_adapter *adapter = netdev->priv;
  1340. struct sockaddr *addr = p;
  1341. if(!is_valid_ether_addr(addr->sa_data))
  1342. return -EADDRNOTAVAIL;
  1343. /* 82542 2.0 needs to be in reset to write receive address registers */
  1344. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1345. e1000_enter_82542_rst(adapter);
  1346. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1347. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1348. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1349. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1350. e1000_leave_82542_rst(adapter);
  1351. return 0;
  1352. }
  1353. /**
  1354. * e1000_set_multi - Multicast and Promiscuous mode set
  1355. * @netdev: network interface device structure
  1356. *
  1357. * The set_multi entry point is called whenever the multicast address
  1358. * list or the network interface flags are updated. This routine is
  1359. * responsible for configuring the hardware for proper multicast,
  1360. * promiscuous mode, and all-multi behavior.
  1361. **/
  1362. static void
  1363. e1000_set_multi(struct net_device *netdev)
  1364. {
  1365. struct e1000_adapter *adapter = netdev->priv;
  1366. struct e1000_hw *hw = &adapter->hw;
  1367. struct dev_mc_list *mc_ptr;
  1368. uint32_t rctl;
  1369. uint32_t hash_value;
  1370. int i;
  1371. unsigned long flags;
  1372. /* Check for Promiscuous and All Multicast modes */
  1373. spin_lock_irqsave(&adapter->tx_lock, flags);
  1374. rctl = E1000_READ_REG(hw, RCTL);
  1375. if(netdev->flags & IFF_PROMISC) {
  1376. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1377. } else if(netdev->flags & IFF_ALLMULTI) {
  1378. rctl |= E1000_RCTL_MPE;
  1379. rctl &= ~E1000_RCTL_UPE;
  1380. } else {
  1381. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1382. }
  1383. E1000_WRITE_REG(hw, RCTL, rctl);
  1384. /* 82542 2.0 needs to be in reset to write receive address registers */
  1385. if(hw->mac_type == e1000_82542_rev2_0)
  1386. e1000_enter_82542_rst(adapter);
  1387. /* load the first 14 multicast address into the exact filters 1-14
  1388. * RAR 0 is used for the station MAC adddress
  1389. * if there are not 14 addresses, go ahead and clear the filters
  1390. */
  1391. mc_ptr = netdev->mc_list;
  1392. for(i = 1; i < E1000_RAR_ENTRIES; i++) {
  1393. if(mc_ptr) {
  1394. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1395. mc_ptr = mc_ptr->next;
  1396. } else {
  1397. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1398. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1399. }
  1400. }
  1401. /* clear the old settings from the multicast hash table */
  1402. for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1403. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1404. /* load any remaining addresses into the hash table */
  1405. for(; mc_ptr; mc_ptr = mc_ptr->next) {
  1406. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1407. e1000_mta_set(hw, hash_value);
  1408. }
  1409. if(hw->mac_type == e1000_82542_rev2_0)
  1410. e1000_leave_82542_rst(adapter);
  1411. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1412. }
  1413. /* Need to wait a few seconds after link up to get diagnostic information from
  1414. * the phy */
  1415. static void
  1416. e1000_update_phy_info(unsigned long data)
  1417. {
  1418. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1419. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1420. }
  1421. /**
  1422. * e1000_82547_tx_fifo_stall - Timer Call-back
  1423. * @data: pointer to adapter cast into an unsigned long
  1424. **/
  1425. static void
  1426. e1000_82547_tx_fifo_stall(unsigned long data)
  1427. {
  1428. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1429. struct net_device *netdev = adapter->netdev;
  1430. uint32_t tctl;
  1431. if(atomic_read(&adapter->tx_fifo_stall)) {
  1432. if((E1000_READ_REG(&adapter->hw, TDT) ==
  1433. E1000_READ_REG(&adapter->hw, TDH)) &&
  1434. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1435. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1436. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1437. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1438. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1439. E1000_WRITE_REG(&adapter->hw, TCTL,
  1440. tctl & ~E1000_TCTL_EN);
  1441. E1000_WRITE_REG(&adapter->hw, TDFT,
  1442. adapter->tx_head_addr);
  1443. E1000_WRITE_REG(&adapter->hw, TDFH,
  1444. adapter->tx_head_addr);
  1445. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1446. adapter->tx_head_addr);
  1447. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1448. adapter->tx_head_addr);
  1449. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1450. E1000_WRITE_FLUSH(&adapter->hw);
  1451. adapter->tx_fifo_head = 0;
  1452. atomic_set(&adapter->tx_fifo_stall, 0);
  1453. netif_wake_queue(netdev);
  1454. } else {
  1455. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1456. }
  1457. }
  1458. }
  1459. /**
  1460. * e1000_watchdog - Timer Call-back
  1461. * @data: pointer to adapter cast into an unsigned long
  1462. **/
  1463. static void
  1464. e1000_watchdog(unsigned long data)
  1465. {
  1466. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1467. /* Do the rest outside of interrupt context */
  1468. schedule_work(&adapter->watchdog_task);
  1469. }
  1470. static void
  1471. e1000_watchdog_task(struct e1000_adapter *adapter)
  1472. {
  1473. struct net_device *netdev = adapter->netdev;
  1474. struct e1000_desc_ring *txdr = &adapter->tx_ring;
  1475. uint32_t link;
  1476. e1000_check_for_link(&adapter->hw);
  1477. if (adapter->hw.mac_type == e1000_82573) {
  1478. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1479. if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1480. e1000_update_mng_vlan(adapter);
  1481. }
  1482. if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1483. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1484. link = !adapter->hw.serdes_link_down;
  1485. else
  1486. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1487. if(link) {
  1488. if(!netif_carrier_ok(netdev)) {
  1489. e1000_get_speed_and_duplex(&adapter->hw,
  1490. &adapter->link_speed,
  1491. &adapter->link_duplex);
  1492. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1493. adapter->link_speed,
  1494. adapter->link_duplex == FULL_DUPLEX ?
  1495. "Full Duplex" : "Half Duplex");
  1496. netif_carrier_on(netdev);
  1497. netif_wake_queue(netdev);
  1498. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1499. adapter->smartspeed = 0;
  1500. }
  1501. } else {
  1502. if(netif_carrier_ok(netdev)) {
  1503. adapter->link_speed = 0;
  1504. adapter->link_duplex = 0;
  1505. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  1506. netif_carrier_off(netdev);
  1507. netif_stop_queue(netdev);
  1508. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1509. }
  1510. e1000_smartspeed(adapter);
  1511. }
  1512. e1000_update_stats(adapter);
  1513. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  1514. adapter->tpt_old = adapter->stats.tpt;
  1515. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  1516. adapter->colc_old = adapter->stats.colc;
  1517. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  1518. adapter->gorcl_old = adapter->stats.gorcl;
  1519. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  1520. adapter->gotcl_old = adapter->stats.gotcl;
  1521. e1000_update_adaptive(&adapter->hw);
  1522. if(!netif_carrier_ok(netdev)) {
  1523. if(E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  1524. /* We've lost link, so the controller stops DMA,
  1525. * but we've got queued Tx work that's never going
  1526. * to get done, so reset controller to flush Tx.
  1527. * (Do the reset outside of interrupt context). */
  1528. schedule_work(&adapter->tx_timeout_task);
  1529. }
  1530. }
  1531. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  1532. if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  1533. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  1534. * asymmetrical Tx or Rx gets ITR=8000; everyone
  1535. * else is between 2000-8000. */
  1536. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  1537. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  1538. adapter->gotcl - adapter->gorcl :
  1539. adapter->gorcl - adapter->gotcl) / 10000;
  1540. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  1541. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  1542. }
  1543. /* Cause software interrupt to ensure rx ring is cleaned */
  1544. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  1545. /* Force detection of hung controller every watchdog period*/
  1546. adapter->detect_tx_hung = TRUE;
  1547. /* Reset the timer */
  1548. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  1549. }
  1550. #define E1000_TX_FLAGS_CSUM 0x00000001
  1551. #define E1000_TX_FLAGS_VLAN 0x00000002
  1552. #define E1000_TX_FLAGS_TSO 0x00000004
  1553. #define E1000_TX_FLAGS_IPV4 0x00000008
  1554. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  1555. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  1556. static inline int
  1557. e1000_tso(struct e1000_adapter *adapter, struct sk_buff *skb)
  1558. {
  1559. #ifdef NETIF_F_TSO
  1560. struct e1000_context_desc *context_desc;
  1561. unsigned int i;
  1562. uint32_t cmd_length = 0;
  1563. uint16_t ipcse = 0, tucse, mss;
  1564. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  1565. int err;
  1566. if(skb_shinfo(skb)->tso_size) {
  1567. if (skb_header_cloned(skb)) {
  1568. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1569. if (err)
  1570. return err;
  1571. }
  1572. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  1573. mss = skb_shinfo(skb)->tso_size;
  1574. if(skb->protocol == ntohs(ETH_P_IP)) {
  1575. skb->nh.iph->tot_len = 0;
  1576. skb->nh.iph->check = 0;
  1577. skb->h.th->check =
  1578. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  1579. skb->nh.iph->daddr,
  1580. 0,
  1581. IPPROTO_TCP,
  1582. 0);
  1583. cmd_length = E1000_TXD_CMD_IP;
  1584. ipcse = skb->h.raw - skb->data - 1;
  1585. #ifdef NETIF_F_TSO_IPV6
  1586. } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
  1587. skb->nh.ipv6h->payload_len = 0;
  1588. skb->h.th->check =
  1589. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  1590. &skb->nh.ipv6h->daddr,
  1591. 0,
  1592. IPPROTO_TCP,
  1593. 0);
  1594. ipcse = 0;
  1595. #endif
  1596. }
  1597. ipcss = skb->nh.raw - skb->data;
  1598. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  1599. tucss = skb->h.raw - skb->data;
  1600. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  1601. tucse = 0;
  1602. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  1603. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  1604. i = adapter->tx_ring.next_to_use;
  1605. context_desc = E1000_CONTEXT_DESC(adapter->tx_ring, i);
  1606. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  1607. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  1608. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  1609. context_desc->upper_setup.tcp_fields.tucss = tucss;
  1610. context_desc->upper_setup.tcp_fields.tucso = tucso;
  1611. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  1612. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  1613. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  1614. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  1615. if(++i == adapter->tx_ring.count) i = 0;
  1616. adapter->tx_ring.next_to_use = i;
  1617. return 1;
  1618. }
  1619. #endif
  1620. return 0;
  1621. }
  1622. static inline boolean_t
  1623. e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
  1624. {
  1625. struct e1000_context_desc *context_desc;
  1626. unsigned int i;
  1627. uint8_t css;
  1628. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  1629. css = skb->h.raw - skb->data;
  1630. i = adapter->tx_ring.next_to_use;
  1631. context_desc = E1000_CONTEXT_DESC(adapter->tx_ring, i);
  1632. context_desc->upper_setup.tcp_fields.tucss = css;
  1633. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  1634. context_desc->upper_setup.tcp_fields.tucse = 0;
  1635. context_desc->tcp_seg_setup.data = 0;
  1636. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  1637. if(unlikely(++i == adapter->tx_ring.count)) i = 0;
  1638. adapter->tx_ring.next_to_use = i;
  1639. return TRUE;
  1640. }
  1641. return FALSE;
  1642. }
  1643. #define E1000_MAX_TXD_PWR 12
  1644. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  1645. static inline int
  1646. e1000_tx_map(struct e1000_adapter *adapter, struct sk_buff *skb,
  1647. unsigned int first, unsigned int max_per_txd,
  1648. unsigned int nr_frags, unsigned int mss)
  1649. {
  1650. struct e1000_desc_ring *tx_ring = &adapter->tx_ring;
  1651. struct e1000_buffer *buffer_info;
  1652. unsigned int len = skb->len;
  1653. unsigned int offset = 0, size, count = 0, i;
  1654. unsigned int f;
  1655. len -= skb->data_len;
  1656. i = tx_ring->next_to_use;
  1657. while(len) {
  1658. buffer_info = &tx_ring->buffer_info[i];
  1659. size = min(len, max_per_txd);
  1660. #ifdef NETIF_F_TSO
  1661. /* Workaround for premature desc write-backs
  1662. * in TSO mode. Append 4-byte sentinel desc */
  1663. if(unlikely(mss && !nr_frags && size == len && size > 8))
  1664. size -= 4;
  1665. #endif
  1666. /* work-around for errata 10 and it applies
  1667. * to all controllers in PCI-X mode
  1668. * The fix is to make sure that the first descriptor of a
  1669. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  1670. */
  1671. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  1672. (size > 2015) && count == 0))
  1673. size = 2015;
  1674. /* Workaround for potential 82544 hang in PCI-X. Avoid
  1675. * terminating buffers within evenly-aligned dwords. */
  1676. if(unlikely(adapter->pcix_82544 &&
  1677. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  1678. size > 4))
  1679. size -= 4;
  1680. buffer_info->length = size;
  1681. buffer_info->dma =
  1682. pci_map_single(adapter->pdev,
  1683. skb->data + offset,
  1684. size,
  1685. PCI_DMA_TODEVICE);
  1686. buffer_info->time_stamp = jiffies;
  1687. len -= size;
  1688. offset += size;
  1689. count++;
  1690. if(unlikely(++i == tx_ring->count)) i = 0;
  1691. }
  1692. for(f = 0; f < nr_frags; f++) {
  1693. struct skb_frag_struct *frag;
  1694. frag = &skb_shinfo(skb)->frags[f];
  1695. len = frag->size;
  1696. offset = frag->page_offset;
  1697. while(len) {
  1698. buffer_info = &tx_ring->buffer_info[i];
  1699. size = min(len, max_per_txd);
  1700. #ifdef NETIF_F_TSO
  1701. /* Workaround for premature desc write-backs
  1702. * in TSO mode. Append 4-byte sentinel desc */
  1703. if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  1704. size -= 4;
  1705. #endif
  1706. /* Workaround for potential 82544 hang in PCI-X.
  1707. * Avoid terminating buffers within evenly-aligned
  1708. * dwords. */
  1709. if(unlikely(adapter->pcix_82544 &&
  1710. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  1711. size > 4))
  1712. size -= 4;
  1713. buffer_info->length = size;
  1714. buffer_info->dma =
  1715. pci_map_page(adapter->pdev,
  1716. frag->page,
  1717. offset,
  1718. size,
  1719. PCI_DMA_TODEVICE);
  1720. buffer_info->time_stamp = jiffies;
  1721. len -= size;
  1722. offset += size;
  1723. count++;
  1724. if(unlikely(++i == tx_ring->count)) i = 0;
  1725. }
  1726. }
  1727. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  1728. tx_ring->buffer_info[i].skb = skb;
  1729. tx_ring->buffer_info[first].next_to_watch = i;
  1730. return count;
  1731. }
  1732. static inline void
  1733. e1000_tx_queue(struct e1000_adapter *adapter, int count, int tx_flags)
  1734. {
  1735. struct e1000_desc_ring *tx_ring = &adapter->tx_ring;
  1736. struct e1000_tx_desc *tx_desc = NULL;
  1737. struct e1000_buffer *buffer_info;
  1738. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  1739. unsigned int i;
  1740. if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  1741. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  1742. E1000_TXD_CMD_TSE;
  1743. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  1744. if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
  1745. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  1746. }
  1747. if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  1748. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  1749. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  1750. }
  1751. if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  1752. txd_lower |= E1000_TXD_CMD_VLE;
  1753. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  1754. }
  1755. i = tx_ring->next_to_use;
  1756. while(count--) {
  1757. buffer_info = &tx_ring->buffer_info[i];
  1758. tx_desc = E1000_TX_DESC(*tx_ring, i);
  1759. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  1760. tx_desc->lower.data =
  1761. cpu_to_le32(txd_lower | buffer_info->length);
  1762. tx_desc->upper.data = cpu_to_le32(txd_upper);
  1763. if(unlikely(++i == tx_ring->count)) i = 0;
  1764. }
  1765. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  1766. /* Force memory writes to complete before letting h/w
  1767. * know there are new descriptors to fetch. (Only
  1768. * applicable for weak-ordered memory model archs,
  1769. * such as IA-64). */
  1770. wmb();
  1771. tx_ring->next_to_use = i;
  1772. E1000_WRITE_REG(&adapter->hw, TDT, i);
  1773. }
  1774. /**
  1775. * 82547 workaround to avoid controller hang in half-duplex environment.
  1776. * The workaround is to avoid queuing a large packet that would span
  1777. * the internal Tx FIFO ring boundary by notifying the stack to resend
  1778. * the packet at a later time. This gives the Tx FIFO an opportunity to
  1779. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  1780. * to the beginning of the Tx FIFO.
  1781. **/
  1782. #define E1000_FIFO_HDR 0x10
  1783. #define E1000_82547_PAD_LEN 0x3E0
  1784. static inline int
  1785. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  1786. {
  1787. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  1788. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  1789. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  1790. if(adapter->link_duplex != HALF_DUPLEX)
  1791. goto no_fifo_stall_required;
  1792. if(atomic_read(&adapter->tx_fifo_stall))
  1793. return 1;
  1794. if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  1795. atomic_set(&adapter->tx_fifo_stall, 1);
  1796. return 1;
  1797. }
  1798. no_fifo_stall_required:
  1799. adapter->tx_fifo_head += skb_fifo_len;
  1800. if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
  1801. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  1802. return 0;
  1803. }
  1804. #define MINIMUM_DHCP_PACKET_SIZE 282
  1805. static inline int
  1806. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  1807. {
  1808. struct e1000_hw *hw = &adapter->hw;
  1809. uint16_t length, offset;
  1810. if(vlan_tx_tag_present(skb)) {
  1811. if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  1812. ( adapter->hw.mng_cookie.status &
  1813. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  1814. return 0;
  1815. }
  1816. if(htons(ETH_P_IP) == skb->protocol) {
  1817. const struct iphdr *ip = skb->nh.iph;
  1818. if(IPPROTO_UDP == ip->protocol) {
  1819. struct udphdr *udp = (struct udphdr *)(skb->h.uh);
  1820. if(ntohs(udp->dest) == 67) {
  1821. offset = (uint8_t *)udp + 8 - skb->data;
  1822. length = skb->len - offset;
  1823. return e1000_mng_write_dhcp_info(hw,
  1824. (uint8_t *)udp + 8, length);
  1825. }
  1826. }
  1827. } else if((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
  1828. struct ethhdr *eth = (struct ethhdr *) skb->data;
  1829. if((htons(ETH_P_IP) == eth->h_proto)) {
  1830. const struct iphdr *ip =
  1831. (struct iphdr *)((uint8_t *)skb->data+14);
  1832. if(IPPROTO_UDP == ip->protocol) {
  1833. struct udphdr *udp =
  1834. (struct udphdr *)((uint8_t *)ip +
  1835. (ip->ihl << 2));
  1836. if(ntohs(udp->dest) == 67) {
  1837. offset = (uint8_t *)udp + 8 - skb->data;
  1838. length = skb->len - offset;
  1839. return e1000_mng_write_dhcp_info(hw,
  1840. (uint8_t *)udp + 8,
  1841. length);
  1842. }
  1843. }
  1844. }
  1845. }
  1846. return 0;
  1847. }
  1848. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  1849. static int
  1850. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1851. {
  1852. struct e1000_adapter *adapter = netdev->priv;
  1853. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  1854. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  1855. unsigned int tx_flags = 0;
  1856. unsigned int len = skb->len;
  1857. unsigned long flags;
  1858. unsigned int nr_frags = 0;
  1859. unsigned int mss = 0;
  1860. int count = 0;
  1861. int tso;
  1862. unsigned int f;
  1863. len -= skb->data_len;
  1864. if(unlikely(skb->len <= 0)) {
  1865. dev_kfree_skb_any(skb);
  1866. return NETDEV_TX_OK;
  1867. }
  1868. #ifdef NETIF_F_TSO
  1869. mss = skb_shinfo(skb)->tso_size;
  1870. /* The controller does a simple calculation to
  1871. * make sure there is enough room in the FIFO before
  1872. * initiating the DMA for each buffer. The calc is:
  1873. * 4 = ceil(buffer len/mss). To make sure we don't
  1874. * overrun the FIFO, adjust the max buffer len if mss
  1875. * drops. */
  1876. if(mss) {
  1877. max_per_txd = min(mss << 2, max_per_txd);
  1878. max_txd_pwr = fls(max_per_txd) - 1;
  1879. }
  1880. if((mss) || (skb->ip_summed == CHECKSUM_HW))
  1881. count++;
  1882. count++; /* for sentinel desc */
  1883. #else
  1884. if(skb->ip_summed == CHECKSUM_HW)
  1885. count++;
  1886. #endif
  1887. count += TXD_USE_COUNT(len, max_txd_pwr);
  1888. if(adapter->pcix_82544)
  1889. count++;
  1890. /* work-around for errata 10 and it applies to all controllers
  1891. * in PCI-X mode, so add one more descriptor to the count
  1892. */
  1893. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  1894. (len > 2015)))
  1895. count++;
  1896. nr_frags = skb_shinfo(skb)->nr_frags;
  1897. for(f = 0; f < nr_frags; f++)
  1898. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  1899. max_txd_pwr);
  1900. if(adapter->pcix_82544)
  1901. count += nr_frags;
  1902. local_irq_save(flags);
  1903. if (!spin_trylock(&adapter->tx_lock)) {
  1904. /* Collision - tell upper layer to requeue */
  1905. local_irq_restore(flags);
  1906. return NETDEV_TX_LOCKED;
  1907. }
  1908. if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
  1909. e1000_transfer_dhcp_info(adapter, skb);
  1910. /* need: count + 2 desc gap to keep tail from touching
  1911. * head, otherwise try next time */
  1912. if(unlikely(E1000_DESC_UNUSED(&adapter->tx_ring) < count + 2)) {
  1913. netif_stop_queue(netdev);
  1914. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1915. return NETDEV_TX_BUSY;
  1916. }
  1917. if(unlikely(adapter->hw.mac_type == e1000_82547)) {
  1918. if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  1919. netif_stop_queue(netdev);
  1920. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  1921. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1922. return NETDEV_TX_BUSY;
  1923. }
  1924. }
  1925. if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  1926. tx_flags |= E1000_TX_FLAGS_VLAN;
  1927. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  1928. }
  1929. first = adapter->tx_ring.next_to_use;
  1930. tso = e1000_tso(adapter, skb);
  1931. if (tso < 0) {
  1932. dev_kfree_skb_any(skb);
  1933. return NETDEV_TX_OK;
  1934. }
  1935. if (likely(tso))
  1936. tx_flags |= E1000_TX_FLAGS_TSO;
  1937. else if(likely(e1000_tx_csum(adapter, skb)))
  1938. tx_flags |= E1000_TX_FLAGS_CSUM;
  1939. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  1940. * 82573 hardware supports TSO capabilities for IPv6 as well...
  1941. * no longer assume, we must. */
  1942. if(likely(skb->protocol == ntohs(ETH_P_IP)))
  1943. tx_flags |= E1000_TX_FLAGS_IPV4;
  1944. e1000_tx_queue(adapter,
  1945. e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss),
  1946. tx_flags);
  1947. netdev->trans_start = jiffies;
  1948. /* Make sure there is space in the ring for the next send. */
  1949. if(unlikely(E1000_DESC_UNUSED(&adapter->tx_ring) < MAX_SKB_FRAGS + 2))
  1950. netif_stop_queue(netdev);
  1951. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1952. return NETDEV_TX_OK;
  1953. }
  1954. /**
  1955. * e1000_tx_timeout - Respond to a Tx Hang
  1956. * @netdev: network interface device structure
  1957. **/
  1958. static void
  1959. e1000_tx_timeout(struct net_device *netdev)
  1960. {
  1961. struct e1000_adapter *adapter = netdev->priv;
  1962. /* Do the reset outside of interrupt context */
  1963. schedule_work(&adapter->tx_timeout_task);
  1964. }
  1965. static void
  1966. e1000_tx_timeout_task(struct net_device *netdev)
  1967. {
  1968. struct e1000_adapter *adapter = netdev->priv;
  1969. e1000_down(adapter);
  1970. e1000_up(adapter);
  1971. }
  1972. /**
  1973. * e1000_get_stats - Get System Network Statistics
  1974. * @netdev: network interface device structure
  1975. *
  1976. * Returns the address of the device statistics structure.
  1977. * The statistics are actually updated from the timer callback.
  1978. **/
  1979. static struct net_device_stats *
  1980. e1000_get_stats(struct net_device *netdev)
  1981. {
  1982. struct e1000_adapter *adapter = netdev->priv;
  1983. e1000_update_stats(adapter);
  1984. return &adapter->net_stats;
  1985. }
  1986. /**
  1987. * e1000_change_mtu - Change the Maximum Transfer Unit
  1988. * @netdev: network interface device structure
  1989. * @new_mtu: new value for maximum frame size
  1990. *
  1991. * Returns 0 on success, negative on failure
  1992. **/
  1993. static int
  1994. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  1995. {
  1996. struct e1000_adapter *adapter = netdev->priv;
  1997. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  1998. if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  1999. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2000. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2001. return -EINVAL;
  2002. }
  2003. #define MAX_STD_JUMBO_FRAME_SIZE 9216
  2004. /* might want this to be bigger enum check... */
  2005. if (adapter->hw.mac_type == e1000_82573 &&
  2006. max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2007. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2008. "on 82573\n");
  2009. return -EINVAL;
  2010. }
  2011. if(adapter->hw.mac_type > e1000_82547_rev_2) {
  2012. adapter->rx_buffer_len = max_frame;
  2013. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2014. } else {
  2015. if(unlikely((adapter->hw.mac_type < e1000_82543) &&
  2016. (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
  2017. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2018. "on 82542\n");
  2019. return -EINVAL;
  2020. } else {
  2021. if(max_frame <= E1000_RXBUFFER_2048) {
  2022. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2023. } else if(max_frame <= E1000_RXBUFFER_4096) {
  2024. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2025. } else if(max_frame <= E1000_RXBUFFER_8192) {
  2026. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2027. } else if(max_frame <= E1000_RXBUFFER_16384) {
  2028. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2029. }
  2030. }
  2031. }
  2032. netdev->mtu = new_mtu;
  2033. if(netif_running(netdev)) {
  2034. e1000_down(adapter);
  2035. e1000_up(adapter);
  2036. }
  2037. adapter->hw.max_frame_size = max_frame;
  2038. return 0;
  2039. }
  2040. /**
  2041. * e1000_update_stats - Update the board statistics counters
  2042. * @adapter: board private structure
  2043. **/
  2044. void
  2045. e1000_update_stats(struct e1000_adapter *adapter)
  2046. {
  2047. struct e1000_hw *hw = &adapter->hw;
  2048. unsigned long flags;
  2049. uint16_t phy_tmp;
  2050. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2051. spin_lock_irqsave(&adapter->stats_lock, flags);
  2052. /* these counters are modified from e1000_adjust_tbi_stats,
  2053. * called from the interrupt context, so they must only
  2054. * be written while holding adapter->stats_lock
  2055. */
  2056. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2057. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2058. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2059. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2060. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2061. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2062. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2063. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2064. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2065. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2066. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2067. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2068. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2069. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2070. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2071. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2072. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2073. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2074. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2075. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2076. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2077. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2078. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2079. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2080. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2081. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2082. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2083. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2084. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2085. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2086. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2087. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2088. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2089. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2090. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2091. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2092. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2093. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2094. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2095. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2096. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2097. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2098. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2099. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2100. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2101. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2102. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2103. /* used for adaptive IFS */
  2104. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2105. adapter->stats.tpt += hw->tx_packet_delta;
  2106. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2107. adapter->stats.colc += hw->collision_delta;
  2108. if(hw->mac_type >= e1000_82543) {
  2109. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2110. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2111. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2112. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2113. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2114. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2115. }
  2116. if(hw->mac_type > e1000_82547_rev_2) {
  2117. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2118. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2119. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2120. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2121. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2122. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2123. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2124. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2125. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2126. }
  2127. /* Fill out the OS statistics structure */
  2128. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2129. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2130. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2131. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2132. adapter->net_stats.multicast = adapter->stats.mprc;
  2133. adapter->net_stats.collisions = adapter->stats.colc;
  2134. /* Rx Errors */
  2135. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2136. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2137. adapter->stats.rlec + adapter->stats.mpc +
  2138. adapter->stats.cexterr;
  2139. adapter->net_stats.rx_dropped = adapter->stats.mpc;
  2140. adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  2141. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2142. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2143. adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
  2144. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2145. /* Tx Errors */
  2146. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2147. adapter->stats.latecol;
  2148. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2149. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2150. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2151. /* Tx Dropped needs to be maintained elsewhere */
  2152. /* Phy Stats */
  2153. if(hw->media_type == e1000_media_type_copper) {
  2154. if((adapter->link_speed == SPEED_1000) &&
  2155. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2156. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2157. adapter->phy_stats.idle_errors += phy_tmp;
  2158. }
  2159. if((hw->mac_type <= e1000_82546) &&
  2160. (hw->phy_type == e1000_phy_m88) &&
  2161. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2162. adapter->phy_stats.receive_errors += phy_tmp;
  2163. }
  2164. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2165. }
  2166. /**
  2167. * e1000_intr - Interrupt Handler
  2168. * @irq: interrupt number
  2169. * @data: pointer to a network interface device structure
  2170. * @pt_regs: CPU registers structure
  2171. **/
  2172. static irqreturn_t
  2173. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2174. {
  2175. struct net_device *netdev = data;
  2176. struct e1000_adapter *adapter = netdev->priv;
  2177. struct e1000_hw *hw = &adapter->hw;
  2178. uint32_t icr = E1000_READ_REG(hw, ICR);
  2179. #ifndef CONFIG_E1000_NAPI
  2180. unsigned int i;
  2181. #endif
  2182. if(unlikely(!icr))
  2183. return IRQ_NONE; /* Not our interrupt */
  2184. if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2185. hw->get_link_status = 1;
  2186. mod_timer(&adapter->watchdog_timer, jiffies);
  2187. }
  2188. #ifdef CONFIG_E1000_NAPI
  2189. if(likely(netif_rx_schedule_prep(netdev))) {
  2190. /* Disable interrupts and register for poll. The flush
  2191. of the posted write is intentionally left out.
  2192. */
  2193. atomic_inc(&adapter->irq_sem);
  2194. E1000_WRITE_REG(hw, IMC, ~0);
  2195. __netif_rx_schedule(netdev);
  2196. }
  2197. #else
  2198. /* Writing IMC and IMS is needed for 82547.
  2199. Due to Hub Link bus being occupied, an interrupt
  2200. de-assertion message is not able to be sent.
  2201. When an interrupt assertion message is generated later,
  2202. two messages are re-ordered and sent out.
  2203. That causes APIC to think 82547 is in de-assertion
  2204. state, while 82547 is in assertion state, resulting
  2205. in dead lock. Writing IMC forces 82547 into
  2206. de-assertion state.
  2207. */
  2208. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
  2209. atomic_inc(&adapter->irq_sem);
  2210. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  2211. }
  2212. for(i = 0; i < E1000_MAX_INTR; i++)
  2213. if(unlikely(!adapter->clean_rx(adapter) &
  2214. !e1000_clean_tx_irq(adapter)))
  2215. break;
  2216. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2217. e1000_irq_enable(adapter);
  2218. #endif
  2219. return IRQ_HANDLED;
  2220. }
  2221. #ifdef CONFIG_E1000_NAPI
  2222. /**
  2223. * e1000_clean - NAPI Rx polling callback
  2224. * @adapter: board private structure
  2225. **/
  2226. static int
  2227. e1000_clean(struct net_device *netdev, int *budget)
  2228. {
  2229. struct e1000_adapter *adapter = netdev->priv;
  2230. int work_to_do = min(*budget, netdev->quota);
  2231. int tx_cleaned;
  2232. int work_done = 0;
  2233. tx_cleaned = e1000_clean_tx_irq(adapter);
  2234. adapter->clean_rx(adapter, &work_done, work_to_do);
  2235. *budget -= work_done;
  2236. netdev->quota -= work_done;
  2237. /* If no Tx and no Rx work done, exit the polling mode */
  2238. if ((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
  2239. netif_rx_complete(netdev);
  2240. e1000_irq_enable(adapter);
  2241. return 0;
  2242. }
  2243. return 1;
  2244. }
  2245. #endif
  2246. /**
  2247. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2248. * @adapter: board private structure
  2249. **/
  2250. static boolean_t
  2251. e1000_clean_tx_irq(struct e1000_adapter *adapter)
  2252. {
  2253. struct e1000_desc_ring *tx_ring = &adapter->tx_ring;
  2254. struct net_device *netdev = adapter->netdev;
  2255. struct e1000_tx_desc *tx_desc, *eop_desc;
  2256. struct e1000_buffer *buffer_info;
  2257. unsigned int i, eop;
  2258. boolean_t cleaned = FALSE;
  2259. i = tx_ring->next_to_clean;
  2260. eop = tx_ring->buffer_info[i].next_to_watch;
  2261. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2262. while(eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2263. /* Premature writeback of Tx descriptors clear (free buffers
  2264. * and unmap pci_mapping) previous_buffer_info */
  2265. if (likely(adapter->previous_buffer_info.skb != NULL)) {
  2266. e1000_unmap_and_free_tx_resource(adapter,
  2267. &adapter->previous_buffer_info);
  2268. }
  2269. for(cleaned = FALSE; !cleaned; ) {
  2270. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2271. buffer_info = &tx_ring->buffer_info[i];
  2272. cleaned = (i == eop);
  2273. #ifdef NETIF_F_TSO
  2274. if (!(netdev->features & NETIF_F_TSO)) {
  2275. #endif
  2276. e1000_unmap_and_free_tx_resource(adapter,
  2277. buffer_info);
  2278. #ifdef NETIF_F_TSO
  2279. } else {
  2280. if (cleaned) {
  2281. memcpy(&adapter->previous_buffer_info,
  2282. buffer_info,
  2283. sizeof(struct e1000_buffer));
  2284. memset(buffer_info, 0,
  2285. sizeof(struct e1000_buffer));
  2286. } else {
  2287. e1000_unmap_and_free_tx_resource(
  2288. adapter, buffer_info);
  2289. }
  2290. }
  2291. #endif
  2292. tx_desc->buffer_addr = 0;
  2293. tx_desc->lower.data = 0;
  2294. tx_desc->upper.data = 0;
  2295. if(unlikely(++i == tx_ring->count)) i = 0;
  2296. }
  2297. eop = tx_ring->buffer_info[i].next_to_watch;
  2298. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2299. }
  2300. tx_ring->next_to_clean = i;
  2301. spin_lock(&adapter->tx_lock);
  2302. if(unlikely(cleaned && netif_queue_stopped(netdev) &&
  2303. netif_carrier_ok(netdev)))
  2304. netif_wake_queue(netdev);
  2305. spin_unlock(&adapter->tx_lock);
  2306. if(adapter->detect_tx_hung) {
  2307. /* detect a transmit hang in hardware, this serializes the
  2308. * check with the clearing of time_stamp and movement of i */
  2309. adapter->detect_tx_hung = FALSE;
  2310. if (tx_ring->buffer_info[i].dma &&
  2311. time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
  2312. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2313. E1000_STATUS_TXOFF)) {
  2314. /* detected Tx unit hang */
  2315. i = tx_ring->next_to_clean;
  2316. eop = tx_ring->buffer_info[i].next_to_watch;
  2317. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2318. DPRINTK(TX_ERR, ERR, "Detected Tx Unit Hang\n"
  2319. " TDH <%x>\n"
  2320. " TDT <%x>\n"
  2321. " next_to_use <%x>\n"
  2322. " next_to_clean <%x>\n"
  2323. "buffer_info[next_to_clean]\n"
  2324. " dma <%llx>\n"
  2325. " time_stamp <%lx>\n"
  2326. " next_to_watch <%x>\n"
  2327. " jiffies <%lx>\n"
  2328. " next_to_watch.status <%x>\n",
  2329. E1000_READ_REG(&adapter->hw, TDH),
  2330. E1000_READ_REG(&adapter->hw, TDT),
  2331. tx_ring->next_to_use,
  2332. i,
  2333. tx_ring->buffer_info[i].dma,
  2334. tx_ring->buffer_info[i].time_stamp,
  2335. eop,
  2336. jiffies,
  2337. eop_desc->upper.fields.status);
  2338. netif_stop_queue(netdev);
  2339. }
  2340. }
  2341. #ifdef NETIF_F_TSO
  2342. if( unlikely(!(eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
  2343. time_after(jiffies, adapter->previous_buffer_info.time_stamp + HZ)))
  2344. e1000_unmap_and_free_tx_resource(
  2345. adapter, &adapter->previous_buffer_info);
  2346. #endif
  2347. return cleaned;
  2348. }
  2349. /**
  2350. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2351. * @adapter: board private structure
  2352. * @status_err: receive descriptor status and error fields
  2353. * @csum: receive descriptor csum field
  2354. * @sk_buff: socket buffer with received data
  2355. **/
  2356. static inline void
  2357. e1000_rx_checksum(struct e1000_adapter *adapter,
  2358. uint32_t status_err, uint32_t csum,
  2359. struct sk_buff *skb)
  2360. {
  2361. uint16_t status = (uint16_t)status_err;
  2362. uint8_t errors = (uint8_t)(status_err >> 24);
  2363. skb->ip_summed = CHECKSUM_NONE;
  2364. /* 82543 or newer only */
  2365. if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2366. /* Ignore Checksum bit is set */
  2367. if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2368. /* TCP/UDP checksum error bit is set */
  2369. if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2370. /* let the stack verify checksum errors */
  2371. adapter->hw_csum_err++;
  2372. return;
  2373. }
  2374. /* TCP/UDP Checksum has not been calculated */
  2375. if(adapter->hw.mac_type <= e1000_82547_rev_2) {
  2376. if(!(status & E1000_RXD_STAT_TCPCS))
  2377. return;
  2378. } else {
  2379. if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2380. return;
  2381. }
  2382. /* It must be a TCP or UDP packet with a valid checksum */
  2383. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2384. /* TCP checksum is good */
  2385. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2386. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2387. /* IP fragment with UDP payload */
  2388. /* Hardware complements the payload checksum, so we undo it
  2389. * and then put the value in host order for further stack use.
  2390. */
  2391. csum = ntohl(csum ^ 0xFFFF);
  2392. skb->csum = csum;
  2393. skb->ip_summed = CHECKSUM_HW;
  2394. }
  2395. adapter->hw_csum_good++;
  2396. }
  2397. /**
  2398. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  2399. * @adapter: board private structure
  2400. **/
  2401. static boolean_t
  2402. #ifdef CONFIG_E1000_NAPI
  2403. e1000_clean_rx_irq(struct e1000_adapter *adapter, int *work_done,
  2404. int work_to_do)
  2405. #else
  2406. e1000_clean_rx_irq(struct e1000_adapter *adapter)
  2407. #endif
  2408. {
  2409. struct e1000_desc_ring *rx_ring = &adapter->rx_ring;
  2410. struct net_device *netdev = adapter->netdev;
  2411. struct pci_dev *pdev = adapter->pdev;
  2412. struct e1000_rx_desc *rx_desc;
  2413. struct e1000_buffer *buffer_info;
  2414. struct sk_buff *skb;
  2415. unsigned long flags;
  2416. uint32_t length;
  2417. uint8_t last_byte;
  2418. unsigned int i;
  2419. boolean_t cleaned = FALSE;
  2420. i = rx_ring->next_to_clean;
  2421. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2422. while(rx_desc->status & E1000_RXD_STAT_DD) {
  2423. buffer_info = &rx_ring->buffer_info[i];
  2424. #ifdef CONFIG_E1000_NAPI
  2425. if(*work_done >= work_to_do)
  2426. break;
  2427. (*work_done)++;
  2428. #endif
  2429. cleaned = TRUE;
  2430. pci_unmap_single(pdev,
  2431. buffer_info->dma,
  2432. buffer_info->length,
  2433. PCI_DMA_FROMDEVICE);
  2434. skb = buffer_info->skb;
  2435. length = le16_to_cpu(rx_desc->length);
  2436. if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
  2437. /* All receives must fit into a single buffer */
  2438. E1000_DBG("%s: Receive packet consumed multiple"
  2439. " buffers\n", netdev->name);
  2440. dev_kfree_skb_irq(skb);
  2441. goto next_desc;
  2442. }
  2443. if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  2444. last_byte = *(skb->data + length - 1);
  2445. if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
  2446. rx_desc->errors, length, last_byte)) {
  2447. spin_lock_irqsave(&adapter->stats_lock, flags);
  2448. e1000_tbi_adjust_stats(&adapter->hw,
  2449. &adapter->stats,
  2450. length, skb->data);
  2451. spin_unlock_irqrestore(&adapter->stats_lock,
  2452. flags);
  2453. length--;
  2454. } else {
  2455. dev_kfree_skb_irq(skb);
  2456. goto next_desc;
  2457. }
  2458. }
  2459. /* Good Receive */
  2460. skb_put(skb, length - ETHERNET_FCS_SIZE);
  2461. /* Receive Checksum Offload */
  2462. e1000_rx_checksum(adapter,
  2463. (uint32_t)(rx_desc->status) |
  2464. ((uint32_t)(rx_desc->errors) << 24),
  2465. rx_desc->csum, skb);
  2466. skb->protocol = eth_type_trans(skb, netdev);
  2467. #ifdef CONFIG_E1000_NAPI
  2468. if(unlikely(adapter->vlgrp &&
  2469. (rx_desc->status & E1000_RXD_STAT_VP))) {
  2470. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  2471. le16_to_cpu(rx_desc->special) &
  2472. E1000_RXD_SPC_VLAN_MASK);
  2473. } else {
  2474. netif_receive_skb(skb);
  2475. }
  2476. #else /* CONFIG_E1000_NAPI */
  2477. if(unlikely(adapter->vlgrp &&
  2478. (rx_desc->status & E1000_RXD_STAT_VP))) {
  2479. vlan_hwaccel_rx(skb, adapter->vlgrp,
  2480. le16_to_cpu(rx_desc->special) &
  2481. E1000_RXD_SPC_VLAN_MASK);
  2482. } else {
  2483. netif_rx(skb);
  2484. }
  2485. #endif /* CONFIG_E1000_NAPI */
  2486. netdev->last_rx = jiffies;
  2487. next_desc:
  2488. rx_desc->status = 0;
  2489. buffer_info->skb = NULL;
  2490. if(unlikely(++i == rx_ring->count)) i = 0;
  2491. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2492. }
  2493. rx_ring->next_to_clean = i;
  2494. adapter->alloc_rx_buf(adapter);
  2495. return cleaned;
  2496. }
  2497. /**
  2498. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  2499. * @adapter: board private structure
  2500. **/
  2501. static boolean_t
  2502. #ifdef CONFIG_E1000_NAPI
  2503. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, int *work_done,
  2504. int work_to_do)
  2505. #else
  2506. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter)
  2507. #endif
  2508. {
  2509. struct e1000_desc_ring *rx_ring = &adapter->rx_ring;
  2510. union e1000_rx_desc_packet_split *rx_desc;
  2511. struct net_device *netdev = adapter->netdev;
  2512. struct pci_dev *pdev = adapter->pdev;
  2513. struct e1000_buffer *buffer_info;
  2514. struct e1000_ps_page *ps_page;
  2515. struct e1000_ps_page_dma *ps_page_dma;
  2516. struct sk_buff *skb;
  2517. unsigned int i, j;
  2518. uint32_t length, staterr;
  2519. boolean_t cleaned = FALSE;
  2520. i = rx_ring->next_to_clean;
  2521. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  2522. staterr = rx_desc->wb.middle.status_error;
  2523. while(staterr & E1000_RXD_STAT_DD) {
  2524. buffer_info = &rx_ring->buffer_info[i];
  2525. ps_page = &rx_ring->ps_page[i];
  2526. ps_page_dma = &rx_ring->ps_page_dma[i];
  2527. #ifdef CONFIG_E1000_NAPI
  2528. if(unlikely(*work_done >= work_to_do))
  2529. break;
  2530. (*work_done)++;
  2531. #endif
  2532. cleaned = TRUE;
  2533. pci_unmap_single(pdev, buffer_info->dma,
  2534. buffer_info->length,
  2535. PCI_DMA_FROMDEVICE);
  2536. skb = buffer_info->skb;
  2537. if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  2538. E1000_DBG("%s: Packet Split buffers didn't pick up"
  2539. " the full packet\n", netdev->name);
  2540. dev_kfree_skb_irq(skb);
  2541. goto next_desc;
  2542. }
  2543. if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  2544. dev_kfree_skb_irq(skb);
  2545. goto next_desc;
  2546. }
  2547. length = le16_to_cpu(rx_desc->wb.middle.length0);
  2548. if(unlikely(!length)) {
  2549. E1000_DBG("%s: Last part of the packet spanning"
  2550. " multiple descriptors\n", netdev->name);
  2551. dev_kfree_skb_irq(skb);
  2552. goto next_desc;
  2553. }
  2554. /* Good Receive */
  2555. skb_put(skb, length);
  2556. for(j = 0; j < PS_PAGE_BUFFERS; j++) {
  2557. if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
  2558. break;
  2559. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  2560. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  2561. ps_page_dma->ps_page_dma[j] = 0;
  2562. skb_shinfo(skb)->frags[j].page =
  2563. ps_page->ps_page[j];
  2564. ps_page->ps_page[j] = NULL;
  2565. skb_shinfo(skb)->frags[j].page_offset = 0;
  2566. skb_shinfo(skb)->frags[j].size = length;
  2567. skb_shinfo(skb)->nr_frags++;
  2568. skb->len += length;
  2569. skb->data_len += length;
  2570. }
  2571. e1000_rx_checksum(adapter, staterr,
  2572. rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
  2573. skb->protocol = eth_type_trans(skb, netdev);
  2574. #ifdef HAVE_RX_ZERO_COPY
  2575. if(likely(rx_desc->wb.upper.header_status &
  2576. E1000_RXDPS_HDRSTAT_HDRSP))
  2577. skb_shinfo(skb)->zero_copy = TRUE;
  2578. #endif
  2579. #ifdef CONFIG_E1000_NAPI
  2580. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  2581. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  2582. le16_to_cpu(rx_desc->wb.middle.vlan &
  2583. E1000_RXD_SPC_VLAN_MASK));
  2584. } else {
  2585. netif_receive_skb(skb);
  2586. }
  2587. #else /* CONFIG_E1000_NAPI */
  2588. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  2589. vlan_hwaccel_rx(skb, adapter->vlgrp,
  2590. le16_to_cpu(rx_desc->wb.middle.vlan &
  2591. E1000_RXD_SPC_VLAN_MASK));
  2592. } else {
  2593. netif_rx(skb);
  2594. }
  2595. #endif /* CONFIG_E1000_NAPI */
  2596. netdev->last_rx = jiffies;
  2597. next_desc:
  2598. rx_desc->wb.middle.status_error &= ~0xFF;
  2599. buffer_info->skb = NULL;
  2600. if(unlikely(++i == rx_ring->count)) i = 0;
  2601. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  2602. staterr = rx_desc->wb.middle.status_error;
  2603. }
  2604. rx_ring->next_to_clean = i;
  2605. adapter->alloc_rx_buf(adapter);
  2606. return cleaned;
  2607. }
  2608. /**
  2609. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  2610. * @adapter: address of board private structure
  2611. **/
  2612. static void
  2613. e1000_alloc_rx_buffers(struct e1000_adapter *adapter)
  2614. {
  2615. struct e1000_desc_ring *rx_ring = &adapter->rx_ring;
  2616. struct net_device *netdev = adapter->netdev;
  2617. struct pci_dev *pdev = adapter->pdev;
  2618. struct e1000_rx_desc *rx_desc;
  2619. struct e1000_buffer *buffer_info;
  2620. struct sk_buff *skb;
  2621. unsigned int i, bufsz;
  2622. i = rx_ring->next_to_use;
  2623. buffer_info = &rx_ring->buffer_info[i];
  2624. while(!buffer_info->skb) {
  2625. bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  2626. skb = dev_alloc_skb(bufsz);
  2627. if(unlikely(!skb)) {
  2628. /* Better luck next round */
  2629. break;
  2630. }
  2631. /* fix for errata 23, cant cross 64kB boundary */
  2632. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  2633. struct sk_buff *oldskb = skb;
  2634. DPRINTK(RX_ERR,ERR,
  2635. "skb align check failed: %u bytes at %p\n",
  2636. bufsz, skb->data);
  2637. /* try again, without freeing the previous */
  2638. skb = dev_alloc_skb(bufsz);
  2639. if (!skb) {
  2640. dev_kfree_skb(oldskb);
  2641. break;
  2642. }
  2643. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  2644. /* give up */
  2645. dev_kfree_skb(skb);
  2646. dev_kfree_skb(oldskb);
  2647. break; /* while !buffer_info->skb */
  2648. } else {
  2649. /* move on with the new one */
  2650. dev_kfree_skb(oldskb);
  2651. }
  2652. }
  2653. /* Make buffer alignment 2 beyond a 16 byte boundary
  2654. * this will result in a 16 byte aligned IP header after
  2655. * the 14 byte MAC header is removed
  2656. */
  2657. skb_reserve(skb, NET_IP_ALIGN);
  2658. skb->dev = netdev;
  2659. buffer_info->skb = skb;
  2660. buffer_info->length = adapter->rx_buffer_len;
  2661. buffer_info->dma = pci_map_single(pdev,
  2662. skb->data,
  2663. adapter->rx_buffer_len,
  2664. PCI_DMA_FROMDEVICE);
  2665. /* fix for errata 23, cant cross 64kB boundary */
  2666. if(!e1000_check_64k_bound(adapter,
  2667. (void *)(unsigned long)buffer_info->dma,
  2668. adapter->rx_buffer_len)) {
  2669. DPRINTK(RX_ERR,ERR,
  2670. "dma align check failed: %u bytes at %ld\n",
  2671. adapter->rx_buffer_len, (unsigned long)buffer_info->dma);
  2672. dev_kfree_skb(skb);
  2673. buffer_info->skb = NULL;
  2674. pci_unmap_single(pdev,
  2675. buffer_info->dma,
  2676. adapter->rx_buffer_len,
  2677. PCI_DMA_FROMDEVICE);
  2678. break; /* while !buffer_info->skb */
  2679. }
  2680. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2681. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2682. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  2683. /* Force memory writes to complete before letting h/w
  2684. * know there are new descriptors to fetch. (Only
  2685. * applicable for weak-ordered memory model archs,
  2686. * such as IA-64). */
  2687. wmb();
  2688. E1000_WRITE_REG(&adapter->hw, RDT, i);
  2689. }
  2690. if(unlikely(++i == rx_ring->count)) i = 0;
  2691. buffer_info = &rx_ring->buffer_info[i];
  2692. }
  2693. rx_ring->next_to_use = i;
  2694. }
  2695. /**
  2696. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  2697. * @adapter: address of board private structure
  2698. **/
  2699. static void
  2700. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter)
  2701. {
  2702. struct e1000_desc_ring *rx_ring = &adapter->rx_ring;
  2703. struct net_device *netdev = adapter->netdev;
  2704. struct pci_dev *pdev = adapter->pdev;
  2705. union e1000_rx_desc_packet_split *rx_desc;
  2706. struct e1000_buffer *buffer_info;
  2707. struct e1000_ps_page *ps_page;
  2708. struct e1000_ps_page_dma *ps_page_dma;
  2709. struct sk_buff *skb;
  2710. unsigned int i, j;
  2711. i = rx_ring->next_to_use;
  2712. buffer_info = &rx_ring->buffer_info[i];
  2713. ps_page = &rx_ring->ps_page[i];
  2714. ps_page_dma = &rx_ring->ps_page_dma[i];
  2715. while(!buffer_info->skb) {
  2716. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  2717. for(j = 0; j < PS_PAGE_BUFFERS; j++) {
  2718. if(unlikely(!ps_page->ps_page[j])) {
  2719. ps_page->ps_page[j] =
  2720. alloc_page(GFP_ATOMIC);
  2721. if(unlikely(!ps_page->ps_page[j]))
  2722. goto no_buffers;
  2723. ps_page_dma->ps_page_dma[j] =
  2724. pci_map_page(pdev,
  2725. ps_page->ps_page[j],
  2726. 0, PAGE_SIZE,
  2727. PCI_DMA_FROMDEVICE);
  2728. }
  2729. /* Refresh the desc even if buffer_addrs didn't
  2730. * change because each write-back erases this info.
  2731. */
  2732. rx_desc->read.buffer_addr[j+1] =
  2733. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  2734. }
  2735. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  2736. if(unlikely(!skb))
  2737. break;
  2738. /* Make buffer alignment 2 beyond a 16 byte boundary
  2739. * this will result in a 16 byte aligned IP header after
  2740. * the 14 byte MAC header is removed
  2741. */
  2742. skb_reserve(skb, NET_IP_ALIGN);
  2743. skb->dev = netdev;
  2744. buffer_info->skb = skb;
  2745. buffer_info->length = adapter->rx_ps_bsize0;
  2746. buffer_info->dma = pci_map_single(pdev, skb->data,
  2747. adapter->rx_ps_bsize0,
  2748. PCI_DMA_FROMDEVICE);
  2749. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  2750. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  2751. /* Force memory writes to complete before letting h/w
  2752. * know there are new descriptors to fetch. (Only
  2753. * applicable for weak-ordered memory model archs,
  2754. * such as IA-64). */
  2755. wmb();
  2756. /* Hardware increments by 16 bytes, but packet split
  2757. * descriptors are 32 bytes...so we increment tail
  2758. * twice as much.
  2759. */
  2760. E1000_WRITE_REG(&adapter->hw, RDT, i<<1);
  2761. }
  2762. if(unlikely(++i == rx_ring->count)) i = 0;
  2763. buffer_info = &rx_ring->buffer_info[i];
  2764. ps_page = &rx_ring->ps_page[i];
  2765. ps_page_dma = &rx_ring->ps_page_dma[i];
  2766. }
  2767. no_buffers:
  2768. rx_ring->next_to_use = i;
  2769. }
  2770. /**
  2771. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  2772. * @adapter:
  2773. **/
  2774. static void
  2775. e1000_smartspeed(struct e1000_adapter *adapter)
  2776. {
  2777. uint16_t phy_status;
  2778. uint16_t phy_ctrl;
  2779. if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  2780. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  2781. return;
  2782. if(adapter->smartspeed == 0) {
  2783. /* If Master/Slave config fault is asserted twice,
  2784. * we assume back-to-back */
  2785. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  2786. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  2787. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  2788. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  2789. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  2790. if(phy_ctrl & CR_1000T_MS_ENABLE) {
  2791. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  2792. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  2793. phy_ctrl);
  2794. adapter->smartspeed++;
  2795. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  2796. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  2797. &phy_ctrl)) {
  2798. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  2799. MII_CR_RESTART_AUTO_NEG);
  2800. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  2801. phy_ctrl);
  2802. }
  2803. }
  2804. return;
  2805. } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  2806. /* If still no link, perhaps using 2/3 pair cable */
  2807. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  2808. phy_ctrl |= CR_1000T_MS_ENABLE;
  2809. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  2810. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  2811. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  2812. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  2813. MII_CR_RESTART_AUTO_NEG);
  2814. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  2815. }
  2816. }
  2817. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  2818. if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  2819. adapter->smartspeed = 0;
  2820. }
  2821. /**
  2822. * e1000_ioctl -
  2823. * @netdev:
  2824. * @ifreq:
  2825. * @cmd:
  2826. **/
  2827. static int
  2828. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  2829. {
  2830. switch (cmd) {
  2831. case SIOCGMIIPHY:
  2832. case SIOCGMIIREG:
  2833. case SIOCSMIIREG:
  2834. return e1000_mii_ioctl(netdev, ifr, cmd);
  2835. default:
  2836. return -EOPNOTSUPP;
  2837. }
  2838. }
  2839. /**
  2840. * e1000_mii_ioctl -
  2841. * @netdev:
  2842. * @ifreq:
  2843. * @cmd:
  2844. **/
  2845. static int
  2846. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  2847. {
  2848. struct e1000_adapter *adapter = netdev->priv;
  2849. struct mii_ioctl_data *data = if_mii(ifr);
  2850. int retval;
  2851. uint16_t mii_reg;
  2852. uint16_t spddplx;
  2853. if(adapter->hw.media_type != e1000_media_type_copper)
  2854. return -EOPNOTSUPP;
  2855. switch (cmd) {
  2856. case SIOCGMIIPHY:
  2857. data->phy_id = adapter->hw.phy_addr;
  2858. break;
  2859. case SIOCGMIIREG:
  2860. if (!capable(CAP_NET_ADMIN))
  2861. return -EPERM;
  2862. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  2863. &data->val_out))
  2864. return -EIO;
  2865. break;
  2866. case SIOCSMIIREG:
  2867. if (!capable(CAP_NET_ADMIN))
  2868. return -EPERM;
  2869. if (data->reg_num & ~(0x1F))
  2870. return -EFAULT;
  2871. mii_reg = data->val_in;
  2872. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  2873. mii_reg))
  2874. return -EIO;
  2875. if (adapter->hw.phy_type == e1000_phy_m88) {
  2876. switch (data->reg_num) {
  2877. case PHY_CTRL:
  2878. if(mii_reg & MII_CR_POWER_DOWN)
  2879. break;
  2880. if(mii_reg & MII_CR_AUTO_NEG_EN) {
  2881. adapter->hw.autoneg = 1;
  2882. adapter->hw.autoneg_advertised = 0x2F;
  2883. } else {
  2884. if (mii_reg & 0x40)
  2885. spddplx = SPEED_1000;
  2886. else if (mii_reg & 0x2000)
  2887. spddplx = SPEED_100;
  2888. else
  2889. spddplx = SPEED_10;
  2890. spddplx += (mii_reg & 0x100)
  2891. ? FULL_DUPLEX :
  2892. HALF_DUPLEX;
  2893. retval = e1000_set_spd_dplx(adapter,
  2894. spddplx);
  2895. if(retval)
  2896. return retval;
  2897. }
  2898. if(netif_running(adapter->netdev)) {
  2899. e1000_down(adapter);
  2900. e1000_up(adapter);
  2901. } else
  2902. e1000_reset(adapter);
  2903. break;
  2904. case M88E1000_PHY_SPEC_CTRL:
  2905. case M88E1000_EXT_PHY_SPEC_CTRL:
  2906. if (e1000_phy_reset(&adapter->hw))
  2907. return -EIO;
  2908. break;
  2909. }
  2910. } else {
  2911. switch (data->reg_num) {
  2912. case PHY_CTRL:
  2913. if(mii_reg & MII_CR_POWER_DOWN)
  2914. break;
  2915. if(netif_running(adapter->netdev)) {
  2916. e1000_down(adapter);
  2917. e1000_up(adapter);
  2918. } else
  2919. e1000_reset(adapter);
  2920. break;
  2921. }
  2922. }
  2923. break;
  2924. default:
  2925. return -EOPNOTSUPP;
  2926. }
  2927. return E1000_SUCCESS;
  2928. }
  2929. void
  2930. e1000_pci_set_mwi(struct e1000_hw *hw)
  2931. {
  2932. struct e1000_adapter *adapter = hw->back;
  2933. int ret;
  2934. ret = pci_set_mwi(adapter->pdev);
  2935. }
  2936. void
  2937. e1000_pci_clear_mwi(struct e1000_hw *hw)
  2938. {
  2939. struct e1000_adapter *adapter = hw->back;
  2940. pci_clear_mwi(adapter->pdev);
  2941. }
  2942. void
  2943. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  2944. {
  2945. struct e1000_adapter *adapter = hw->back;
  2946. pci_read_config_word(adapter->pdev, reg, value);
  2947. }
  2948. void
  2949. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  2950. {
  2951. struct e1000_adapter *adapter = hw->back;
  2952. pci_write_config_word(adapter->pdev, reg, *value);
  2953. }
  2954. uint32_t
  2955. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  2956. {
  2957. return inl(port);
  2958. }
  2959. void
  2960. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  2961. {
  2962. outl(value, port);
  2963. }
  2964. static void
  2965. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  2966. {
  2967. struct e1000_adapter *adapter = netdev->priv;
  2968. uint32_t ctrl, rctl;
  2969. e1000_irq_disable(adapter);
  2970. adapter->vlgrp = grp;
  2971. if(grp) {
  2972. /* enable VLAN tag insert/strip */
  2973. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  2974. ctrl |= E1000_CTRL_VME;
  2975. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  2976. /* enable VLAN receive filtering */
  2977. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  2978. rctl |= E1000_RCTL_VFE;
  2979. rctl &= ~E1000_RCTL_CFIEN;
  2980. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  2981. e1000_update_mng_vlan(adapter);
  2982. } else {
  2983. /* disable VLAN tag insert/strip */
  2984. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  2985. ctrl &= ~E1000_CTRL_VME;
  2986. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  2987. /* disable VLAN filtering */
  2988. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  2989. rctl &= ~E1000_RCTL_VFE;
  2990. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  2991. if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  2992. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  2993. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  2994. }
  2995. }
  2996. e1000_irq_enable(adapter);
  2997. }
  2998. static void
  2999. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3000. {
  3001. struct e1000_adapter *adapter = netdev->priv;
  3002. uint32_t vfta, index;
  3003. if((adapter->hw.mng_cookie.status &
  3004. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3005. (vid == adapter->mng_vlan_id))
  3006. return;
  3007. /* add VID to filter table */
  3008. index = (vid >> 5) & 0x7F;
  3009. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3010. vfta |= (1 << (vid & 0x1F));
  3011. e1000_write_vfta(&adapter->hw, index, vfta);
  3012. }
  3013. static void
  3014. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3015. {
  3016. struct e1000_adapter *adapter = netdev->priv;
  3017. uint32_t vfta, index;
  3018. e1000_irq_disable(adapter);
  3019. if(adapter->vlgrp)
  3020. adapter->vlgrp->vlan_devices[vid] = NULL;
  3021. e1000_irq_enable(adapter);
  3022. if((adapter->hw.mng_cookie.status &
  3023. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3024. (vid == adapter->mng_vlan_id))
  3025. return;
  3026. /* remove VID from filter table */
  3027. index = (vid >> 5) & 0x7F;
  3028. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3029. vfta &= ~(1 << (vid & 0x1F));
  3030. e1000_write_vfta(&adapter->hw, index, vfta);
  3031. }
  3032. static void
  3033. e1000_restore_vlan(struct e1000_adapter *adapter)
  3034. {
  3035. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3036. if(adapter->vlgrp) {
  3037. uint16_t vid;
  3038. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3039. if(!adapter->vlgrp->vlan_devices[vid])
  3040. continue;
  3041. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3042. }
  3043. }
  3044. }
  3045. int
  3046. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3047. {
  3048. adapter->hw.autoneg = 0;
  3049. switch(spddplx) {
  3050. case SPEED_10 + DUPLEX_HALF:
  3051. adapter->hw.forced_speed_duplex = e1000_10_half;
  3052. break;
  3053. case SPEED_10 + DUPLEX_FULL:
  3054. adapter->hw.forced_speed_duplex = e1000_10_full;
  3055. break;
  3056. case SPEED_100 + DUPLEX_HALF:
  3057. adapter->hw.forced_speed_duplex = e1000_100_half;
  3058. break;
  3059. case SPEED_100 + DUPLEX_FULL:
  3060. adapter->hw.forced_speed_duplex = e1000_100_full;
  3061. break;
  3062. case SPEED_1000 + DUPLEX_FULL:
  3063. adapter->hw.autoneg = 1;
  3064. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3065. break;
  3066. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3067. default:
  3068. DPRINTK(PROBE, ERR,
  3069. "Unsupported Speed/Duplexity configuration\n");
  3070. return -EINVAL;
  3071. }
  3072. return 0;
  3073. }
  3074. static int
  3075. e1000_notify_reboot(struct notifier_block *nb, unsigned long event, void *p)
  3076. {
  3077. struct pci_dev *pdev = NULL;
  3078. switch(event) {
  3079. case SYS_DOWN:
  3080. case SYS_HALT:
  3081. case SYS_POWER_OFF:
  3082. while((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
  3083. if(pci_dev_driver(pdev) == &e1000_driver)
  3084. e1000_suspend(pdev, 3);
  3085. }
  3086. }
  3087. return NOTIFY_DONE;
  3088. }
  3089. static int
  3090. e1000_suspend(struct pci_dev *pdev, uint32_t state)
  3091. {
  3092. struct net_device *netdev = pci_get_drvdata(pdev);
  3093. struct e1000_adapter *adapter = netdev->priv;
  3094. uint32_t ctrl, ctrl_ext, rctl, manc, status, swsm;
  3095. uint32_t wufc = adapter->wol;
  3096. netif_device_detach(netdev);
  3097. if(netif_running(netdev))
  3098. e1000_down(adapter);
  3099. status = E1000_READ_REG(&adapter->hw, STATUS);
  3100. if(status & E1000_STATUS_LU)
  3101. wufc &= ~E1000_WUFC_LNKC;
  3102. if(wufc) {
  3103. e1000_setup_rctl(adapter);
  3104. e1000_set_multi(netdev);
  3105. /* turn on all-multi mode if wake on multicast is enabled */
  3106. if(adapter->wol & E1000_WUFC_MC) {
  3107. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3108. rctl |= E1000_RCTL_MPE;
  3109. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3110. }
  3111. if(adapter->hw.mac_type >= e1000_82540) {
  3112. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3113. /* advertise wake from D3Cold */
  3114. #define E1000_CTRL_ADVD3WUC 0x00100000
  3115. /* phy power management enable */
  3116. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3117. ctrl |= E1000_CTRL_ADVD3WUC |
  3118. E1000_CTRL_EN_PHY_PWR_MGMT;
  3119. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3120. }
  3121. if(adapter->hw.media_type == e1000_media_type_fiber ||
  3122. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3123. /* keep the laser running in D3 */
  3124. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3125. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3126. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3127. }
  3128. /* Allow time for pending master requests to run */
  3129. e1000_disable_pciex_master(&adapter->hw);
  3130. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3131. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3132. pci_enable_wake(pdev, 3, 1);
  3133. pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
  3134. } else {
  3135. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3136. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3137. pci_enable_wake(pdev, 3, 0);
  3138. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  3139. }
  3140. pci_save_state(pdev);
  3141. if(adapter->hw.mac_type >= e1000_82540 &&
  3142. adapter->hw.media_type == e1000_media_type_copper) {
  3143. manc = E1000_READ_REG(&adapter->hw, MANC);
  3144. if(manc & E1000_MANC_SMBUS_EN) {
  3145. manc |= E1000_MANC_ARP_EN;
  3146. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3147. pci_enable_wake(pdev, 3, 1);
  3148. pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
  3149. }
  3150. }
  3151. switch(adapter->hw.mac_type) {
  3152. case e1000_82573:
  3153. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  3154. E1000_WRITE_REG(&adapter->hw, SWSM,
  3155. swsm & ~E1000_SWSM_DRV_LOAD);
  3156. break;
  3157. default:
  3158. break;
  3159. }
  3160. pci_disable_device(pdev);
  3161. state = (state > 0) ? 3 : 0;
  3162. pci_set_power_state(pdev, state);
  3163. return 0;
  3164. }
  3165. #ifdef CONFIG_PM
  3166. static int
  3167. e1000_resume(struct pci_dev *pdev)
  3168. {
  3169. struct net_device *netdev = pci_get_drvdata(pdev);
  3170. struct e1000_adapter *adapter = netdev->priv;
  3171. uint32_t manc, ret, swsm;
  3172. pci_set_power_state(pdev, 0);
  3173. pci_restore_state(pdev);
  3174. ret = pci_enable_device(pdev);
  3175. pci_set_master(pdev);
  3176. pci_enable_wake(pdev, 3, 0);
  3177. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  3178. e1000_reset(adapter);
  3179. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3180. if(netif_running(netdev))
  3181. e1000_up(adapter);
  3182. netif_device_attach(netdev);
  3183. if(adapter->hw.mac_type >= e1000_82540 &&
  3184. adapter->hw.media_type == e1000_media_type_copper) {
  3185. manc = E1000_READ_REG(&adapter->hw, MANC);
  3186. manc &= ~(E1000_MANC_ARP_EN);
  3187. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3188. }
  3189. switch(adapter->hw.mac_type) {
  3190. case e1000_82573:
  3191. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  3192. E1000_WRITE_REG(&adapter->hw, SWSM,
  3193. swsm | E1000_SWSM_DRV_LOAD);
  3194. break;
  3195. default:
  3196. break;
  3197. }
  3198. return 0;
  3199. }
  3200. #endif
  3201. #ifdef CONFIG_NET_POLL_CONTROLLER
  3202. /*
  3203. * Polling 'interrupt' - used by things like netconsole to send skbs
  3204. * without having to re-enable interrupts. It's not called while
  3205. * the interrupt routine is executing.
  3206. */
  3207. static void
  3208. e1000_netpoll (struct net_device *netdev)
  3209. {
  3210. struct e1000_adapter *adapter = netdev->priv;
  3211. disable_irq(adapter->pdev->irq);
  3212. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3213. enable_irq(adapter->pdev->irq);
  3214. }
  3215. #endif
  3216. /* e1000_main.c */