pciehp.h 7.5 KB

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  1. /*
  2. * PCI Express Hot Plug Controller Driver
  3. *
  4. * Copyright (C) 1995,2001 Compaq Computer Corporation
  5. * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
  6. * Copyright (C) 2001 IBM Corp.
  7. * Copyright (C) 2003-2004 Intel Corporation
  8. *
  9. * All rights reserved.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  19. * NON INFRINGEMENT. See the GNU General Public License for more
  20. * details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
  27. *
  28. */
  29. #ifndef _PCIEHP_H
  30. #define _PCIEHP_H
  31. #include <linux/types.h>
  32. #include <linux/pci.h>
  33. #include <linux/pci_hotplug.h>
  34. #include <linux/delay.h>
  35. #include <linux/sched.h> /* signal_pending() */
  36. #include <linux/pcieport_if.h>
  37. #include <linux/mutex.h>
  38. #define MY_NAME "pciehp"
  39. extern int pciehp_poll_mode;
  40. extern int pciehp_poll_time;
  41. extern int pciehp_debug;
  42. extern int pciehp_force;
  43. extern struct workqueue_struct *pciehp_wq;
  44. #define dbg(format, arg...) \
  45. do { \
  46. if (pciehp_debug) \
  47. printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); \
  48. } while (0)
  49. #define err(format, arg...) \
  50. printk(KERN_ERR "%s: " format, MY_NAME , ## arg)
  51. #define info(format, arg...) \
  52. printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
  53. #define warn(format, arg...) \
  54. printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
  55. #define ctrl_dbg(ctrl, format, arg...) \
  56. do { \
  57. if (pciehp_debug) \
  58. dev_printk(KERN_DEBUG, &ctrl->pcie->device, \
  59. format, ## arg); \
  60. } while (0)
  61. #define ctrl_err(ctrl, format, arg...) \
  62. dev_err(&ctrl->pcie->device, format, ## arg)
  63. #define ctrl_info(ctrl, format, arg...) \
  64. dev_info(&ctrl->pcie->device, format, ## arg)
  65. #define ctrl_warn(ctrl, format, arg...) \
  66. dev_warn(&ctrl->pcie->device, format, ## arg)
  67. #define SLOT_NAME_SIZE 10
  68. struct slot {
  69. u8 state;
  70. u32 number;
  71. struct controller *ctrl;
  72. struct hpc_ops *hpc_ops;
  73. struct hotplug_slot *hotplug_slot;
  74. struct delayed_work work; /* work for button event */
  75. struct mutex lock;
  76. };
  77. struct event_info {
  78. u32 event_type;
  79. struct slot *p_slot;
  80. struct work_struct work;
  81. };
  82. struct controller {
  83. struct mutex crit_sect; /* critical section mutex */
  84. struct mutex ctrl_lock; /* controller lock */
  85. struct pci_dev *pci_dev;
  86. struct pcie_device *pcie; /* PCI Express port service */
  87. struct slot *slot;
  88. struct hpc_ops *hpc_ops;
  89. wait_queue_head_t queue; /* sleep & wake process */
  90. u8 slot_device_offset;
  91. u32 first_slot; /* First physical slot number */ /* PCIE only has 1 slot */
  92. u8 slot_bus; /* Bus where the slots handled by this controller sit */
  93. u32 slot_cap;
  94. u8 cap_base;
  95. struct timer_list poll_timer;
  96. unsigned int cmd_busy:1;
  97. unsigned int no_cmd_complete:1;
  98. unsigned int link_active_reporting:1;
  99. unsigned int notification_enabled:1;
  100. unsigned int power_fault_detected;
  101. };
  102. #define INT_BUTTON_IGNORE 0
  103. #define INT_PRESENCE_ON 1
  104. #define INT_PRESENCE_OFF 2
  105. #define INT_SWITCH_CLOSE 3
  106. #define INT_SWITCH_OPEN 4
  107. #define INT_POWER_FAULT 5
  108. #define INT_POWER_FAULT_CLEAR 6
  109. #define INT_BUTTON_PRESS 7
  110. #define INT_BUTTON_RELEASE 8
  111. #define INT_BUTTON_CANCEL 9
  112. #define STATIC_STATE 0
  113. #define BLINKINGON_STATE 1
  114. #define BLINKINGOFF_STATE 2
  115. #define POWERON_STATE 3
  116. #define POWEROFF_STATE 4
  117. /* Error messages */
  118. #define INTERLOCK_OPEN 0x00000002
  119. #define ADD_NOT_SUPPORTED 0x00000003
  120. #define CARD_FUNCTIONING 0x00000005
  121. #define ADAPTER_NOT_SAME 0x00000006
  122. #define NO_ADAPTER_PRESENT 0x00000009
  123. #define NOT_ENOUGH_RESOURCES 0x0000000B
  124. #define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C
  125. #define WRONG_BUS_FREQUENCY 0x0000000D
  126. #define POWER_FAILURE 0x0000000E
  127. /* Field definitions in Slot Capabilities Register */
  128. #define ATTN_BUTTN_PRSN 0x00000001
  129. #define PWR_CTRL_PRSN 0x00000002
  130. #define MRL_SENS_PRSN 0x00000004
  131. #define ATTN_LED_PRSN 0x00000008
  132. #define PWR_LED_PRSN 0x00000010
  133. #define HP_SUPR_RM_SUP 0x00000020
  134. #define EMI_PRSN 0x00020000
  135. #define NO_CMD_CMPL_SUP 0x00040000
  136. #define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & ATTN_BUTTN_PRSN)
  137. #define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PWR_CTRL_PRSN)
  138. #define MRL_SENS(ctrl) ((ctrl)->slot_cap & MRL_SENS_PRSN)
  139. #define ATTN_LED(ctrl) ((ctrl)->slot_cap & ATTN_LED_PRSN)
  140. #define PWR_LED(ctrl) ((ctrl)->slot_cap & PWR_LED_PRSN)
  141. #define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & HP_SUPR_RM_SUP)
  142. #define EMI(ctrl) ((ctrl)->slot_cap & EMI_PRSN)
  143. #define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & NO_CMD_CMPL_SUP)
  144. extern int pciehp_sysfs_enable_slot(struct slot *slot);
  145. extern int pciehp_sysfs_disable_slot(struct slot *slot);
  146. extern u8 pciehp_handle_attention_button(struct slot *p_slot);
  147. extern u8 pciehp_handle_switch_change(struct slot *p_slot);
  148. extern u8 pciehp_handle_presence_change(struct slot *p_slot);
  149. extern u8 pciehp_handle_power_fault(struct slot *p_slot);
  150. extern int pciehp_configure_device(struct slot *p_slot);
  151. extern int pciehp_unconfigure_device(struct slot *p_slot);
  152. extern void pciehp_queue_pushbutton_work(struct work_struct *work);
  153. struct controller *pcie_init(struct pcie_device *dev);
  154. int pcie_init_notification(struct controller *ctrl);
  155. int pciehp_enable_slot(struct slot *p_slot);
  156. int pciehp_disable_slot(struct slot *p_slot);
  157. int pcie_enable_notification(struct controller *ctrl);
  158. static inline const char *slot_name(struct slot *slot)
  159. {
  160. return hotplug_slot_name(slot->hotplug_slot);
  161. }
  162. struct hpc_ops {
  163. int (*power_on_slot)(struct slot *slot);
  164. int (*power_off_slot)(struct slot *slot);
  165. int (*get_power_status)(struct slot *slot, u8 *status);
  166. int (*get_attention_status)(struct slot *slot, u8 *status);
  167. int (*set_attention_status)(struct slot *slot, u8 status);
  168. int (*get_latch_status)(struct slot *slot, u8 *status);
  169. int (*get_adapter_status)(struct slot *slot, u8 *status);
  170. int (*get_max_bus_speed)(struct slot *slot, enum pci_bus_speed *speed);
  171. int (*get_cur_bus_speed)(struct slot *slot, enum pci_bus_speed *speed);
  172. int (*get_max_lnk_width)(struct slot *slot, enum pcie_link_width *val);
  173. int (*get_cur_lnk_width)(struct slot *slot, enum pcie_link_width *val);
  174. int (*query_power_fault)(struct slot *slot);
  175. void (*green_led_on)(struct slot *slot);
  176. void (*green_led_off)(struct slot *slot);
  177. void (*green_led_blink)(struct slot *slot);
  178. void (*release_ctlr)(struct controller *ctrl);
  179. int (*check_lnk_status)(struct controller *ctrl);
  180. };
  181. #ifdef CONFIG_ACPI
  182. #include <acpi/acpi.h>
  183. #include <acpi/acpi_bus.h>
  184. #include <linux/pci-acpi.h>
  185. extern void __init pciehp_acpi_slot_detection_init(void);
  186. extern int pciehp_acpi_slot_detection_check(struct pci_dev *dev);
  187. static inline void pciehp_firmware_init(void)
  188. {
  189. pciehp_acpi_slot_detection_init();
  190. }
  191. static inline int pciehp_get_hp_hw_control_from_firmware(struct pci_dev *dev)
  192. {
  193. int retval;
  194. u32 flags = (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL |
  195. OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
  196. retval = acpi_get_hp_hw_control_from_firmware(dev, flags);
  197. if (retval)
  198. return retval;
  199. return pciehp_acpi_slot_detection_check(dev);
  200. }
  201. #else
  202. #define pciehp_firmware_init() do {} while (0)
  203. #define pciehp_get_hp_hw_control_from_firmware(dev) 0
  204. #endif /* CONFIG_ACPI */
  205. #endif /* _PCIEHP_H */