fault-armv.c 6.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242
  1. /*
  2. * linux/arch/arm/mm/fault-armv.c
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Modifications for ARM processor (c) 1995-2002 Russell King
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/sched.h>
  13. #include <linux/kernel.h>
  14. #include <linux/mm.h>
  15. #include <linux/bitops.h>
  16. #include <linux/vmalloc.h>
  17. #include <linux/init.h>
  18. #include <linux/pagemap.h>
  19. #include <linux/gfp.h>
  20. #include <asm/bugs.h>
  21. #include <asm/cacheflush.h>
  22. #include <asm/cachetype.h>
  23. #include <asm/pgtable.h>
  24. #include <asm/tlbflush.h>
  25. #include "mm.h"
  26. static unsigned long shared_pte_mask = L_PTE_MT_BUFFERABLE;
  27. #if __LINUX_ARM_ARCH__ < 6
  28. /*
  29. * We take the easy way out of this problem - we make the
  30. * PTE uncacheable. However, we leave the write buffer on.
  31. *
  32. * Note that the pte lock held when calling update_mmu_cache must also
  33. * guard the pte (somewhere else in the same mm) that we modify here.
  34. * Therefore those configurations which might call adjust_pte (those
  35. * without CONFIG_CPU_CACHE_VIPT) cannot support split page_table_lock.
  36. */
  37. static int do_adjust_pte(struct vm_area_struct *vma, unsigned long address,
  38. unsigned long pfn, pte_t *ptep)
  39. {
  40. pte_t entry = *ptep;
  41. int ret;
  42. /*
  43. * If this page is present, it's actually being shared.
  44. */
  45. ret = pte_present(entry);
  46. /*
  47. * If this page isn't present, or is already setup to
  48. * fault (ie, is old), we can safely ignore any issues.
  49. */
  50. if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) {
  51. flush_cache_page(vma, address, pfn);
  52. outer_flush_range((pfn << PAGE_SHIFT),
  53. (pfn << PAGE_SHIFT) + PAGE_SIZE);
  54. pte_val(entry) &= ~L_PTE_MT_MASK;
  55. pte_val(entry) |= shared_pte_mask;
  56. set_pte_at(vma->vm_mm, address, ptep, entry);
  57. flush_tlb_page(vma, address);
  58. }
  59. return ret;
  60. }
  61. static int adjust_pte(struct vm_area_struct *vma, unsigned long address,
  62. unsigned long pfn)
  63. {
  64. spinlock_t *ptl;
  65. pgd_t *pgd;
  66. pmd_t *pmd;
  67. pte_t *pte;
  68. int ret;
  69. pgd = pgd_offset(vma->vm_mm, address);
  70. if (pgd_none_or_clear_bad(pgd))
  71. return 0;
  72. pmd = pmd_offset(pgd, address);
  73. if (pmd_none_or_clear_bad(pmd))
  74. return 0;
  75. /*
  76. * This is called while another page table is mapped, so we
  77. * must use the nested version. This also means we need to
  78. * open-code the spin-locking.
  79. */
  80. ptl = pte_lockptr(vma->vm_mm, pmd);
  81. pte = pte_offset_map_nested(pmd, address);
  82. spin_lock(ptl);
  83. ret = do_adjust_pte(vma, address, pfn, pte);
  84. spin_unlock(ptl);
  85. pte_unmap_nested(pte);
  86. return ret;
  87. }
  88. static void
  89. make_coherent(struct address_space *mapping, struct vm_area_struct *vma,
  90. unsigned long addr, pte_t *ptep, unsigned long pfn)
  91. {
  92. struct mm_struct *mm = vma->vm_mm;
  93. struct vm_area_struct *mpnt;
  94. struct prio_tree_iter iter;
  95. unsigned long offset;
  96. pgoff_t pgoff;
  97. int aliases = 0;
  98. pgoff = vma->vm_pgoff + ((addr - vma->vm_start) >> PAGE_SHIFT);
  99. /*
  100. * If we have any shared mappings that are in the same mm
  101. * space, then we need to handle them specially to maintain
  102. * cache coherency.
  103. */
  104. flush_dcache_mmap_lock(mapping);
  105. vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
  106. /*
  107. * If this VMA is not in our MM, we can ignore it.
  108. * Note that we intentionally mask out the VMA
  109. * that we are fixing up.
  110. */
  111. if (mpnt->vm_mm != mm || mpnt == vma)
  112. continue;
  113. if (!(mpnt->vm_flags & VM_MAYSHARE))
  114. continue;
  115. offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
  116. aliases += adjust_pte(mpnt, mpnt->vm_start + offset, pfn);
  117. }
  118. flush_dcache_mmap_unlock(mapping);
  119. if (aliases)
  120. do_adjust_pte(vma, addr, pfn, ptep);
  121. }
  122. /*
  123. * Take care of architecture specific things when placing a new PTE into
  124. * a page table, or changing an existing PTE. Basically, there are two
  125. * things that we need to take care of:
  126. *
  127. * 1. If PG_dcache_clean is not set for the page, we need to ensure
  128. * that any cache entries for the kernels virtual memory
  129. * range are written back to the page.
  130. * 2. If we have multiple shared mappings of the same space in
  131. * an object, we need to deal with the cache aliasing issues.
  132. *
  133. * Note that the pte lock will be held.
  134. */
  135. void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,
  136. pte_t *ptep)
  137. {
  138. unsigned long pfn = pte_pfn(*ptep);
  139. struct address_space *mapping;
  140. struct page *page;
  141. if (!pfn_valid(pfn))
  142. return;
  143. /*
  144. * The zero page is never written to, so never has any dirty
  145. * cache lines, and therefore never needs to be flushed.
  146. */
  147. page = pfn_to_page(pfn);
  148. if (page == ZERO_PAGE(0))
  149. return;
  150. mapping = page_mapping(page);
  151. if (!test_and_set_bit(PG_dcache_clean, &page->flags))
  152. __flush_dcache_page(mapping, page);
  153. if (mapping) {
  154. if (cache_is_vivt())
  155. make_coherent(mapping, vma, addr, ptep, pfn);
  156. else if (vma->vm_flags & VM_EXEC)
  157. __flush_icache_all();
  158. }
  159. }
  160. #endif /* __LINUX_ARM_ARCH__ < 6 */
  161. /*
  162. * Check whether the write buffer has physical address aliasing
  163. * issues. If it has, we need to avoid them for the case where
  164. * we have several shared mappings of the same object in user
  165. * space.
  166. */
  167. static int __init check_writebuffer(unsigned long *p1, unsigned long *p2)
  168. {
  169. register unsigned long zero = 0, one = 1, val;
  170. local_irq_disable();
  171. mb();
  172. *p1 = one;
  173. mb();
  174. *p2 = zero;
  175. mb();
  176. val = *p1;
  177. mb();
  178. local_irq_enable();
  179. return val != zero;
  180. }
  181. void __init check_writebuffer_bugs(void)
  182. {
  183. struct page *page;
  184. const char *reason;
  185. unsigned long v = 1;
  186. printk(KERN_INFO "CPU: Testing write buffer coherency: ");
  187. page = alloc_page(GFP_KERNEL);
  188. if (page) {
  189. unsigned long *p1, *p2;
  190. pgprot_t prot = __pgprot_modify(PAGE_KERNEL,
  191. L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE);
  192. p1 = vmap(&page, 1, VM_IOREMAP, prot);
  193. p2 = vmap(&page, 1, VM_IOREMAP, prot);
  194. if (p1 && p2) {
  195. v = check_writebuffer(p1, p2);
  196. reason = "enabling work-around";
  197. } else {
  198. reason = "unable to map memory\n";
  199. }
  200. vunmap(p1);
  201. vunmap(p2);
  202. put_page(page);
  203. } else {
  204. reason = "unable to grab page\n";
  205. }
  206. if (v) {
  207. printk("failed, %s\n", reason);
  208. shared_pte_mask = L_PTE_MT_UNCACHED;
  209. } else {
  210. printk("ok\n");
  211. }
  212. }