be_main.c 58 KB

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  1. /*
  2. * Copyright (C) 2005 - 2009 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@serverengines.com
  12. *
  13. * ServerEngines
  14. * 209 N. Fair Oaks Ave
  15. * Sunnyvale, CA 94085
  16. */
  17. #include "be.h"
  18. #include "be_cmds.h"
  19. #include <asm/div64.h>
  20. MODULE_VERSION(DRV_VER);
  21. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  22. MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
  23. MODULE_AUTHOR("ServerEngines Corporation");
  24. MODULE_LICENSE("GPL");
  25. static unsigned int rx_frag_size = 2048;
  26. module_param(rx_frag_size, uint, S_IRUGO);
  27. MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
  28. static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
  29. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
  30. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
  31. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
  32. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
  33. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
  34. { 0 }
  35. };
  36. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  37. static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
  38. {
  39. struct be_dma_mem *mem = &q->dma_mem;
  40. if (mem->va)
  41. pci_free_consistent(adapter->pdev, mem->size,
  42. mem->va, mem->dma);
  43. }
  44. static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
  45. u16 len, u16 entry_size)
  46. {
  47. struct be_dma_mem *mem = &q->dma_mem;
  48. memset(q, 0, sizeof(*q));
  49. q->len = len;
  50. q->entry_size = entry_size;
  51. mem->size = len * entry_size;
  52. mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
  53. if (!mem->va)
  54. return -1;
  55. memset(mem->va, 0, mem->size);
  56. return 0;
  57. }
  58. static void be_intr_set(struct be_adapter *adapter, bool enable)
  59. {
  60. u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
  61. u32 reg = ioread32(addr);
  62. u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  63. if (!enabled && enable)
  64. reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  65. else if (enabled && !enable)
  66. reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  67. else
  68. return;
  69. iowrite32(reg, addr);
  70. }
  71. static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  72. {
  73. u32 val = 0;
  74. val |= qid & DB_RQ_RING_ID_MASK;
  75. val |= posted << DB_RQ_NUM_POSTED_SHIFT;
  76. iowrite32(val, adapter->db + DB_RQ_OFFSET);
  77. }
  78. static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  79. {
  80. u32 val = 0;
  81. val |= qid & DB_TXULP_RING_ID_MASK;
  82. val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
  83. iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
  84. }
  85. static void be_eq_notify(struct be_adapter *adapter, u16 qid,
  86. bool arm, bool clear_int, u16 num_popped)
  87. {
  88. u32 val = 0;
  89. val |= qid & DB_EQ_RING_ID_MASK;
  90. if (arm)
  91. val |= 1 << DB_EQ_REARM_SHIFT;
  92. if (clear_int)
  93. val |= 1 << DB_EQ_CLR_SHIFT;
  94. val |= 1 << DB_EQ_EVNT_SHIFT;
  95. val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
  96. iowrite32(val, adapter->db + DB_EQ_OFFSET);
  97. }
  98. void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
  99. {
  100. u32 val = 0;
  101. val |= qid & DB_CQ_RING_ID_MASK;
  102. if (arm)
  103. val |= 1 << DB_CQ_REARM_SHIFT;
  104. val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
  105. iowrite32(val, adapter->db + DB_CQ_OFFSET);
  106. }
  107. static int be_mac_addr_set(struct net_device *netdev, void *p)
  108. {
  109. struct be_adapter *adapter = netdev_priv(netdev);
  110. struct sockaddr *addr = p;
  111. int status = 0;
  112. if (!is_valid_ether_addr(addr->sa_data))
  113. return -EADDRNOTAVAIL;
  114. status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
  115. if (status)
  116. return status;
  117. status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
  118. adapter->if_handle, &adapter->pmac_id);
  119. if (!status)
  120. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  121. return status;
  122. }
  123. void netdev_stats_update(struct be_adapter *adapter)
  124. {
  125. struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
  126. struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
  127. struct be_port_rxf_stats *port_stats =
  128. &rxf_stats->port[adapter->port_num];
  129. struct net_device_stats *dev_stats = &adapter->netdev->stats;
  130. struct be_erx_stats *erx_stats = &hw_stats->erx;
  131. dev_stats->rx_packets = port_stats->rx_total_frames;
  132. dev_stats->tx_packets = port_stats->tx_unicastframes +
  133. port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
  134. dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
  135. (u64) port_stats->rx_bytes_lsd;
  136. dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
  137. (u64) port_stats->tx_bytes_lsd;
  138. /* bad pkts received */
  139. dev_stats->rx_errors = port_stats->rx_crc_errors +
  140. port_stats->rx_alignment_symbol_errors +
  141. port_stats->rx_in_range_errors +
  142. port_stats->rx_out_range_errors +
  143. port_stats->rx_frame_too_long +
  144. port_stats->rx_dropped_too_small +
  145. port_stats->rx_dropped_too_short +
  146. port_stats->rx_dropped_header_too_small +
  147. port_stats->rx_dropped_tcp_length +
  148. port_stats->rx_dropped_runt +
  149. port_stats->rx_tcp_checksum_errs +
  150. port_stats->rx_ip_checksum_errs +
  151. port_stats->rx_udp_checksum_errs;
  152. /* no space in linux buffers: best possible approximation */
  153. dev_stats->rx_dropped =
  154. erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
  155. /* detailed rx errors */
  156. dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
  157. port_stats->rx_out_range_errors +
  158. port_stats->rx_frame_too_long;
  159. /* receive ring buffer overflow */
  160. dev_stats->rx_over_errors = 0;
  161. dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
  162. /* frame alignment errors */
  163. dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
  164. /* receiver fifo overrun */
  165. /* drops_no_pbuf is no per i/f, it's per BE card */
  166. dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
  167. port_stats->rx_input_fifo_overflow +
  168. rxf_stats->rx_drops_no_pbuf;
  169. /* receiver missed packetd */
  170. dev_stats->rx_missed_errors = 0;
  171. /* packet transmit problems */
  172. dev_stats->tx_errors = 0;
  173. /* no space available in linux */
  174. dev_stats->tx_dropped = 0;
  175. dev_stats->multicast = port_stats->rx_multicast_frames;
  176. dev_stats->collisions = 0;
  177. /* detailed tx_errors */
  178. dev_stats->tx_aborted_errors = 0;
  179. dev_stats->tx_carrier_errors = 0;
  180. dev_stats->tx_fifo_errors = 0;
  181. dev_stats->tx_heartbeat_errors = 0;
  182. dev_stats->tx_window_errors = 0;
  183. }
  184. void be_link_status_update(struct be_adapter *adapter, bool link_up)
  185. {
  186. struct net_device *netdev = adapter->netdev;
  187. /* If link came up or went down */
  188. if (adapter->link_up != link_up) {
  189. adapter->link_speed = -1;
  190. if (link_up) {
  191. netif_start_queue(netdev);
  192. netif_carrier_on(netdev);
  193. printk(KERN_INFO "%s: Link up\n", netdev->name);
  194. } else {
  195. netif_stop_queue(netdev);
  196. netif_carrier_off(netdev);
  197. printk(KERN_INFO "%s: Link down\n", netdev->name);
  198. }
  199. adapter->link_up = link_up;
  200. }
  201. }
  202. /* Update the EQ delay n BE based on the RX frags consumed / sec */
  203. static void be_rx_eqd_update(struct be_adapter *adapter)
  204. {
  205. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  206. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  207. ulong now = jiffies;
  208. u32 eqd;
  209. if (!rx_eq->enable_aic)
  210. return;
  211. /* Wrapped around */
  212. if (time_before(now, stats->rx_fps_jiffies)) {
  213. stats->rx_fps_jiffies = now;
  214. return;
  215. }
  216. /* Update once a second */
  217. if ((now - stats->rx_fps_jiffies) < HZ)
  218. return;
  219. stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
  220. ((now - stats->rx_fps_jiffies) / HZ);
  221. stats->rx_fps_jiffies = now;
  222. stats->be_prev_rx_frags = stats->be_rx_frags;
  223. eqd = stats->be_rx_fps / 110000;
  224. eqd = eqd << 3;
  225. if (eqd > rx_eq->max_eqd)
  226. eqd = rx_eq->max_eqd;
  227. if (eqd < rx_eq->min_eqd)
  228. eqd = rx_eq->min_eqd;
  229. if (eqd < 10)
  230. eqd = 0;
  231. if (eqd != rx_eq->cur_eqd)
  232. be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
  233. rx_eq->cur_eqd = eqd;
  234. }
  235. static struct net_device_stats *be_get_stats(struct net_device *dev)
  236. {
  237. return &dev->stats;
  238. }
  239. static u32 be_calc_rate(u64 bytes, unsigned long ticks)
  240. {
  241. u64 rate = bytes;
  242. do_div(rate, ticks / HZ);
  243. rate <<= 3; /* bytes/sec -> bits/sec */
  244. do_div(rate, 1000000ul); /* MB/Sec */
  245. return rate;
  246. }
  247. static void be_tx_rate_update(struct be_adapter *adapter)
  248. {
  249. struct be_drvr_stats *stats = drvr_stats(adapter);
  250. ulong now = jiffies;
  251. /* Wrapped around? */
  252. if (time_before(now, stats->be_tx_jiffies)) {
  253. stats->be_tx_jiffies = now;
  254. return;
  255. }
  256. /* Update tx rate once in two seconds */
  257. if ((now - stats->be_tx_jiffies) > 2 * HZ) {
  258. stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
  259. - stats->be_tx_bytes_prev,
  260. now - stats->be_tx_jiffies);
  261. stats->be_tx_jiffies = now;
  262. stats->be_tx_bytes_prev = stats->be_tx_bytes;
  263. }
  264. }
  265. static void be_tx_stats_update(struct be_adapter *adapter,
  266. u32 wrb_cnt, u32 copied, bool stopped)
  267. {
  268. struct be_drvr_stats *stats = drvr_stats(adapter);
  269. stats->be_tx_reqs++;
  270. stats->be_tx_wrbs += wrb_cnt;
  271. stats->be_tx_bytes += copied;
  272. if (stopped)
  273. stats->be_tx_stops++;
  274. }
  275. /* Determine number of WRB entries needed to xmit data in an skb */
  276. static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
  277. {
  278. int cnt = (skb->len > skb->data_len);
  279. cnt += skb_shinfo(skb)->nr_frags;
  280. /* to account for hdr wrb */
  281. cnt++;
  282. if (cnt & 1) {
  283. /* add a dummy to make it an even num */
  284. cnt++;
  285. *dummy = true;
  286. } else
  287. *dummy = false;
  288. BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
  289. return cnt;
  290. }
  291. static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
  292. {
  293. wrb->frag_pa_hi = upper_32_bits(addr);
  294. wrb->frag_pa_lo = addr & 0xFFFFFFFF;
  295. wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
  296. }
  297. static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
  298. bool vlan, u32 wrb_cnt, u32 len)
  299. {
  300. memset(hdr, 0, sizeof(*hdr));
  301. AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
  302. if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
  303. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
  304. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
  305. hdr, skb_shinfo(skb)->gso_size);
  306. } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
  307. if (is_tcp_pkt(skb))
  308. AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
  309. else if (is_udp_pkt(skb))
  310. AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
  311. }
  312. if (vlan && vlan_tx_tag_present(skb)) {
  313. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
  314. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
  315. hdr, vlan_tx_tag_get(skb));
  316. }
  317. AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
  318. AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
  319. AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
  320. AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
  321. }
  322. static int make_tx_wrbs(struct be_adapter *adapter,
  323. struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
  324. {
  325. u64 busaddr;
  326. u32 i, copied = 0;
  327. struct pci_dev *pdev = adapter->pdev;
  328. struct sk_buff *first_skb = skb;
  329. struct be_queue_info *txq = &adapter->tx_obj.q;
  330. struct be_eth_wrb *wrb;
  331. struct be_eth_hdr_wrb *hdr;
  332. hdr = queue_head_node(txq);
  333. atomic_add(wrb_cnt, &txq->used);
  334. queue_head_inc(txq);
  335. if (skb_dma_map(&pdev->dev, skb, DMA_TO_DEVICE)) {
  336. dev_err(&pdev->dev, "TX DMA mapping failed\n");
  337. return 0;
  338. }
  339. if (skb->len > skb->data_len) {
  340. int len = skb->len - skb->data_len;
  341. wrb = queue_head_node(txq);
  342. busaddr = skb_shinfo(skb)->dma_head;
  343. wrb_fill(wrb, busaddr, len);
  344. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  345. queue_head_inc(txq);
  346. copied += len;
  347. }
  348. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  349. struct skb_frag_struct *frag =
  350. &skb_shinfo(skb)->frags[i];
  351. busaddr = skb_shinfo(skb)->dma_maps[i];
  352. wrb = queue_head_node(txq);
  353. wrb_fill(wrb, busaddr, frag->size);
  354. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  355. queue_head_inc(txq);
  356. copied += frag->size;
  357. }
  358. if (dummy_wrb) {
  359. wrb = queue_head_node(txq);
  360. wrb_fill(wrb, 0, 0);
  361. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  362. queue_head_inc(txq);
  363. }
  364. wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
  365. wrb_cnt, copied);
  366. be_dws_cpu_to_le(hdr, sizeof(*hdr));
  367. return copied;
  368. }
  369. static netdev_tx_t be_xmit(struct sk_buff *skb,
  370. struct net_device *netdev)
  371. {
  372. struct be_adapter *adapter = netdev_priv(netdev);
  373. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  374. struct be_queue_info *txq = &tx_obj->q;
  375. u32 wrb_cnt = 0, copied = 0;
  376. u32 start = txq->head;
  377. bool dummy_wrb, stopped = false;
  378. wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
  379. copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
  380. if (copied) {
  381. /* record the sent skb in the sent_skb table */
  382. BUG_ON(tx_obj->sent_skb_list[start]);
  383. tx_obj->sent_skb_list[start] = skb;
  384. /* Ensure txq has space for the next skb; Else stop the queue
  385. * *BEFORE* ringing the tx doorbell, so that we serialze the
  386. * tx compls of the current transmit which'll wake up the queue
  387. */
  388. if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
  389. txq->len) {
  390. netif_stop_queue(netdev);
  391. stopped = true;
  392. }
  393. be_txq_notify(adapter, txq->id, wrb_cnt);
  394. be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
  395. } else {
  396. txq->head = start;
  397. dev_kfree_skb_any(skb);
  398. }
  399. return NETDEV_TX_OK;
  400. }
  401. static int be_change_mtu(struct net_device *netdev, int new_mtu)
  402. {
  403. struct be_adapter *adapter = netdev_priv(netdev);
  404. if (new_mtu < BE_MIN_MTU ||
  405. new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
  406. dev_info(&adapter->pdev->dev,
  407. "MTU must be between %d and %d bytes\n",
  408. BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
  409. return -EINVAL;
  410. }
  411. dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
  412. netdev->mtu, new_mtu);
  413. netdev->mtu = new_mtu;
  414. return 0;
  415. }
  416. /*
  417. * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
  418. * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
  419. * set the BE in promiscuous VLAN mode.
  420. */
  421. static int be_vid_config(struct be_adapter *adapter)
  422. {
  423. u16 vtag[BE_NUM_VLANS_SUPPORTED];
  424. u16 ntags = 0, i;
  425. int status;
  426. if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
  427. /* Construct VLAN Table to give to HW */
  428. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  429. if (adapter->vlan_tag[i]) {
  430. vtag[ntags] = cpu_to_le16(i);
  431. ntags++;
  432. }
  433. }
  434. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  435. vtag, ntags, 1, 0);
  436. } else {
  437. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  438. NULL, 0, 1, 1);
  439. }
  440. return status;
  441. }
  442. static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
  443. {
  444. struct be_adapter *adapter = netdev_priv(netdev);
  445. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  446. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  447. be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
  448. be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
  449. adapter->vlan_grp = grp;
  450. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  451. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  452. }
  453. static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
  454. {
  455. struct be_adapter *adapter = netdev_priv(netdev);
  456. adapter->num_vlans++;
  457. adapter->vlan_tag[vid] = 1;
  458. be_vid_config(adapter);
  459. }
  460. static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
  461. {
  462. struct be_adapter *adapter = netdev_priv(netdev);
  463. adapter->num_vlans--;
  464. adapter->vlan_tag[vid] = 0;
  465. vlan_group_set_device(adapter->vlan_grp, vid, NULL);
  466. be_vid_config(adapter);
  467. }
  468. static void be_set_multicast_list(struct net_device *netdev)
  469. {
  470. struct be_adapter *adapter = netdev_priv(netdev);
  471. if (netdev->flags & IFF_PROMISC) {
  472. be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
  473. adapter->promiscuous = true;
  474. goto done;
  475. }
  476. /* BE was previously in promiscous mode; disable it */
  477. if (adapter->promiscuous) {
  478. adapter->promiscuous = false;
  479. be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
  480. }
  481. /* Enable multicast promisc if num configured exceeds what we support */
  482. if (netdev->flags & IFF_ALLMULTI || netdev->mc_count > BE_MAX_MC) {
  483. be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0,
  484. &adapter->mc_cmd_mem);
  485. goto done;
  486. }
  487. be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
  488. netdev->mc_count, &adapter->mc_cmd_mem);
  489. done:
  490. return;
  491. }
  492. static void be_rx_rate_update(struct be_adapter *adapter)
  493. {
  494. struct be_drvr_stats *stats = drvr_stats(adapter);
  495. ulong now = jiffies;
  496. /* Wrapped around */
  497. if (time_before(now, stats->be_rx_jiffies)) {
  498. stats->be_rx_jiffies = now;
  499. return;
  500. }
  501. /* Update the rate once in two seconds */
  502. if ((now - stats->be_rx_jiffies) < 2 * HZ)
  503. return;
  504. stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
  505. - stats->be_rx_bytes_prev,
  506. now - stats->be_rx_jiffies);
  507. stats->be_rx_jiffies = now;
  508. stats->be_rx_bytes_prev = stats->be_rx_bytes;
  509. }
  510. static void be_rx_stats_update(struct be_adapter *adapter,
  511. u32 pktsize, u16 numfrags)
  512. {
  513. struct be_drvr_stats *stats = drvr_stats(adapter);
  514. stats->be_rx_compl++;
  515. stats->be_rx_frags += numfrags;
  516. stats->be_rx_bytes += pktsize;
  517. }
  518. static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
  519. {
  520. u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
  521. l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
  522. ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
  523. ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
  524. if (ip_version) {
  525. tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  526. udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
  527. }
  528. ipv6_chk = (ip_version && (tcpf || udpf));
  529. return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
  530. }
  531. static struct be_rx_page_info *
  532. get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
  533. {
  534. struct be_rx_page_info *rx_page_info;
  535. struct be_queue_info *rxq = &adapter->rx_obj.q;
  536. rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
  537. BUG_ON(!rx_page_info->page);
  538. if (rx_page_info->last_page_user)
  539. pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
  540. adapter->big_page_size, PCI_DMA_FROMDEVICE);
  541. atomic_dec(&rxq->used);
  542. return rx_page_info;
  543. }
  544. /* Throwaway the data in the Rx completion */
  545. static void be_rx_compl_discard(struct be_adapter *adapter,
  546. struct be_eth_rx_compl *rxcp)
  547. {
  548. struct be_queue_info *rxq = &adapter->rx_obj.q;
  549. struct be_rx_page_info *page_info;
  550. u16 rxq_idx, i, num_rcvd;
  551. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  552. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  553. for (i = 0; i < num_rcvd; i++) {
  554. page_info = get_rx_page_info(adapter, rxq_idx);
  555. put_page(page_info->page);
  556. memset(page_info, 0, sizeof(*page_info));
  557. index_inc(&rxq_idx, rxq->len);
  558. }
  559. }
  560. /*
  561. * skb_fill_rx_data forms a complete skb for an ether frame
  562. * indicated by rxcp.
  563. */
  564. static void skb_fill_rx_data(struct be_adapter *adapter,
  565. struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
  566. {
  567. struct be_queue_info *rxq = &adapter->rx_obj.q;
  568. struct be_rx_page_info *page_info;
  569. u16 rxq_idx, i, num_rcvd, j;
  570. u32 pktsize, hdr_len, curr_frag_len, size;
  571. u8 *start;
  572. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  573. pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  574. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  575. page_info = get_rx_page_info(adapter, rxq_idx);
  576. start = page_address(page_info->page) + page_info->page_offset;
  577. prefetch(start);
  578. /* Copy data in the first descriptor of this completion */
  579. curr_frag_len = min(pktsize, rx_frag_size);
  580. /* Copy the header portion into skb_data */
  581. hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
  582. memcpy(skb->data, start, hdr_len);
  583. skb->len = curr_frag_len;
  584. if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
  585. /* Complete packet has now been moved to data */
  586. put_page(page_info->page);
  587. skb->data_len = 0;
  588. skb->tail += curr_frag_len;
  589. } else {
  590. skb_shinfo(skb)->nr_frags = 1;
  591. skb_shinfo(skb)->frags[0].page = page_info->page;
  592. skb_shinfo(skb)->frags[0].page_offset =
  593. page_info->page_offset + hdr_len;
  594. skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
  595. skb->data_len = curr_frag_len - hdr_len;
  596. skb->tail += hdr_len;
  597. }
  598. memset(page_info, 0, sizeof(*page_info));
  599. if (pktsize <= rx_frag_size) {
  600. BUG_ON(num_rcvd != 1);
  601. goto done;
  602. }
  603. /* More frags present for this completion */
  604. size = pktsize;
  605. for (i = 1, j = 0; i < num_rcvd; i++) {
  606. size -= curr_frag_len;
  607. index_inc(&rxq_idx, rxq->len);
  608. page_info = get_rx_page_info(adapter, rxq_idx);
  609. curr_frag_len = min(size, rx_frag_size);
  610. /* Coalesce all frags from the same physical page in one slot */
  611. if (page_info->page_offset == 0) {
  612. /* Fresh page */
  613. j++;
  614. skb_shinfo(skb)->frags[j].page = page_info->page;
  615. skb_shinfo(skb)->frags[j].page_offset =
  616. page_info->page_offset;
  617. skb_shinfo(skb)->frags[j].size = 0;
  618. skb_shinfo(skb)->nr_frags++;
  619. } else {
  620. put_page(page_info->page);
  621. }
  622. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  623. skb->len += curr_frag_len;
  624. skb->data_len += curr_frag_len;
  625. memset(page_info, 0, sizeof(*page_info));
  626. }
  627. BUG_ON(j > MAX_SKB_FRAGS);
  628. done:
  629. be_rx_stats_update(adapter, pktsize, num_rcvd);
  630. return;
  631. }
  632. /* Process the RX completion indicated by rxcp when GRO is disabled */
  633. static void be_rx_compl_process(struct be_adapter *adapter,
  634. struct be_eth_rx_compl *rxcp)
  635. {
  636. struct sk_buff *skb;
  637. u32 vlanf, vid;
  638. u8 vtm;
  639. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  640. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  641. /* vlanf could be wrongly set in some cards.
  642. * ignore if vtm is not set */
  643. if ((adapter->cap == 0x400) && !vtm)
  644. vlanf = 0;
  645. skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
  646. if (!skb) {
  647. if (net_ratelimit())
  648. dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
  649. be_rx_compl_discard(adapter, rxcp);
  650. return;
  651. }
  652. skb_fill_rx_data(adapter, skb, rxcp);
  653. if (do_pkt_csum(rxcp, adapter->rx_csum))
  654. skb->ip_summed = CHECKSUM_NONE;
  655. else
  656. skb->ip_summed = CHECKSUM_UNNECESSARY;
  657. skb->truesize = skb->len + sizeof(struct sk_buff);
  658. skb->protocol = eth_type_trans(skb, adapter->netdev);
  659. skb->dev = adapter->netdev;
  660. if (vlanf) {
  661. if (!adapter->vlan_grp || adapter->num_vlans == 0) {
  662. kfree_skb(skb);
  663. return;
  664. }
  665. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  666. vid = be16_to_cpu(vid);
  667. vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
  668. } else {
  669. netif_receive_skb(skb);
  670. }
  671. return;
  672. }
  673. /* Process the RX completion indicated by rxcp when GRO is enabled */
  674. static void be_rx_compl_process_gro(struct be_adapter *adapter,
  675. struct be_eth_rx_compl *rxcp)
  676. {
  677. struct be_rx_page_info *page_info;
  678. struct sk_buff *skb = NULL;
  679. struct be_queue_info *rxq = &adapter->rx_obj.q;
  680. struct be_eq_obj *eq_obj = &adapter->rx_eq;
  681. u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
  682. u16 i, rxq_idx = 0, vid, j;
  683. u8 vtm;
  684. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  685. pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  686. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  687. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  688. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  689. /* vlanf could be wrongly set in some cards.
  690. * ignore if vtm is not set */
  691. if ((adapter->cap == 0x400) && !vtm)
  692. vlanf = 0;
  693. skb = napi_get_frags(&eq_obj->napi);
  694. if (!skb) {
  695. be_rx_compl_discard(adapter, rxcp);
  696. return;
  697. }
  698. remaining = pkt_size;
  699. for (i = 0, j = -1; i < num_rcvd; i++) {
  700. page_info = get_rx_page_info(adapter, rxq_idx);
  701. curr_frag_len = min(remaining, rx_frag_size);
  702. /* Coalesce all frags from the same physical page in one slot */
  703. if (i == 0 || page_info->page_offset == 0) {
  704. /* First frag or Fresh page */
  705. j++;
  706. skb_shinfo(skb)->frags[j].page = page_info->page;
  707. skb_shinfo(skb)->frags[j].page_offset =
  708. page_info->page_offset;
  709. skb_shinfo(skb)->frags[j].size = 0;
  710. } else {
  711. put_page(page_info->page);
  712. }
  713. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  714. remaining -= curr_frag_len;
  715. index_inc(&rxq_idx, rxq->len);
  716. memset(page_info, 0, sizeof(*page_info));
  717. }
  718. BUG_ON(j > MAX_SKB_FRAGS);
  719. skb_shinfo(skb)->nr_frags = j + 1;
  720. skb->len = pkt_size;
  721. skb->data_len = pkt_size;
  722. skb->truesize += pkt_size;
  723. skb->ip_summed = CHECKSUM_UNNECESSARY;
  724. if (likely(!vlanf)) {
  725. napi_gro_frags(&eq_obj->napi);
  726. } else {
  727. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  728. vid = be16_to_cpu(vid);
  729. if (!adapter->vlan_grp || adapter->num_vlans == 0)
  730. return;
  731. vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
  732. }
  733. be_rx_stats_update(adapter, pkt_size, num_rcvd);
  734. return;
  735. }
  736. static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
  737. {
  738. struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
  739. if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
  740. return NULL;
  741. be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
  742. queue_tail_inc(&adapter->rx_obj.cq);
  743. return rxcp;
  744. }
  745. /* To reset the valid bit, we need to reset the whole word as
  746. * when walking the queue the valid entries are little-endian
  747. * and invalid entries are host endian
  748. */
  749. static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
  750. {
  751. rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
  752. }
  753. static inline struct page *be_alloc_pages(u32 size)
  754. {
  755. gfp_t alloc_flags = GFP_ATOMIC;
  756. u32 order = get_order(size);
  757. if (order > 0)
  758. alloc_flags |= __GFP_COMP;
  759. return alloc_pages(alloc_flags, order);
  760. }
  761. /*
  762. * Allocate a page, split it to fragments of size rx_frag_size and post as
  763. * receive buffers to BE
  764. */
  765. static void be_post_rx_frags(struct be_adapter *adapter)
  766. {
  767. struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
  768. struct be_rx_page_info *page_info = NULL;
  769. struct be_queue_info *rxq = &adapter->rx_obj.q;
  770. struct page *pagep = NULL;
  771. struct be_eth_rx_d *rxd;
  772. u64 page_dmaaddr = 0, frag_dmaaddr;
  773. u32 posted, page_offset = 0;
  774. page_info = &page_info_tbl[rxq->head];
  775. for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
  776. if (!pagep) {
  777. pagep = be_alloc_pages(adapter->big_page_size);
  778. if (unlikely(!pagep)) {
  779. drvr_stats(adapter)->be_ethrx_post_fail++;
  780. break;
  781. }
  782. page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
  783. adapter->big_page_size,
  784. PCI_DMA_FROMDEVICE);
  785. page_info->page_offset = 0;
  786. } else {
  787. get_page(pagep);
  788. page_info->page_offset = page_offset + rx_frag_size;
  789. }
  790. page_offset = page_info->page_offset;
  791. page_info->page = pagep;
  792. pci_unmap_addr_set(page_info, bus, page_dmaaddr);
  793. frag_dmaaddr = page_dmaaddr + page_info->page_offset;
  794. rxd = queue_head_node(rxq);
  795. rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
  796. rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
  797. queue_head_inc(rxq);
  798. /* Any space left in the current big page for another frag? */
  799. if ((page_offset + rx_frag_size + rx_frag_size) >
  800. adapter->big_page_size) {
  801. pagep = NULL;
  802. page_info->last_page_user = true;
  803. }
  804. page_info = &page_info_tbl[rxq->head];
  805. }
  806. if (pagep)
  807. page_info->last_page_user = true;
  808. if (posted) {
  809. atomic_add(posted, &rxq->used);
  810. be_rxq_notify(adapter, rxq->id, posted);
  811. } else if (atomic_read(&rxq->used) == 0) {
  812. /* Let be_worker replenish when memory is available */
  813. adapter->rx_post_starved = true;
  814. }
  815. return;
  816. }
  817. static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
  818. {
  819. struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
  820. if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
  821. return NULL;
  822. be_dws_le_to_cpu(txcp, sizeof(*txcp));
  823. txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
  824. queue_tail_inc(tx_cq);
  825. return txcp;
  826. }
  827. static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
  828. {
  829. struct be_queue_info *txq = &adapter->tx_obj.q;
  830. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  831. struct sk_buff *sent_skb;
  832. u16 cur_index, num_wrbs = 0;
  833. cur_index = txq->tail;
  834. sent_skb = sent_skbs[cur_index];
  835. BUG_ON(!sent_skb);
  836. sent_skbs[cur_index] = NULL;
  837. do {
  838. cur_index = txq->tail;
  839. num_wrbs++;
  840. queue_tail_inc(txq);
  841. } while (cur_index != last_index);
  842. atomic_sub(num_wrbs, &txq->used);
  843. skb_dma_unmap(&adapter->pdev->dev, sent_skb, DMA_TO_DEVICE);
  844. kfree_skb(sent_skb);
  845. }
  846. static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
  847. {
  848. struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
  849. if (!eqe->evt)
  850. return NULL;
  851. eqe->evt = le32_to_cpu(eqe->evt);
  852. queue_tail_inc(&eq_obj->q);
  853. return eqe;
  854. }
  855. static int event_handle(struct be_adapter *adapter,
  856. struct be_eq_obj *eq_obj)
  857. {
  858. struct be_eq_entry *eqe;
  859. u16 num = 0;
  860. while ((eqe = event_get(eq_obj)) != NULL) {
  861. eqe->evt = 0;
  862. num++;
  863. }
  864. /* Deal with any spurious interrupts that come
  865. * without events
  866. */
  867. be_eq_notify(adapter, eq_obj->q.id, true, true, num);
  868. if (num)
  869. napi_schedule(&eq_obj->napi);
  870. return num;
  871. }
  872. /* Just read and notify events without processing them.
  873. * Used at the time of destroying event queues */
  874. static void be_eq_clean(struct be_adapter *adapter,
  875. struct be_eq_obj *eq_obj)
  876. {
  877. struct be_eq_entry *eqe;
  878. u16 num = 0;
  879. while ((eqe = event_get(eq_obj)) != NULL) {
  880. eqe->evt = 0;
  881. num++;
  882. }
  883. if (num)
  884. be_eq_notify(adapter, eq_obj->q.id, false, true, num);
  885. }
  886. static void be_rx_q_clean(struct be_adapter *adapter)
  887. {
  888. struct be_rx_page_info *page_info;
  889. struct be_queue_info *rxq = &adapter->rx_obj.q;
  890. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  891. struct be_eth_rx_compl *rxcp;
  892. u16 tail;
  893. /* First cleanup pending rx completions */
  894. while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
  895. be_rx_compl_discard(adapter, rxcp);
  896. be_rx_compl_reset(rxcp);
  897. be_cq_notify(adapter, rx_cq->id, true, 1);
  898. }
  899. /* Then free posted rx buffer that were not used */
  900. tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
  901. for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
  902. page_info = get_rx_page_info(adapter, tail);
  903. put_page(page_info->page);
  904. memset(page_info, 0, sizeof(*page_info));
  905. }
  906. BUG_ON(atomic_read(&rxq->used));
  907. }
  908. static void be_tx_compl_clean(struct be_adapter *adapter)
  909. {
  910. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  911. struct be_queue_info *txq = &adapter->tx_obj.q;
  912. struct be_eth_tx_compl *txcp;
  913. u16 end_idx, cmpl = 0, timeo = 0;
  914. /* Wait for a max of 200ms for all the tx-completions to arrive. */
  915. do {
  916. while ((txcp = be_tx_compl_get(tx_cq))) {
  917. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  918. wrb_index, txcp);
  919. be_tx_compl_process(adapter, end_idx);
  920. cmpl++;
  921. }
  922. if (cmpl) {
  923. be_cq_notify(adapter, tx_cq->id, false, cmpl);
  924. cmpl = 0;
  925. }
  926. if (atomic_read(&txq->used) == 0 || ++timeo > 200)
  927. break;
  928. mdelay(1);
  929. } while (true);
  930. if (atomic_read(&txq->used))
  931. dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
  932. atomic_read(&txq->used));
  933. }
  934. static void be_mcc_queues_destroy(struct be_adapter *adapter)
  935. {
  936. struct be_queue_info *q;
  937. q = &adapter->mcc_obj.q;
  938. if (q->created)
  939. be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
  940. be_queue_free(adapter, q);
  941. q = &adapter->mcc_obj.cq;
  942. if (q->created)
  943. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  944. be_queue_free(adapter, q);
  945. }
  946. /* Must be called only after TX qs are created as MCC shares TX EQ */
  947. static int be_mcc_queues_create(struct be_adapter *adapter)
  948. {
  949. struct be_queue_info *q, *cq;
  950. /* Alloc MCC compl queue */
  951. cq = &adapter->mcc_obj.cq;
  952. if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
  953. sizeof(struct be_mcc_compl)))
  954. goto err;
  955. /* Ask BE to create MCC compl queue; share TX's eq */
  956. if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
  957. goto mcc_cq_free;
  958. /* Alloc MCC queue */
  959. q = &adapter->mcc_obj.q;
  960. if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
  961. goto mcc_cq_destroy;
  962. /* Ask BE to create MCC queue */
  963. if (be_cmd_mccq_create(adapter, q, cq))
  964. goto mcc_q_free;
  965. return 0;
  966. mcc_q_free:
  967. be_queue_free(adapter, q);
  968. mcc_cq_destroy:
  969. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  970. mcc_cq_free:
  971. be_queue_free(adapter, cq);
  972. err:
  973. return -1;
  974. }
  975. static void be_tx_queues_destroy(struct be_adapter *adapter)
  976. {
  977. struct be_queue_info *q;
  978. q = &adapter->tx_obj.q;
  979. if (q->created)
  980. be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
  981. be_queue_free(adapter, q);
  982. q = &adapter->tx_obj.cq;
  983. if (q->created)
  984. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  985. be_queue_free(adapter, q);
  986. /* Clear any residual events */
  987. be_eq_clean(adapter, &adapter->tx_eq);
  988. q = &adapter->tx_eq.q;
  989. if (q->created)
  990. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  991. be_queue_free(adapter, q);
  992. }
  993. static int be_tx_queues_create(struct be_adapter *adapter)
  994. {
  995. struct be_queue_info *eq, *q, *cq;
  996. adapter->tx_eq.max_eqd = 0;
  997. adapter->tx_eq.min_eqd = 0;
  998. adapter->tx_eq.cur_eqd = 96;
  999. adapter->tx_eq.enable_aic = false;
  1000. /* Alloc Tx Event queue */
  1001. eq = &adapter->tx_eq.q;
  1002. if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
  1003. return -1;
  1004. /* Ask BE to create Tx Event queue */
  1005. if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
  1006. goto tx_eq_free;
  1007. /* Alloc TX eth compl queue */
  1008. cq = &adapter->tx_obj.cq;
  1009. if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
  1010. sizeof(struct be_eth_tx_compl)))
  1011. goto tx_eq_destroy;
  1012. /* Ask BE to create Tx eth compl queue */
  1013. if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
  1014. goto tx_cq_free;
  1015. /* Alloc TX eth queue */
  1016. q = &adapter->tx_obj.q;
  1017. if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
  1018. goto tx_cq_destroy;
  1019. /* Ask BE to create Tx eth queue */
  1020. if (be_cmd_txq_create(adapter, q, cq))
  1021. goto tx_q_free;
  1022. return 0;
  1023. tx_q_free:
  1024. be_queue_free(adapter, q);
  1025. tx_cq_destroy:
  1026. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1027. tx_cq_free:
  1028. be_queue_free(adapter, cq);
  1029. tx_eq_destroy:
  1030. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1031. tx_eq_free:
  1032. be_queue_free(adapter, eq);
  1033. return -1;
  1034. }
  1035. static void be_rx_queues_destroy(struct be_adapter *adapter)
  1036. {
  1037. struct be_queue_info *q;
  1038. q = &adapter->rx_obj.q;
  1039. if (q->created) {
  1040. be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
  1041. be_rx_q_clean(adapter);
  1042. }
  1043. be_queue_free(adapter, q);
  1044. q = &adapter->rx_obj.cq;
  1045. if (q->created)
  1046. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  1047. be_queue_free(adapter, q);
  1048. /* Clear any residual events */
  1049. be_eq_clean(adapter, &adapter->rx_eq);
  1050. q = &adapter->rx_eq.q;
  1051. if (q->created)
  1052. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  1053. be_queue_free(adapter, q);
  1054. }
  1055. static int be_rx_queues_create(struct be_adapter *adapter)
  1056. {
  1057. struct be_queue_info *eq, *q, *cq;
  1058. int rc;
  1059. adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
  1060. adapter->rx_eq.max_eqd = BE_MAX_EQD;
  1061. adapter->rx_eq.min_eqd = 0;
  1062. adapter->rx_eq.cur_eqd = 0;
  1063. adapter->rx_eq.enable_aic = true;
  1064. /* Alloc Rx Event queue */
  1065. eq = &adapter->rx_eq.q;
  1066. rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
  1067. sizeof(struct be_eq_entry));
  1068. if (rc)
  1069. return rc;
  1070. /* Ask BE to create Rx Event queue */
  1071. rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
  1072. if (rc)
  1073. goto rx_eq_free;
  1074. /* Alloc RX eth compl queue */
  1075. cq = &adapter->rx_obj.cq;
  1076. rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
  1077. sizeof(struct be_eth_rx_compl));
  1078. if (rc)
  1079. goto rx_eq_destroy;
  1080. /* Ask BE to create Rx eth compl queue */
  1081. rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
  1082. if (rc)
  1083. goto rx_cq_free;
  1084. /* Alloc RX eth queue */
  1085. q = &adapter->rx_obj.q;
  1086. rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
  1087. if (rc)
  1088. goto rx_cq_destroy;
  1089. /* Ask BE to create Rx eth queue */
  1090. rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
  1091. BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
  1092. if (rc)
  1093. goto rx_q_free;
  1094. return 0;
  1095. rx_q_free:
  1096. be_queue_free(adapter, q);
  1097. rx_cq_destroy:
  1098. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1099. rx_cq_free:
  1100. be_queue_free(adapter, cq);
  1101. rx_eq_destroy:
  1102. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1103. rx_eq_free:
  1104. be_queue_free(adapter, eq);
  1105. return rc;
  1106. }
  1107. /* There are 8 evt ids per func. Retruns the evt id's bit number */
  1108. static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
  1109. {
  1110. return eq_id - 8 * be_pci_func(adapter);
  1111. }
  1112. static irqreturn_t be_intx(int irq, void *dev)
  1113. {
  1114. struct be_adapter *adapter = dev;
  1115. int isr;
  1116. isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
  1117. be_pci_func(adapter) * CEV_ISR_SIZE);
  1118. if (!isr)
  1119. return IRQ_NONE;
  1120. event_handle(adapter, &adapter->tx_eq);
  1121. event_handle(adapter, &adapter->rx_eq);
  1122. return IRQ_HANDLED;
  1123. }
  1124. static irqreturn_t be_msix_rx(int irq, void *dev)
  1125. {
  1126. struct be_adapter *adapter = dev;
  1127. event_handle(adapter, &adapter->rx_eq);
  1128. return IRQ_HANDLED;
  1129. }
  1130. static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
  1131. {
  1132. struct be_adapter *adapter = dev;
  1133. event_handle(adapter, &adapter->tx_eq);
  1134. return IRQ_HANDLED;
  1135. }
  1136. static inline bool do_gro(struct be_adapter *adapter,
  1137. struct be_eth_rx_compl *rxcp)
  1138. {
  1139. int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
  1140. int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  1141. if (err)
  1142. drvr_stats(adapter)->be_rxcp_err++;
  1143. return (tcp_frame && !err) ? true : false;
  1144. }
  1145. int be_poll_rx(struct napi_struct *napi, int budget)
  1146. {
  1147. struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
  1148. struct be_adapter *adapter =
  1149. container_of(rx_eq, struct be_adapter, rx_eq);
  1150. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  1151. struct be_eth_rx_compl *rxcp;
  1152. u32 work_done;
  1153. adapter->stats.drvr_stats.be_rx_polls++;
  1154. for (work_done = 0; work_done < budget; work_done++) {
  1155. rxcp = be_rx_compl_get(adapter);
  1156. if (!rxcp)
  1157. break;
  1158. if (do_gro(adapter, rxcp))
  1159. be_rx_compl_process_gro(adapter, rxcp);
  1160. else
  1161. be_rx_compl_process(adapter, rxcp);
  1162. be_rx_compl_reset(rxcp);
  1163. }
  1164. /* Refill the queue */
  1165. if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
  1166. be_post_rx_frags(adapter);
  1167. /* All consumed */
  1168. if (work_done < budget) {
  1169. napi_complete(napi);
  1170. be_cq_notify(adapter, rx_cq->id, true, work_done);
  1171. } else {
  1172. /* More to be consumed; continue with interrupts disabled */
  1173. be_cq_notify(adapter, rx_cq->id, false, work_done);
  1174. }
  1175. return work_done;
  1176. }
  1177. void be_process_tx(struct be_adapter *adapter)
  1178. {
  1179. struct be_queue_info *txq = &adapter->tx_obj.q;
  1180. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  1181. struct be_eth_tx_compl *txcp;
  1182. u32 num_cmpl = 0;
  1183. u16 end_idx;
  1184. while ((txcp = be_tx_compl_get(tx_cq))) {
  1185. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  1186. wrb_index, txcp);
  1187. be_tx_compl_process(adapter, end_idx);
  1188. num_cmpl++;
  1189. }
  1190. if (num_cmpl) {
  1191. be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
  1192. /* As Tx wrbs have been freed up, wake up netdev queue if
  1193. * it was stopped due to lack of tx wrbs.
  1194. */
  1195. if (netif_queue_stopped(adapter->netdev) &&
  1196. atomic_read(&txq->used) < txq->len / 2) {
  1197. netif_wake_queue(adapter->netdev);
  1198. }
  1199. drvr_stats(adapter)->be_tx_events++;
  1200. drvr_stats(adapter)->be_tx_compl += num_cmpl;
  1201. }
  1202. }
  1203. /* As TX and MCC share the same EQ check for both TX and MCC completions.
  1204. * For TX/MCC we don't honour budget; consume everything
  1205. */
  1206. static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
  1207. {
  1208. struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
  1209. struct be_adapter *adapter =
  1210. container_of(tx_eq, struct be_adapter, tx_eq);
  1211. napi_complete(napi);
  1212. be_process_tx(adapter);
  1213. be_process_mcc(adapter);
  1214. return 1;
  1215. }
  1216. static void be_worker(struct work_struct *work)
  1217. {
  1218. struct be_adapter *adapter =
  1219. container_of(work, struct be_adapter, work.work);
  1220. be_cmd_get_stats(adapter, &adapter->stats.cmd);
  1221. /* Set EQ delay */
  1222. be_rx_eqd_update(adapter);
  1223. be_tx_rate_update(adapter);
  1224. be_rx_rate_update(adapter);
  1225. if (adapter->rx_post_starved) {
  1226. adapter->rx_post_starved = false;
  1227. be_post_rx_frags(adapter);
  1228. }
  1229. schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
  1230. }
  1231. static void be_msix_disable(struct be_adapter *adapter)
  1232. {
  1233. if (adapter->msix_enabled) {
  1234. pci_disable_msix(adapter->pdev);
  1235. adapter->msix_enabled = false;
  1236. }
  1237. }
  1238. static void be_msix_enable(struct be_adapter *adapter)
  1239. {
  1240. int i, status;
  1241. for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
  1242. adapter->msix_entries[i].entry = i;
  1243. status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1244. BE_NUM_MSIX_VECTORS);
  1245. if (status == 0)
  1246. adapter->msix_enabled = true;
  1247. return;
  1248. }
  1249. static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
  1250. {
  1251. return adapter->msix_entries[
  1252. be_evt_bit_get(adapter, eq_id)].vector;
  1253. }
  1254. static int be_request_irq(struct be_adapter *adapter,
  1255. struct be_eq_obj *eq_obj,
  1256. void *handler, char *desc)
  1257. {
  1258. struct net_device *netdev = adapter->netdev;
  1259. int vec;
  1260. sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
  1261. vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1262. return request_irq(vec, handler, 0, eq_obj->desc, adapter);
  1263. }
  1264. static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
  1265. {
  1266. int vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1267. free_irq(vec, adapter);
  1268. }
  1269. static int be_msix_register(struct be_adapter *adapter)
  1270. {
  1271. int status;
  1272. status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
  1273. if (status)
  1274. goto err;
  1275. status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
  1276. if (status)
  1277. goto free_tx_irq;
  1278. return 0;
  1279. free_tx_irq:
  1280. be_free_irq(adapter, &adapter->tx_eq);
  1281. err:
  1282. dev_warn(&adapter->pdev->dev,
  1283. "MSIX Request IRQ failed - err %d\n", status);
  1284. pci_disable_msix(adapter->pdev);
  1285. adapter->msix_enabled = false;
  1286. return status;
  1287. }
  1288. static int be_irq_register(struct be_adapter *adapter)
  1289. {
  1290. struct net_device *netdev = adapter->netdev;
  1291. int status;
  1292. if (adapter->msix_enabled) {
  1293. status = be_msix_register(adapter);
  1294. if (status == 0)
  1295. goto done;
  1296. }
  1297. /* INTx */
  1298. netdev->irq = adapter->pdev->irq;
  1299. status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
  1300. adapter);
  1301. if (status) {
  1302. dev_err(&adapter->pdev->dev,
  1303. "INTx request IRQ failed - err %d\n", status);
  1304. return status;
  1305. }
  1306. done:
  1307. adapter->isr_registered = true;
  1308. return 0;
  1309. }
  1310. static void be_irq_unregister(struct be_adapter *adapter)
  1311. {
  1312. struct net_device *netdev = adapter->netdev;
  1313. if (!adapter->isr_registered)
  1314. return;
  1315. /* INTx */
  1316. if (!adapter->msix_enabled) {
  1317. free_irq(netdev->irq, adapter);
  1318. goto done;
  1319. }
  1320. /* MSIx */
  1321. be_free_irq(adapter, &adapter->tx_eq);
  1322. be_free_irq(adapter, &adapter->rx_eq);
  1323. done:
  1324. adapter->isr_registered = false;
  1325. return;
  1326. }
  1327. static int be_open(struct net_device *netdev)
  1328. {
  1329. struct be_adapter *adapter = netdev_priv(netdev);
  1330. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1331. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1332. bool link_up;
  1333. int status;
  1334. u8 mac_speed;
  1335. u16 link_speed;
  1336. /* First time posting */
  1337. be_post_rx_frags(adapter);
  1338. napi_enable(&rx_eq->napi);
  1339. napi_enable(&tx_eq->napi);
  1340. be_irq_register(adapter);
  1341. be_intr_set(adapter, true);
  1342. /* The evt queues are created in unarmed state; arm them */
  1343. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  1344. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  1345. /* Rx compl queue may be in unarmed state; rearm it */
  1346. be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
  1347. status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
  1348. &link_speed);
  1349. if (status)
  1350. goto ret_sts;
  1351. be_link_status_update(adapter, link_up);
  1352. status = be_vid_config(adapter);
  1353. if (status)
  1354. goto ret_sts;
  1355. status = be_cmd_set_flow_control(adapter,
  1356. adapter->tx_fc, adapter->rx_fc);
  1357. if (status)
  1358. goto ret_sts;
  1359. schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
  1360. ret_sts:
  1361. return status;
  1362. }
  1363. static int be_setup(struct be_adapter *adapter)
  1364. {
  1365. struct net_device *netdev = adapter->netdev;
  1366. u32 cap_flags, en_flags;
  1367. int status;
  1368. cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
  1369. BE_IF_FLAGS_MCAST_PROMISCUOUS |
  1370. BE_IF_FLAGS_PROMISCUOUS |
  1371. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1372. en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
  1373. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1374. status = be_cmd_if_create(adapter, cap_flags, en_flags,
  1375. netdev->dev_addr, false/* pmac_invalid */,
  1376. &adapter->if_handle, &adapter->pmac_id);
  1377. if (status != 0)
  1378. goto do_none;
  1379. status = be_tx_queues_create(adapter);
  1380. if (status != 0)
  1381. goto if_destroy;
  1382. status = be_rx_queues_create(adapter);
  1383. if (status != 0)
  1384. goto tx_qs_destroy;
  1385. status = be_mcc_queues_create(adapter);
  1386. if (status != 0)
  1387. goto rx_qs_destroy;
  1388. adapter->link_speed = -1;
  1389. return 0;
  1390. rx_qs_destroy:
  1391. be_rx_queues_destroy(adapter);
  1392. tx_qs_destroy:
  1393. be_tx_queues_destroy(adapter);
  1394. if_destroy:
  1395. be_cmd_if_destroy(adapter, adapter->if_handle);
  1396. do_none:
  1397. return status;
  1398. }
  1399. static int be_clear(struct be_adapter *adapter)
  1400. {
  1401. be_mcc_queues_destroy(adapter);
  1402. be_rx_queues_destroy(adapter);
  1403. be_tx_queues_destroy(adapter);
  1404. be_cmd_if_destroy(adapter, adapter->if_handle);
  1405. /* tell fw we're done with firing cmds */
  1406. be_cmd_fw_clean(adapter);
  1407. return 0;
  1408. }
  1409. static int be_close(struct net_device *netdev)
  1410. {
  1411. struct be_adapter *adapter = netdev_priv(netdev);
  1412. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1413. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1414. int vec;
  1415. cancel_delayed_work_sync(&adapter->work);
  1416. netif_stop_queue(netdev);
  1417. netif_carrier_off(netdev);
  1418. adapter->link_up = false;
  1419. be_intr_set(adapter, false);
  1420. if (adapter->msix_enabled) {
  1421. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1422. synchronize_irq(vec);
  1423. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1424. synchronize_irq(vec);
  1425. } else {
  1426. synchronize_irq(netdev->irq);
  1427. }
  1428. be_irq_unregister(adapter);
  1429. napi_disable(&rx_eq->napi);
  1430. napi_disable(&tx_eq->napi);
  1431. /* Wait for all pending tx completions to arrive so that
  1432. * all tx skbs are freed.
  1433. */
  1434. be_tx_compl_clean(adapter);
  1435. return 0;
  1436. }
  1437. #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
  1438. char flash_cookie[2][16] = {"*** SE FLAS",
  1439. "H DIRECTORY *** "};
  1440. static bool be_flash_redboot(struct be_adapter *adapter,
  1441. const u8 *p)
  1442. {
  1443. u32 crc_offset;
  1444. u8 flashed_crc[4];
  1445. int status;
  1446. crc_offset = FLASH_REDBOOT_START + FLASH_REDBOOT_IMAGE_MAX_SIZE - 4
  1447. + sizeof(struct flash_file_hdr) - 32*1024;
  1448. p += crc_offset;
  1449. status = be_cmd_get_flash_crc(adapter, flashed_crc);
  1450. if (status) {
  1451. dev_err(&adapter->pdev->dev,
  1452. "could not get crc from flash, not flashing redboot\n");
  1453. return false;
  1454. }
  1455. /*update redboot only if crc does not match*/
  1456. if (!memcmp(flashed_crc, p, 4))
  1457. return false;
  1458. else
  1459. return true;
  1460. }
  1461. static int be_flash_image(struct be_adapter *adapter,
  1462. const struct firmware *fw,
  1463. struct be_dma_mem *flash_cmd, u32 flash_type)
  1464. {
  1465. int status;
  1466. u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
  1467. int num_bytes;
  1468. const u8 *p = fw->data;
  1469. struct be_cmd_write_flashrom *req = flash_cmd->va;
  1470. switch (flash_type) {
  1471. case FLASHROM_TYPE_ISCSI_ACTIVE:
  1472. image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
  1473. image_size = FLASH_IMAGE_MAX_SIZE;
  1474. break;
  1475. case FLASHROM_TYPE_ISCSI_BACKUP:
  1476. image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
  1477. image_size = FLASH_IMAGE_MAX_SIZE;
  1478. break;
  1479. case FLASHROM_TYPE_FCOE_FW_ACTIVE:
  1480. image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
  1481. image_size = FLASH_IMAGE_MAX_SIZE;
  1482. break;
  1483. case FLASHROM_TYPE_FCOE_FW_BACKUP:
  1484. image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
  1485. image_size = FLASH_IMAGE_MAX_SIZE;
  1486. break;
  1487. case FLASHROM_TYPE_BIOS:
  1488. image_offset = FLASH_iSCSI_BIOS_START;
  1489. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1490. break;
  1491. case FLASHROM_TYPE_FCOE_BIOS:
  1492. image_offset = FLASH_FCoE_BIOS_START;
  1493. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1494. break;
  1495. case FLASHROM_TYPE_PXE_BIOS:
  1496. image_offset = FLASH_PXE_BIOS_START;
  1497. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1498. break;
  1499. case FLASHROM_TYPE_REDBOOT:
  1500. if (!be_flash_redboot(adapter, fw->data))
  1501. return 0;
  1502. image_offset = FLASH_REDBOOT_ISM_START;
  1503. image_size = FLASH_REDBOOT_IMAGE_MAX_SIZE;
  1504. break;
  1505. default:
  1506. return 0;
  1507. }
  1508. p += sizeof(struct flash_file_hdr) + image_offset;
  1509. if (p + image_size > fw->data + fw->size)
  1510. return -1;
  1511. total_bytes = image_size;
  1512. while (total_bytes) {
  1513. if (total_bytes > 32*1024)
  1514. num_bytes = 32*1024;
  1515. else
  1516. num_bytes = total_bytes;
  1517. total_bytes -= num_bytes;
  1518. if (!total_bytes)
  1519. flash_op = FLASHROM_OPER_FLASH;
  1520. else
  1521. flash_op = FLASHROM_OPER_SAVE;
  1522. memcpy(req->params.data_buf, p, num_bytes);
  1523. p += num_bytes;
  1524. status = be_cmd_write_flashrom(adapter, flash_cmd,
  1525. flash_type, flash_op, num_bytes);
  1526. if (status) {
  1527. dev_err(&adapter->pdev->dev,
  1528. "cmd to write to flash rom failed. type/op %d/%d\n",
  1529. flash_type, flash_op);
  1530. return -1;
  1531. }
  1532. yield();
  1533. }
  1534. return 0;
  1535. }
  1536. int be_load_fw(struct be_adapter *adapter, u8 *func)
  1537. {
  1538. char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
  1539. const struct firmware *fw;
  1540. struct flash_file_hdr *fhdr;
  1541. struct flash_section_info *fsec = NULL;
  1542. struct be_dma_mem flash_cmd;
  1543. int status;
  1544. const u8 *p;
  1545. bool entry_found = false;
  1546. int flash_type;
  1547. char fw_ver[FW_VER_LEN];
  1548. char fw_cfg;
  1549. status = be_cmd_get_fw_ver(adapter, fw_ver);
  1550. if (status)
  1551. return status;
  1552. fw_cfg = *(fw_ver + 2);
  1553. if (fw_cfg == '0')
  1554. fw_cfg = '1';
  1555. strcpy(fw_file, func);
  1556. status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
  1557. if (status)
  1558. goto fw_exit;
  1559. p = fw->data;
  1560. fhdr = (struct flash_file_hdr *) p;
  1561. if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
  1562. dev_err(&adapter->pdev->dev,
  1563. "Firmware(%s) load error (signature did not match)\n",
  1564. fw_file);
  1565. status = -1;
  1566. goto fw_exit;
  1567. }
  1568. dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
  1569. p += sizeof(struct flash_file_hdr);
  1570. while (p < (fw->data + fw->size)) {
  1571. fsec = (struct flash_section_info *)p;
  1572. if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
  1573. entry_found = true;
  1574. break;
  1575. }
  1576. p += 32;
  1577. }
  1578. if (!entry_found) {
  1579. status = -1;
  1580. dev_err(&adapter->pdev->dev,
  1581. "Flash cookie not found in firmware image\n");
  1582. goto fw_exit;
  1583. }
  1584. flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
  1585. flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
  1586. &flash_cmd.dma);
  1587. if (!flash_cmd.va) {
  1588. status = -ENOMEM;
  1589. dev_err(&adapter->pdev->dev,
  1590. "Memory allocation failure while flashing\n");
  1591. goto fw_exit;
  1592. }
  1593. for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
  1594. flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
  1595. status = be_flash_image(adapter, fw, &flash_cmd,
  1596. flash_type);
  1597. if (status)
  1598. break;
  1599. }
  1600. pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
  1601. flash_cmd.dma);
  1602. if (status) {
  1603. dev_err(&adapter->pdev->dev, "Firmware load error\n");
  1604. goto fw_exit;
  1605. }
  1606. dev_info(&adapter->pdev->dev, "Firmware flashed succesfully\n");
  1607. fw_exit:
  1608. release_firmware(fw);
  1609. return status;
  1610. }
  1611. static struct net_device_ops be_netdev_ops = {
  1612. .ndo_open = be_open,
  1613. .ndo_stop = be_close,
  1614. .ndo_start_xmit = be_xmit,
  1615. .ndo_get_stats = be_get_stats,
  1616. .ndo_set_rx_mode = be_set_multicast_list,
  1617. .ndo_set_mac_address = be_mac_addr_set,
  1618. .ndo_change_mtu = be_change_mtu,
  1619. .ndo_validate_addr = eth_validate_addr,
  1620. .ndo_vlan_rx_register = be_vlan_register,
  1621. .ndo_vlan_rx_add_vid = be_vlan_add_vid,
  1622. .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
  1623. };
  1624. static void be_netdev_init(struct net_device *netdev)
  1625. {
  1626. struct be_adapter *adapter = netdev_priv(netdev);
  1627. netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
  1628. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
  1629. NETIF_F_GRO;
  1630. netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
  1631. netdev->flags |= IFF_MULTICAST;
  1632. adapter->rx_csum = true;
  1633. /* Default settings for Rx and Tx flow control */
  1634. adapter->rx_fc = true;
  1635. adapter->tx_fc = true;
  1636. netif_set_gso_max_size(netdev, 65535);
  1637. BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
  1638. SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
  1639. netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
  1640. BE_NAPI_WEIGHT);
  1641. netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
  1642. BE_NAPI_WEIGHT);
  1643. netif_carrier_off(netdev);
  1644. netif_stop_queue(netdev);
  1645. }
  1646. static void be_unmap_pci_bars(struct be_adapter *adapter)
  1647. {
  1648. if (adapter->csr)
  1649. iounmap(adapter->csr);
  1650. if (adapter->db)
  1651. iounmap(adapter->db);
  1652. if (adapter->pcicfg)
  1653. iounmap(adapter->pcicfg);
  1654. }
  1655. static int be_map_pci_bars(struct be_adapter *adapter)
  1656. {
  1657. u8 __iomem *addr;
  1658. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
  1659. pci_resource_len(adapter->pdev, 2));
  1660. if (addr == NULL)
  1661. return -ENOMEM;
  1662. adapter->csr = addr;
  1663. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
  1664. 128 * 1024);
  1665. if (addr == NULL)
  1666. goto pci_map_err;
  1667. adapter->db = addr;
  1668. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
  1669. pci_resource_len(adapter->pdev, 1));
  1670. if (addr == NULL)
  1671. goto pci_map_err;
  1672. adapter->pcicfg = addr;
  1673. return 0;
  1674. pci_map_err:
  1675. be_unmap_pci_bars(adapter);
  1676. return -ENOMEM;
  1677. }
  1678. static void be_ctrl_cleanup(struct be_adapter *adapter)
  1679. {
  1680. struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
  1681. be_unmap_pci_bars(adapter);
  1682. if (mem->va)
  1683. pci_free_consistent(adapter->pdev, mem->size,
  1684. mem->va, mem->dma);
  1685. mem = &adapter->mc_cmd_mem;
  1686. if (mem->va)
  1687. pci_free_consistent(adapter->pdev, mem->size,
  1688. mem->va, mem->dma);
  1689. }
  1690. static int be_ctrl_init(struct be_adapter *adapter)
  1691. {
  1692. struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
  1693. struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
  1694. struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
  1695. int status;
  1696. status = be_map_pci_bars(adapter);
  1697. if (status)
  1698. goto done;
  1699. mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
  1700. mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
  1701. mbox_mem_alloc->size, &mbox_mem_alloc->dma);
  1702. if (!mbox_mem_alloc->va) {
  1703. status = -ENOMEM;
  1704. goto unmap_pci_bars;
  1705. }
  1706. mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
  1707. mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
  1708. mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
  1709. memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
  1710. mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
  1711. mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
  1712. &mc_cmd_mem->dma);
  1713. if (mc_cmd_mem->va == NULL) {
  1714. status = -ENOMEM;
  1715. goto free_mbox;
  1716. }
  1717. memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
  1718. spin_lock_init(&adapter->mbox_lock);
  1719. spin_lock_init(&adapter->mcc_lock);
  1720. spin_lock_init(&adapter->mcc_cq_lock);
  1721. return 0;
  1722. free_mbox:
  1723. pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
  1724. mbox_mem_alloc->va, mbox_mem_alloc->dma);
  1725. unmap_pci_bars:
  1726. be_unmap_pci_bars(adapter);
  1727. done:
  1728. return status;
  1729. }
  1730. static void be_stats_cleanup(struct be_adapter *adapter)
  1731. {
  1732. struct be_stats_obj *stats = &adapter->stats;
  1733. struct be_dma_mem *cmd = &stats->cmd;
  1734. if (cmd->va)
  1735. pci_free_consistent(adapter->pdev, cmd->size,
  1736. cmd->va, cmd->dma);
  1737. }
  1738. static int be_stats_init(struct be_adapter *adapter)
  1739. {
  1740. struct be_stats_obj *stats = &adapter->stats;
  1741. struct be_dma_mem *cmd = &stats->cmd;
  1742. cmd->size = sizeof(struct be_cmd_req_get_stats);
  1743. cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
  1744. if (cmd->va == NULL)
  1745. return -1;
  1746. return 0;
  1747. }
  1748. static void __devexit be_remove(struct pci_dev *pdev)
  1749. {
  1750. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1751. if (!adapter)
  1752. return;
  1753. unregister_netdev(adapter->netdev);
  1754. be_clear(adapter);
  1755. be_stats_cleanup(adapter);
  1756. be_ctrl_cleanup(adapter);
  1757. be_msix_disable(adapter);
  1758. pci_set_drvdata(pdev, NULL);
  1759. pci_release_regions(pdev);
  1760. pci_disable_device(pdev);
  1761. free_netdev(adapter->netdev);
  1762. }
  1763. static int be_get_config(struct be_adapter *adapter)
  1764. {
  1765. int status;
  1766. u8 mac[ETH_ALEN];
  1767. status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
  1768. if (status)
  1769. return status;
  1770. status = be_cmd_query_fw_cfg(adapter,
  1771. &adapter->port_num, &adapter->cap);
  1772. if (status)
  1773. return status;
  1774. memset(mac, 0, ETH_ALEN);
  1775. status = be_cmd_mac_addr_query(adapter, mac,
  1776. MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
  1777. if (status)
  1778. return status;
  1779. if (!is_valid_ether_addr(mac))
  1780. return -EADDRNOTAVAIL;
  1781. memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
  1782. memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
  1783. return 0;
  1784. }
  1785. static int __devinit be_probe(struct pci_dev *pdev,
  1786. const struct pci_device_id *pdev_id)
  1787. {
  1788. int status = 0;
  1789. struct be_adapter *adapter;
  1790. struct net_device *netdev;
  1791. status = pci_enable_device(pdev);
  1792. if (status)
  1793. goto do_none;
  1794. status = pci_request_regions(pdev, DRV_NAME);
  1795. if (status)
  1796. goto disable_dev;
  1797. pci_set_master(pdev);
  1798. netdev = alloc_etherdev(sizeof(struct be_adapter));
  1799. if (netdev == NULL) {
  1800. status = -ENOMEM;
  1801. goto rel_reg;
  1802. }
  1803. adapter = netdev_priv(netdev);
  1804. adapter->pdev = pdev;
  1805. pci_set_drvdata(pdev, adapter);
  1806. adapter->netdev = netdev;
  1807. be_netdev_init(netdev);
  1808. SET_NETDEV_DEV(netdev, &pdev->dev);
  1809. be_msix_enable(adapter);
  1810. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  1811. if (!status) {
  1812. netdev->features |= NETIF_F_HIGHDMA;
  1813. } else {
  1814. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1815. if (status) {
  1816. dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
  1817. goto free_netdev;
  1818. }
  1819. }
  1820. status = be_ctrl_init(adapter);
  1821. if (status)
  1822. goto free_netdev;
  1823. /* sync up with fw's ready state */
  1824. status = be_cmd_POST(adapter);
  1825. if (status)
  1826. goto ctrl_clean;
  1827. /* tell fw we're ready to fire cmds */
  1828. status = be_cmd_fw_init(adapter);
  1829. if (status)
  1830. goto ctrl_clean;
  1831. status = be_cmd_reset_function(adapter);
  1832. if (status)
  1833. goto ctrl_clean;
  1834. status = be_stats_init(adapter);
  1835. if (status)
  1836. goto ctrl_clean;
  1837. status = be_get_config(adapter);
  1838. if (status)
  1839. goto stats_clean;
  1840. INIT_DELAYED_WORK(&adapter->work, be_worker);
  1841. status = be_setup(adapter);
  1842. if (status)
  1843. goto stats_clean;
  1844. status = register_netdev(netdev);
  1845. if (status != 0)
  1846. goto unsetup;
  1847. dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
  1848. return 0;
  1849. unsetup:
  1850. be_clear(adapter);
  1851. stats_clean:
  1852. be_stats_cleanup(adapter);
  1853. ctrl_clean:
  1854. be_ctrl_cleanup(adapter);
  1855. free_netdev:
  1856. be_msix_disable(adapter);
  1857. free_netdev(adapter->netdev);
  1858. pci_set_drvdata(pdev, NULL);
  1859. rel_reg:
  1860. pci_release_regions(pdev);
  1861. disable_dev:
  1862. pci_disable_device(pdev);
  1863. do_none:
  1864. dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
  1865. return status;
  1866. }
  1867. static int be_suspend(struct pci_dev *pdev, pm_message_t state)
  1868. {
  1869. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1870. struct net_device *netdev = adapter->netdev;
  1871. netif_device_detach(netdev);
  1872. if (netif_running(netdev)) {
  1873. rtnl_lock();
  1874. be_close(netdev);
  1875. rtnl_unlock();
  1876. }
  1877. be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
  1878. be_clear(adapter);
  1879. pci_save_state(pdev);
  1880. pci_disable_device(pdev);
  1881. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  1882. return 0;
  1883. }
  1884. static int be_resume(struct pci_dev *pdev)
  1885. {
  1886. int status = 0;
  1887. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1888. struct net_device *netdev = adapter->netdev;
  1889. netif_device_detach(netdev);
  1890. status = pci_enable_device(pdev);
  1891. if (status)
  1892. return status;
  1893. pci_set_power_state(pdev, 0);
  1894. pci_restore_state(pdev);
  1895. /* tell fw we're ready to fire cmds */
  1896. status = be_cmd_fw_init(adapter);
  1897. if (status)
  1898. return status;
  1899. be_setup(adapter);
  1900. if (netif_running(netdev)) {
  1901. rtnl_lock();
  1902. be_open(netdev);
  1903. rtnl_unlock();
  1904. }
  1905. netif_device_attach(netdev);
  1906. return 0;
  1907. }
  1908. static struct pci_driver be_driver = {
  1909. .name = DRV_NAME,
  1910. .id_table = be_dev_ids,
  1911. .probe = be_probe,
  1912. .remove = be_remove,
  1913. .suspend = be_suspend,
  1914. .resume = be_resume
  1915. };
  1916. static int __init be_init_module(void)
  1917. {
  1918. if (rx_frag_size != 8192 && rx_frag_size != 4096
  1919. && rx_frag_size != 2048) {
  1920. printk(KERN_WARNING DRV_NAME
  1921. " : Module param rx_frag_size must be 2048/4096/8192."
  1922. " Using 2048\n");
  1923. rx_frag_size = 2048;
  1924. }
  1925. return pci_register_driver(&be_driver);
  1926. }
  1927. module_init(be_init_module);
  1928. static void __exit be_exit_module(void)
  1929. {
  1930. pci_unregister_driver(&be_driver);
  1931. }
  1932. module_exit(be_exit_module);