bfin_5xx.c 31 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312
  1. /*
  2. * File: drivers/serial/bfin_5xx.c
  3. * Based on: Based on drivers/serial/sa1100.c
  4. * Author: Aubrey Li <aubrey.li@analog.com>
  5. *
  6. * Created:
  7. * Description: Driver for blackfin 5xx serial ports
  8. *
  9. * Modified:
  10. * Copyright 2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  30. #define SUPPORT_SYSRQ
  31. #endif
  32. #include <linux/module.h>
  33. #include <linux/ioport.h>
  34. #include <linux/init.h>
  35. #include <linux/console.h>
  36. #include <linux/sysrq.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/tty.h>
  39. #include <linux/tty_flip.h>
  40. #include <linux/serial_core.h>
  41. #ifdef CONFIG_KGDB_UART
  42. #include <linux/kgdb.h>
  43. #include <asm/irq_regs.h>
  44. #endif
  45. #include <asm/gpio.h>
  46. #include <asm/mach/bfin_serial_5xx.h>
  47. #ifdef CONFIG_SERIAL_BFIN_DMA
  48. #include <linux/dma-mapping.h>
  49. #include <asm/io.h>
  50. #include <asm/irq.h>
  51. #include <asm/cacheflush.h>
  52. #endif
  53. /* UART name and device definitions */
  54. #define BFIN_SERIAL_NAME "ttyBF"
  55. #define BFIN_SERIAL_MAJOR 204
  56. #define BFIN_SERIAL_MINOR 64
  57. /*
  58. * Setup for console. Argument comes from the menuconfig
  59. */
  60. #define DMA_RX_XCOUNT 512
  61. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  62. #define DMA_RX_FLUSH_JIFFIES 5
  63. #ifdef CONFIG_SERIAL_BFIN_DMA
  64. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  65. #else
  66. static void bfin_serial_do_work(struct work_struct *work);
  67. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  68. static void local_put_char(struct bfin_serial_port *uart, char ch);
  69. #endif
  70. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
  71. /*
  72. * interrupts are disabled on entry
  73. */
  74. static void bfin_serial_stop_tx(struct uart_port *port)
  75. {
  76. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  77. while (!(UART_GET_LSR(uart) & TEMT))
  78. continue;
  79. #ifdef CONFIG_SERIAL_BFIN_DMA
  80. disable_dma(uart->tx_dma_channel);
  81. #else
  82. #ifdef CONFIG_BF54x
  83. /* Waiting for Transmission Finished */
  84. while (!(UART_GET_LSR(uart) & TFI))
  85. continue;
  86. /* Clear TFI bit */
  87. UART_PUT_LSR(uart, TFI);
  88. UART_CLEAR_IER(uart, ETBEI);
  89. #else
  90. unsigned short ier;
  91. ier = UART_GET_IER(uart);
  92. ier &= ~ETBEI;
  93. UART_PUT_IER(uart, ier);
  94. #endif
  95. #endif
  96. }
  97. /*
  98. * port is locked and interrupts are disabled
  99. */
  100. static void bfin_serial_start_tx(struct uart_port *port)
  101. {
  102. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  103. #ifdef CONFIG_SERIAL_BFIN_DMA
  104. bfin_serial_dma_tx_chars(uart);
  105. #else
  106. #ifdef CONFIG_BF54x
  107. UART_SET_IER(uart, ETBEI);
  108. #else
  109. unsigned short ier;
  110. ier = UART_GET_IER(uart);
  111. ier |= ETBEI;
  112. UART_PUT_IER(uart, ier);
  113. #endif
  114. bfin_serial_tx_chars(uart);
  115. #endif
  116. }
  117. /*
  118. * Interrupts are enabled
  119. */
  120. static void bfin_serial_stop_rx(struct uart_port *port)
  121. {
  122. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  123. #ifdef CONFIG_KGDB_UART
  124. if (uart->port.line != CONFIG_KGDB_UART_PORT) {
  125. #endif
  126. #ifdef CONFIG_BF54x
  127. UART_CLEAR_IER(uart, ERBFI);
  128. #else
  129. unsigned short ier;
  130. ier = UART_GET_IER(uart);
  131. ier &= ~ERBFI;
  132. UART_PUT_IER(uart, ier);
  133. #endif
  134. #ifdef CONFIG_KGDB_UART
  135. }
  136. #endif
  137. }
  138. /*
  139. * Set the modem control timer to fire immediately.
  140. */
  141. static void bfin_serial_enable_ms(struct uart_port *port)
  142. {
  143. }
  144. #ifdef CONFIG_KGDB_UART
  145. static int kgdb_entry_state;
  146. void kgdb_put_debug_char(int chr)
  147. {
  148. struct bfin_serial_port *uart;
  149. if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
  150. uart = &bfin_serial_ports[0];
  151. else
  152. uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  153. while (!(UART_GET_LSR(uart) & THRE)) {
  154. SSYNC();
  155. }
  156. #ifndef CONFIG_BF54x
  157. UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
  158. SSYNC();
  159. #endif
  160. UART_PUT_CHAR(uart, (unsigned char)chr);
  161. SSYNC();
  162. }
  163. int kgdb_get_debug_char(void)
  164. {
  165. struct bfin_serial_port *uart;
  166. unsigned char chr;
  167. if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
  168. uart = &bfin_serial_ports[0];
  169. else
  170. uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  171. while(!(UART_GET_LSR(uart) & DR)) {
  172. SSYNC();
  173. }
  174. #ifndef CONFIG_BF54x
  175. UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
  176. SSYNC();
  177. #endif
  178. chr = UART_GET_CHAR(uart);
  179. SSYNC();
  180. return chr;
  181. }
  182. #endif
  183. #ifdef CONFIG_SERIAL_BFIN_PIO
  184. static void local_put_char(struct bfin_serial_port *uart, char ch)
  185. {
  186. unsigned short status;
  187. int flags = 0;
  188. spin_lock_irqsave(&uart->port.lock, flags);
  189. do {
  190. status = UART_GET_LSR(uart);
  191. } while (!(status & THRE));
  192. UART_PUT_CHAR(uart, ch);
  193. SSYNC();
  194. spin_unlock_irqrestore(&uart->port.lock, flags);
  195. }
  196. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  197. {
  198. struct tty_struct *tty = uart->port.info->tty;
  199. unsigned int status, ch, flg;
  200. static int in_break = 0;
  201. #ifdef CONFIG_KGDB_UART
  202. struct pt_regs *regs = get_irq_regs();
  203. #endif
  204. status = UART_GET_LSR(uart);
  205. ch = UART_GET_CHAR(uart);
  206. uart->port.icount.rx++;
  207. #ifdef CONFIG_KGDB_UART
  208. if (uart->port.line == CONFIG_KGDB_UART_PORT) {
  209. if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
  210. kgdb_breakkey_pressed(regs);
  211. return;
  212. } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
  213. kgdb_entry_state = 1;
  214. } else if (kgdb_entry_state == 1 && ch == 'q') {
  215. kgdb_entry_state = 0;
  216. kgdb_breakkey_pressed(regs);
  217. return;
  218. } else if (ch == 0x3) {/* Ctrl + C */
  219. kgdb_entry_state = 0;
  220. kgdb_breakkey_pressed(regs);
  221. return;
  222. } else {
  223. kgdb_entry_state = 0;
  224. }
  225. }
  226. #endif
  227. if (ANOMALY_05000230) {
  228. /* The BF533 family of processors have a nice misbehavior where
  229. * they continuously generate characters for a "single" break.
  230. * We have to basically ignore this flood until the "next" valid
  231. * character comes across. All other Blackfin families operate
  232. * properly though.
  233. * Note: While Anomaly 05000230 does not directly address this,
  234. * the changes that went in for it also fixed this issue.
  235. */
  236. if (in_break) {
  237. if (ch != 0) {
  238. in_break = 0;
  239. ch = UART_GET_CHAR(uart);
  240. if (bfin_revid() < 5)
  241. return;
  242. } else
  243. return;
  244. }
  245. }
  246. if (status & BI) {
  247. if (ANOMALY_05000230)
  248. in_break = 1;
  249. uart->port.icount.brk++;
  250. if (uart_handle_break(&uart->port))
  251. goto ignore_char;
  252. status &= ~(PE | FE);
  253. }
  254. if (status & PE)
  255. uart->port.icount.parity++;
  256. if (status & OE)
  257. uart->port.icount.overrun++;
  258. if (status & FE)
  259. uart->port.icount.frame++;
  260. status &= uart->port.read_status_mask;
  261. if (status & BI)
  262. flg = TTY_BREAK;
  263. else if (status & PE)
  264. flg = TTY_PARITY;
  265. else if (status & FE)
  266. flg = TTY_FRAME;
  267. else
  268. flg = TTY_NORMAL;
  269. if (uart_handle_sysrq_char(&uart->port, ch))
  270. goto ignore_char;
  271. uart_insert_char(&uart->port, status, OE, ch, flg);
  272. ignore_char:
  273. tty_flip_buffer_push(tty);
  274. }
  275. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  276. {
  277. struct circ_buf *xmit = &uart->port.info->xmit;
  278. if (uart->port.x_char) {
  279. UART_PUT_CHAR(uart, uart->port.x_char);
  280. uart->port.icount.tx++;
  281. uart->port.x_char = 0;
  282. return;
  283. }
  284. /*
  285. * Check the modem control lines before
  286. * transmitting anything.
  287. */
  288. bfin_serial_mctrl_check(uart);
  289. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  290. bfin_serial_stop_tx(&uart->port);
  291. return;
  292. }
  293. local_put_char(uart, xmit->buf[xmit->tail]);
  294. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  295. uart->port.icount.tx++;
  296. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  297. uart_write_wakeup(&uart->port);
  298. if (uart_circ_empty(xmit))
  299. bfin_serial_stop_tx(&uart->port);
  300. }
  301. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  302. {
  303. struct bfin_serial_port *uart = dev_id;
  304. #ifdef CONFIG_BF54x
  305. unsigned short status;
  306. spin_lock(&uart->port.lock);
  307. status = UART_GET_LSR(uart);
  308. while ((UART_GET_IER(uart) & ERBFI) && (status & DR)) {
  309. bfin_serial_rx_chars(uart);
  310. status = UART_GET_LSR(uart);
  311. }
  312. spin_unlock(&uart->port.lock);
  313. #else
  314. spin_lock(&uart->port.lock);
  315. while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_RX_READY)
  316. bfin_serial_rx_chars(uart);
  317. spin_unlock(&uart->port.lock);
  318. #endif
  319. return IRQ_HANDLED;
  320. }
  321. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  322. {
  323. struct bfin_serial_port *uart = dev_id;
  324. #ifdef CONFIG_BF54x
  325. unsigned short status;
  326. spin_lock(&uart->port.lock);
  327. status = UART_GET_LSR(uart);
  328. while ((UART_GET_IER(uart) & ETBEI) && (status & THRE)) {
  329. bfin_serial_tx_chars(uart);
  330. status = UART_GET_LSR(uart);
  331. }
  332. spin_unlock(&uart->port.lock);
  333. #else
  334. spin_lock(&uart->port.lock);
  335. while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_TX_READY)
  336. bfin_serial_tx_chars(uart);
  337. spin_unlock(&uart->port.lock);
  338. #endif
  339. return IRQ_HANDLED;
  340. }
  341. static void bfin_serial_do_work(struct work_struct *work)
  342. {
  343. struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
  344. bfin_serial_mctrl_check(uart);
  345. }
  346. #endif
  347. #ifdef CONFIG_SERIAL_BFIN_DMA
  348. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  349. {
  350. struct circ_buf *xmit = &uart->port.info->xmit;
  351. unsigned short ier;
  352. int flags = 0;
  353. if (!uart->tx_done)
  354. return;
  355. uart->tx_done = 0;
  356. if (uart->port.x_char) {
  357. UART_PUT_CHAR(uart, uart->port.x_char);
  358. uart->port.icount.tx++;
  359. uart->port.x_char = 0;
  360. uart->tx_done = 1;
  361. return;
  362. }
  363. /*
  364. * Check the modem control lines before
  365. * transmitting anything.
  366. */
  367. bfin_serial_mctrl_check(uart);
  368. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  369. bfin_serial_stop_tx(&uart->port);
  370. uart->tx_done = 1;
  371. return;
  372. }
  373. spin_lock_irqsave(&uart->port.lock, flags);
  374. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  375. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  376. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  377. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  378. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  379. set_dma_config(uart->tx_dma_channel,
  380. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  381. INTR_ON_BUF,
  382. DIMENSION_LINEAR,
  383. DATA_SIZE_8,
  384. DMA_SYNC_RESTART));
  385. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  386. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  387. set_dma_x_modify(uart->tx_dma_channel, 1);
  388. enable_dma(uart->tx_dma_channel);
  389. #ifdef CONFIG_BF54x
  390. UART_SET_IER(uart, ETBEI);
  391. #else
  392. ier = UART_GET_IER(uart);
  393. ier |= ETBEI;
  394. UART_PUT_IER(uart, ier);
  395. #endif
  396. spin_unlock_irqrestore(&uart->port.lock, flags);
  397. }
  398. static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
  399. {
  400. struct tty_struct *tty = uart->port.info->tty;
  401. int i, flg, status;
  402. status = UART_GET_LSR(uart);
  403. uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
  404. if (status & BI) {
  405. uart->port.icount.brk++;
  406. if (uart_handle_break(&uart->port))
  407. goto dma_ignore_char;
  408. status &= ~(PE | FE);
  409. }
  410. if (status & PE)
  411. uart->port.icount.parity++;
  412. if (status & OE)
  413. uart->port.icount.overrun++;
  414. if (status & FE)
  415. uart->port.icount.frame++;
  416. status &= uart->port.read_status_mask;
  417. if (status & BI)
  418. flg = TTY_BREAK;
  419. else if (status & PE)
  420. flg = TTY_PARITY;
  421. else if (status & FE)
  422. flg = TTY_FRAME;
  423. else
  424. flg = TTY_NORMAL;
  425. for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
  426. if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  427. goto dma_ignore_char;
  428. uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
  429. }
  430. dma_ignore_char:
  431. tty_flip_buffer_push(tty);
  432. }
  433. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  434. {
  435. int x_pos, pos;
  436. int flags = 0;
  437. bfin_serial_dma_tx_chars(uart);
  438. spin_lock_irqsave(&uart->port.lock, flags);
  439. x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
  440. if (x_pos == DMA_RX_XCOUNT)
  441. x_pos = 0;
  442. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  443. if (pos>uart->rx_dma_buf.tail) {
  444. uart->rx_dma_buf.tail = pos;
  445. bfin_serial_dma_rx_chars(uart);
  446. uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
  447. }
  448. spin_unlock_irqrestore(&uart->port.lock, flags);
  449. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  450. add_timer(&(uart->rx_dma_timer));
  451. }
  452. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  453. {
  454. struct bfin_serial_port *uart = dev_id;
  455. struct circ_buf *xmit = &uart->port.info->xmit;
  456. unsigned short ier;
  457. spin_lock(&uart->port.lock);
  458. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  459. clear_dma_irqstat(uart->tx_dma_channel);
  460. disable_dma(uart->tx_dma_channel);
  461. #ifdef CONFIG_BF54x
  462. UART_CLEAR_IER(uart, ETBEI);
  463. #else
  464. ier = UART_GET_IER(uart);
  465. ier &= ~ETBEI;
  466. UART_PUT_IER(uart, ier);
  467. #endif
  468. xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
  469. uart->port.icount.tx+=uart->tx_count;
  470. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  471. uart_write_wakeup(&uart->port);
  472. if (uart_circ_empty(xmit))
  473. bfin_serial_stop_tx(&uart->port);
  474. uart->tx_done = 1;
  475. }
  476. spin_unlock(&uart->port.lock);
  477. return IRQ_HANDLED;
  478. }
  479. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  480. {
  481. struct bfin_serial_port *uart = dev_id;
  482. unsigned short irqstat;
  483. uart->rx_dma_nrows++;
  484. if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
  485. uart->rx_dma_nrows = 0;
  486. uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
  487. bfin_serial_dma_rx_chars(uart);
  488. uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
  489. }
  490. spin_lock(&uart->port.lock);
  491. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  492. clear_dma_irqstat(uart->rx_dma_channel);
  493. spin_unlock(&uart->port.lock);
  494. return IRQ_HANDLED;
  495. }
  496. #endif
  497. /*
  498. * Return TIOCSER_TEMT when transmitter is not busy.
  499. */
  500. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  501. {
  502. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  503. unsigned short lsr;
  504. lsr = UART_GET_LSR(uart);
  505. if (lsr & TEMT)
  506. return TIOCSER_TEMT;
  507. else
  508. return 0;
  509. }
  510. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  511. {
  512. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  513. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  514. if (uart->cts_pin < 0)
  515. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  516. if (gpio_get_value(uart->cts_pin))
  517. return TIOCM_DSR | TIOCM_CAR;
  518. else
  519. #endif
  520. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  521. }
  522. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  523. {
  524. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  525. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  526. if (uart->rts_pin < 0)
  527. return;
  528. if (mctrl & TIOCM_RTS)
  529. gpio_set_value(uart->rts_pin, 0);
  530. else
  531. gpio_set_value(uart->rts_pin, 1);
  532. #endif
  533. }
  534. /*
  535. * Handle any change of modem status signal since we were last called.
  536. */
  537. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
  538. {
  539. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  540. unsigned int status;
  541. # ifdef CONFIG_SERIAL_BFIN_DMA
  542. struct uart_info *info = uart->port.info;
  543. struct tty_struct *tty = info->tty;
  544. status = bfin_serial_get_mctrl(&uart->port);
  545. if (!(status & TIOCM_CTS)) {
  546. tty->hw_stopped = 1;
  547. } else {
  548. tty->hw_stopped = 0;
  549. }
  550. # else
  551. status = bfin_serial_get_mctrl(&uart->port);
  552. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  553. if (!(status & TIOCM_CTS))
  554. schedule_work(&uart->cts_workqueue);
  555. # endif
  556. #endif
  557. }
  558. /*
  559. * Interrupts are always disabled.
  560. */
  561. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  562. {
  563. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  564. u16 lcr = UART_GET_LCR(uart);
  565. if (break_state)
  566. lcr |= SB;
  567. else
  568. lcr &= ~SB;
  569. UART_PUT_LCR(uart, lcr);
  570. SSYNC();
  571. }
  572. static int bfin_serial_startup(struct uart_port *port)
  573. {
  574. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  575. #ifdef CONFIG_SERIAL_BFIN_DMA
  576. dma_addr_t dma_handle;
  577. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  578. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  579. return -EBUSY;
  580. }
  581. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  582. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  583. free_dma(uart->rx_dma_channel);
  584. return -EBUSY;
  585. }
  586. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  587. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  588. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  589. uart->rx_dma_buf.head = 0;
  590. uart->rx_dma_buf.tail = 0;
  591. uart->rx_dma_nrows = 0;
  592. set_dma_config(uart->rx_dma_channel,
  593. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  594. INTR_ON_ROW, DIMENSION_2D,
  595. DATA_SIZE_8,
  596. DMA_SYNC_RESTART));
  597. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  598. set_dma_x_modify(uart->rx_dma_channel, 1);
  599. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  600. set_dma_y_modify(uart->rx_dma_channel, 1);
  601. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  602. enable_dma(uart->rx_dma_channel);
  603. uart->rx_dma_timer.data = (unsigned long)(uart);
  604. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  605. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  606. add_timer(&(uart->rx_dma_timer));
  607. #else
  608. if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
  609. "BFIN_UART_RX", uart)) {
  610. # ifdef CONFIG_KGDB_UART
  611. if (uart->port.line != CONFIG_KGDB_UART_PORT) {
  612. # endif
  613. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  614. return -EBUSY;
  615. # ifdef CONFIG_KGDB_UART
  616. }
  617. # endif
  618. }
  619. if (request_irq
  620. (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
  621. "BFIN_UART_TX", uart)) {
  622. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  623. free_irq(uart->port.irq, uart);
  624. return -EBUSY;
  625. }
  626. #endif
  627. #ifdef CONFIG_BF54x
  628. UART_SET_IER(uart, ERBFI);
  629. #else
  630. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  631. #endif
  632. return 0;
  633. }
  634. static void bfin_serial_shutdown(struct uart_port *port)
  635. {
  636. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  637. #ifdef CONFIG_SERIAL_BFIN_DMA
  638. disable_dma(uart->tx_dma_channel);
  639. free_dma(uart->tx_dma_channel);
  640. disable_dma(uart->rx_dma_channel);
  641. free_dma(uart->rx_dma_channel);
  642. del_timer(&(uart->rx_dma_timer));
  643. #else
  644. #ifdef CONFIG_KGDB_UART
  645. if (uart->port.line != CONFIG_KGDB_UART_PORT)
  646. #endif
  647. free_irq(uart->port.irq, uart);
  648. free_irq(uart->port.irq+1, uart);
  649. #endif
  650. }
  651. static void
  652. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  653. struct ktermios *old)
  654. {
  655. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  656. unsigned long flags;
  657. unsigned int baud, quot;
  658. unsigned short val, ier, lsr, lcr = 0;
  659. switch (termios->c_cflag & CSIZE) {
  660. case CS8:
  661. lcr = WLS(8);
  662. break;
  663. case CS7:
  664. lcr = WLS(7);
  665. break;
  666. case CS6:
  667. lcr = WLS(6);
  668. break;
  669. case CS5:
  670. lcr = WLS(5);
  671. break;
  672. default:
  673. printk(KERN_ERR "%s: word lengh not supported\n",
  674. __FUNCTION__);
  675. }
  676. if (termios->c_cflag & CSTOPB)
  677. lcr |= STB;
  678. if (termios->c_cflag & PARENB)
  679. lcr |= PEN;
  680. if (!(termios->c_cflag & PARODD))
  681. lcr |= EPS;
  682. if (termios->c_cflag & CMSPAR)
  683. lcr |= STP;
  684. port->read_status_mask = OE;
  685. if (termios->c_iflag & INPCK)
  686. port->read_status_mask |= (FE | PE);
  687. if (termios->c_iflag & (BRKINT | PARMRK))
  688. port->read_status_mask |= BI;
  689. /*
  690. * Characters to ignore
  691. */
  692. port->ignore_status_mask = 0;
  693. if (termios->c_iflag & IGNPAR)
  694. port->ignore_status_mask |= FE | PE;
  695. if (termios->c_iflag & IGNBRK) {
  696. port->ignore_status_mask |= BI;
  697. /*
  698. * If we're ignoring parity and break indicators,
  699. * ignore overruns too (for real raw support).
  700. */
  701. if (termios->c_iflag & IGNPAR)
  702. port->ignore_status_mask |= OE;
  703. }
  704. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  705. quot = uart_get_divisor(port, baud);
  706. spin_lock_irqsave(&uart->port.lock, flags);
  707. do {
  708. lsr = UART_GET_LSR(uart);
  709. } while (!(lsr & TEMT));
  710. /* Disable UART */
  711. ier = UART_GET_IER(uart);
  712. #ifdef CONFIG_BF54x
  713. UART_CLEAR_IER(uart, 0xF);
  714. #else
  715. UART_PUT_IER(uart, 0);
  716. #endif
  717. #ifndef CONFIG_BF54x
  718. /* Set DLAB in LCR to Access DLL and DLH */
  719. val = UART_GET_LCR(uart);
  720. val |= DLAB;
  721. UART_PUT_LCR(uart, val);
  722. SSYNC();
  723. #endif
  724. UART_PUT_DLL(uart, quot & 0xFF);
  725. SSYNC();
  726. UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
  727. SSYNC();
  728. #ifndef CONFIG_BF54x
  729. /* Clear DLAB in LCR to Access THR RBR IER */
  730. val = UART_GET_LCR(uart);
  731. val &= ~DLAB;
  732. UART_PUT_LCR(uart, val);
  733. SSYNC();
  734. #endif
  735. UART_PUT_LCR(uart, lcr);
  736. /* Enable UART */
  737. #ifdef CONFIG_BF54x
  738. UART_SET_IER(uart, ier);
  739. #else
  740. UART_PUT_IER(uart, ier);
  741. #endif
  742. val = UART_GET_GCTL(uart);
  743. val |= UCEN;
  744. UART_PUT_GCTL(uart, val);
  745. spin_unlock_irqrestore(&uart->port.lock, flags);
  746. }
  747. static const char *bfin_serial_type(struct uart_port *port)
  748. {
  749. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  750. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  751. }
  752. /*
  753. * Release the memory region(s) being used by 'port'.
  754. */
  755. static void bfin_serial_release_port(struct uart_port *port)
  756. {
  757. }
  758. /*
  759. * Request the memory region(s) being used by 'port'.
  760. */
  761. static int bfin_serial_request_port(struct uart_port *port)
  762. {
  763. return 0;
  764. }
  765. /*
  766. * Configure/autoconfigure the port.
  767. */
  768. static void bfin_serial_config_port(struct uart_port *port, int flags)
  769. {
  770. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  771. if (flags & UART_CONFIG_TYPE &&
  772. bfin_serial_request_port(&uart->port) == 0)
  773. uart->port.type = PORT_BFIN;
  774. }
  775. /*
  776. * Verify the new serial_struct (for TIOCSSERIAL).
  777. * The only change we allow are to the flags and type, and
  778. * even then only between PORT_BFIN and PORT_UNKNOWN
  779. */
  780. static int
  781. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  782. {
  783. return 0;
  784. }
  785. static struct uart_ops bfin_serial_pops = {
  786. .tx_empty = bfin_serial_tx_empty,
  787. .set_mctrl = bfin_serial_set_mctrl,
  788. .get_mctrl = bfin_serial_get_mctrl,
  789. .stop_tx = bfin_serial_stop_tx,
  790. .start_tx = bfin_serial_start_tx,
  791. .stop_rx = bfin_serial_stop_rx,
  792. .enable_ms = bfin_serial_enable_ms,
  793. .break_ctl = bfin_serial_break_ctl,
  794. .startup = bfin_serial_startup,
  795. .shutdown = bfin_serial_shutdown,
  796. .set_termios = bfin_serial_set_termios,
  797. .type = bfin_serial_type,
  798. .release_port = bfin_serial_release_port,
  799. .request_port = bfin_serial_request_port,
  800. .config_port = bfin_serial_config_port,
  801. .verify_port = bfin_serial_verify_port,
  802. };
  803. static void __init bfin_serial_init_ports(void)
  804. {
  805. static int first = 1;
  806. int i;
  807. if (!first)
  808. return;
  809. first = 0;
  810. for (i = 0; i < nr_ports; i++) {
  811. bfin_serial_ports[i].port.uartclk = get_sclk();
  812. bfin_serial_ports[i].port.ops = &bfin_serial_pops;
  813. bfin_serial_ports[i].port.line = i;
  814. bfin_serial_ports[i].port.iotype = UPIO_MEM;
  815. bfin_serial_ports[i].port.membase =
  816. (void __iomem *)bfin_serial_resource[i].uart_base_addr;
  817. bfin_serial_ports[i].port.mapbase =
  818. bfin_serial_resource[i].uart_base_addr;
  819. bfin_serial_ports[i].port.irq =
  820. bfin_serial_resource[i].uart_irq;
  821. bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
  822. #ifdef CONFIG_SERIAL_BFIN_DMA
  823. bfin_serial_ports[i].tx_done = 1;
  824. bfin_serial_ports[i].tx_count = 0;
  825. bfin_serial_ports[i].tx_dma_channel =
  826. bfin_serial_resource[i].uart_tx_dma_channel;
  827. bfin_serial_ports[i].rx_dma_channel =
  828. bfin_serial_resource[i].uart_rx_dma_channel;
  829. init_timer(&(bfin_serial_ports[i].rx_dma_timer));
  830. #else
  831. INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
  832. #endif
  833. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  834. bfin_serial_ports[i].cts_pin =
  835. bfin_serial_resource[i].uart_cts_pin;
  836. bfin_serial_ports[i].rts_pin =
  837. bfin_serial_resource[i].uart_rts_pin;
  838. #endif
  839. bfin_serial_hw_init(&bfin_serial_ports[i]);
  840. }
  841. }
  842. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  843. /*
  844. * If the port was already initialised (eg, by a boot loader),
  845. * try to determine the current setup.
  846. */
  847. static void __init
  848. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  849. int *parity, int *bits)
  850. {
  851. unsigned short status;
  852. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  853. if (status == (ERBFI | ETBEI)) {
  854. /* ok, the port was enabled */
  855. unsigned short lcr, val;
  856. unsigned short dlh, dll;
  857. lcr = UART_GET_LCR(uart);
  858. *parity = 'n';
  859. if (lcr & PEN) {
  860. if (lcr & EPS)
  861. *parity = 'e';
  862. else
  863. *parity = 'o';
  864. }
  865. switch (lcr & 0x03) {
  866. case 0: *bits = 5; break;
  867. case 1: *bits = 6; break;
  868. case 2: *bits = 7; break;
  869. case 3: *bits = 8; break;
  870. }
  871. #ifndef CONFIG_BF54x
  872. /* Set DLAB in LCR to Access DLL and DLH */
  873. val = UART_GET_LCR(uart);
  874. val |= DLAB;
  875. UART_PUT_LCR(uart, val);
  876. #endif
  877. dll = UART_GET_DLL(uart);
  878. dlh = UART_GET_DLH(uart);
  879. #ifndef CONFIG_BF54x
  880. /* Clear DLAB in LCR to Access THR RBR IER */
  881. val = UART_GET_LCR(uart);
  882. val &= ~DLAB;
  883. UART_PUT_LCR(uart, val);
  884. #endif
  885. *baud = get_sclk() / (16*(dll | dlh << 8));
  886. }
  887. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
  888. }
  889. #endif
  890. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  891. static struct uart_driver bfin_serial_reg;
  892. static int __init
  893. bfin_serial_console_setup(struct console *co, char *options)
  894. {
  895. struct bfin_serial_port *uart;
  896. # ifdef CONFIG_SERIAL_BFIN_CONSOLE
  897. int baud = 57600;
  898. int bits = 8;
  899. int parity = 'n';
  900. # ifdef CONFIG_SERIAL_BFIN_CTSRTS
  901. int flow = 'r';
  902. # else
  903. int flow = 'n';
  904. # endif
  905. # endif
  906. /*
  907. * Check whether an invalid uart number has been specified, and
  908. * if so, search for the first available port that does have
  909. * console support.
  910. */
  911. if (co->index == -1 || co->index >= nr_ports)
  912. co->index = 0;
  913. uart = &bfin_serial_ports[co->index];
  914. # ifdef CONFIG_SERIAL_BFIN_CONSOLE
  915. if (options)
  916. uart_parse_options(options, &baud, &parity, &bits, &flow);
  917. else
  918. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  919. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  920. # else
  921. return 0;
  922. # endif
  923. }
  924. #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
  925. defined (CONFIG_EARLY_PRINTK) */
  926. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  927. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  928. {
  929. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  930. while (!(UART_GET_LSR(uart) & THRE))
  931. barrier();
  932. UART_PUT_CHAR(uart, ch);
  933. SSYNC();
  934. }
  935. /*
  936. * Interrupts are disabled on entering
  937. */
  938. static void
  939. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  940. {
  941. struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
  942. int flags = 0;
  943. spin_lock_irqsave(&uart->port.lock, flags);
  944. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  945. spin_unlock_irqrestore(&uart->port.lock, flags);
  946. }
  947. static struct console bfin_serial_console = {
  948. .name = BFIN_SERIAL_NAME,
  949. .write = bfin_serial_console_write,
  950. .device = uart_console_device,
  951. .setup = bfin_serial_console_setup,
  952. .flags = CON_PRINTBUFFER,
  953. .index = -1,
  954. .data = &bfin_serial_reg,
  955. };
  956. static int __init bfin_serial_rs_console_init(void)
  957. {
  958. bfin_serial_init_ports();
  959. register_console(&bfin_serial_console);
  960. #ifdef CONFIG_KGDB_UART
  961. kgdb_entry_state = 0;
  962. init_kgdb_uart();
  963. #endif
  964. return 0;
  965. }
  966. console_initcall(bfin_serial_rs_console_init);
  967. #define BFIN_SERIAL_CONSOLE &bfin_serial_console
  968. #else
  969. #define BFIN_SERIAL_CONSOLE NULL
  970. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  971. #ifdef CONFIG_EARLY_PRINTK
  972. static __init void early_serial_putc(struct uart_port *port, int ch)
  973. {
  974. unsigned timeout = 0xffff;
  975. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  976. while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
  977. cpu_relax();
  978. UART_PUT_CHAR(uart, ch);
  979. }
  980. static __init void early_serial_write(struct console *con, const char *s,
  981. unsigned int n)
  982. {
  983. struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
  984. unsigned int i;
  985. for (i = 0; i < n; i++, s++) {
  986. if (*s == '\n')
  987. early_serial_putc(&uart->port, '\r');
  988. early_serial_putc(&uart->port, *s);
  989. }
  990. }
  991. static struct __init console bfin_early_serial_console = {
  992. .name = "early_BFuart",
  993. .write = early_serial_write,
  994. .device = uart_console_device,
  995. .flags = CON_PRINTBUFFER,
  996. .setup = bfin_serial_console_setup,
  997. .index = -1,
  998. .data = &bfin_serial_reg,
  999. };
  1000. struct console __init *bfin_earlyserial_init(unsigned int port,
  1001. unsigned int cflag)
  1002. {
  1003. struct bfin_serial_port *uart;
  1004. struct ktermios t;
  1005. if (port == -1 || port >= nr_ports)
  1006. port = 0;
  1007. bfin_serial_init_ports();
  1008. bfin_early_serial_console.index = port;
  1009. uart = &bfin_serial_ports[port];
  1010. t.c_cflag = cflag;
  1011. t.c_iflag = 0;
  1012. t.c_oflag = 0;
  1013. t.c_lflag = ICANON;
  1014. t.c_line = port;
  1015. bfin_serial_set_termios(&uart->port, &t, &t);
  1016. return &bfin_early_serial_console;
  1017. }
  1018. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  1019. static struct uart_driver bfin_serial_reg = {
  1020. .owner = THIS_MODULE,
  1021. .driver_name = "bfin-uart",
  1022. .dev_name = BFIN_SERIAL_NAME,
  1023. .major = BFIN_SERIAL_MAJOR,
  1024. .minor = BFIN_SERIAL_MINOR,
  1025. .nr = NR_PORTS,
  1026. .cons = BFIN_SERIAL_CONSOLE,
  1027. };
  1028. static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
  1029. {
  1030. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  1031. if (uart)
  1032. uart_suspend_port(&bfin_serial_reg, &uart->port);
  1033. return 0;
  1034. }
  1035. static int bfin_serial_resume(struct platform_device *dev)
  1036. {
  1037. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  1038. if (uart)
  1039. uart_resume_port(&bfin_serial_reg, &uart->port);
  1040. return 0;
  1041. }
  1042. static int bfin_serial_probe(struct platform_device *dev)
  1043. {
  1044. struct resource *res = dev->resource;
  1045. int i;
  1046. for (i = 0; i < dev->num_resources; i++, res++)
  1047. if (res->flags & IORESOURCE_MEM)
  1048. break;
  1049. if (i < dev->num_resources) {
  1050. for (i = 0; i < nr_ports; i++, res++) {
  1051. if (bfin_serial_ports[i].port.mapbase != res->start)
  1052. continue;
  1053. bfin_serial_ports[i].port.dev = &dev->dev;
  1054. uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
  1055. platform_set_drvdata(dev, &bfin_serial_ports[i]);
  1056. }
  1057. }
  1058. return 0;
  1059. }
  1060. static int bfin_serial_remove(struct platform_device *pdev)
  1061. {
  1062. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1063. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  1064. gpio_free(uart->cts_pin);
  1065. gpio_free(uart->rts_pin);
  1066. #endif
  1067. platform_set_drvdata(pdev, NULL);
  1068. if (uart)
  1069. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  1070. return 0;
  1071. }
  1072. static struct platform_driver bfin_serial_driver = {
  1073. .probe = bfin_serial_probe,
  1074. .remove = bfin_serial_remove,
  1075. .suspend = bfin_serial_suspend,
  1076. .resume = bfin_serial_resume,
  1077. .driver = {
  1078. .name = "bfin-uart",
  1079. },
  1080. };
  1081. static int __init bfin_serial_init(void)
  1082. {
  1083. int ret;
  1084. #ifdef CONFIG_KGDB_UART
  1085. struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  1086. struct ktermios t;
  1087. #endif
  1088. pr_info("Serial: Blackfin serial driver\n");
  1089. bfin_serial_init_ports();
  1090. ret = uart_register_driver(&bfin_serial_reg);
  1091. if (ret == 0) {
  1092. ret = platform_driver_register(&bfin_serial_driver);
  1093. if (ret) {
  1094. pr_debug("uart register failed\n");
  1095. uart_unregister_driver(&bfin_serial_reg);
  1096. }
  1097. }
  1098. #ifdef CONFIG_KGDB_UART
  1099. if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
  1100. request_irq(uart->port.irq, bfin_serial_rx_int,
  1101. IRQF_DISABLED, "BFIN_UART_RX", uart);
  1102. pr_info("Request irq for kgdb uart port\n");
  1103. #ifdef CONFIG_BF54x
  1104. UART_SET_IER(uart, ERBFI);
  1105. #else
  1106. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  1107. #endif
  1108. SSYNC();
  1109. t.c_cflag = CS8|B57600;
  1110. t.c_iflag = 0;
  1111. t.c_oflag = 0;
  1112. t.c_lflag = ICANON;
  1113. t.c_line = CONFIG_KGDB_UART_PORT;
  1114. bfin_serial_set_termios(&uart->port, &t, &t);
  1115. }
  1116. #endif
  1117. return ret;
  1118. }
  1119. static void __exit bfin_serial_exit(void)
  1120. {
  1121. platform_driver_unregister(&bfin_serial_driver);
  1122. uart_unregister_driver(&bfin_serial_reg);
  1123. }
  1124. module_init(bfin_serial_init);
  1125. module_exit(bfin_serial_exit);
  1126. MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
  1127. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  1128. MODULE_LICENSE("GPL");
  1129. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);