smc91x.c 58 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307
  1. /*
  2. * smc91x.c
  3. * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
  4. *
  5. * Copyright (C) 1996 by Erik Stahlman
  6. * Copyright (C) 2001 Standard Microsystems Corporation
  7. * Developed by Simple Network Magic Corporation
  8. * Copyright (C) 2003 Monta Vista Software, Inc.
  9. * Unified SMC91x driver by Nicolas Pitre
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. * Arguments:
  26. * io = for the base address
  27. * irq = for the IRQ
  28. * nowait = 0 for normal wait states, 1 eliminates additional wait states
  29. *
  30. * original author:
  31. * Erik Stahlman <erik@vt.edu>
  32. *
  33. * hardware multicast code:
  34. * Peter Cammaert <pc@denkart.be>
  35. *
  36. * contributors:
  37. * Daris A Nevil <dnevil@snmc.com>
  38. * Nicolas Pitre <nico@cam.org>
  39. * Russell King <rmk@arm.linux.org.uk>
  40. *
  41. * History:
  42. * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
  43. * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
  44. * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
  45. * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
  46. * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
  47. * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
  48. * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
  49. * more bus abstraction, big cleanup, etc.
  50. * 29/09/03 Russell King - add driver model support
  51. * - ethtool support
  52. * - convert to use generic MII interface
  53. * - add link up/down notification
  54. * - don't try to handle full negotiation in
  55. * smc_phy_configure
  56. * - clean up (and fix stack overrun) in PHY
  57. * MII read/write functions
  58. * 22/09/04 Nicolas Pitre big update (see commit log for details)
  59. */
  60. static const char version[] =
  61. "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
  62. /* Debugging level */
  63. #ifndef SMC_DEBUG
  64. #define SMC_DEBUG 0
  65. #endif
  66. #include <linux/init.h>
  67. #include <linux/module.h>
  68. #include <linux/kernel.h>
  69. #include <linux/sched.h>
  70. #include <linux/slab.h>
  71. #include <linux/delay.h>
  72. #include <linux/interrupt.h>
  73. #include <linux/errno.h>
  74. #include <linux/ioport.h>
  75. #include <linux/crc32.h>
  76. #include <linux/platform_device.h>
  77. #include <linux/spinlock.h>
  78. #include <linux/ethtool.h>
  79. #include <linux/mii.h>
  80. #include <linux/workqueue.h>
  81. #include <linux/netdevice.h>
  82. #include <linux/etherdevice.h>
  83. #include <linux/skbuff.h>
  84. #include <asm/io.h>
  85. #include "smc91x.h"
  86. #ifdef CONFIG_ISA
  87. /*
  88. * the LAN91C111 can be at any of the following port addresses. To change,
  89. * for a slightly different card, you can add it to the array. Keep in
  90. * mind that the array must end in zero.
  91. */
  92. static unsigned int smc_portlist[] __initdata = {
  93. 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
  94. 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
  95. };
  96. #ifndef SMC_IOADDR
  97. # define SMC_IOADDR -1
  98. #endif
  99. static unsigned long io = SMC_IOADDR;
  100. module_param(io, ulong, 0400);
  101. MODULE_PARM_DESC(io, "I/O base address");
  102. #ifndef SMC_IRQ
  103. # define SMC_IRQ -1
  104. #endif
  105. static int irq = SMC_IRQ;
  106. module_param(irq, int, 0400);
  107. MODULE_PARM_DESC(irq, "IRQ number");
  108. #endif /* CONFIG_ISA */
  109. #ifndef SMC_NOWAIT
  110. # define SMC_NOWAIT 0
  111. #endif
  112. static int nowait = SMC_NOWAIT;
  113. module_param(nowait, int, 0400);
  114. MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
  115. /*
  116. * Transmit timeout, default 5 seconds.
  117. */
  118. static int watchdog = 1000;
  119. module_param(watchdog, int, 0400);
  120. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  121. MODULE_LICENSE("GPL");
  122. /*
  123. * The internal workings of the driver. If you are changing anything
  124. * here with the SMC stuff, you should have the datasheet and know
  125. * what you are doing.
  126. */
  127. #define CARDNAME "smc91x"
  128. /*
  129. * Use power-down feature of the chip
  130. */
  131. #define POWER_DOWN 1
  132. /*
  133. * Wait time for memory to be free. This probably shouldn't be
  134. * tuned that much, as waiting for this means nothing else happens
  135. * in the system
  136. */
  137. #define MEMORY_WAIT_TIME 16
  138. /*
  139. * The maximum number of processing loops allowed for each call to the
  140. * IRQ handler.
  141. */
  142. #define MAX_IRQ_LOOPS 8
  143. /*
  144. * This selects whether TX packets are sent one by one to the SMC91x internal
  145. * memory and throttled until transmission completes. This may prevent
  146. * RX overruns a litle by keeping much of the memory free for RX packets
  147. * but to the expense of reduced TX throughput and increased IRQ overhead.
  148. * Note this is not a cure for a too slow data bus or too high IRQ latency.
  149. */
  150. #define THROTTLE_TX_PKTS 0
  151. /*
  152. * The MII clock high/low times. 2x this number gives the MII clock period
  153. * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
  154. */
  155. #define MII_DELAY 1
  156. #if SMC_DEBUG > 0
  157. #define DBG(n, args...) \
  158. do { \
  159. if (SMC_DEBUG >= (n)) \
  160. printk(args); \
  161. } while (0)
  162. #define PRINTK(args...) printk(args)
  163. #else
  164. #define DBG(n, args...) do { } while(0)
  165. #define PRINTK(args...) printk(KERN_DEBUG args)
  166. #endif
  167. #if SMC_DEBUG > 3
  168. static void PRINT_PKT(u_char *buf, int length)
  169. {
  170. int i;
  171. int remainder;
  172. int lines;
  173. lines = length / 16;
  174. remainder = length % 16;
  175. for (i = 0; i < lines ; i ++) {
  176. int cur;
  177. for (cur = 0; cur < 8; cur++) {
  178. u_char a, b;
  179. a = *buf++;
  180. b = *buf++;
  181. printk("%02x%02x ", a, b);
  182. }
  183. printk("\n");
  184. }
  185. for (i = 0; i < remainder/2 ; i++) {
  186. u_char a, b;
  187. a = *buf++;
  188. b = *buf++;
  189. printk("%02x%02x ", a, b);
  190. }
  191. printk("\n");
  192. }
  193. #else
  194. #define PRINT_PKT(x...) do { } while(0)
  195. #endif
  196. /* this enables an interrupt in the interrupt mask register */
  197. #define SMC_ENABLE_INT(x) do { \
  198. unsigned char mask; \
  199. spin_lock_irq(&lp->lock); \
  200. mask = SMC_GET_INT_MASK(); \
  201. mask |= (x); \
  202. SMC_SET_INT_MASK(mask); \
  203. spin_unlock_irq(&lp->lock); \
  204. } while (0)
  205. /* this disables an interrupt from the interrupt mask register */
  206. #define SMC_DISABLE_INT(x) do { \
  207. unsigned char mask; \
  208. spin_lock_irq(&lp->lock); \
  209. mask = SMC_GET_INT_MASK(); \
  210. mask &= ~(x); \
  211. SMC_SET_INT_MASK(mask); \
  212. spin_unlock_irq(&lp->lock); \
  213. } while (0)
  214. /*
  215. * Wait while MMU is busy. This is usually in the order of a few nanosecs
  216. * if at all, but let's avoid deadlocking the system if the hardware
  217. * decides to go south.
  218. */
  219. #define SMC_WAIT_MMU_BUSY() do { \
  220. if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
  221. unsigned long timeout = jiffies + 2; \
  222. while (SMC_GET_MMU_CMD() & MC_BUSY) { \
  223. if (time_after(jiffies, timeout)) { \
  224. printk("%s: timeout %s line %d\n", \
  225. dev->name, __FILE__, __LINE__); \
  226. break; \
  227. } \
  228. cpu_relax(); \
  229. } \
  230. } \
  231. } while (0)
  232. /*
  233. * this does a soft reset on the device
  234. */
  235. static void smc_reset(struct net_device *dev)
  236. {
  237. struct smc_local *lp = netdev_priv(dev);
  238. void __iomem *ioaddr = lp->base;
  239. unsigned int ctl, cfg;
  240. struct sk_buff *pending_skb;
  241. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  242. /* Disable all interrupts, block TX tasklet */
  243. spin_lock_irq(&lp->lock);
  244. SMC_SELECT_BANK(2);
  245. SMC_SET_INT_MASK(0);
  246. pending_skb = lp->pending_tx_skb;
  247. lp->pending_tx_skb = NULL;
  248. spin_unlock_irq(&lp->lock);
  249. /* free any pending tx skb */
  250. if (pending_skb) {
  251. dev_kfree_skb(pending_skb);
  252. dev->stats.tx_errors++;
  253. dev->stats.tx_aborted_errors++;
  254. }
  255. /*
  256. * This resets the registers mostly to defaults, but doesn't
  257. * affect EEPROM. That seems unnecessary
  258. */
  259. SMC_SELECT_BANK(0);
  260. SMC_SET_RCR(RCR_SOFTRST);
  261. /*
  262. * Setup the Configuration Register
  263. * This is necessary because the CONFIG_REG is not affected
  264. * by a soft reset
  265. */
  266. SMC_SELECT_BANK(1);
  267. cfg = CONFIG_DEFAULT;
  268. /*
  269. * Setup for fast accesses if requested. If the card/system
  270. * can't handle it then there will be no recovery except for
  271. * a hard reset or power cycle
  272. */
  273. if (nowait)
  274. cfg |= CONFIG_NO_WAIT;
  275. /*
  276. * Release from possible power-down state
  277. * Configuration register is not affected by Soft Reset
  278. */
  279. cfg |= CONFIG_EPH_POWER_EN;
  280. SMC_SET_CONFIG(cfg);
  281. /* this should pause enough for the chip to be happy */
  282. /*
  283. * elaborate? What does the chip _need_? --jgarzik
  284. *
  285. * This seems to be undocumented, but something the original
  286. * driver(s) have always done. Suspect undocumented timing
  287. * info/determined empirically. --rmk
  288. */
  289. udelay(1);
  290. /* Disable transmit and receive functionality */
  291. SMC_SELECT_BANK(0);
  292. SMC_SET_RCR(RCR_CLEAR);
  293. SMC_SET_TCR(TCR_CLEAR);
  294. SMC_SELECT_BANK(1);
  295. ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
  296. /*
  297. * Set the control register to automatically release successfully
  298. * transmitted packets, to make the best use out of our limited
  299. * memory
  300. */
  301. if(!THROTTLE_TX_PKTS)
  302. ctl |= CTL_AUTO_RELEASE;
  303. else
  304. ctl &= ~CTL_AUTO_RELEASE;
  305. SMC_SET_CTL(ctl);
  306. /* Reset the MMU */
  307. SMC_SELECT_BANK(2);
  308. SMC_SET_MMU_CMD(MC_RESET);
  309. SMC_WAIT_MMU_BUSY();
  310. }
  311. /*
  312. * Enable Interrupts, Receive, and Transmit
  313. */
  314. static void smc_enable(struct net_device *dev)
  315. {
  316. struct smc_local *lp = netdev_priv(dev);
  317. void __iomem *ioaddr = lp->base;
  318. int mask;
  319. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  320. /* see the header file for options in TCR/RCR DEFAULT */
  321. SMC_SELECT_BANK(0);
  322. SMC_SET_TCR(lp->tcr_cur_mode);
  323. SMC_SET_RCR(lp->rcr_cur_mode);
  324. SMC_SELECT_BANK(1);
  325. SMC_SET_MAC_ADDR(dev->dev_addr);
  326. /* now, enable interrupts */
  327. mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
  328. if (lp->version >= (CHIP_91100 << 4))
  329. mask |= IM_MDINT;
  330. SMC_SELECT_BANK(2);
  331. SMC_SET_INT_MASK(mask);
  332. /*
  333. * From this point the register bank must _NOT_ be switched away
  334. * to something else than bank 2 without proper locking against
  335. * races with any tasklet or interrupt handlers until smc_shutdown()
  336. * or smc_reset() is called.
  337. */
  338. }
  339. /*
  340. * this puts the device in an inactive state
  341. */
  342. static void smc_shutdown(struct net_device *dev)
  343. {
  344. struct smc_local *lp = netdev_priv(dev);
  345. void __iomem *ioaddr = lp->base;
  346. struct sk_buff *pending_skb;
  347. DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
  348. /* no more interrupts for me */
  349. spin_lock_irq(&lp->lock);
  350. SMC_SELECT_BANK(2);
  351. SMC_SET_INT_MASK(0);
  352. pending_skb = lp->pending_tx_skb;
  353. lp->pending_tx_skb = NULL;
  354. spin_unlock_irq(&lp->lock);
  355. if (pending_skb)
  356. dev_kfree_skb(pending_skb);
  357. /* and tell the card to stay away from that nasty outside world */
  358. SMC_SELECT_BANK(0);
  359. SMC_SET_RCR(RCR_CLEAR);
  360. SMC_SET_TCR(TCR_CLEAR);
  361. #ifdef POWER_DOWN
  362. /* finally, shut the chip down */
  363. SMC_SELECT_BANK(1);
  364. SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
  365. #endif
  366. }
  367. /*
  368. * This is the procedure to handle the receipt of a packet.
  369. */
  370. static inline void smc_rcv(struct net_device *dev)
  371. {
  372. struct smc_local *lp = netdev_priv(dev);
  373. void __iomem *ioaddr = lp->base;
  374. unsigned int packet_number, status, packet_len;
  375. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  376. packet_number = SMC_GET_RXFIFO();
  377. if (unlikely(packet_number & RXFIFO_REMPTY)) {
  378. PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
  379. return;
  380. }
  381. /* read from start of packet */
  382. SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
  383. /* First two words are status and packet length */
  384. SMC_GET_PKT_HDR(status, packet_len);
  385. packet_len &= 0x07ff; /* mask off top bits */
  386. DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
  387. dev->name, packet_number, status,
  388. packet_len, packet_len);
  389. back:
  390. if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
  391. if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
  392. /* accept VLAN packets */
  393. status &= ~RS_TOOLONG;
  394. goto back;
  395. }
  396. if (packet_len < 6) {
  397. /* bloody hardware */
  398. printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
  399. dev->name, packet_len, status);
  400. status |= RS_TOOSHORT;
  401. }
  402. SMC_WAIT_MMU_BUSY();
  403. SMC_SET_MMU_CMD(MC_RELEASE);
  404. dev->stats.rx_errors++;
  405. if (status & RS_ALGNERR)
  406. dev->stats.rx_frame_errors++;
  407. if (status & (RS_TOOSHORT | RS_TOOLONG))
  408. dev->stats.rx_length_errors++;
  409. if (status & RS_BADCRC)
  410. dev->stats.rx_crc_errors++;
  411. } else {
  412. struct sk_buff *skb;
  413. unsigned char *data;
  414. unsigned int data_len;
  415. /* set multicast stats */
  416. if (status & RS_MULTICAST)
  417. dev->stats.multicast++;
  418. /*
  419. * Actual payload is packet_len - 6 (or 5 if odd byte).
  420. * We want skb_reserve(2) and the final ctrl word
  421. * (2 bytes, possibly containing the payload odd byte).
  422. * Furthermore, we add 2 bytes to allow rounding up to
  423. * multiple of 4 bytes on 32 bit buses.
  424. * Hence packet_len - 6 + 2 + 2 + 2.
  425. */
  426. skb = dev_alloc_skb(packet_len);
  427. if (unlikely(skb == NULL)) {
  428. printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
  429. dev->name);
  430. SMC_WAIT_MMU_BUSY();
  431. SMC_SET_MMU_CMD(MC_RELEASE);
  432. dev->stats.rx_dropped++;
  433. return;
  434. }
  435. /* Align IP header to 32 bits */
  436. skb_reserve(skb, 2);
  437. /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
  438. if (lp->version == 0x90)
  439. status |= RS_ODDFRAME;
  440. /*
  441. * If odd length: packet_len - 5,
  442. * otherwise packet_len - 6.
  443. * With the trailing ctrl byte it's packet_len - 4.
  444. */
  445. data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
  446. data = skb_put(skb, data_len);
  447. SMC_PULL_DATA(data, packet_len - 4);
  448. SMC_WAIT_MMU_BUSY();
  449. SMC_SET_MMU_CMD(MC_RELEASE);
  450. PRINT_PKT(data, packet_len - 4);
  451. dev->last_rx = jiffies;
  452. skb->protocol = eth_type_trans(skb, dev);
  453. netif_rx(skb);
  454. dev->stats.rx_packets++;
  455. dev->stats.rx_bytes += data_len;
  456. }
  457. }
  458. #ifdef CONFIG_SMP
  459. /*
  460. * On SMP we have the following problem:
  461. *
  462. * A = smc_hardware_send_pkt()
  463. * B = smc_hard_start_xmit()
  464. * C = smc_interrupt()
  465. *
  466. * A and B can never be executed simultaneously. However, at least on UP,
  467. * it is possible (and even desirable) for C to interrupt execution of
  468. * A or B in order to have better RX reliability and avoid overruns.
  469. * C, just like A and B, must have exclusive access to the chip and
  470. * each of them must lock against any other concurrent access.
  471. * Unfortunately this is not possible to have C suspend execution of A or
  472. * B taking place on another CPU. On UP this is no an issue since A and B
  473. * are run from softirq context and C from hard IRQ context, and there is
  474. * no other CPU where concurrent access can happen.
  475. * If ever there is a way to force at least B and C to always be executed
  476. * on the same CPU then we could use read/write locks to protect against
  477. * any other concurrent access and C would always interrupt B. But life
  478. * isn't that easy in a SMP world...
  479. */
  480. #define smc_special_trylock(lock) \
  481. ({ \
  482. int __ret; \
  483. local_irq_disable(); \
  484. __ret = spin_trylock(lock); \
  485. if (!__ret) \
  486. local_irq_enable(); \
  487. __ret; \
  488. })
  489. #define smc_special_lock(lock) spin_lock_irq(lock)
  490. #define smc_special_unlock(lock) spin_unlock_irq(lock)
  491. #else
  492. #define smc_special_trylock(lock) (1)
  493. #define smc_special_lock(lock) do { } while (0)
  494. #define smc_special_unlock(lock) do { } while (0)
  495. #endif
  496. /*
  497. * This is called to actually send a packet to the chip.
  498. */
  499. static void smc_hardware_send_pkt(unsigned long data)
  500. {
  501. struct net_device *dev = (struct net_device *)data;
  502. struct smc_local *lp = netdev_priv(dev);
  503. void __iomem *ioaddr = lp->base;
  504. struct sk_buff *skb;
  505. unsigned int packet_no, len;
  506. unsigned char *buf;
  507. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  508. if (!smc_special_trylock(&lp->lock)) {
  509. netif_stop_queue(dev);
  510. tasklet_schedule(&lp->tx_task);
  511. return;
  512. }
  513. skb = lp->pending_tx_skb;
  514. if (unlikely(!skb)) {
  515. smc_special_unlock(&lp->lock);
  516. return;
  517. }
  518. lp->pending_tx_skb = NULL;
  519. packet_no = SMC_GET_AR();
  520. if (unlikely(packet_no & AR_FAILED)) {
  521. printk("%s: Memory allocation failed.\n", dev->name);
  522. dev->stats.tx_errors++;
  523. dev->stats.tx_fifo_errors++;
  524. smc_special_unlock(&lp->lock);
  525. goto done;
  526. }
  527. /* point to the beginning of the packet */
  528. SMC_SET_PN(packet_no);
  529. SMC_SET_PTR(PTR_AUTOINC);
  530. buf = skb->data;
  531. len = skb->len;
  532. DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
  533. dev->name, packet_no, len, len, buf);
  534. PRINT_PKT(buf, len);
  535. /*
  536. * Send the packet length (+6 for status words, length, and ctl.
  537. * The card will pad to 64 bytes with zeroes if packet is too small.
  538. */
  539. SMC_PUT_PKT_HDR(0, len + 6);
  540. /* send the actual data */
  541. SMC_PUSH_DATA(buf, len & ~1);
  542. /* Send final ctl word with the last byte if there is one */
  543. SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
  544. /*
  545. * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
  546. * have the effect of having at most one packet queued for TX
  547. * in the chip's memory at all time.
  548. *
  549. * If THROTTLE_TX_PKTS is not set then the queue is stopped only
  550. * when memory allocation (MC_ALLOC) does not succeed right away.
  551. */
  552. if (THROTTLE_TX_PKTS)
  553. netif_stop_queue(dev);
  554. /* queue the packet for TX */
  555. SMC_SET_MMU_CMD(MC_ENQUEUE);
  556. smc_special_unlock(&lp->lock);
  557. dev->trans_start = jiffies;
  558. dev->stats.tx_packets++;
  559. dev->stats.tx_bytes += len;
  560. SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
  561. done: if (!THROTTLE_TX_PKTS)
  562. netif_wake_queue(dev);
  563. dev_kfree_skb(skb);
  564. }
  565. /*
  566. * Since I am not sure if I will have enough room in the chip's ram
  567. * to store the packet, I call this routine which either sends it
  568. * now, or set the card to generates an interrupt when ready
  569. * for the packet.
  570. */
  571. static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  572. {
  573. struct smc_local *lp = netdev_priv(dev);
  574. void __iomem *ioaddr = lp->base;
  575. unsigned int numPages, poll_count, status;
  576. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  577. BUG_ON(lp->pending_tx_skb != NULL);
  578. /*
  579. * The MMU wants the number of pages to be the number of 256 bytes
  580. * 'pages', minus 1 (since a packet can't ever have 0 pages :))
  581. *
  582. * The 91C111 ignores the size bits, but earlier models don't.
  583. *
  584. * Pkt size for allocating is data length +6 (for additional status
  585. * words, length and ctl)
  586. *
  587. * If odd size then last byte is included in ctl word.
  588. */
  589. numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
  590. if (unlikely(numPages > 7)) {
  591. printk("%s: Far too big packet error.\n", dev->name);
  592. dev->stats.tx_errors++;
  593. dev->stats.tx_dropped++;
  594. dev_kfree_skb(skb);
  595. return 0;
  596. }
  597. smc_special_lock(&lp->lock);
  598. /* now, try to allocate the memory */
  599. SMC_SET_MMU_CMD(MC_ALLOC | numPages);
  600. /*
  601. * Poll the chip for a short amount of time in case the
  602. * allocation succeeds quickly.
  603. */
  604. poll_count = MEMORY_WAIT_TIME;
  605. do {
  606. status = SMC_GET_INT();
  607. if (status & IM_ALLOC_INT) {
  608. SMC_ACK_INT(IM_ALLOC_INT);
  609. break;
  610. }
  611. } while (--poll_count);
  612. smc_special_unlock(&lp->lock);
  613. lp->pending_tx_skb = skb;
  614. if (!poll_count) {
  615. /* oh well, wait until the chip finds memory later */
  616. netif_stop_queue(dev);
  617. DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
  618. SMC_ENABLE_INT(IM_ALLOC_INT);
  619. } else {
  620. /*
  621. * Allocation succeeded: push packet to the chip's own memory
  622. * immediately.
  623. */
  624. smc_hardware_send_pkt((unsigned long)dev);
  625. }
  626. return 0;
  627. }
  628. /*
  629. * This handles a TX interrupt, which is only called when:
  630. * - a TX error occurred, or
  631. * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
  632. */
  633. static void smc_tx(struct net_device *dev)
  634. {
  635. struct smc_local *lp = netdev_priv(dev);
  636. void __iomem *ioaddr = lp->base;
  637. unsigned int saved_packet, packet_no, tx_status, pkt_len;
  638. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  639. /* If the TX FIFO is empty then nothing to do */
  640. packet_no = SMC_GET_TXFIFO();
  641. if (unlikely(packet_no & TXFIFO_TEMPTY)) {
  642. PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
  643. return;
  644. }
  645. /* select packet to read from */
  646. saved_packet = SMC_GET_PN();
  647. SMC_SET_PN(packet_no);
  648. /* read the first word (status word) from this packet */
  649. SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
  650. SMC_GET_PKT_HDR(tx_status, pkt_len);
  651. DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
  652. dev->name, tx_status, packet_no);
  653. if (!(tx_status & ES_TX_SUC))
  654. dev->stats.tx_errors++;
  655. if (tx_status & ES_LOSTCARR)
  656. dev->stats.tx_carrier_errors++;
  657. if (tx_status & (ES_LATCOL | ES_16COL)) {
  658. PRINTK("%s: %s occurred on last xmit\n", dev->name,
  659. (tx_status & ES_LATCOL) ?
  660. "late collision" : "too many collisions");
  661. dev->stats.tx_window_errors++;
  662. if (!(dev->stats.tx_window_errors & 63) && net_ratelimit()) {
  663. printk(KERN_INFO "%s: unexpectedly large number of "
  664. "bad collisions. Please check duplex "
  665. "setting.\n", dev->name);
  666. }
  667. }
  668. /* kill the packet */
  669. SMC_WAIT_MMU_BUSY();
  670. SMC_SET_MMU_CMD(MC_FREEPKT);
  671. /* Don't restore Packet Number Reg until busy bit is cleared */
  672. SMC_WAIT_MMU_BUSY();
  673. SMC_SET_PN(saved_packet);
  674. /* re-enable transmit */
  675. SMC_SELECT_BANK(0);
  676. SMC_SET_TCR(lp->tcr_cur_mode);
  677. SMC_SELECT_BANK(2);
  678. }
  679. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  680. static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
  681. {
  682. struct smc_local *lp = netdev_priv(dev);
  683. void __iomem *ioaddr = lp->base;
  684. unsigned int mii_reg, mask;
  685. mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
  686. mii_reg |= MII_MDOE;
  687. for (mask = 1 << (bits - 1); mask; mask >>= 1) {
  688. if (val & mask)
  689. mii_reg |= MII_MDO;
  690. else
  691. mii_reg &= ~MII_MDO;
  692. SMC_SET_MII(mii_reg);
  693. udelay(MII_DELAY);
  694. SMC_SET_MII(mii_reg | MII_MCLK);
  695. udelay(MII_DELAY);
  696. }
  697. }
  698. static unsigned int smc_mii_in(struct net_device *dev, int bits)
  699. {
  700. struct smc_local *lp = netdev_priv(dev);
  701. void __iomem *ioaddr = lp->base;
  702. unsigned int mii_reg, mask, val;
  703. mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
  704. SMC_SET_MII(mii_reg);
  705. for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
  706. if (SMC_GET_MII() & MII_MDI)
  707. val |= mask;
  708. SMC_SET_MII(mii_reg);
  709. udelay(MII_DELAY);
  710. SMC_SET_MII(mii_reg | MII_MCLK);
  711. udelay(MII_DELAY);
  712. }
  713. return val;
  714. }
  715. /*
  716. * Reads a register from the MII Management serial interface
  717. */
  718. static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
  719. {
  720. struct smc_local *lp = netdev_priv(dev);
  721. void __iomem *ioaddr = lp->base;
  722. unsigned int phydata;
  723. SMC_SELECT_BANK(3);
  724. /* Idle - 32 ones */
  725. smc_mii_out(dev, 0xffffffff, 32);
  726. /* Start code (01) + read (10) + phyaddr + phyreg */
  727. smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
  728. /* Turnaround (2bits) + phydata */
  729. phydata = smc_mii_in(dev, 18);
  730. /* Return to idle state */
  731. SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
  732. DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  733. __FUNCTION__, phyaddr, phyreg, phydata);
  734. SMC_SELECT_BANK(2);
  735. return phydata;
  736. }
  737. /*
  738. * Writes a register to the MII Management serial interface
  739. */
  740. static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
  741. int phydata)
  742. {
  743. struct smc_local *lp = netdev_priv(dev);
  744. void __iomem *ioaddr = lp->base;
  745. SMC_SELECT_BANK(3);
  746. /* Idle - 32 ones */
  747. smc_mii_out(dev, 0xffffffff, 32);
  748. /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
  749. smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
  750. /* Return to idle state */
  751. SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
  752. DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  753. __FUNCTION__, phyaddr, phyreg, phydata);
  754. SMC_SELECT_BANK(2);
  755. }
  756. /*
  757. * Finds and reports the PHY address
  758. */
  759. static void smc_phy_detect(struct net_device *dev)
  760. {
  761. struct smc_local *lp = netdev_priv(dev);
  762. int phyaddr;
  763. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  764. lp->phy_type = 0;
  765. /*
  766. * Scan all 32 PHY addresses if necessary, starting at
  767. * PHY#1 to PHY#31, and then PHY#0 last.
  768. */
  769. for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
  770. unsigned int id1, id2;
  771. /* Read the PHY identifiers */
  772. id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
  773. id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
  774. DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
  775. dev->name, id1, id2);
  776. /* Make sure it is a valid identifier */
  777. if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
  778. id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
  779. /* Save the PHY's address */
  780. lp->mii.phy_id = phyaddr & 31;
  781. lp->phy_type = id1 << 16 | id2;
  782. break;
  783. }
  784. }
  785. }
  786. /*
  787. * Sets the PHY to a configuration as determined by the user
  788. */
  789. static int smc_phy_fixed(struct net_device *dev)
  790. {
  791. struct smc_local *lp = netdev_priv(dev);
  792. void __iomem *ioaddr = lp->base;
  793. int phyaddr = lp->mii.phy_id;
  794. int bmcr, cfg1;
  795. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  796. /* Enter Link Disable state */
  797. cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
  798. cfg1 |= PHY_CFG1_LNKDIS;
  799. smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
  800. /*
  801. * Set our fixed capabilities
  802. * Disable auto-negotiation
  803. */
  804. bmcr = 0;
  805. if (lp->ctl_rfduplx)
  806. bmcr |= BMCR_FULLDPLX;
  807. if (lp->ctl_rspeed == 100)
  808. bmcr |= BMCR_SPEED100;
  809. /* Write our capabilities to the phy control register */
  810. smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
  811. /* Re-Configure the Receive/Phy Control register */
  812. SMC_SELECT_BANK(0);
  813. SMC_SET_RPC(lp->rpc_cur_mode);
  814. SMC_SELECT_BANK(2);
  815. return 1;
  816. }
  817. /*
  818. * smc_phy_reset - reset the phy
  819. * @dev: net device
  820. * @phy: phy address
  821. *
  822. * Issue a software reset for the specified PHY and
  823. * wait up to 100ms for the reset to complete. We should
  824. * not access the PHY for 50ms after issuing the reset.
  825. *
  826. * The time to wait appears to be dependent on the PHY.
  827. *
  828. * Must be called with lp->lock locked.
  829. */
  830. static int smc_phy_reset(struct net_device *dev, int phy)
  831. {
  832. struct smc_local *lp = netdev_priv(dev);
  833. unsigned int bmcr;
  834. int timeout;
  835. smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
  836. for (timeout = 2; timeout; timeout--) {
  837. spin_unlock_irq(&lp->lock);
  838. msleep(50);
  839. spin_lock_irq(&lp->lock);
  840. bmcr = smc_phy_read(dev, phy, MII_BMCR);
  841. if (!(bmcr & BMCR_RESET))
  842. break;
  843. }
  844. return bmcr & BMCR_RESET;
  845. }
  846. /*
  847. * smc_phy_powerdown - powerdown phy
  848. * @dev: net device
  849. *
  850. * Power down the specified PHY
  851. */
  852. static void smc_phy_powerdown(struct net_device *dev)
  853. {
  854. struct smc_local *lp = netdev_priv(dev);
  855. unsigned int bmcr;
  856. int phy = lp->mii.phy_id;
  857. if (lp->phy_type == 0)
  858. return;
  859. /* We need to ensure that no calls to smc_phy_configure are
  860. pending.
  861. flush_scheduled_work() cannot be called because we are
  862. running with the netlink semaphore held (from
  863. devinet_ioctl()) and the pending work queue contains
  864. linkwatch_event() (scheduled by netif_carrier_off()
  865. above). linkwatch_event() also wants the netlink semaphore.
  866. */
  867. while(lp->work_pending)
  868. yield();
  869. bmcr = smc_phy_read(dev, phy, MII_BMCR);
  870. smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
  871. }
  872. /*
  873. * smc_phy_check_media - check the media status and adjust TCR
  874. * @dev: net device
  875. * @init: set true for initialisation
  876. *
  877. * Select duplex mode depending on negotiation state. This
  878. * also updates our carrier state.
  879. */
  880. static void smc_phy_check_media(struct net_device *dev, int init)
  881. {
  882. struct smc_local *lp = netdev_priv(dev);
  883. void __iomem *ioaddr = lp->base;
  884. if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
  885. /* duplex state has changed */
  886. if (lp->mii.full_duplex) {
  887. lp->tcr_cur_mode |= TCR_SWFDUP;
  888. } else {
  889. lp->tcr_cur_mode &= ~TCR_SWFDUP;
  890. }
  891. SMC_SELECT_BANK(0);
  892. SMC_SET_TCR(lp->tcr_cur_mode);
  893. }
  894. }
  895. /*
  896. * Configures the specified PHY through the MII management interface
  897. * using Autonegotiation.
  898. * Calls smc_phy_fixed() if the user has requested a certain config.
  899. * If RPC ANEG bit is set, the media selection is dependent purely on
  900. * the selection by the MII (either in the MII BMCR reg or the result
  901. * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
  902. * is controlled by the RPC SPEED and RPC DPLX bits.
  903. */
  904. static void smc_phy_configure(struct work_struct *work)
  905. {
  906. struct smc_local *lp =
  907. container_of(work, struct smc_local, phy_configure);
  908. struct net_device *dev = lp->dev;
  909. void __iomem *ioaddr = lp->base;
  910. int phyaddr = lp->mii.phy_id;
  911. int my_phy_caps; /* My PHY capabilities */
  912. int my_ad_caps; /* My Advertised capabilities */
  913. int status;
  914. DBG(3, "%s:smc_program_phy()\n", dev->name);
  915. spin_lock_irq(&lp->lock);
  916. /*
  917. * We should not be called if phy_type is zero.
  918. */
  919. if (lp->phy_type == 0)
  920. goto smc_phy_configure_exit;
  921. if (smc_phy_reset(dev, phyaddr)) {
  922. printk("%s: PHY reset timed out\n", dev->name);
  923. goto smc_phy_configure_exit;
  924. }
  925. /*
  926. * Enable PHY Interrupts (for register 18)
  927. * Interrupts listed here are disabled
  928. */
  929. smc_phy_write(dev, phyaddr, PHY_MASK_REG,
  930. PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
  931. PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
  932. PHY_INT_SPDDET | PHY_INT_DPLXDET);
  933. /* Configure the Receive/Phy Control register */
  934. SMC_SELECT_BANK(0);
  935. SMC_SET_RPC(lp->rpc_cur_mode);
  936. /* If the user requested no auto neg, then go set his request */
  937. if (lp->mii.force_media) {
  938. smc_phy_fixed(dev);
  939. goto smc_phy_configure_exit;
  940. }
  941. /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
  942. my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
  943. if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
  944. printk(KERN_INFO "Auto negotiation NOT supported\n");
  945. smc_phy_fixed(dev);
  946. goto smc_phy_configure_exit;
  947. }
  948. my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
  949. if (my_phy_caps & BMSR_100BASE4)
  950. my_ad_caps |= ADVERTISE_100BASE4;
  951. if (my_phy_caps & BMSR_100FULL)
  952. my_ad_caps |= ADVERTISE_100FULL;
  953. if (my_phy_caps & BMSR_100HALF)
  954. my_ad_caps |= ADVERTISE_100HALF;
  955. if (my_phy_caps & BMSR_10FULL)
  956. my_ad_caps |= ADVERTISE_10FULL;
  957. if (my_phy_caps & BMSR_10HALF)
  958. my_ad_caps |= ADVERTISE_10HALF;
  959. /* Disable capabilities not selected by our user */
  960. if (lp->ctl_rspeed != 100)
  961. my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
  962. if (!lp->ctl_rfduplx)
  963. my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
  964. /* Update our Auto-Neg Advertisement Register */
  965. smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
  966. lp->mii.advertising = my_ad_caps;
  967. /*
  968. * Read the register back. Without this, it appears that when
  969. * auto-negotiation is restarted, sometimes it isn't ready and
  970. * the link does not come up.
  971. */
  972. status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
  973. DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
  974. DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
  975. /* Restart auto-negotiation process in order to advertise my caps */
  976. smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
  977. smc_phy_check_media(dev, 1);
  978. smc_phy_configure_exit:
  979. SMC_SELECT_BANK(2);
  980. spin_unlock_irq(&lp->lock);
  981. lp->work_pending = 0;
  982. }
  983. /*
  984. * smc_phy_interrupt
  985. *
  986. * Purpose: Handle interrupts relating to PHY register 18. This is
  987. * called from the "hard" interrupt handler under our private spinlock.
  988. */
  989. static void smc_phy_interrupt(struct net_device *dev)
  990. {
  991. struct smc_local *lp = netdev_priv(dev);
  992. int phyaddr = lp->mii.phy_id;
  993. int phy18;
  994. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  995. if (lp->phy_type == 0)
  996. return;
  997. for(;;) {
  998. smc_phy_check_media(dev, 0);
  999. /* Read PHY Register 18, Status Output */
  1000. phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
  1001. if ((phy18 & PHY_INT_INT) == 0)
  1002. break;
  1003. }
  1004. }
  1005. /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
  1006. static void smc_10bt_check_media(struct net_device *dev, int init)
  1007. {
  1008. struct smc_local *lp = netdev_priv(dev);
  1009. void __iomem *ioaddr = lp->base;
  1010. unsigned int old_carrier, new_carrier;
  1011. old_carrier = netif_carrier_ok(dev) ? 1 : 0;
  1012. SMC_SELECT_BANK(0);
  1013. new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0;
  1014. SMC_SELECT_BANK(2);
  1015. if (init || (old_carrier != new_carrier)) {
  1016. if (!new_carrier) {
  1017. netif_carrier_off(dev);
  1018. } else {
  1019. netif_carrier_on(dev);
  1020. }
  1021. if (netif_msg_link(lp))
  1022. printk(KERN_INFO "%s: link %s\n", dev->name,
  1023. new_carrier ? "up" : "down");
  1024. }
  1025. }
  1026. static void smc_eph_interrupt(struct net_device *dev)
  1027. {
  1028. struct smc_local *lp = netdev_priv(dev);
  1029. void __iomem *ioaddr = lp->base;
  1030. unsigned int ctl;
  1031. smc_10bt_check_media(dev, 0);
  1032. SMC_SELECT_BANK(1);
  1033. ctl = SMC_GET_CTL();
  1034. SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
  1035. SMC_SET_CTL(ctl);
  1036. SMC_SELECT_BANK(2);
  1037. }
  1038. /*
  1039. * This is the main routine of the driver, to handle the device when
  1040. * it needs some attention.
  1041. */
  1042. static irqreturn_t smc_interrupt(int irq, void *dev_id)
  1043. {
  1044. struct net_device *dev = dev_id;
  1045. struct smc_local *lp = netdev_priv(dev);
  1046. void __iomem *ioaddr = lp->base;
  1047. int status, mask, timeout, card_stats;
  1048. int saved_pointer;
  1049. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  1050. spin_lock(&lp->lock);
  1051. /* A preamble may be used when there is a potential race
  1052. * between the interruptible transmit functions and this
  1053. * ISR. */
  1054. SMC_INTERRUPT_PREAMBLE;
  1055. saved_pointer = SMC_GET_PTR();
  1056. mask = SMC_GET_INT_MASK();
  1057. SMC_SET_INT_MASK(0);
  1058. /* set a timeout value, so I don't stay here forever */
  1059. timeout = MAX_IRQ_LOOPS;
  1060. do {
  1061. status = SMC_GET_INT();
  1062. DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
  1063. dev->name, status, mask,
  1064. ({ int meminfo; SMC_SELECT_BANK(0);
  1065. meminfo = SMC_GET_MIR();
  1066. SMC_SELECT_BANK(2); meminfo; }),
  1067. SMC_GET_FIFO());
  1068. status &= mask;
  1069. if (!status)
  1070. break;
  1071. if (status & IM_TX_INT) {
  1072. /* do this before RX as it will free memory quickly */
  1073. DBG(3, "%s: TX int\n", dev->name);
  1074. smc_tx(dev);
  1075. SMC_ACK_INT(IM_TX_INT);
  1076. if (THROTTLE_TX_PKTS)
  1077. netif_wake_queue(dev);
  1078. } else if (status & IM_RCV_INT) {
  1079. DBG(3, "%s: RX irq\n", dev->name);
  1080. smc_rcv(dev);
  1081. } else if (status & IM_ALLOC_INT) {
  1082. DBG(3, "%s: Allocation irq\n", dev->name);
  1083. tasklet_hi_schedule(&lp->tx_task);
  1084. mask &= ~IM_ALLOC_INT;
  1085. } else if (status & IM_TX_EMPTY_INT) {
  1086. DBG(3, "%s: TX empty\n", dev->name);
  1087. mask &= ~IM_TX_EMPTY_INT;
  1088. /* update stats */
  1089. SMC_SELECT_BANK(0);
  1090. card_stats = SMC_GET_COUNTER();
  1091. SMC_SELECT_BANK(2);
  1092. /* single collisions */
  1093. dev->stats.collisions += card_stats & 0xF;
  1094. card_stats >>= 4;
  1095. /* multiple collisions */
  1096. dev->stats.collisions += card_stats & 0xF;
  1097. } else if (status & IM_RX_OVRN_INT) {
  1098. DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
  1099. ({ int eph_st; SMC_SELECT_BANK(0);
  1100. eph_st = SMC_GET_EPH_STATUS();
  1101. SMC_SELECT_BANK(2); eph_st; }) );
  1102. SMC_ACK_INT(IM_RX_OVRN_INT);
  1103. dev->stats.rx_errors++;
  1104. dev->stats.rx_fifo_errors++;
  1105. } else if (status & IM_EPH_INT) {
  1106. smc_eph_interrupt(dev);
  1107. } else if (status & IM_MDINT) {
  1108. SMC_ACK_INT(IM_MDINT);
  1109. smc_phy_interrupt(dev);
  1110. } else if (status & IM_ERCV_INT) {
  1111. SMC_ACK_INT(IM_ERCV_INT);
  1112. PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
  1113. }
  1114. } while (--timeout);
  1115. /* restore register states */
  1116. SMC_SET_PTR(saved_pointer);
  1117. SMC_SET_INT_MASK(mask);
  1118. spin_unlock(&lp->lock);
  1119. if (timeout == MAX_IRQ_LOOPS)
  1120. PRINTK("%s: spurious interrupt (mask = 0x%02x)\n",
  1121. dev->name, mask);
  1122. DBG(3, "%s: Interrupt done (%d loops)\n",
  1123. dev->name, MAX_IRQ_LOOPS - timeout);
  1124. /*
  1125. * We return IRQ_HANDLED unconditionally here even if there was
  1126. * nothing to do. There is a possibility that a packet might
  1127. * get enqueued into the chip right after TX_EMPTY_INT is raised
  1128. * but just before the CPU acknowledges the IRQ.
  1129. * Better take an unneeded IRQ in some occasions than complexifying
  1130. * the code for all cases.
  1131. */
  1132. return IRQ_HANDLED;
  1133. }
  1134. #ifdef CONFIG_NET_POLL_CONTROLLER
  1135. /*
  1136. * Polling receive - used by netconsole and other diagnostic tools
  1137. * to allow network i/o with interrupts disabled.
  1138. */
  1139. static void smc_poll_controller(struct net_device *dev)
  1140. {
  1141. disable_irq(dev->irq);
  1142. smc_interrupt(dev->irq, dev);
  1143. enable_irq(dev->irq);
  1144. }
  1145. #endif
  1146. /* Our watchdog timed out. Called by the networking layer */
  1147. static void smc_timeout(struct net_device *dev)
  1148. {
  1149. struct smc_local *lp = netdev_priv(dev);
  1150. void __iomem *ioaddr = lp->base;
  1151. int status, mask, eph_st, meminfo, fifo;
  1152. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  1153. spin_lock_irq(&lp->lock);
  1154. status = SMC_GET_INT();
  1155. mask = SMC_GET_INT_MASK();
  1156. fifo = SMC_GET_FIFO();
  1157. SMC_SELECT_BANK(0);
  1158. eph_st = SMC_GET_EPH_STATUS();
  1159. meminfo = SMC_GET_MIR();
  1160. SMC_SELECT_BANK(2);
  1161. spin_unlock_irq(&lp->lock);
  1162. PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
  1163. "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
  1164. dev->name, status, mask, meminfo, fifo, eph_st );
  1165. smc_reset(dev);
  1166. smc_enable(dev);
  1167. /*
  1168. * Reconfiguring the PHY doesn't seem like a bad idea here, but
  1169. * smc_phy_configure() calls msleep() which calls schedule_timeout()
  1170. * which calls schedule(). Hence we use a work queue.
  1171. */
  1172. if (lp->phy_type != 0) {
  1173. if (schedule_work(&lp->phy_configure)) {
  1174. lp->work_pending = 1;
  1175. }
  1176. }
  1177. /* We can accept TX packets again */
  1178. dev->trans_start = jiffies;
  1179. netif_wake_queue(dev);
  1180. }
  1181. /*
  1182. * This routine will, depending on the values passed to it,
  1183. * either make it accept multicast packets, go into
  1184. * promiscuous mode (for TCPDUMP and cousins) or accept
  1185. * a select set of multicast packets
  1186. */
  1187. static void smc_set_multicast_list(struct net_device *dev)
  1188. {
  1189. struct smc_local *lp = netdev_priv(dev);
  1190. void __iomem *ioaddr = lp->base;
  1191. unsigned char multicast_table[8];
  1192. int update_multicast = 0;
  1193. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  1194. if (dev->flags & IFF_PROMISC) {
  1195. DBG(2, "%s: RCR_PRMS\n", dev->name);
  1196. lp->rcr_cur_mode |= RCR_PRMS;
  1197. }
  1198. /* BUG? I never disable promiscuous mode if multicasting was turned on.
  1199. Now, I turn off promiscuous mode, but I don't do anything to multicasting
  1200. when promiscuous mode is turned on.
  1201. */
  1202. /*
  1203. * Here, I am setting this to accept all multicast packets.
  1204. * I don't need to zero the multicast table, because the flag is
  1205. * checked before the table is
  1206. */
  1207. else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
  1208. DBG(2, "%s: RCR_ALMUL\n", dev->name);
  1209. lp->rcr_cur_mode |= RCR_ALMUL;
  1210. }
  1211. /*
  1212. * This sets the internal hardware table to filter out unwanted
  1213. * multicast packets before they take up memory.
  1214. *
  1215. * The SMC chip uses a hash table where the high 6 bits of the CRC of
  1216. * address are the offset into the table. If that bit is 1, then the
  1217. * multicast packet is accepted. Otherwise, it's dropped silently.
  1218. *
  1219. * To use the 6 bits as an offset into the table, the high 3 bits are
  1220. * the number of the 8 bit register, while the low 3 bits are the bit
  1221. * within that register.
  1222. */
  1223. else if (dev->mc_count) {
  1224. int i;
  1225. struct dev_mc_list *cur_addr;
  1226. /* table for flipping the order of 3 bits */
  1227. static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
  1228. /* start with a table of all zeros: reject all */
  1229. memset(multicast_table, 0, sizeof(multicast_table));
  1230. cur_addr = dev->mc_list;
  1231. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1232. int position;
  1233. /* do we have a pointer here? */
  1234. if (!cur_addr)
  1235. break;
  1236. /* make sure this is a multicast address -
  1237. shouldn't this be a given if we have it here ? */
  1238. if (!(*cur_addr->dmi_addr & 1))
  1239. continue;
  1240. /* only use the low order bits */
  1241. position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
  1242. /* do some messy swapping to put the bit in the right spot */
  1243. multicast_table[invert3[position&7]] |=
  1244. (1<<invert3[(position>>3)&7]);
  1245. }
  1246. /* be sure I get rid of flags I might have set */
  1247. lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
  1248. /* now, the table can be loaded into the chipset */
  1249. update_multicast = 1;
  1250. } else {
  1251. DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
  1252. lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
  1253. /*
  1254. * since I'm disabling all multicast entirely, I need to
  1255. * clear the multicast list
  1256. */
  1257. memset(multicast_table, 0, sizeof(multicast_table));
  1258. update_multicast = 1;
  1259. }
  1260. spin_lock_irq(&lp->lock);
  1261. SMC_SELECT_BANK(0);
  1262. SMC_SET_RCR(lp->rcr_cur_mode);
  1263. if (update_multicast) {
  1264. SMC_SELECT_BANK(3);
  1265. SMC_SET_MCAST(multicast_table);
  1266. }
  1267. SMC_SELECT_BANK(2);
  1268. spin_unlock_irq(&lp->lock);
  1269. }
  1270. /*
  1271. * Open and Initialize the board
  1272. *
  1273. * Set up everything, reset the card, etc..
  1274. */
  1275. static int
  1276. smc_open(struct net_device *dev)
  1277. {
  1278. struct smc_local *lp = netdev_priv(dev);
  1279. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  1280. /*
  1281. * Check that the address is valid. If its not, refuse
  1282. * to bring the device up. The user must specify an
  1283. * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
  1284. */
  1285. if (!is_valid_ether_addr(dev->dev_addr)) {
  1286. PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
  1287. return -EINVAL;
  1288. }
  1289. /* Setup the default Register Modes */
  1290. lp->tcr_cur_mode = TCR_DEFAULT;
  1291. lp->rcr_cur_mode = RCR_DEFAULT;
  1292. lp->rpc_cur_mode = RPC_DEFAULT;
  1293. /*
  1294. * If we are not using a MII interface, we need to
  1295. * monitor our own carrier signal to detect faults.
  1296. */
  1297. if (lp->phy_type == 0)
  1298. lp->tcr_cur_mode |= TCR_MON_CSN;
  1299. /* reset the hardware */
  1300. smc_reset(dev);
  1301. smc_enable(dev);
  1302. /* Configure the PHY, initialize the link state */
  1303. if (lp->phy_type != 0)
  1304. smc_phy_configure(&lp->phy_configure);
  1305. else {
  1306. spin_lock_irq(&lp->lock);
  1307. smc_10bt_check_media(dev, 1);
  1308. spin_unlock_irq(&lp->lock);
  1309. }
  1310. netif_start_queue(dev);
  1311. return 0;
  1312. }
  1313. /*
  1314. * smc_close
  1315. *
  1316. * this makes the board clean up everything that it can
  1317. * and not talk to the outside world. Caused by
  1318. * an 'ifconfig ethX down'
  1319. */
  1320. static int smc_close(struct net_device *dev)
  1321. {
  1322. struct smc_local *lp = netdev_priv(dev);
  1323. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  1324. netif_stop_queue(dev);
  1325. netif_carrier_off(dev);
  1326. /* clear everything */
  1327. smc_shutdown(dev);
  1328. tasklet_kill(&lp->tx_task);
  1329. smc_phy_powerdown(dev);
  1330. return 0;
  1331. }
  1332. /*
  1333. * Ethtool support
  1334. */
  1335. static int
  1336. smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1337. {
  1338. struct smc_local *lp = netdev_priv(dev);
  1339. int ret;
  1340. cmd->maxtxpkt = 1;
  1341. cmd->maxrxpkt = 1;
  1342. if (lp->phy_type != 0) {
  1343. spin_lock_irq(&lp->lock);
  1344. ret = mii_ethtool_gset(&lp->mii, cmd);
  1345. spin_unlock_irq(&lp->lock);
  1346. } else {
  1347. cmd->supported = SUPPORTED_10baseT_Half |
  1348. SUPPORTED_10baseT_Full |
  1349. SUPPORTED_TP | SUPPORTED_AUI;
  1350. if (lp->ctl_rspeed == 10)
  1351. cmd->speed = SPEED_10;
  1352. else if (lp->ctl_rspeed == 100)
  1353. cmd->speed = SPEED_100;
  1354. cmd->autoneg = AUTONEG_DISABLE;
  1355. cmd->transceiver = XCVR_INTERNAL;
  1356. cmd->port = 0;
  1357. cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
  1358. ret = 0;
  1359. }
  1360. return ret;
  1361. }
  1362. static int
  1363. smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1364. {
  1365. struct smc_local *lp = netdev_priv(dev);
  1366. int ret;
  1367. if (lp->phy_type != 0) {
  1368. spin_lock_irq(&lp->lock);
  1369. ret = mii_ethtool_sset(&lp->mii, cmd);
  1370. spin_unlock_irq(&lp->lock);
  1371. } else {
  1372. if (cmd->autoneg != AUTONEG_DISABLE ||
  1373. cmd->speed != SPEED_10 ||
  1374. (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
  1375. (cmd->port != PORT_TP && cmd->port != PORT_AUI))
  1376. return -EINVAL;
  1377. // lp->port = cmd->port;
  1378. lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
  1379. // if (netif_running(dev))
  1380. // smc_set_port(dev);
  1381. ret = 0;
  1382. }
  1383. return ret;
  1384. }
  1385. static void
  1386. smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1387. {
  1388. strncpy(info->driver, CARDNAME, sizeof(info->driver));
  1389. strncpy(info->version, version, sizeof(info->version));
  1390. strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
  1391. }
  1392. static int smc_ethtool_nwayreset(struct net_device *dev)
  1393. {
  1394. struct smc_local *lp = netdev_priv(dev);
  1395. int ret = -EINVAL;
  1396. if (lp->phy_type != 0) {
  1397. spin_lock_irq(&lp->lock);
  1398. ret = mii_nway_restart(&lp->mii);
  1399. spin_unlock_irq(&lp->lock);
  1400. }
  1401. return ret;
  1402. }
  1403. static u32 smc_ethtool_getmsglevel(struct net_device *dev)
  1404. {
  1405. struct smc_local *lp = netdev_priv(dev);
  1406. return lp->msg_enable;
  1407. }
  1408. static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1409. {
  1410. struct smc_local *lp = netdev_priv(dev);
  1411. lp->msg_enable = level;
  1412. }
  1413. static const struct ethtool_ops smc_ethtool_ops = {
  1414. .get_settings = smc_ethtool_getsettings,
  1415. .set_settings = smc_ethtool_setsettings,
  1416. .get_drvinfo = smc_ethtool_getdrvinfo,
  1417. .get_msglevel = smc_ethtool_getmsglevel,
  1418. .set_msglevel = smc_ethtool_setmsglevel,
  1419. .nway_reset = smc_ethtool_nwayreset,
  1420. .get_link = ethtool_op_get_link,
  1421. // .get_eeprom = smc_ethtool_geteeprom,
  1422. // .set_eeprom = smc_ethtool_seteeprom,
  1423. };
  1424. /*
  1425. * smc_findirq
  1426. *
  1427. * This routine has a simple purpose -- make the SMC chip generate an
  1428. * interrupt, so an auto-detect routine can detect it, and find the IRQ,
  1429. */
  1430. /*
  1431. * does this still work?
  1432. *
  1433. * I just deleted auto_irq.c, since it was never built...
  1434. * --jgarzik
  1435. */
  1436. static int __init smc_findirq(void __iomem *ioaddr)
  1437. {
  1438. int timeout = 20;
  1439. unsigned long cookie;
  1440. DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
  1441. cookie = probe_irq_on();
  1442. /*
  1443. * What I try to do here is trigger an ALLOC_INT. This is done
  1444. * by allocating a small chunk of memory, which will give an interrupt
  1445. * when done.
  1446. */
  1447. /* enable ALLOCation interrupts ONLY */
  1448. SMC_SELECT_BANK(2);
  1449. SMC_SET_INT_MASK(IM_ALLOC_INT);
  1450. /*
  1451. * Allocate 512 bytes of memory. Note that the chip was just
  1452. * reset so all the memory is available
  1453. */
  1454. SMC_SET_MMU_CMD(MC_ALLOC | 1);
  1455. /*
  1456. * Wait until positive that the interrupt has been generated
  1457. */
  1458. do {
  1459. int int_status;
  1460. udelay(10);
  1461. int_status = SMC_GET_INT();
  1462. if (int_status & IM_ALLOC_INT)
  1463. break; /* got the interrupt */
  1464. } while (--timeout);
  1465. /*
  1466. * there is really nothing that I can do here if timeout fails,
  1467. * as autoirq_report will return a 0 anyway, which is what I
  1468. * want in this case. Plus, the clean up is needed in both
  1469. * cases.
  1470. */
  1471. /* and disable all interrupts again */
  1472. SMC_SET_INT_MASK(0);
  1473. /* and return what I found */
  1474. return probe_irq_off(cookie);
  1475. }
  1476. /*
  1477. * Function: smc_probe(unsigned long ioaddr)
  1478. *
  1479. * Purpose:
  1480. * Tests to see if a given ioaddr points to an SMC91x chip.
  1481. * Returns a 0 on success
  1482. *
  1483. * Algorithm:
  1484. * (1) see if the high byte of BANK_SELECT is 0x33
  1485. * (2) compare the ioaddr with the base register's address
  1486. * (3) see if I recognize the chip ID in the appropriate register
  1487. *
  1488. * Here I do typical initialization tasks.
  1489. *
  1490. * o Initialize the structure if needed
  1491. * o print out my vanity message if not done so already
  1492. * o print out what type of hardware is detected
  1493. * o print out the ethernet address
  1494. * o find the IRQ
  1495. * o set up my private data
  1496. * o configure the dev structure with my subroutines
  1497. * o actually GRAB the irq.
  1498. * o GRAB the region
  1499. */
  1500. static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr,
  1501. unsigned long irq_flags)
  1502. {
  1503. struct smc_local *lp = netdev_priv(dev);
  1504. static int version_printed = 0;
  1505. int retval;
  1506. unsigned int val, revision_register;
  1507. const char *version_string;
  1508. DECLARE_MAC_BUF(mac);
  1509. DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
  1510. /* First, see if the high byte is 0x33 */
  1511. val = SMC_CURRENT_BANK();
  1512. DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
  1513. if ((val & 0xFF00) != 0x3300) {
  1514. if ((val & 0xFF) == 0x33) {
  1515. printk(KERN_WARNING
  1516. "%s: Detected possible byte-swapped interface"
  1517. " at IOADDR %p\n", CARDNAME, ioaddr);
  1518. }
  1519. retval = -ENODEV;
  1520. goto err_out;
  1521. }
  1522. /*
  1523. * The above MIGHT indicate a device, but I need to write to
  1524. * further test this.
  1525. */
  1526. SMC_SELECT_BANK(0);
  1527. val = SMC_CURRENT_BANK();
  1528. if ((val & 0xFF00) != 0x3300) {
  1529. retval = -ENODEV;
  1530. goto err_out;
  1531. }
  1532. /*
  1533. * well, we've already written once, so hopefully another
  1534. * time won't hurt. This time, I need to switch the bank
  1535. * register to bank 1, so I can access the base address
  1536. * register
  1537. */
  1538. SMC_SELECT_BANK(1);
  1539. val = SMC_GET_BASE();
  1540. val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
  1541. if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
  1542. printk("%s: IOADDR %p doesn't match configuration (%x).\n",
  1543. CARDNAME, ioaddr, val);
  1544. }
  1545. /*
  1546. * check if the revision register is something that I
  1547. * recognize. These might need to be added to later,
  1548. * as future revisions could be added.
  1549. */
  1550. SMC_SELECT_BANK(3);
  1551. revision_register = SMC_GET_REV();
  1552. DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
  1553. version_string = chip_ids[ (revision_register >> 4) & 0xF];
  1554. if (!version_string || (revision_register & 0xff00) != 0x3300) {
  1555. /* I don't recognize this chip, so... */
  1556. printk("%s: IO %p: Unrecognized revision register 0x%04x"
  1557. ", Contact author.\n", CARDNAME,
  1558. ioaddr, revision_register);
  1559. retval = -ENODEV;
  1560. goto err_out;
  1561. }
  1562. /* At this point I'll assume that the chip is an SMC91x. */
  1563. if (version_printed++ == 0)
  1564. printk("%s", version);
  1565. /* fill in some of the fields */
  1566. dev->base_addr = (unsigned long)ioaddr;
  1567. lp->base = ioaddr;
  1568. lp->version = revision_register & 0xff;
  1569. spin_lock_init(&lp->lock);
  1570. /* Get the MAC address */
  1571. SMC_SELECT_BANK(1);
  1572. SMC_GET_MAC_ADDR(dev->dev_addr);
  1573. /* now, reset the chip, and put it into a known state */
  1574. smc_reset(dev);
  1575. /*
  1576. * If dev->irq is 0, then the device has to be banged on to see
  1577. * what the IRQ is.
  1578. *
  1579. * This banging doesn't always detect the IRQ, for unknown reasons.
  1580. * a workaround is to reset the chip and try again.
  1581. *
  1582. * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
  1583. * be what is requested on the command line. I don't do that, mostly
  1584. * because the card that I have uses a non-standard method of accessing
  1585. * the IRQs, and because this _should_ work in most configurations.
  1586. *
  1587. * Specifying an IRQ is done with the assumption that the user knows
  1588. * what (s)he is doing. No checking is done!!!!
  1589. */
  1590. if (dev->irq < 1) {
  1591. int trials;
  1592. trials = 3;
  1593. while (trials--) {
  1594. dev->irq = smc_findirq(ioaddr);
  1595. if (dev->irq)
  1596. break;
  1597. /* kick the card and try again */
  1598. smc_reset(dev);
  1599. }
  1600. }
  1601. if (dev->irq == 0) {
  1602. printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
  1603. dev->name);
  1604. retval = -ENODEV;
  1605. goto err_out;
  1606. }
  1607. dev->irq = irq_canonicalize(dev->irq);
  1608. /* Fill in the fields of the device structure with ethernet values. */
  1609. ether_setup(dev);
  1610. dev->open = smc_open;
  1611. dev->stop = smc_close;
  1612. dev->hard_start_xmit = smc_hard_start_xmit;
  1613. dev->tx_timeout = smc_timeout;
  1614. dev->watchdog_timeo = msecs_to_jiffies(watchdog);
  1615. dev->set_multicast_list = smc_set_multicast_list;
  1616. dev->ethtool_ops = &smc_ethtool_ops;
  1617. #ifdef CONFIG_NET_POLL_CONTROLLER
  1618. dev->poll_controller = smc_poll_controller;
  1619. #endif
  1620. tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
  1621. INIT_WORK(&lp->phy_configure, smc_phy_configure);
  1622. lp->dev = dev;
  1623. lp->mii.phy_id_mask = 0x1f;
  1624. lp->mii.reg_num_mask = 0x1f;
  1625. lp->mii.force_media = 0;
  1626. lp->mii.full_duplex = 0;
  1627. lp->mii.dev = dev;
  1628. lp->mii.mdio_read = smc_phy_read;
  1629. lp->mii.mdio_write = smc_phy_write;
  1630. /*
  1631. * Locate the phy, if any.
  1632. */
  1633. if (lp->version >= (CHIP_91100 << 4))
  1634. smc_phy_detect(dev);
  1635. /* then shut everything down to save power */
  1636. smc_shutdown(dev);
  1637. smc_phy_powerdown(dev);
  1638. /* Set default parameters */
  1639. lp->msg_enable = NETIF_MSG_LINK;
  1640. lp->ctl_rfduplx = 0;
  1641. lp->ctl_rspeed = 10;
  1642. if (lp->version >= (CHIP_91100 << 4)) {
  1643. lp->ctl_rfduplx = 1;
  1644. lp->ctl_rspeed = 100;
  1645. }
  1646. /* Grab the IRQ */
  1647. retval = request_irq(dev->irq, &smc_interrupt, irq_flags, dev->name, dev);
  1648. if (retval)
  1649. goto err_out;
  1650. #ifdef SMC_USE_PXA_DMA
  1651. {
  1652. int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
  1653. smc_pxa_dma_irq, NULL);
  1654. if (dma >= 0)
  1655. dev->dma = dma;
  1656. }
  1657. #endif
  1658. retval = register_netdev(dev);
  1659. if (retval == 0) {
  1660. /* now, print out the card info, in a short format.. */
  1661. printk("%s: %s (rev %d) at %p IRQ %d",
  1662. dev->name, version_string, revision_register & 0x0f,
  1663. lp->base, dev->irq);
  1664. if (dev->dma != (unsigned char)-1)
  1665. printk(" DMA %d", dev->dma);
  1666. printk("%s%s\n", nowait ? " [nowait]" : "",
  1667. THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
  1668. if (!is_valid_ether_addr(dev->dev_addr)) {
  1669. printk("%s: Invalid ethernet MAC address. Please "
  1670. "set using ifconfig\n", dev->name);
  1671. } else {
  1672. /* Print the Ethernet address */
  1673. printk("%s: Ethernet addr: %s\n",
  1674. dev->name, print_mac(mac, dev->dev_addr));
  1675. }
  1676. if (lp->phy_type == 0) {
  1677. PRINTK("%s: No PHY found\n", dev->name);
  1678. } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
  1679. PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
  1680. } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
  1681. PRINTK("%s: PHY LAN83C180\n", dev->name);
  1682. }
  1683. }
  1684. err_out:
  1685. #ifdef SMC_USE_PXA_DMA
  1686. if (retval && dev->dma != (unsigned char)-1)
  1687. pxa_free_dma(dev->dma);
  1688. #endif
  1689. return retval;
  1690. }
  1691. static int smc_enable_device(struct platform_device *pdev)
  1692. {
  1693. unsigned long flags;
  1694. unsigned char ecor, ecsr;
  1695. void __iomem *addr;
  1696. struct resource * res;
  1697. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
  1698. if (!res)
  1699. return 0;
  1700. /*
  1701. * Map the attribute space. This is overkill, but clean.
  1702. */
  1703. addr = ioremap(res->start, ATTRIB_SIZE);
  1704. if (!addr)
  1705. return -ENOMEM;
  1706. /*
  1707. * Reset the device. We must disable IRQs around this
  1708. * since a reset causes the IRQ line become active.
  1709. */
  1710. local_irq_save(flags);
  1711. ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
  1712. writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
  1713. readb(addr + (ECOR << SMC_IO_SHIFT));
  1714. /*
  1715. * Wait 100us for the chip to reset.
  1716. */
  1717. udelay(100);
  1718. /*
  1719. * The device will ignore all writes to the enable bit while
  1720. * reset is asserted, even if the reset bit is cleared in the
  1721. * same write. Must clear reset first, then enable the device.
  1722. */
  1723. writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
  1724. writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
  1725. /*
  1726. * Set the appropriate byte/word mode.
  1727. */
  1728. ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
  1729. if (!SMC_CAN_USE_16BIT)
  1730. ecsr |= ECSR_IOIS8;
  1731. writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
  1732. local_irq_restore(flags);
  1733. iounmap(addr);
  1734. /*
  1735. * Wait for the chip to wake up. We could poll the control
  1736. * register in the main register space, but that isn't mapped
  1737. * yet. We know this is going to take 750us.
  1738. */
  1739. msleep(1);
  1740. return 0;
  1741. }
  1742. static int smc_request_attrib(struct platform_device *pdev)
  1743. {
  1744. struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
  1745. if (!res)
  1746. return 0;
  1747. if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
  1748. return -EBUSY;
  1749. return 0;
  1750. }
  1751. static void smc_release_attrib(struct platform_device *pdev)
  1752. {
  1753. struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
  1754. if (res)
  1755. release_mem_region(res->start, ATTRIB_SIZE);
  1756. }
  1757. static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
  1758. {
  1759. if (SMC_CAN_USE_DATACS) {
  1760. struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
  1761. struct smc_local *lp = netdev_priv(ndev);
  1762. if (!res)
  1763. return;
  1764. if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
  1765. printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
  1766. return;
  1767. }
  1768. lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
  1769. }
  1770. }
  1771. static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
  1772. {
  1773. if (SMC_CAN_USE_DATACS) {
  1774. struct smc_local *lp = netdev_priv(ndev);
  1775. struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
  1776. if (lp->datacs)
  1777. iounmap(lp->datacs);
  1778. lp->datacs = NULL;
  1779. if (res)
  1780. release_mem_region(res->start, SMC_DATA_EXTENT);
  1781. }
  1782. }
  1783. /*
  1784. * smc_init(void)
  1785. * Input parameters:
  1786. * dev->base_addr == 0, try to find all possible locations
  1787. * dev->base_addr > 0x1ff, this is the address to check
  1788. * dev->base_addr == <anything else>, return failure code
  1789. *
  1790. * Output:
  1791. * 0 --> there is a device
  1792. * anything else, error
  1793. */
  1794. static int smc_drv_probe(struct platform_device *pdev)
  1795. {
  1796. struct net_device *ndev;
  1797. struct resource *res, *ires;
  1798. unsigned int __iomem *addr;
  1799. unsigned long irq_flags = SMC_IRQ_FLAGS;
  1800. int ret;
  1801. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
  1802. if (!res)
  1803. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1804. if (!res) {
  1805. ret = -ENODEV;
  1806. goto out;
  1807. }
  1808. if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
  1809. ret = -EBUSY;
  1810. goto out;
  1811. }
  1812. ndev = alloc_etherdev(sizeof(struct smc_local));
  1813. if (!ndev) {
  1814. printk("%s: could not allocate device.\n", CARDNAME);
  1815. ret = -ENOMEM;
  1816. goto out_release_io;
  1817. }
  1818. SET_NETDEV_DEV(ndev, &pdev->dev);
  1819. ndev->dma = (unsigned char)-1;
  1820. ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1821. if (!ires) {
  1822. ret = -ENODEV;
  1823. goto out_free_netdev;
  1824. }
  1825. ndev->irq = ires->start;
  1826. if (SMC_IRQ_FLAGS == -1)
  1827. irq_flags = ires->flags & IRQF_TRIGGER_MASK;
  1828. ret = smc_request_attrib(pdev);
  1829. if (ret)
  1830. goto out_free_netdev;
  1831. #if defined(CONFIG_SA1100_ASSABET)
  1832. NCR_0 |= NCR_ENET_OSC_EN;
  1833. #endif
  1834. ret = smc_enable_device(pdev);
  1835. if (ret)
  1836. goto out_release_attrib;
  1837. addr = ioremap(res->start, SMC_IO_EXTENT);
  1838. if (!addr) {
  1839. ret = -ENOMEM;
  1840. goto out_release_attrib;
  1841. }
  1842. #ifdef SMC_USE_PXA_DMA
  1843. {
  1844. struct smc_local *lp = netdev_priv(ndev);
  1845. lp->device = &pdev->dev;
  1846. lp->physaddr = res->start;
  1847. }
  1848. #endif
  1849. platform_set_drvdata(pdev, ndev);
  1850. ret = smc_probe(ndev, addr, irq_flags);
  1851. if (ret != 0)
  1852. goto out_iounmap;
  1853. smc_request_datacs(pdev, ndev);
  1854. return 0;
  1855. out_iounmap:
  1856. platform_set_drvdata(pdev, NULL);
  1857. iounmap(addr);
  1858. out_release_attrib:
  1859. smc_release_attrib(pdev);
  1860. out_free_netdev:
  1861. free_netdev(ndev);
  1862. out_release_io:
  1863. release_mem_region(res->start, SMC_IO_EXTENT);
  1864. out:
  1865. printk("%s: not found (%d).\n", CARDNAME, ret);
  1866. return ret;
  1867. }
  1868. static int smc_drv_remove(struct platform_device *pdev)
  1869. {
  1870. struct net_device *ndev = platform_get_drvdata(pdev);
  1871. struct smc_local *lp = netdev_priv(ndev);
  1872. struct resource *res;
  1873. platform_set_drvdata(pdev, NULL);
  1874. unregister_netdev(ndev);
  1875. free_irq(ndev->irq, ndev);
  1876. #ifdef SMC_USE_PXA_DMA
  1877. if (ndev->dma != (unsigned char)-1)
  1878. pxa_free_dma(ndev->dma);
  1879. #endif
  1880. iounmap(lp->base);
  1881. smc_release_datacs(pdev,ndev);
  1882. smc_release_attrib(pdev);
  1883. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
  1884. if (!res)
  1885. platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1886. release_mem_region(res->start, SMC_IO_EXTENT);
  1887. free_netdev(ndev);
  1888. return 0;
  1889. }
  1890. static int smc_drv_suspend(struct platform_device *dev, pm_message_t state)
  1891. {
  1892. struct net_device *ndev = platform_get_drvdata(dev);
  1893. if (ndev) {
  1894. if (netif_running(ndev)) {
  1895. netif_device_detach(ndev);
  1896. smc_shutdown(ndev);
  1897. smc_phy_powerdown(ndev);
  1898. }
  1899. }
  1900. return 0;
  1901. }
  1902. static int smc_drv_resume(struct platform_device *dev)
  1903. {
  1904. struct net_device *ndev = platform_get_drvdata(dev);
  1905. if (ndev) {
  1906. struct smc_local *lp = netdev_priv(ndev);
  1907. smc_enable_device(dev);
  1908. if (netif_running(ndev)) {
  1909. smc_reset(ndev);
  1910. smc_enable(ndev);
  1911. if (lp->phy_type != 0)
  1912. smc_phy_configure(&lp->phy_configure);
  1913. netif_device_attach(ndev);
  1914. }
  1915. }
  1916. return 0;
  1917. }
  1918. static struct platform_driver smc_driver = {
  1919. .probe = smc_drv_probe,
  1920. .remove = smc_drv_remove,
  1921. .suspend = smc_drv_suspend,
  1922. .resume = smc_drv_resume,
  1923. .driver = {
  1924. .name = CARDNAME,
  1925. },
  1926. };
  1927. static int __init smc_init(void)
  1928. {
  1929. #ifdef MODULE
  1930. #ifdef CONFIG_ISA
  1931. if (io == -1)
  1932. printk(KERN_WARNING
  1933. "%s: You shouldn't use auto-probing with insmod!\n",
  1934. CARDNAME);
  1935. #endif
  1936. #endif
  1937. return platform_driver_register(&smc_driver);
  1938. }
  1939. static void __exit smc_cleanup(void)
  1940. {
  1941. platform_driver_unregister(&smc_driver);
  1942. }
  1943. module_init(smc_init);
  1944. module_exit(smc_cleanup);