i387.c 11 KB

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  1. /*
  2. * Copyright (C) 1994 Linus Torvalds
  3. *
  4. * Pentium III FXSR, SSE support
  5. * General FPU state handling cleanups
  6. * Gareth Hughes <gareth@valinux.com>, May 2000
  7. */
  8. #include <linux/sched.h>
  9. #include <linux/module.h>
  10. #include <linux/regset.h>
  11. #include <asm/processor.h>
  12. #include <asm/i387.h>
  13. #include <asm/math_emu.h>
  14. #include <asm/sigcontext.h>
  15. #include <asm/user.h>
  16. #include <asm/ptrace.h>
  17. #include <asm/uaccess.h>
  18. #ifdef CONFIG_X86_64
  19. #include <asm/sigcontext32.h>
  20. #include <asm/user32.h>
  21. #else
  22. #define save_i387_ia32 save_i387
  23. #define restore_i387_ia32 restore_i387
  24. #define _fpstate_ia32 _fpstate
  25. #define user_i387_ia32_struct user_i387_struct
  26. #define user32_fxsr_struct user_fxsr_struct
  27. #endif
  28. #ifdef CONFIG_MATH_EMULATION
  29. #define HAVE_HWFP (boot_cpu_data.hard_math)
  30. #else
  31. #define HAVE_HWFP 1
  32. #endif
  33. static unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
  34. void mxcsr_feature_mask_init(void)
  35. {
  36. unsigned long mask = 0;
  37. clts();
  38. if (cpu_has_fxsr) {
  39. memset(&current->thread.i387.fxsave, 0,
  40. sizeof(struct i387_fxsave_struct));
  41. asm volatile("fxsave %0" : : "m" (current->thread.i387.fxsave));
  42. mask = current->thread.i387.fxsave.mxcsr_mask;
  43. if (mask == 0)
  44. mask = 0x0000ffbf;
  45. }
  46. mxcsr_feature_mask &= mask;
  47. stts();
  48. }
  49. #ifdef CONFIG_X86_64
  50. /*
  51. * Called at bootup to set up the initial FPU state that is later cloned
  52. * into all processes.
  53. */
  54. void __cpuinit fpu_init(void)
  55. {
  56. unsigned long oldcr0 = read_cr0();
  57. extern void __bad_fxsave_alignment(void);
  58. if (offsetof(struct task_struct, thread.i387.fxsave) & 15)
  59. __bad_fxsave_alignment();
  60. set_in_cr4(X86_CR4_OSFXSR);
  61. set_in_cr4(X86_CR4_OSXMMEXCPT);
  62. write_cr0(oldcr0 & ~((1UL<<3)|(1UL<<2))); /* clear TS and EM */
  63. mxcsr_feature_mask_init();
  64. /* clean state in init */
  65. current_thread_info()->status = 0;
  66. clear_used_math();
  67. }
  68. #endif /* CONFIG_X86_64 */
  69. /*
  70. * The _current_ task is using the FPU for the first time
  71. * so initialize it and set the mxcsr to its default
  72. * value at reset if we support XMM instructions and then
  73. * remeber the current task has used the FPU.
  74. */
  75. void init_fpu(struct task_struct *tsk)
  76. {
  77. if (tsk_used_math(tsk)) {
  78. if (tsk == current)
  79. unlazy_fpu(tsk);
  80. return;
  81. }
  82. if (cpu_has_fxsr) {
  83. memset(&tsk->thread.i387.fxsave, 0,
  84. sizeof(struct i387_fxsave_struct));
  85. tsk->thread.i387.fxsave.cwd = 0x37f;
  86. if (cpu_has_xmm)
  87. tsk->thread.i387.fxsave.mxcsr = MXCSR_DEFAULT;
  88. } else {
  89. memset(&tsk->thread.i387.fsave, 0,
  90. sizeof(struct i387_fsave_struct));
  91. tsk->thread.i387.fsave.cwd = 0xffff037fu;
  92. tsk->thread.i387.fsave.swd = 0xffff0000u;
  93. tsk->thread.i387.fsave.twd = 0xffffffffu;
  94. tsk->thread.i387.fsave.fos = 0xffff0000u;
  95. }
  96. /*
  97. * Only the device not available exception or ptrace can call init_fpu.
  98. */
  99. set_stopped_child_used_math(tsk);
  100. }
  101. int fpregs_active(struct task_struct *target, const struct user_regset *regset)
  102. {
  103. return tsk_used_math(target) ? regset->n : 0;
  104. }
  105. int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
  106. {
  107. return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
  108. }
  109. int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
  110. unsigned int pos, unsigned int count,
  111. void *kbuf, void __user *ubuf)
  112. {
  113. if (!cpu_has_fxsr)
  114. return -ENODEV;
  115. unlazy_fpu(target);
  116. return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  117. &target->thread.i387.fxsave, 0, -1);
  118. }
  119. int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
  120. unsigned int pos, unsigned int count,
  121. const void *kbuf, const void __user *ubuf)
  122. {
  123. int ret;
  124. if (!cpu_has_fxsr)
  125. return -ENODEV;
  126. unlazy_fpu(target);
  127. set_stopped_child_used_math(target);
  128. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  129. &target->thread.i387.fxsave, 0, -1);
  130. /*
  131. * mxcsr reserved bits must be masked to zero for security reasons.
  132. */
  133. target->thread.i387.fxsave.mxcsr &= mxcsr_feature_mask;
  134. return ret;
  135. }
  136. #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
  137. /*
  138. * FPU tag word conversions.
  139. */
  140. static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
  141. {
  142. unsigned int tmp; /* to avoid 16 bit prefixes in the code */
  143. /* Transform each pair of bits into 01 (valid) or 00 (empty) */
  144. tmp = ~twd;
  145. tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
  146. /* and move the valid bits to the lower byte. */
  147. tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
  148. tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
  149. tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
  150. return tmp;
  151. }
  152. #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16);
  153. #define FP_EXP_TAG_VALID 0
  154. #define FP_EXP_TAG_ZERO 1
  155. #define FP_EXP_TAG_SPECIAL 2
  156. #define FP_EXP_TAG_EMPTY 3
  157. static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
  158. {
  159. struct _fpxreg *st;
  160. u32 tos = (fxsave->swd >> 11) & 7;
  161. u32 twd = (unsigned long) fxsave->twd;
  162. u32 tag;
  163. u32 ret = 0xffff0000u;
  164. int i;
  165. for (i = 0; i < 8; i++, twd >>= 1) {
  166. if (twd & 0x1) {
  167. st = FPREG_ADDR(fxsave, (i - tos) & 7);
  168. switch (st->exponent & 0x7fff) {
  169. case 0x7fff:
  170. tag = FP_EXP_TAG_SPECIAL;
  171. break;
  172. case 0x0000:
  173. if (!st->significand[0] &&
  174. !st->significand[1] &&
  175. !st->significand[2] &&
  176. !st->significand[3])
  177. tag = FP_EXP_TAG_ZERO;
  178. else
  179. tag = FP_EXP_TAG_SPECIAL;
  180. break;
  181. default:
  182. if (st->significand[3] & 0x8000)
  183. tag = FP_EXP_TAG_VALID;
  184. else
  185. tag = FP_EXP_TAG_SPECIAL;
  186. break;
  187. }
  188. } else {
  189. tag = FP_EXP_TAG_EMPTY;
  190. }
  191. ret |= tag << (2 * i);
  192. }
  193. return ret;
  194. }
  195. /*
  196. * FXSR floating point environment conversions.
  197. */
  198. static void convert_from_fxsr(struct user_i387_ia32_struct *env,
  199. struct task_struct *tsk)
  200. {
  201. struct i387_fxsave_struct *fxsave = &tsk->thread.i387.fxsave;
  202. struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
  203. struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
  204. int i;
  205. env->cwd = fxsave->cwd | 0xffff0000u;
  206. env->swd = fxsave->swd | 0xffff0000u;
  207. env->twd = twd_fxsr_to_i387(fxsave);
  208. #ifdef CONFIG_X86_64
  209. env->fip = fxsave->rip;
  210. env->foo = fxsave->rdp;
  211. if (tsk == current) {
  212. /*
  213. * should be actually ds/cs at fpu exception time, but
  214. * that information is not available in 64bit mode.
  215. */
  216. asm("mov %%ds,%0" : "=r" (env->fos));
  217. asm("mov %%cs,%0" : "=r" (env->fcs));
  218. } else {
  219. struct pt_regs *regs = task_pt_regs(tsk);
  220. env->fos = 0xffff0000 | tsk->thread.ds;
  221. env->fcs = regs->cs;
  222. }
  223. #else
  224. env->fip = fxsave->fip;
  225. env->fcs = fxsave->fcs;
  226. env->foo = fxsave->foo;
  227. env->fos = fxsave->fos;
  228. #endif
  229. for (i = 0; i < 8; ++i)
  230. memcpy(&to[i], &from[i], sizeof(to[0]));
  231. }
  232. static void convert_to_fxsr(struct task_struct *tsk,
  233. const struct user_i387_ia32_struct *env)
  234. {
  235. struct i387_fxsave_struct *fxsave = &tsk->thread.i387.fxsave;
  236. struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
  237. struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
  238. int i;
  239. fxsave->cwd = env->cwd;
  240. fxsave->swd = env->swd;
  241. fxsave->twd = twd_i387_to_fxsr(env->twd);
  242. fxsave->fop = (u16) ((u32) env->fcs >> 16);
  243. #ifdef CONFIG_X86_64
  244. fxsave->rip = env->fip;
  245. fxsave->rdp = env->foo;
  246. /* cs and ds ignored */
  247. #else
  248. fxsave->fip = env->fip;
  249. fxsave->fcs = (env->fcs & 0xffff);
  250. fxsave->foo = env->foo;
  251. fxsave->fos = env->fos;
  252. #endif
  253. for (i = 0; i < 8; ++i)
  254. memcpy(&to[i], &from[i], sizeof(from[0]));
  255. }
  256. int fpregs_get(struct task_struct *target, const struct user_regset *regset,
  257. unsigned int pos, unsigned int count,
  258. void *kbuf, void __user *ubuf)
  259. {
  260. struct user_i387_ia32_struct env;
  261. if (!HAVE_HWFP)
  262. return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
  263. unlazy_fpu(target);
  264. if (!cpu_has_fxsr)
  265. return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  266. &target->thread.i387.fsave, 0, -1);
  267. if (kbuf && pos == 0 && count == sizeof(env)) {
  268. convert_from_fxsr(kbuf, target);
  269. return 0;
  270. }
  271. convert_from_fxsr(&env, target);
  272. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
  273. }
  274. int fpregs_set(struct task_struct *target, const struct user_regset *regset,
  275. unsigned int pos, unsigned int count,
  276. const void *kbuf, const void __user *ubuf)
  277. {
  278. struct user_i387_ia32_struct env;
  279. int ret;
  280. if (!HAVE_HWFP)
  281. return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
  282. unlazy_fpu(target);
  283. set_stopped_child_used_math(target);
  284. if (!cpu_has_fxsr)
  285. return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  286. &target->thread.i387.fsave, 0, -1);
  287. if (pos > 0 || count < sizeof(env))
  288. convert_from_fxsr(&env, target);
  289. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
  290. if (!ret)
  291. convert_to_fxsr(target, &env);
  292. return ret;
  293. }
  294. /*
  295. * Signal frame handlers.
  296. */
  297. static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
  298. {
  299. struct task_struct *tsk = current;
  300. unlazy_fpu(tsk);
  301. tsk->thread.i387.fsave.status = tsk->thread.i387.fsave.swd;
  302. if (__copy_to_user(buf, &tsk->thread.i387.fsave,
  303. sizeof(struct i387_fsave_struct)))
  304. return -1;
  305. return 1;
  306. }
  307. static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
  308. {
  309. struct task_struct *tsk = current;
  310. struct user_i387_ia32_struct env;
  311. int err = 0;
  312. unlazy_fpu(tsk);
  313. convert_from_fxsr(&env, tsk);
  314. if (__copy_to_user(buf, &env, sizeof(env)))
  315. return -1;
  316. err |= __put_user(tsk->thread.i387.fxsave.swd, &buf->status);
  317. err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
  318. if (err)
  319. return -1;
  320. if (__copy_to_user(&buf->_fxsr_env[0], &tsk->thread.i387.fxsave,
  321. sizeof(struct i387_fxsave_struct)))
  322. return -1;
  323. return 1;
  324. }
  325. int save_i387_ia32(struct _fpstate_ia32 __user *buf)
  326. {
  327. if (!used_math())
  328. return 0;
  329. /* This will cause a "finit" to be triggered by the next
  330. * attempted FPU operation by the 'current' process.
  331. */
  332. clear_used_math();
  333. if (HAVE_HWFP) {
  334. if (cpu_has_fxsr) {
  335. return save_i387_fxsave(buf);
  336. } else {
  337. return save_i387_fsave(buf);
  338. }
  339. } else {
  340. return fpregs_soft_get(current, NULL,
  341. 0, sizeof(struct user_i387_ia32_struct),
  342. NULL, buf) ? -1 : 1;
  343. }
  344. }
  345. static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
  346. {
  347. struct task_struct *tsk = current;
  348. clear_fpu(tsk);
  349. return __copy_from_user(&tsk->thread.i387.fsave, buf,
  350. sizeof(struct i387_fsave_struct));
  351. }
  352. static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf)
  353. {
  354. int err;
  355. struct task_struct *tsk = current;
  356. struct user_i387_ia32_struct env;
  357. clear_fpu(tsk);
  358. err = __copy_from_user(&tsk->thread.i387.fxsave, &buf->_fxsr_env[0],
  359. sizeof(struct i387_fxsave_struct));
  360. /* mxcsr reserved bits must be masked to zero for security reasons */
  361. tsk->thread.i387.fxsave.mxcsr &= mxcsr_feature_mask;
  362. if (err || __copy_from_user(&env, buf, sizeof(env)))
  363. return 1;
  364. convert_to_fxsr(tsk, &env);
  365. return 0;
  366. }
  367. int restore_i387_ia32(struct _fpstate_ia32 __user *buf)
  368. {
  369. int err;
  370. if (HAVE_HWFP) {
  371. if (cpu_has_fxsr) {
  372. err = restore_i387_fxsave(buf);
  373. } else {
  374. err = restore_i387_fsave(buf);
  375. }
  376. } else {
  377. err = fpregs_soft_set(current, NULL,
  378. 0, sizeof(struct user_i387_ia32_struct),
  379. NULL, buf) != 0;
  380. }
  381. set_used_math();
  382. return err;
  383. }
  384. /*
  385. * FPU state for core dumps.
  386. * This is only used for a.out dumps now.
  387. * It is declared generically using elf_fpregset_t (which is
  388. * struct user_i387_struct) but is in fact only used for 32-bit
  389. * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
  390. */
  391. int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
  392. {
  393. int fpvalid;
  394. struct task_struct *tsk = current;
  395. fpvalid = !!used_math();
  396. if (fpvalid)
  397. fpvalid = !fpregs_get(tsk, NULL,
  398. 0, sizeof(struct user_i387_ia32_struct),
  399. fpu, NULL);
  400. return fpvalid;
  401. }
  402. EXPORT_SYMBOL(dump_fpu);
  403. #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */