e_powersaver.c 8.6 KB

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  1. /*
  2. * Based on documentation provided by Dave Jones. Thanks!
  3. *
  4. * Licensed under the terms of the GNU GPL License version 2.
  5. *
  6. * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/init.h>
  11. #include <linux/cpufreq.h>
  12. #include <linux/ioport.h>
  13. #include <linux/slab.h>
  14. #include <asm/msr.h>
  15. #include <asm/tsc.h>
  16. #include <asm/timex.h>
  17. #include <asm/io.h>
  18. #include <asm/delay.h>
  19. #define EPS_BRAND_C7M 0
  20. #define EPS_BRAND_C7 1
  21. #define EPS_BRAND_EDEN 2
  22. #define EPS_BRAND_C3 3
  23. #define EPS_BRAND_C7D 4
  24. struct eps_cpu_data {
  25. u32 fsb;
  26. struct cpufreq_frequency_table freq_table[];
  27. };
  28. static struct eps_cpu_data *eps_cpu[NR_CPUS];
  29. static unsigned int eps_get(unsigned int cpu)
  30. {
  31. struct eps_cpu_data *centaur;
  32. u32 lo, hi;
  33. if (cpu)
  34. return 0;
  35. centaur = eps_cpu[cpu];
  36. if (centaur == NULL)
  37. return 0;
  38. /* Return current frequency */
  39. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  40. return centaur->fsb * ((lo >> 8) & 0xff);
  41. }
  42. static int eps_set_state(struct eps_cpu_data *centaur,
  43. unsigned int cpu,
  44. u32 dest_state)
  45. {
  46. struct cpufreq_freqs freqs;
  47. u32 lo, hi;
  48. u8 current_multiplier, current_voltage;
  49. int err = 0;
  50. int i;
  51. freqs.old = eps_get(cpu);
  52. freqs.new = centaur->fsb * ((dest_state >> 8) & 0xff);
  53. freqs.cpu = cpu;
  54. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  55. /* Wait while CPU is busy */
  56. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  57. i = 0;
  58. while (lo & ((1 << 16) | (1 << 17))) {
  59. udelay(16);
  60. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  61. i++;
  62. if (unlikely(i > 64)) {
  63. err = -ENODEV;
  64. goto postchange;
  65. }
  66. }
  67. /* Set new multiplier and voltage */
  68. wrmsr(MSR_IA32_PERF_CTL, dest_state & 0xffff, 0);
  69. /* Wait until transition end */
  70. i = 0;
  71. do {
  72. udelay(16);
  73. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  74. i++;
  75. if (unlikely(i > 64)) {
  76. err = -ENODEV;
  77. goto postchange;
  78. }
  79. } while (lo & ((1 << 16) | (1 << 17)));
  80. /* Return current frequency */
  81. postchange:
  82. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  83. freqs.new = centaur->fsb * ((lo >> 8) & 0xff);
  84. /* Print voltage and multiplier */
  85. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  86. current_voltage = lo & 0xff;
  87. printk(KERN_INFO "eps: Current voltage = %dmV\n",
  88. current_voltage * 16 + 700);
  89. current_multiplier = (lo >> 8) & 0xff;
  90. printk(KERN_INFO "eps: Current multiplier = %d\n",
  91. current_multiplier);
  92. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  93. return err;
  94. }
  95. static int eps_target(struct cpufreq_policy *policy,
  96. unsigned int target_freq,
  97. unsigned int relation)
  98. {
  99. struct eps_cpu_data *centaur;
  100. unsigned int newstate = 0;
  101. unsigned int cpu = policy->cpu;
  102. unsigned int dest_state;
  103. int ret;
  104. if (unlikely(eps_cpu[cpu] == NULL))
  105. return -ENODEV;
  106. centaur = eps_cpu[cpu];
  107. if (unlikely(cpufreq_frequency_table_target(policy,
  108. &eps_cpu[cpu]->freq_table[0],
  109. target_freq,
  110. relation,
  111. &newstate))) {
  112. return -EINVAL;
  113. }
  114. /* Make frequency transition */
  115. dest_state = centaur->freq_table[newstate].index & 0xffff;
  116. ret = eps_set_state(centaur, cpu, dest_state);
  117. if (ret)
  118. printk(KERN_ERR "eps: Timeout!\n");
  119. return ret;
  120. }
  121. static int eps_verify(struct cpufreq_policy *policy)
  122. {
  123. return cpufreq_frequency_table_verify(policy,
  124. &eps_cpu[policy->cpu]->freq_table[0]);
  125. }
  126. static int eps_cpu_init(struct cpufreq_policy *policy)
  127. {
  128. unsigned int i;
  129. u32 lo, hi;
  130. u64 val;
  131. u8 current_multiplier, current_voltage;
  132. u8 max_multiplier, max_voltage;
  133. u8 min_multiplier, min_voltage;
  134. u8 brand = 0;
  135. u32 fsb;
  136. struct eps_cpu_data *centaur;
  137. struct cpuinfo_x86 *c = &cpu_data(0);
  138. struct cpufreq_frequency_table *f_table;
  139. int k, step, voltage;
  140. int ret;
  141. int states;
  142. if (policy->cpu != 0)
  143. return -ENODEV;
  144. /* Check brand */
  145. printk(KERN_INFO "eps: Detected VIA ");
  146. switch (c->x86_model) {
  147. case 10:
  148. rdmsr(0x1153, lo, hi);
  149. brand = (((lo >> 2) ^ lo) >> 18) & 3;
  150. printk(KERN_CONT "Model A ");
  151. break;
  152. case 13:
  153. rdmsr(0x1154, lo, hi);
  154. brand = (((lo >> 4) ^ (lo >> 2))) & 0x000000ff;
  155. printk(KERN_CONT "Model D ");
  156. break;
  157. }
  158. switch(brand) {
  159. case EPS_BRAND_C7M:
  160. printk(KERN_CONT "C7-M\n");
  161. break;
  162. case EPS_BRAND_C7:
  163. printk(KERN_CONT "C7\n");
  164. break;
  165. case EPS_BRAND_EDEN:
  166. printk(KERN_CONT "Eden\n");
  167. break;
  168. case EPS_BRAND_C7D:
  169. printk(KERN_CONT "C7-D\n");
  170. break;
  171. case EPS_BRAND_C3:
  172. printk(KERN_CONT "C3\n");
  173. return -ENODEV;
  174. break;
  175. }
  176. /* Enable Enhanced PowerSaver */
  177. rdmsrl(MSR_IA32_MISC_ENABLE, val);
  178. if (!(val & 1 << 16)) {
  179. val |= 1 << 16;
  180. wrmsrl(MSR_IA32_MISC_ENABLE, val);
  181. /* Can be locked at 0 */
  182. rdmsrl(MSR_IA32_MISC_ENABLE, val);
  183. if (!(val & 1 << 16)) {
  184. printk(KERN_INFO "eps: Can't enable Enhanced PowerSaver\n");
  185. return -ENODEV;
  186. }
  187. }
  188. /* Print voltage and multiplier */
  189. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  190. current_voltage = lo & 0xff;
  191. printk(KERN_INFO "eps: Current voltage = %dmV\n", current_voltage * 16 + 700);
  192. current_multiplier = (lo >> 8) & 0xff;
  193. printk(KERN_INFO "eps: Current multiplier = %d\n", current_multiplier);
  194. /* Print limits */
  195. max_voltage = hi & 0xff;
  196. printk(KERN_INFO "eps: Highest voltage = %dmV\n", max_voltage * 16 + 700);
  197. max_multiplier = (hi >> 8) & 0xff;
  198. printk(KERN_INFO "eps: Highest multiplier = %d\n", max_multiplier);
  199. min_voltage = (hi >> 16) & 0xff;
  200. printk(KERN_INFO "eps: Lowest voltage = %dmV\n", min_voltage * 16 + 700);
  201. min_multiplier = (hi >> 24) & 0xff;
  202. printk(KERN_INFO "eps: Lowest multiplier = %d\n", min_multiplier);
  203. /* Sanity checks */
  204. if (current_multiplier == 0 || max_multiplier == 0
  205. || min_multiplier == 0)
  206. return -EINVAL;
  207. if (current_multiplier > max_multiplier
  208. || max_multiplier <= min_multiplier)
  209. return -EINVAL;
  210. if (current_voltage > 0x1f || max_voltage > 0x1f)
  211. return -EINVAL;
  212. if (max_voltage < min_voltage)
  213. return -EINVAL;
  214. /* Calc FSB speed */
  215. fsb = cpu_khz / current_multiplier;
  216. /* Calc number of p-states supported */
  217. if (brand == EPS_BRAND_C7M)
  218. states = max_multiplier - min_multiplier + 1;
  219. else
  220. states = 2;
  221. /* Allocate private data and frequency table for current cpu */
  222. centaur = kzalloc(sizeof(struct eps_cpu_data)
  223. + (states + 1) * sizeof(struct cpufreq_frequency_table),
  224. GFP_KERNEL);
  225. if (!centaur)
  226. return -ENOMEM;
  227. eps_cpu[0] = centaur;
  228. /* Copy basic values */
  229. centaur->fsb = fsb;
  230. /* Fill frequency and MSR value table */
  231. f_table = &centaur->freq_table[0];
  232. if (brand != EPS_BRAND_C7M) {
  233. f_table[0].frequency = fsb * min_multiplier;
  234. f_table[0].index = (min_multiplier << 8) | min_voltage;
  235. f_table[1].frequency = fsb * max_multiplier;
  236. f_table[1].index = (max_multiplier << 8) | max_voltage;
  237. f_table[2].frequency = CPUFREQ_TABLE_END;
  238. } else {
  239. k = 0;
  240. step = ((max_voltage - min_voltage) * 256)
  241. / (max_multiplier - min_multiplier);
  242. for (i = min_multiplier; i <= max_multiplier; i++) {
  243. voltage = (k * step) / 256 + min_voltage;
  244. f_table[k].frequency = fsb * i;
  245. f_table[k].index = (i << 8) | voltage;
  246. k++;
  247. }
  248. f_table[k].frequency = CPUFREQ_TABLE_END;
  249. }
  250. policy->cpuinfo.transition_latency = 140000; /* 844mV -> 700mV in ns */
  251. policy->cur = fsb * current_multiplier;
  252. ret = cpufreq_frequency_table_cpuinfo(policy, &centaur->freq_table[0]);
  253. if (ret) {
  254. kfree(centaur);
  255. return ret;
  256. }
  257. cpufreq_frequency_table_get_attr(&centaur->freq_table[0], policy->cpu);
  258. return 0;
  259. }
  260. static int eps_cpu_exit(struct cpufreq_policy *policy)
  261. {
  262. unsigned int cpu = policy->cpu;
  263. struct eps_cpu_data *centaur;
  264. u32 lo, hi;
  265. if (eps_cpu[cpu] == NULL)
  266. return -ENODEV;
  267. centaur = eps_cpu[cpu];
  268. /* Get max frequency */
  269. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  270. /* Set max frequency */
  271. eps_set_state(centaur, cpu, hi & 0xffff);
  272. /* Bye */
  273. cpufreq_frequency_table_put_attr(policy->cpu);
  274. kfree(eps_cpu[cpu]);
  275. eps_cpu[cpu] = NULL;
  276. return 0;
  277. }
  278. static struct freq_attr* eps_attr[] = {
  279. &cpufreq_freq_attr_scaling_available_freqs,
  280. NULL,
  281. };
  282. static struct cpufreq_driver eps_driver = {
  283. .verify = eps_verify,
  284. .target = eps_target,
  285. .init = eps_cpu_init,
  286. .exit = eps_cpu_exit,
  287. .get = eps_get,
  288. .name = "e_powersaver",
  289. .owner = THIS_MODULE,
  290. .attr = eps_attr,
  291. };
  292. static int __init eps_init(void)
  293. {
  294. struct cpuinfo_x86 *c = &cpu_data(0);
  295. /* This driver will work only on Centaur C7 processors with
  296. * Enhanced SpeedStep/PowerSaver registers */
  297. if (c->x86_vendor != X86_VENDOR_CENTAUR
  298. || c->x86 != 6 || c->x86_model < 10)
  299. return -ENODEV;
  300. if (!cpu_has(c, X86_FEATURE_EST))
  301. return -ENODEV;
  302. if (cpufreq_register_driver(&eps_driver))
  303. return -EINVAL;
  304. return 0;
  305. }
  306. static void __exit eps_exit(void)
  307. {
  308. cpufreq_unregister_driver(&eps_driver);
  309. }
  310. MODULE_AUTHOR("Rafa³ Bilski <rafalbilski@interia.pl>");
  311. MODULE_DESCRIPTION("Enhanced PowerSaver driver for VIA C7 CPU's.");
  312. MODULE_LICENSE("GPL");
  313. module_init(eps_init);
  314. module_exit(eps_exit);