consistent.c 4.6 KB

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  1. /*
  2. * arch/sh/mm/consistent.c
  3. *
  4. * Copyright (C) 2004 - 2007 Paul Mundt
  5. *
  6. * Declared coherent memory functions based on arch/x86/kernel/pci-dma_32.c
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/mm.h>
  13. #include <linux/dma-mapping.h>
  14. #include <asm/cacheflush.h>
  15. #include <asm/addrspace.h>
  16. #include <asm/io.h>
  17. struct dma_coherent_mem {
  18. void *virt_base;
  19. u32 device_base;
  20. int size;
  21. int flags;
  22. unsigned long *bitmap;
  23. };
  24. void *dma_alloc_coherent(struct device *dev, size_t size,
  25. dma_addr_t *dma_handle, gfp_t gfp)
  26. {
  27. void *ret, *ret_nocache;
  28. struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
  29. int order = get_order(size);
  30. if (mem) {
  31. int page = bitmap_find_free_region(mem->bitmap, mem->size,
  32. order);
  33. if (page >= 0) {
  34. *dma_handle = mem->device_base + (page << PAGE_SHIFT);
  35. ret = mem->virt_base + (page << PAGE_SHIFT);
  36. memset(ret, 0, size);
  37. return ret;
  38. }
  39. if (mem->flags & DMA_MEMORY_EXCLUSIVE)
  40. return NULL;
  41. }
  42. ret = (void *)__get_free_pages(gfp, order);
  43. if (!ret)
  44. return NULL;
  45. memset(ret, 0, size);
  46. /*
  47. * Pages from the page allocator may have data present in
  48. * cache. So flush the cache before using uncached memory.
  49. */
  50. dma_cache_sync(dev, ret, size, DMA_BIDIRECTIONAL);
  51. ret_nocache = ioremap_nocache(virt_to_phys(ret), size);
  52. if (!ret_nocache) {
  53. free_pages((unsigned long)ret, order);
  54. return NULL;
  55. }
  56. *dma_handle = virt_to_phys(ret);
  57. return ret_nocache;
  58. }
  59. EXPORT_SYMBOL(dma_alloc_coherent);
  60. void dma_free_coherent(struct device *dev, size_t size,
  61. void *vaddr, dma_addr_t dma_handle)
  62. {
  63. struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
  64. int order = get_order(size);
  65. if (mem && vaddr >= mem->virt_base && vaddr < (mem->virt_base + (mem->size << PAGE_SHIFT))) {
  66. int page = (vaddr - mem->virt_base) >> PAGE_SHIFT;
  67. bitmap_release_region(mem->bitmap, page, order);
  68. } else {
  69. WARN_ON(irqs_disabled()); /* for portability */
  70. BUG_ON(mem && mem->flags & DMA_MEMORY_EXCLUSIVE);
  71. free_pages((unsigned long)phys_to_virt(dma_handle), order);
  72. iounmap(vaddr);
  73. }
  74. }
  75. EXPORT_SYMBOL(dma_free_coherent);
  76. int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
  77. dma_addr_t device_addr, size_t size, int flags)
  78. {
  79. void __iomem *mem_base = NULL;
  80. int pages = size >> PAGE_SHIFT;
  81. int bitmap_size = BITS_TO_LONGS(pages) * sizeof(long);
  82. if ((flags & (DMA_MEMORY_MAP | DMA_MEMORY_IO)) == 0)
  83. goto out;
  84. if (!size)
  85. goto out;
  86. if (dev->dma_mem)
  87. goto out;
  88. /* FIXME: this routine just ignores DMA_MEMORY_INCLUDES_CHILDREN */
  89. mem_base = ioremap_nocache(bus_addr, size);
  90. if (!mem_base)
  91. goto out;
  92. dev->dma_mem = kmalloc(sizeof(struct dma_coherent_mem), GFP_KERNEL);
  93. if (!dev->dma_mem)
  94. goto out;
  95. dev->dma_mem->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
  96. if (!dev->dma_mem->bitmap)
  97. goto free1_out;
  98. dev->dma_mem->virt_base = mem_base;
  99. dev->dma_mem->device_base = device_addr;
  100. dev->dma_mem->size = pages;
  101. dev->dma_mem->flags = flags;
  102. if (flags & DMA_MEMORY_MAP)
  103. return DMA_MEMORY_MAP;
  104. return DMA_MEMORY_IO;
  105. free1_out:
  106. kfree(dev->dma_mem);
  107. out:
  108. if (mem_base)
  109. iounmap(mem_base);
  110. return 0;
  111. }
  112. EXPORT_SYMBOL(dma_declare_coherent_memory);
  113. void dma_release_declared_memory(struct device *dev)
  114. {
  115. struct dma_coherent_mem *mem = dev->dma_mem;
  116. if (!mem)
  117. return;
  118. dev->dma_mem = NULL;
  119. iounmap(mem->virt_base);
  120. kfree(mem->bitmap);
  121. kfree(mem);
  122. }
  123. EXPORT_SYMBOL(dma_release_declared_memory);
  124. void *dma_mark_declared_memory_occupied(struct device *dev,
  125. dma_addr_t device_addr, size_t size)
  126. {
  127. struct dma_coherent_mem *mem = dev->dma_mem;
  128. int pages = (size + (device_addr & ~PAGE_MASK) + PAGE_SIZE - 1) >> PAGE_SHIFT;
  129. int pos, err;
  130. if (!mem)
  131. return ERR_PTR(-EINVAL);
  132. pos = (device_addr - mem->device_base) >> PAGE_SHIFT;
  133. err = bitmap_allocate_region(mem->bitmap, pos, get_order(pages));
  134. if (err != 0)
  135. return ERR_PTR(err);
  136. return mem->virt_base + (pos << PAGE_SHIFT);
  137. }
  138. EXPORT_SYMBOL(dma_mark_declared_memory_occupied);
  139. void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  140. enum dma_data_direction direction)
  141. {
  142. #ifdef CONFIG_CPU_SH5
  143. void *p1addr = vaddr;
  144. #else
  145. void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr);
  146. #endif
  147. switch (direction) {
  148. case DMA_FROM_DEVICE: /* invalidate only */
  149. __flush_invalidate_region(p1addr, size);
  150. break;
  151. case DMA_TO_DEVICE: /* writeback only */
  152. __flush_wback_region(p1addr, size);
  153. break;
  154. case DMA_BIDIRECTIONAL: /* writeback and invalidate */
  155. __flush_purge_region(p1addr, size);
  156. break;
  157. default:
  158. BUG();
  159. }
  160. }
  161. EXPORT_SYMBOL(dma_cache_sync);