fsl_soc.c 33 KB

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  1. /*
  2. * FSL SoC setup code
  3. *
  4. * Maintained by Kumar Gala (see MAINTAINERS for contact information)
  5. *
  6. * 2006 (c) MontaVista Software, Inc.
  7. * Vitaly Bordug <vbordug@ru.mvista.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/stddef.h>
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/errno.h>
  18. #include <linux/major.h>
  19. #include <linux/delay.h>
  20. #include <linux/irq.h>
  21. #include <linux/module.h>
  22. #include <linux/device.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/phy.h>
  26. #include <linux/phy_fixed.h>
  27. #include <linux/spi/spi.h>
  28. #include <linux/fsl_devices.h>
  29. #include <linux/fs_enet_pd.h>
  30. #include <linux/fs_uart_pd.h>
  31. #include <asm/system.h>
  32. #include <asm/atomic.h>
  33. #include <asm/io.h>
  34. #include <asm/irq.h>
  35. #include <asm/time.h>
  36. #include <asm/prom.h>
  37. #include <sysdev/fsl_soc.h>
  38. #include <mm/mmu_decl.h>
  39. #include <asm/cpm2.h>
  40. extern void init_fcc_ioports(struct fs_platform_info*);
  41. extern void init_fec_ioports(struct fs_platform_info*);
  42. extern void init_smc_ioports(struct fs_uart_platform_info*);
  43. static phys_addr_t immrbase = -1;
  44. phys_addr_t get_immrbase(void)
  45. {
  46. struct device_node *soc;
  47. if (immrbase != -1)
  48. return immrbase;
  49. soc = of_find_node_by_type(NULL, "soc");
  50. if (soc) {
  51. int size;
  52. u32 naddr;
  53. const u32 *prop = of_get_property(soc, "#address-cells", &size);
  54. if (prop && size == 4)
  55. naddr = *prop;
  56. else
  57. naddr = 2;
  58. prop = of_get_property(soc, "ranges", &size);
  59. if (prop)
  60. immrbase = of_translate_address(soc, prop + naddr);
  61. of_node_put(soc);
  62. }
  63. return immrbase;
  64. }
  65. EXPORT_SYMBOL(get_immrbase);
  66. #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
  67. static u32 brgfreq = -1;
  68. u32 get_brgfreq(void)
  69. {
  70. struct device_node *node;
  71. const unsigned int *prop;
  72. int size;
  73. if (brgfreq != -1)
  74. return brgfreq;
  75. node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg");
  76. if (node) {
  77. prop = of_get_property(node, "clock-frequency", &size);
  78. if (prop && size == 4)
  79. brgfreq = *prop;
  80. of_node_put(node);
  81. return brgfreq;
  82. }
  83. /* Legacy device binding -- will go away when no users are left. */
  84. node = of_find_node_by_type(NULL, "cpm");
  85. if (!node)
  86. node = of_find_compatible_node(NULL, NULL, "fsl,qe");
  87. if (!node)
  88. node = of_find_node_by_type(NULL, "qe");
  89. if (node) {
  90. prop = of_get_property(node, "brg-frequency", &size);
  91. if (prop && size == 4)
  92. brgfreq = *prop;
  93. if (brgfreq == -1 || brgfreq == 0) {
  94. prop = of_get_property(node, "bus-frequency", &size);
  95. if (prop && size == 4)
  96. brgfreq = *prop / 2;
  97. }
  98. of_node_put(node);
  99. }
  100. return brgfreq;
  101. }
  102. EXPORT_SYMBOL(get_brgfreq);
  103. static u32 fs_baudrate = -1;
  104. u32 get_baudrate(void)
  105. {
  106. struct device_node *node;
  107. if (fs_baudrate != -1)
  108. return fs_baudrate;
  109. node = of_find_node_by_type(NULL, "serial");
  110. if (node) {
  111. int size;
  112. const unsigned int *prop = of_get_property(node,
  113. "current-speed", &size);
  114. if (prop)
  115. fs_baudrate = *prop;
  116. of_node_put(node);
  117. }
  118. return fs_baudrate;
  119. }
  120. EXPORT_SYMBOL(get_baudrate);
  121. #endif /* CONFIG_CPM2 */
  122. #ifdef CONFIG_FIXED_PHY
  123. static int __init of_add_fixed_phys(void)
  124. {
  125. int ret;
  126. struct device_node *np;
  127. u32 *fixed_link;
  128. struct fixed_phy_status status = {};
  129. for_each_node_by_name(np, "ethernet") {
  130. fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL);
  131. if (!fixed_link)
  132. continue;
  133. status.link = 1;
  134. status.duplex = fixed_link[1];
  135. status.speed = fixed_link[2];
  136. status.pause = fixed_link[3];
  137. status.asym_pause = fixed_link[4];
  138. ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status);
  139. if (ret) {
  140. of_node_put(np);
  141. return ret;
  142. }
  143. }
  144. return 0;
  145. }
  146. arch_initcall(of_add_fixed_phys);
  147. #endif /* CONFIG_FIXED_PHY */
  148. static int __init gfar_mdio_of_init(void)
  149. {
  150. struct device_node *np = NULL;
  151. struct platform_device *mdio_dev;
  152. struct resource res;
  153. int ret;
  154. np = of_find_compatible_node(np, NULL, "fsl,gianfar-mdio");
  155. /* try the deprecated version */
  156. if (!np)
  157. np = of_find_compatible_node(np, "mdio", "gianfar");
  158. if (np) {
  159. int k;
  160. struct device_node *child = NULL;
  161. struct gianfar_mdio_data mdio_data;
  162. memset(&res, 0, sizeof(res));
  163. memset(&mdio_data, 0, sizeof(mdio_data));
  164. ret = of_address_to_resource(np, 0, &res);
  165. if (ret)
  166. goto err;
  167. mdio_dev =
  168. platform_device_register_simple("fsl-gianfar_mdio",
  169. res.start, &res, 1);
  170. if (IS_ERR(mdio_dev)) {
  171. ret = PTR_ERR(mdio_dev);
  172. goto err;
  173. }
  174. for (k = 0; k < 32; k++)
  175. mdio_data.irq[k] = PHY_POLL;
  176. while ((child = of_get_next_child(np, child)) != NULL) {
  177. int irq = irq_of_parse_and_map(child, 0);
  178. if (irq != NO_IRQ) {
  179. const u32 *id = of_get_property(child,
  180. "reg", NULL);
  181. mdio_data.irq[*id] = irq;
  182. }
  183. }
  184. ret =
  185. platform_device_add_data(mdio_dev, &mdio_data,
  186. sizeof(struct gianfar_mdio_data));
  187. if (ret)
  188. goto unreg;
  189. }
  190. of_node_put(np);
  191. return 0;
  192. unreg:
  193. platform_device_unregister(mdio_dev);
  194. err:
  195. of_node_put(np);
  196. return ret;
  197. }
  198. arch_initcall(gfar_mdio_of_init);
  199. static const char *gfar_tx_intr = "tx";
  200. static const char *gfar_rx_intr = "rx";
  201. static const char *gfar_err_intr = "error";
  202. static int __init gfar_of_init(void)
  203. {
  204. struct device_node *np;
  205. unsigned int i;
  206. struct platform_device *gfar_dev;
  207. struct resource res;
  208. int ret;
  209. for (np = NULL, i = 0;
  210. (np = of_find_compatible_node(np, "network", "gianfar")) != NULL;
  211. i++) {
  212. struct resource r[4];
  213. struct device_node *phy, *mdio;
  214. struct gianfar_platform_data gfar_data;
  215. const unsigned int *id;
  216. const char *model;
  217. const char *ctype;
  218. const void *mac_addr;
  219. const phandle *ph;
  220. int n_res = 2;
  221. memset(r, 0, sizeof(r));
  222. memset(&gfar_data, 0, sizeof(gfar_data));
  223. ret = of_address_to_resource(np, 0, &r[0]);
  224. if (ret)
  225. goto err;
  226. of_irq_to_resource(np, 0, &r[1]);
  227. model = of_get_property(np, "model", NULL);
  228. /* If we aren't the FEC we have multiple interrupts */
  229. if (model && strcasecmp(model, "FEC")) {
  230. r[1].name = gfar_tx_intr;
  231. r[2].name = gfar_rx_intr;
  232. of_irq_to_resource(np, 1, &r[2]);
  233. r[3].name = gfar_err_intr;
  234. of_irq_to_resource(np, 2, &r[3]);
  235. n_res += 2;
  236. }
  237. gfar_dev =
  238. platform_device_register_simple("fsl-gianfar", i, &r[0],
  239. n_res);
  240. if (IS_ERR(gfar_dev)) {
  241. ret = PTR_ERR(gfar_dev);
  242. goto err;
  243. }
  244. mac_addr = of_get_mac_address(np);
  245. if (mac_addr)
  246. memcpy(gfar_data.mac_addr, mac_addr, 6);
  247. if (model && !strcasecmp(model, "TSEC"))
  248. gfar_data.device_flags =
  249. FSL_GIANFAR_DEV_HAS_GIGABIT |
  250. FSL_GIANFAR_DEV_HAS_COALESCE |
  251. FSL_GIANFAR_DEV_HAS_RMON |
  252. FSL_GIANFAR_DEV_HAS_MULTI_INTR;
  253. if (model && !strcasecmp(model, "eTSEC"))
  254. gfar_data.device_flags =
  255. FSL_GIANFAR_DEV_HAS_GIGABIT |
  256. FSL_GIANFAR_DEV_HAS_COALESCE |
  257. FSL_GIANFAR_DEV_HAS_RMON |
  258. FSL_GIANFAR_DEV_HAS_MULTI_INTR |
  259. FSL_GIANFAR_DEV_HAS_CSUM |
  260. FSL_GIANFAR_DEV_HAS_VLAN |
  261. FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
  262. ctype = of_get_property(np, "phy-connection-type", NULL);
  263. /* We only care about rgmii-id. The rest are autodetected */
  264. if (ctype && !strcmp(ctype, "rgmii-id"))
  265. gfar_data.interface = PHY_INTERFACE_MODE_RGMII_ID;
  266. else
  267. gfar_data.interface = PHY_INTERFACE_MODE_MII;
  268. ph = of_get_property(np, "phy-handle", NULL);
  269. if (ph == NULL) {
  270. u32 *fixed_link;
  271. fixed_link = (u32 *)of_get_property(np, "fixed-link",
  272. NULL);
  273. if (!fixed_link) {
  274. ret = -ENODEV;
  275. goto unreg;
  276. }
  277. gfar_data.bus_id = 0;
  278. gfar_data.phy_id = fixed_link[0];
  279. } else {
  280. phy = of_find_node_by_phandle(*ph);
  281. if (phy == NULL) {
  282. ret = -ENODEV;
  283. goto unreg;
  284. }
  285. mdio = of_get_parent(phy);
  286. id = of_get_property(phy, "reg", NULL);
  287. ret = of_address_to_resource(mdio, 0, &res);
  288. if (ret) {
  289. of_node_put(phy);
  290. of_node_put(mdio);
  291. goto unreg;
  292. }
  293. gfar_data.phy_id = *id;
  294. gfar_data.bus_id = res.start;
  295. of_node_put(phy);
  296. of_node_put(mdio);
  297. }
  298. ret =
  299. platform_device_add_data(gfar_dev, &gfar_data,
  300. sizeof(struct
  301. gianfar_platform_data));
  302. if (ret)
  303. goto unreg;
  304. }
  305. return 0;
  306. unreg:
  307. platform_device_unregister(gfar_dev);
  308. err:
  309. return ret;
  310. }
  311. arch_initcall(gfar_of_init);
  312. #ifdef CONFIG_I2C_BOARDINFO
  313. #include <linux/i2c.h>
  314. struct i2c_driver_device {
  315. char *of_device;
  316. char *i2c_driver;
  317. char *i2c_type;
  318. };
  319. static struct i2c_driver_device i2c_devices[] __initdata = {
  320. {"ricoh,rs5c372a", "rtc-rs5c372", "rs5c372a",},
  321. {"ricoh,rs5c372b", "rtc-rs5c372", "rs5c372b",},
  322. {"ricoh,rv5c386", "rtc-rs5c372", "rv5c386",},
  323. {"ricoh,rv5c387a", "rtc-rs5c372", "rv5c387a",},
  324. {"dallas,ds1307", "rtc-ds1307", "ds1307",},
  325. {"dallas,ds1337", "rtc-ds1307", "ds1337",},
  326. {"dallas,ds1338", "rtc-ds1307", "ds1338",},
  327. {"dallas,ds1339", "rtc-ds1307", "ds1339",},
  328. {"dallas,ds1340", "rtc-ds1307", "ds1340",},
  329. {"stm,m41t00", "rtc-ds1307", "m41t00"},
  330. {"dallas,ds1374", "rtc-ds1374", "rtc-ds1374",},
  331. };
  332. static int __init of_find_i2c_driver(struct device_node *node,
  333. struct i2c_board_info *info)
  334. {
  335. int i;
  336. for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) {
  337. if (!of_device_is_compatible(node, i2c_devices[i].of_device))
  338. continue;
  339. if (strlcpy(info->driver_name, i2c_devices[i].i2c_driver,
  340. KOBJ_NAME_LEN) >= KOBJ_NAME_LEN ||
  341. strlcpy(info->type, i2c_devices[i].i2c_type,
  342. I2C_NAME_SIZE) >= I2C_NAME_SIZE)
  343. return -ENOMEM;
  344. return 0;
  345. }
  346. return -ENODEV;
  347. }
  348. static void __init of_register_i2c_devices(struct device_node *adap_node,
  349. int bus_num)
  350. {
  351. struct device_node *node = NULL;
  352. while ((node = of_get_next_child(adap_node, node))) {
  353. struct i2c_board_info info = {};
  354. const u32 *addr;
  355. int len;
  356. addr = of_get_property(node, "reg", &len);
  357. if (!addr || len < sizeof(int) || *addr > (1 << 10) - 1) {
  358. printk(KERN_WARNING "fsl_soc.c: invalid i2c device entry\n");
  359. continue;
  360. }
  361. info.irq = irq_of_parse_and_map(node, 0);
  362. if (info.irq == NO_IRQ)
  363. info.irq = -1;
  364. if (of_find_i2c_driver(node, &info) < 0)
  365. continue;
  366. info.addr = *addr;
  367. i2c_register_board_info(bus_num, &info, 1);
  368. }
  369. }
  370. static int __init fsl_i2c_of_init(void)
  371. {
  372. struct device_node *np;
  373. unsigned int i = 0;
  374. struct platform_device *i2c_dev;
  375. int ret;
  376. for_each_compatible_node(np, NULL, "fsl-i2c") {
  377. struct resource r[2];
  378. struct fsl_i2c_platform_data i2c_data;
  379. const unsigned char *flags = NULL;
  380. memset(&r, 0, sizeof(r));
  381. memset(&i2c_data, 0, sizeof(i2c_data));
  382. ret = of_address_to_resource(np, 0, &r[0]);
  383. if (ret)
  384. goto err;
  385. of_irq_to_resource(np, 0, &r[1]);
  386. i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2);
  387. if (IS_ERR(i2c_dev)) {
  388. ret = PTR_ERR(i2c_dev);
  389. goto err;
  390. }
  391. i2c_data.device_flags = 0;
  392. flags = of_get_property(np, "dfsrr", NULL);
  393. if (flags)
  394. i2c_data.device_flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
  395. flags = of_get_property(np, "fsl5200-clocking", NULL);
  396. if (flags)
  397. i2c_data.device_flags |= FSL_I2C_DEV_CLOCK_5200;
  398. ret =
  399. platform_device_add_data(i2c_dev, &i2c_data,
  400. sizeof(struct
  401. fsl_i2c_platform_data));
  402. if (ret)
  403. goto unreg;
  404. of_register_i2c_devices(np, i++);
  405. }
  406. return 0;
  407. unreg:
  408. platform_device_unregister(i2c_dev);
  409. err:
  410. return ret;
  411. }
  412. arch_initcall(fsl_i2c_of_init);
  413. #endif
  414. #ifdef CONFIG_PPC_83xx
  415. static int __init mpc83xx_wdt_init(void)
  416. {
  417. struct resource r;
  418. struct device_node *soc, *np;
  419. struct platform_device *dev;
  420. const unsigned int *freq;
  421. int ret;
  422. np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
  423. if (!np) {
  424. ret = -ENODEV;
  425. goto nodev;
  426. }
  427. soc = of_find_node_by_type(NULL, "soc");
  428. if (!soc) {
  429. ret = -ENODEV;
  430. goto nosoc;
  431. }
  432. freq = of_get_property(soc, "bus-frequency", NULL);
  433. if (!freq) {
  434. ret = -ENODEV;
  435. goto err;
  436. }
  437. memset(&r, 0, sizeof(r));
  438. ret = of_address_to_resource(np, 0, &r);
  439. if (ret)
  440. goto err;
  441. dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
  442. if (IS_ERR(dev)) {
  443. ret = PTR_ERR(dev);
  444. goto err;
  445. }
  446. ret = platform_device_add_data(dev, freq, sizeof(int));
  447. if (ret)
  448. goto unreg;
  449. of_node_put(soc);
  450. of_node_put(np);
  451. return 0;
  452. unreg:
  453. platform_device_unregister(dev);
  454. err:
  455. of_node_put(soc);
  456. nosoc:
  457. of_node_put(np);
  458. nodev:
  459. return ret;
  460. }
  461. arch_initcall(mpc83xx_wdt_init);
  462. #endif
  463. static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
  464. {
  465. if (!phy_type)
  466. return FSL_USB2_PHY_NONE;
  467. if (!strcasecmp(phy_type, "ulpi"))
  468. return FSL_USB2_PHY_ULPI;
  469. if (!strcasecmp(phy_type, "utmi"))
  470. return FSL_USB2_PHY_UTMI;
  471. if (!strcasecmp(phy_type, "utmi_wide"))
  472. return FSL_USB2_PHY_UTMI_WIDE;
  473. if (!strcasecmp(phy_type, "serial"))
  474. return FSL_USB2_PHY_SERIAL;
  475. return FSL_USB2_PHY_NONE;
  476. }
  477. static int __init fsl_usb_of_init(void)
  478. {
  479. struct device_node *np;
  480. unsigned int i = 0;
  481. struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
  482. *usb_dev_dr_client = NULL;
  483. int ret;
  484. for_each_compatible_node(np, NULL, "fsl-usb2-mph") {
  485. struct resource r[2];
  486. struct fsl_usb2_platform_data usb_data;
  487. const unsigned char *prop = NULL;
  488. memset(&r, 0, sizeof(r));
  489. memset(&usb_data, 0, sizeof(usb_data));
  490. ret = of_address_to_resource(np, 0, &r[0]);
  491. if (ret)
  492. goto err;
  493. of_irq_to_resource(np, 0, &r[1]);
  494. usb_dev_mph =
  495. platform_device_register_simple("fsl-ehci", i, r, 2);
  496. if (IS_ERR(usb_dev_mph)) {
  497. ret = PTR_ERR(usb_dev_mph);
  498. goto err;
  499. }
  500. usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
  501. usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
  502. usb_data.operating_mode = FSL_USB2_MPH_HOST;
  503. prop = of_get_property(np, "port0", NULL);
  504. if (prop)
  505. usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
  506. prop = of_get_property(np, "port1", NULL);
  507. if (prop)
  508. usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
  509. prop = of_get_property(np, "phy_type", NULL);
  510. usb_data.phy_mode = determine_usb_phy(prop);
  511. ret =
  512. platform_device_add_data(usb_dev_mph, &usb_data,
  513. sizeof(struct
  514. fsl_usb2_platform_data));
  515. if (ret)
  516. goto unreg_mph;
  517. i++;
  518. }
  519. for_each_compatible_node(np, NULL, "fsl-usb2-dr") {
  520. struct resource r[2];
  521. struct fsl_usb2_platform_data usb_data;
  522. const unsigned char *prop = NULL;
  523. memset(&r, 0, sizeof(r));
  524. memset(&usb_data, 0, sizeof(usb_data));
  525. ret = of_address_to_resource(np, 0, &r[0]);
  526. if (ret)
  527. goto unreg_mph;
  528. of_irq_to_resource(np, 0, &r[1]);
  529. prop = of_get_property(np, "dr_mode", NULL);
  530. if (!prop || !strcmp(prop, "host")) {
  531. usb_data.operating_mode = FSL_USB2_DR_HOST;
  532. usb_dev_dr_host = platform_device_register_simple(
  533. "fsl-ehci", i, r, 2);
  534. if (IS_ERR(usb_dev_dr_host)) {
  535. ret = PTR_ERR(usb_dev_dr_host);
  536. goto err;
  537. }
  538. } else if (prop && !strcmp(prop, "peripheral")) {
  539. usb_data.operating_mode = FSL_USB2_DR_DEVICE;
  540. usb_dev_dr_client = platform_device_register_simple(
  541. "fsl-usb2-udc", i, r, 2);
  542. if (IS_ERR(usb_dev_dr_client)) {
  543. ret = PTR_ERR(usb_dev_dr_client);
  544. goto err;
  545. }
  546. } else if (prop && !strcmp(prop, "otg")) {
  547. usb_data.operating_mode = FSL_USB2_DR_OTG;
  548. usb_dev_dr_host = platform_device_register_simple(
  549. "fsl-ehci", i, r, 2);
  550. if (IS_ERR(usb_dev_dr_host)) {
  551. ret = PTR_ERR(usb_dev_dr_host);
  552. goto err;
  553. }
  554. usb_dev_dr_client = platform_device_register_simple(
  555. "fsl-usb2-udc", i, r, 2);
  556. if (IS_ERR(usb_dev_dr_client)) {
  557. ret = PTR_ERR(usb_dev_dr_client);
  558. goto err;
  559. }
  560. } else {
  561. ret = -EINVAL;
  562. goto err;
  563. }
  564. prop = of_get_property(np, "phy_type", NULL);
  565. usb_data.phy_mode = determine_usb_phy(prop);
  566. if (usb_dev_dr_host) {
  567. usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
  568. usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
  569. dev.coherent_dma_mask;
  570. if ((ret = platform_device_add_data(usb_dev_dr_host,
  571. &usb_data, sizeof(struct
  572. fsl_usb2_platform_data))))
  573. goto unreg_dr;
  574. }
  575. if (usb_dev_dr_client) {
  576. usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
  577. usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
  578. dev.coherent_dma_mask;
  579. if ((ret = platform_device_add_data(usb_dev_dr_client,
  580. &usb_data, sizeof(struct
  581. fsl_usb2_platform_data))))
  582. goto unreg_dr;
  583. }
  584. i++;
  585. }
  586. return 0;
  587. unreg_dr:
  588. if (usb_dev_dr_host)
  589. platform_device_unregister(usb_dev_dr_host);
  590. if (usb_dev_dr_client)
  591. platform_device_unregister(usb_dev_dr_client);
  592. unreg_mph:
  593. if (usb_dev_mph)
  594. platform_device_unregister(usb_dev_mph);
  595. err:
  596. return ret;
  597. }
  598. arch_initcall(fsl_usb_of_init);
  599. #ifndef CONFIG_PPC_CPM_NEW_BINDING
  600. #ifdef CONFIG_CPM2
  601. extern void init_scc_ioports(struct fs_uart_platform_info*);
  602. static const char fcc_regs[] = "fcc_regs";
  603. static const char fcc_regs_c[] = "fcc_regs_c";
  604. static const char fcc_pram[] = "fcc_pram";
  605. static char bus_id[9][BUS_ID_SIZE];
  606. static int __init fs_enet_of_init(void)
  607. {
  608. struct device_node *np;
  609. unsigned int i;
  610. struct platform_device *fs_enet_dev;
  611. struct resource res;
  612. int ret;
  613. for (np = NULL, i = 0;
  614. (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL;
  615. i++) {
  616. struct resource r[4];
  617. struct device_node *phy, *mdio;
  618. struct fs_platform_info fs_enet_data;
  619. const unsigned int *id, *phy_addr, *phy_irq;
  620. const void *mac_addr;
  621. const phandle *ph;
  622. const char *model;
  623. memset(r, 0, sizeof(r));
  624. memset(&fs_enet_data, 0, sizeof(fs_enet_data));
  625. ret = of_address_to_resource(np, 0, &r[0]);
  626. if (ret)
  627. goto err;
  628. r[0].name = fcc_regs;
  629. ret = of_address_to_resource(np, 1, &r[1]);
  630. if (ret)
  631. goto err;
  632. r[1].name = fcc_pram;
  633. ret = of_address_to_resource(np, 2, &r[2]);
  634. if (ret)
  635. goto err;
  636. r[2].name = fcc_regs_c;
  637. fs_enet_data.fcc_regs_c = r[2].start;
  638. of_irq_to_resource(np, 0, &r[3]);
  639. fs_enet_dev =
  640. platform_device_register_simple("fsl-cpm-fcc", i, &r[0], 4);
  641. if (IS_ERR(fs_enet_dev)) {
  642. ret = PTR_ERR(fs_enet_dev);
  643. goto err;
  644. }
  645. model = of_get_property(np, "model", NULL);
  646. if (model == NULL) {
  647. ret = -ENODEV;
  648. goto unreg;
  649. }
  650. mac_addr = of_get_mac_address(np);
  651. if (mac_addr)
  652. memcpy(fs_enet_data.macaddr, mac_addr, 6);
  653. ph = of_get_property(np, "phy-handle", NULL);
  654. phy = of_find_node_by_phandle(*ph);
  655. if (phy == NULL) {
  656. ret = -ENODEV;
  657. goto unreg;
  658. }
  659. phy_addr = of_get_property(phy, "reg", NULL);
  660. fs_enet_data.phy_addr = *phy_addr;
  661. phy_irq = of_get_property(phy, "interrupts", NULL);
  662. id = of_get_property(np, "device-id", NULL);
  663. fs_enet_data.fs_no = *id;
  664. strcpy(fs_enet_data.fs_type, model);
  665. mdio = of_get_parent(phy);
  666. ret = of_address_to_resource(mdio, 0, &res);
  667. if (ret) {
  668. of_node_put(phy);
  669. of_node_put(mdio);
  670. goto unreg;
  671. }
  672. fs_enet_data.clk_rx = *((u32 *)of_get_property(np,
  673. "rx-clock", NULL));
  674. fs_enet_data.clk_tx = *((u32 *)of_get_property(np,
  675. "tx-clock", NULL));
  676. if (strstr(model, "FCC")) {
  677. int fcc_index = *id - 1;
  678. const unsigned char *mdio_bb_prop;
  679. fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0);
  680. fs_enet_data.rx_ring = 32;
  681. fs_enet_data.tx_ring = 32;
  682. fs_enet_data.rx_copybreak = 240;
  683. fs_enet_data.use_napi = 0;
  684. fs_enet_data.napi_weight = 17;
  685. fs_enet_data.mem_offset = FCC_MEM_OFFSET(fcc_index);
  686. fs_enet_data.cp_page = CPM_CR_FCC_PAGE(fcc_index);
  687. fs_enet_data.cp_block = CPM_CR_FCC_SBLOCK(fcc_index);
  688. snprintf((char*)&bus_id[(*id)], BUS_ID_SIZE, "%x:%02x",
  689. (u32)res.start, fs_enet_data.phy_addr);
  690. fs_enet_data.bus_id = (char*)&bus_id[(*id)];
  691. fs_enet_data.init_ioports = init_fcc_ioports;
  692. mdio_bb_prop = of_get_property(phy, "bitbang", NULL);
  693. if (mdio_bb_prop) {
  694. struct platform_device *fs_enet_mdio_bb_dev;
  695. struct fs_mii_bb_platform_info fs_enet_mdio_bb_data;
  696. fs_enet_mdio_bb_dev =
  697. platform_device_register_simple("fsl-bb-mdio",
  698. i, NULL, 0);
  699. memset(&fs_enet_mdio_bb_data, 0,
  700. sizeof(struct fs_mii_bb_platform_info));
  701. fs_enet_mdio_bb_data.mdio_dat.bit =
  702. mdio_bb_prop[0];
  703. fs_enet_mdio_bb_data.mdio_dir.bit =
  704. mdio_bb_prop[1];
  705. fs_enet_mdio_bb_data.mdc_dat.bit =
  706. mdio_bb_prop[2];
  707. fs_enet_mdio_bb_data.mdio_port =
  708. mdio_bb_prop[3];
  709. fs_enet_mdio_bb_data.mdc_port =
  710. mdio_bb_prop[4];
  711. fs_enet_mdio_bb_data.delay =
  712. mdio_bb_prop[5];
  713. fs_enet_mdio_bb_data.irq[0] = phy_irq[0];
  714. fs_enet_mdio_bb_data.irq[1] = -1;
  715. fs_enet_mdio_bb_data.irq[2] = -1;
  716. fs_enet_mdio_bb_data.irq[3] = phy_irq[0];
  717. fs_enet_mdio_bb_data.irq[31] = -1;
  718. fs_enet_mdio_bb_data.mdio_dat.offset =
  719. (u32)&cpm2_immr->im_ioport.iop_pdatc;
  720. fs_enet_mdio_bb_data.mdio_dir.offset =
  721. (u32)&cpm2_immr->im_ioport.iop_pdirc;
  722. fs_enet_mdio_bb_data.mdc_dat.offset =
  723. (u32)&cpm2_immr->im_ioport.iop_pdatc;
  724. ret = platform_device_add_data(
  725. fs_enet_mdio_bb_dev,
  726. &fs_enet_mdio_bb_data,
  727. sizeof(struct fs_mii_bb_platform_info));
  728. if (ret)
  729. goto unreg;
  730. }
  731. of_node_put(phy);
  732. of_node_put(mdio);
  733. ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
  734. sizeof(struct
  735. fs_platform_info));
  736. if (ret)
  737. goto unreg;
  738. }
  739. }
  740. return 0;
  741. unreg:
  742. platform_device_unregister(fs_enet_dev);
  743. err:
  744. return ret;
  745. }
  746. arch_initcall(fs_enet_of_init);
  747. static const char scc_regs[] = "regs";
  748. static const char scc_pram[] = "pram";
  749. static int __init cpm_uart_of_init(void)
  750. {
  751. struct device_node *np;
  752. unsigned int i;
  753. struct platform_device *cpm_uart_dev;
  754. int ret;
  755. for (np = NULL, i = 0;
  756. (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL;
  757. i++) {
  758. struct resource r[3];
  759. struct fs_uart_platform_info cpm_uart_data;
  760. const int *id;
  761. const char *model;
  762. memset(r, 0, sizeof(r));
  763. memset(&cpm_uart_data, 0, sizeof(cpm_uart_data));
  764. ret = of_address_to_resource(np, 0, &r[0]);
  765. if (ret)
  766. goto err;
  767. r[0].name = scc_regs;
  768. ret = of_address_to_resource(np, 1, &r[1]);
  769. if (ret)
  770. goto err;
  771. r[1].name = scc_pram;
  772. of_irq_to_resource(np, 0, &r[2]);
  773. cpm_uart_dev =
  774. platform_device_register_simple("fsl-cpm-scc:uart", i, &r[0], 3);
  775. if (IS_ERR(cpm_uart_dev)) {
  776. ret = PTR_ERR(cpm_uart_dev);
  777. goto err;
  778. }
  779. id = of_get_property(np, "device-id", NULL);
  780. cpm_uart_data.fs_no = *id;
  781. model = of_get_property(np, "model", NULL);
  782. strcpy(cpm_uart_data.fs_type, model);
  783. cpm_uart_data.uart_clk = ppc_proc_freq;
  784. cpm_uart_data.tx_num_fifo = 4;
  785. cpm_uart_data.tx_buf_size = 32;
  786. cpm_uart_data.rx_num_fifo = 4;
  787. cpm_uart_data.rx_buf_size = 32;
  788. cpm_uart_data.clk_rx = *((u32 *)of_get_property(np,
  789. "rx-clock", NULL));
  790. cpm_uart_data.clk_tx = *((u32 *)of_get_property(np,
  791. "tx-clock", NULL));
  792. ret =
  793. platform_device_add_data(cpm_uart_dev, &cpm_uart_data,
  794. sizeof(struct
  795. fs_uart_platform_info));
  796. if (ret)
  797. goto unreg;
  798. }
  799. return 0;
  800. unreg:
  801. platform_device_unregister(cpm_uart_dev);
  802. err:
  803. return ret;
  804. }
  805. arch_initcall(cpm_uart_of_init);
  806. #endif /* CONFIG_CPM2 */
  807. #ifdef CONFIG_8xx
  808. extern void init_scc_ioports(struct fs_platform_info*);
  809. extern int platform_device_skip(const char *model, int id);
  810. static int __init fs_enet_mdio_of_init(void)
  811. {
  812. struct device_node *np;
  813. unsigned int i;
  814. struct platform_device *mdio_dev;
  815. struct resource res;
  816. int ret;
  817. for (np = NULL, i = 0;
  818. (np = of_find_compatible_node(np, "mdio", "fs_enet")) != NULL;
  819. i++) {
  820. struct fs_mii_fec_platform_info mdio_data;
  821. memset(&res, 0, sizeof(res));
  822. memset(&mdio_data, 0, sizeof(mdio_data));
  823. ret = of_address_to_resource(np, 0, &res);
  824. if (ret)
  825. goto err;
  826. mdio_dev =
  827. platform_device_register_simple("fsl-cpm-fec-mdio",
  828. res.start, &res, 1);
  829. if (IS_ERR(mdio_dev)) {
  830. ret = PTR_ERR(mdio_dev);
  831. goto err;
  832. }
  833. mdio_data.mii_speed = ((((ppc_proc_freq + 4999999) / 2500000) / 2) & 0x3F) << 1;
  834. ret =
  835. platform_device_add_data(mdio_dev, &mdio_data,
  836. sizeof(struct fs_mii_fec_platform_info));
  837. if (ret)
  838. goto unreg;
  839. }
  840. return 0;
  841. unreg:
  842. platform_device_unregister(mdio_dev);
  843. err:
  844. return ret;
  845. }
  846. arch_initcall(fs_enet_mdio_of_init);
  847. static const char *enet_regs = "regs";
  848. static const char *enet_pram = "pram";
  849. static const char *enet_irq = "interrupt";
  850. static char bus_id[9][BUS_ID_SIZE];
  851. static int __init fs_enet_of_init(void)
  852. {
  853. struct device_node *np;
  854. unsigned int i;
  855. struct platform_device *fs_enet_dev = NULL;
  856. struct resource res;
  857. int ret;
  858. for (np = NULL, i = 0;
  859. (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL;
  860. i++) {
  861. struct resource r[4];
  862. struct device_node *phy = NULL, *mdio = NULL;
  863. struct fs_platform_info fs_enet_data;
  864. const unsigned int *id;
  865. const unsigned int *phy_addr;
  866. const void *mac_addr;
  867. const phandle *ph;
  868. const char *model;
  869. memset(r, 0, sizeof(r));
  870. memset(&fs_enet_data, 0, sizeof(fs_enet_data));
  871. model = of_get_property(np, "model", NULL);
  872. if (model == NULL) {
  873. ret = -ENODEV;
  874. goto unreg;
  875. }
  876. id = of_get_property(np, "device-id", NULL);
  877. fs_enet_data.fs_no = *id;
  878. if (platform_device_skip(model, *id))
  879. continue;
  880. ret = of_address_to_resource(np, 0, &r[0]);
  881. if (ret)
  882. goto err;
  883. r[0].name = enet_regs;
  884. mac_addr = of_get_mac_address(np);
  885. if (mac_addr)
  886. memcpy(fs_enet_data.macaddr, mac_addr, 6);
  887. ph = of_get_property(np, "phy-handle", NULL);
  888. if (ph != NULL)
  889. phy = of_find_node_by_phandle(*ph);
  890. if (phy != NULL) {
  891. phy_addr = of_get_property(phy, "reg", NULL);
  892. fs_enet_data.phy_addr = *phy_addr;
  893. fs_enet_data.has_phy = 1;
  894. mdio = of_get_parent(phy);
  895. ret = of_address_to_resource(mdio, 0, &res);
  896. if (ret) {
  897. of_node_put(phy);
  898. of_node_put(mdio);
  899. goto unreg;
  900. }
  901. }
  902. model = of_get_property(np, "model", NULL);
  903. strcpy(fs_enet_data.fs_type, model);
  904. if (strstr(model, "FEC")) {
  905. r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
  906. r[1].flags = IORESOURCE_IRQ;
  907. r[1].name = enet_irq;
  908. fs_enet_dev =
  909. platform_device_register_simple("fsl-cpm-fec", i, &r[0], 2);
  910. if (IS_ERR(fs_enet_dev)) {
  911. ret = PTR_ERR(fs_enet_dev);
  912. goto err;
  913. }
  914. fs_enet_data.rx_ring = 128;
  915. fs_enet_data.tx_ring = 16;
  916. fs_enet_data.rx_copybreak = 240;
  917. fs_enet_data.use_napi = 1;
  918. fs_enet_data.napi_weight = 17;
  919. snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%x:%02x",
  920. (u32)res.start, fs_enet_data.phy_addr);
  921. fs_enet_data.bus_id = (char*)&bus_id[i];
  922. fs_enet_data.init_ioports = init_fec_ioports;
  923. }
  924. if (strstr(model, "SCC")) {
  925. ret = of_address_to_resource(np, 1, &r[1]);
  926. if (ret)
  927. goto err;
  928. r[1].name = enet_pram;
  929. r[2].start = r[2].end = irq_of_parse_and_map(np, 0);
  930. r[2].flags = IORESOURCE_IRQ;
  931. r[2].name = enet_irq;
  932. fs_enet_dev =
  933. platform_device_register_simple("fsl-cpm-scc", i, &r[0], 3);
  934. if (IS_ERR(fs_enet_dev)) {
  935. ret = PTR_ERR(fs_enet_dev);
  936. goto err;
  937. }
  938. fs_enet_data.rx_ring = 64;
  939. fs_enet_data.tx_ring = 8;
  940. fs_enet_data.rx_copybreak = 240;
  941. fs_enet_data.use_napi = 1;
  942. fs_enet_data.napi_weight = 17;
  943. snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%s", "fixed@10:1");
  944. fs_enet_data.bus_id = (char*)&bus_id[i];
  945. fs_enet_data.init_ioports = init_scc_ioports;
  946. }
  947. of_node_put(phy);
  948. of_node_put(mdio);
  949. ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
  950. sizeof(struct
  951. fs_platform_info));
  952. if (ret)
  953. goto unreg;
  954. }
  955. return 0;
  956. unreg:
  957. platform_device_unregister(fs_enet_dev);
  958. err:
  959. return ret;
  960. }
  961. arch_initcall(fs_enet_of_init);
  962. static int __init fsl_pcmcia_of_init(void)
  963. {
  964. struct device_node *np;
  965. /*
  966. * Register all the devices which type is "pcmcia"
  967. */
  968. for_each_compatible_node(np, "pcmcia", "fsl,pq-pcmcia")
  969. of_platform_device_create(np, "m8xx-pcmcia", NULL);
  970. return 0;
  971. }
  972. arch_initcall(fsl_pcmcia_of_init);
  973. static const char *smc_regs = "regs";
  974. static const char *smc_pram = "pram";
  975. static int __init cpm_smc_uart_of_init(void)
  976. {
  977. struct device_node *np;
  978. unsigned int i;
  979. struct platform_device *cpm_uart_dev;
  980. int ret;
  981. for (np = NULL, i = 0;
  982. (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL;
  983. i++) {
  984. struct resource r[3];
  985. struct fs_uart_platform_info cpm_uart_data;
  986. const int *id;
  987. const char *model;
  988. memset(r, 0, sizeof(r));
  989. memset(&cpm_uart_data, 0, sizeof(cpm_uart_data));
  990. ret = of_address_to_resource(np, 0, &r[0]);
  991. if (ret)
  992. goto err;
  993. r[0].name = smc_regs;
  994. ret = of_address_to_resource(np, 1, &r[1]);
  995. if (ret)
  996. goto err;
  997. r[1].name = smc_pram;
  998. r[2].start = r[2].end = irq_of_parse_and_map(np, 0);
  999. r[2].flags = IORESOURCE_IRQ;
  1000. cpm_uart_dev =
  1001. platform_device_register_simple("fsl-cpm-smc:uart", i, &r[0], 3);
  1002. if (IS_ERR(cpm_uart_dev)) {
  1003. ret = PTR_ERR(cpm_uart_dev);
  1004. goto err;
  1005. }
  1006. model = of_get_property(np, "model", NULL);
  1007. strcpy(cpm_uart_data.fs_type, model);
  1008. id = of_get_property(np, "device-id", NULL);
  1009. cpm_uart_data.fs_no = *id;
  1010. cpm_uart_data.uart_clk = ppc_proc_freq;
  1011. cpm_uart_data.tx_num_fifo = 4;
  1012. cpm_uart_data.tx_buf_size = 32;
  1013. cpm_uart_data.rx_num_fifo = 4;
  1014. cpm_uart_data.rx_buf_size = 32;
  1015. ret =
  1016. platform_device_add_data(cpm_uart_dev, &cpm_uart_data,
  1017. sizeof(struct
  1018. fs_uart_platform_info));
  1019. if (ret)
  1020. goto unreg;
  1021. }
  1022. return 0;
  1023. unreg:
  1024. platform_device_unregister(cpm_uart_dev);
  1025. err:
  1026. return ret;
  1027. }
  1028. arch_initcall(cpm_smc_uart_of_init);
  1029. #endif /* CONFIG_8xx */
  1030. #endif /* CONFIG_PPC_CPM_NEW_BINDING */
  1031. static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
  1032. struct spi_board_info *board_infos,
  1033. unsigned int num_board_infos,
  1034. void (*activate_cs)(u8 cs, u8 polarity),
  1035. void (*deactivate_cs)(u8 cs, u8 polarity))
  1036. {
  1037. struct device_node *np;
  1038. unsigned int i = 0;
  1039. for_each_compatible_node(np, type, compatible) {
  1040. int ret;
  1041. unsigned int j;
  1042. const void *prop;
  1043. struct resource res[2];
  1044. struct platform_device *pdev;
  1045. struct fsl_spi_platform_data pdata = {
  1046. .activate_cs = activate_cs,
  1047. .deactivate_cs = deactivate_cs,
  1048. };
  1049. memset(res, 0, sizeof(res));
  1050. pdata.sysclk = sysclk;
  1051. prop = of_get_property(np, "reg", NULL);
  1052. if (!prop)
  1053. goto err;
  1054. pdata.bus_num = *(u32 *)prop;
  1055. prop = of_get_property(np, "cell-index", NULL);
  1056. if (prop)
  1057. i = *(u32 *)prop;
  1058. prop = of_get_property(np, "mode", NULL);
  1059. if (prop && !strcmp(prop, "cpu-qe"))
  1060. pdata.qe_mode = 1;
  1061. for (j = 0; j < num_board_infos; j++) {
  1062. if (board_infos[j].bus_num == pdata.bus_num)
  1063. pdata.max_chipselect++;
  1064. }
  1065. if (!pdata.max_chipselect)
  1066. continue;
  1067. ret = of_address_to_resource(np, 0, &res[0]);
  1068. if (ret)
  1069. goto err;
  1070. ret = of_irq_to_resource(np, 0, &res[1]);
  1071. if (ret == NO_IRQ)
  1072. goto err;
  1073. pdev = platform_device_alloc("mpc83xx_spi", i);
  1074. if (!pdev)
  1075. goto err;
  1076. ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
  1077. if (ret)
  1078. goto unreg;
  1079. ret = platform_device_add_resources(pdev, res,
  1080. ARRAY_SIZE(res));
  1081. if (ret)
  1082. goto unreg;
  1083. ret = platform_device_add(pdev);
  1084. if (ret)
  1085. goto unreg;
  1086. goto next;
  1087. unreg:
  1088. platform_device_del(pdev);
  1089. err:
  1090. pr_err("%s: registration failed\n", np->full_name);
  1091. next:
  1092. i++;
  1093. }
  1094. return i;
  1095. }
  1096. int __init fsl_spi_init(struct spi_board_info *board_infos,
  1097. unsigned int num_board_infos,
  1098. void (*activate_cs)(u8 cs, u8 polarity),
  1099. void (*deactivate_cs)(u8 cs, u8 polarity))
  1100. {
  1101. u32 sysclk = -1;
  1102. int ret;
  1103. #ifdef CONFIG_QUICC_ENGINE
  1104. /* SPI controller is either clocked from QE or SoC clock */
  1105. sysclk = get_brgfreq();
  1106. #endif
  1107. if (sysclk == -1) {
  1108. struct device_node *np;
  1109. const u32 *freq;
  1110. int size;
  1111. np = of_find_node_by_type(NULL, "soc");
  1112. if (!np)
  1113. return -ENODEV;
  1114. freq = of_get_property(np, "clock-frequency", &size);
  1115. if (!freq || size != sizeof(*freq) || *freq == 0) {
  1116. freq = of_get_property(np, "bus-frequency", &size);
  1117. if (!freq || size != sizeof(*freq) || *freq == 0) {
  1118. of_node_put(np);
  1119. return -ENODEV;
  1120. }
  1121. }
  1122. sysclk = *freq;
  1123. of_node_put(np);
  1124. }
  1125. ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos,
  1126. num_board_infos, activate_cs, deactivate_cs);
  1127. if (!ret)
  1128. of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos,
  1129. num_board_infos, activate_cs, deactivate_cs);
  1130. return spi_register_board_info(board_infos, num_board_infos);
  1131. }
  1132. #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
  1133. static __be32 __iomem *rstcr;
  1134. static int __init setup_rstcr(void)
  1135. {
  1136. struct device_node *np;
  1137. np = of_find_node_by_name(NULL, "global-utilities");
  1138. if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
  1139. const u32 *prop = of_get_property(np, "reg", NULL);
  1140. if (prop) {
  1141. /* map reset control register
  1142. * 0xE00B0 is offset of reset control register
  1143. */
  1144. rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
  1145. if (!rstcr)
  1146. printk (KERN_EMERG "Error: reset control "
  1147. "register not mapped!\n");
  1148. }
  1149. } else
  1150. printk (KERN_INFO "rstcr compatible register does not exist!\n");
  1151. if (np)
  1152. of_node_put(np);
  1153. return 0;
  1154. }
  1155. arch_initcall(setup_rstcr);
  1156. void fsl_rstcr_restart(char *cmd)
  1157. {
  1158. local_irq_disable();
  1159. if (rstcr)
  1160. /* set reset control register */
  1161. out_be32(rstcr, 0x2); /* HRESET_REQ */
  1162. while (1) ;
  1163. }
  1164. #endif