io-workarounds.c 6.0 KB

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  1. /*
  2. * Support for Celleb io workarounds
  3. *
  4. * (C) Copyright 2006-2007 TOSHIBA CORPORATION
  5. *
  6. * This file is based to arch/powerpc/platform/cell/io-workarounds.c
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License along
  19. * with this program; if not, write to the Free Software Foundation, Inc.,
  20. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  21. */
  22. #undef DEBUG
  23. #include <linux/of.h>
  24. #include <linux/of_device.h>
  25. #include <linux/irq.h>
  26. #include <asm/io.h>
  27. #include <asm/prom.h>
  28. #include <asm/machdep.h>
  29. #include <asm/pci-bridge.h>
  30. #include <asm/ppc-pci.h>
  31. #include "pci.h"
  32. #define MAX_CELLEB_PCI_BUS 4
  33. void *celleb_dummy_page_va;
  34. static struct celleb_pci_bus {
  35. struct pci_controller *phb;
  36. void (*dummy_read)(struct pci_controller *);
  37. } celleb_pci_busses[MAX_CELLEB_PCI_BUS];
  38. static int celleb_pci_count = 0;
  39. static struct celleb_pci_bus *celleb_pci_find(unsigned long vaddr,
  40. unsigned long paddr)
  41. {
  42. int i, j;
  43. struct resource *res;
  44. for (i = 0; i < celleb_pci_count; i++) {
  45. struct celleb_pci_bus *bus = &celleb_pci_busses[i];
  46. struct pci_controller *phb = bus->phb;
  47. if (paddr)
  48. for (j = 0; j < 3; j++) {
  49. res = &phb->mem_resources[j];
  50. if (paddr >= res->start && paddr <= res->end)
  51. return bus;
  52. }
  53. res = &phb->io_resource;
  54. if (vaddr && vaddr >= res->start && vaddr <= res->end)
  55. return bus;
  56. }
  57. return NULL;
  58. }
  59. static void celleb_io_flush(const PCI_IO_ADDR addr)
  60. {
  61. struct celleb_pci_bus *bus;
  62. int token;
  63. token = PCI_GET_ADDR_TOKEN(addr);
  64. if (token && token <= celleb_pci_count)
  65. bus = &celleb_pci_busses[token - 1];
  66. else {
  67. unsigned long vaddr, paddr;
  68. pte_t *ptep;
  69. vaddr = (unsigned long)PCI_FIX_ADDR(addr);
  70. if (vaddr < PHB_IO_BASE || vaddr >= PHB_IO_END)
  71. return;
  72. ptep = find_linux_pte(init_mm.pgd, vaddr);
  73. if (ptep == NULL)
  74. paddr = 0;
  75. else
  76. paddr = pte_pfn(*ptep) << PAGE_SHIFT;
  77. bus = celleb_pci_find(vaddr, paddr);
  78. if (bus == NULL)
  79. return;
  80. }
  81. if (bus->dummy_read)
  82. bus->dummy_read(bus->phb);
  83. }
  84. static u8 celleb_readb(const PCI_IO_ADDR addr)
  85. {
  86. u8 val;
  87. val = __do_readb(addr);
  88. celleb_io_flush(addr);
  89. return val;
  90. }
  91. static u16 celleb_readw(const PCI_IO_ADDR addr)
  92. {
  93. u16 val;
  94. val = __do_readw(addr);
  95. celleb_io_flush(addr);
  96. return val;
  97. }
  98. static u32 celleb_readl(const PCI_IO_ADDR addr)
  99. {
  100. u32 val;
  101. val = __do_readl(addr);
  102. celleb_io_flush(addr);
  103. return val;
  104. }
  105. static u64 celleb_readq(const PCI_IO_ADDR addr)
  106. {
  107. u64 val;
  108. val = __do_readq(addr);
  109. celleb_io_flush(addr);
  110. return val;
  111. }
  112. static u16 celleb_readw_be(const PCI_IO_ADDR addr)
  113. {
  114. u16 val;
  115. val = __do_readw_be(addr);
  116. celleb_io_flush(addr);
  117. return val;
  118. }
  119. static u32 celleb_readl_be(const PCI_IO_ADDR addr)
  120. {
  121. u32 val;
  122. val = __do_readl_be(addr);
  123. celleb_io_flush(addr);
  124. return val;
  125. }
  126. static u64 celleb_readq_be(const PCI_IO_ADDR addr)
  127. {
  128. u64 val;
  129. val = __do_readq_be(addr);
  130. celleb_io_flush(addr);
  131. return val;
  132. }
  133. static void celleb_readsb(const PCI_IO_ADDR addr,
  134. void *buf, unsigned long count)
  135. {
  136. __do_readsb(addr, buf, count);
  137. celleb_io_flush(addr);
  138. }
  139. static void celleb_readsw(const PCI_IO_ADDR addr,
  140. void *buf, unsigned long count)
  141. {
  142. __do_readsw(addr, buf, count);
  143. celleb_io_flush(addr);
  144. }
  145. static void celleb_readsl(const PCI_IO_ADDR addr,
  146. void *buf, unsigned long count)
  147. {
  148. __do_readsl(addr, buf, count);
  149. celleb_io_flush(addr);
  150. }
  151. static void celleb_memcpy_fromio(void *dest,
  152. const PCI_IO_ADDR src,
  153. unsigned long n)
  154. {
  155. __do_memcpy_fromio(dest, src, n);
  156. celleb_io_flush(src);
  157. }
  158. static void __iomem *celleb_ioremap(unsigned long addr,
  159. unsigned long size,
  160. unsigned long flags)
  161. {
  162. struct celleb_pci_bus *bus;
  163. void __iomem *res = __ioremap(addr, size, flags);
  164. int busno;
  165. bus = celleb_pci_find(0, addr);
  166. if (bus != NULL) {
  167. busno = bus - celleb_pci_busses;
  168. PCI_SET_ADDR_TOKEN(res, busno + 1);
  169. }
  170. return res;
  171. }
  172. static void celleb_iounmap(volatile void __iomem *addr)
  173. {
  174. return __iounmap(PCI_FIX_ADDR(addr));
  175. }
  176. static struct ppc_pci_io celleb_pci_io __initdata = {
  177. .readb = celleb_readb,
  178. .readw = celleb_readw,
  179. .readl = celleb_readl,
  180. .readq = celleb_readq,
  181. .readw_be = celleb_readw_be,
  182. .readl_be = celleb_readl_be,
  183. .readq_be = celleb_readq_be,
  184. .readsb = celleb_readsb,
  185. .readsw = celleb_readsw,
  186. .readsl = celleb_readsl,
  187. .memcpy_fromio = celleb_memcpy_fromio,
  188. };
  189. void __init celleb_pci_add_one(struct pci_controller *phb,
  190. void (*dummy_read)(struct pci_controller *))
  191. {
  192. struct celleb_pci_bus *bus = &celleb_pci_busses[celleb_pci_count];
  193. struct device_node *np = phb->dn;
  194. if (celleb_pci_count >= MAX_CELLEB_PCI_BUS) {
  195. printk(KERN_ERR "Too many pci bridges, workarounds"
  196. " disabled for %s\n", np->full_name);
  197. return;
  198. }
  199. celleb_pci_count++;
  200. bus->phb = phb;
  201. bus->dummy_read = dummy_read;
  202. }
  203. static struct of_device_id celleb_pci_workaround_match[] __initdata = {
  204. {
  205. .name = "pci-pseudo",
  206. .data = fake_pci_workaround_init,
  207. }, {
  208. .name = "epci",
  209. .data = epci_workaround_init,
  210. }, {
  211. },
  212. };
  213. int __init celleb_pci_workaround_init(void)
  214. {
  215. struct pci_controller *phb;
  216. struct device_node *node;
  217. const struct of_device_id *match;
  218. void (*init_func)(struct pci_controller *);
  219. celleb_dummy_page_va = kmalloc(PAGE_SIZE, GFP_KERNEL);
  220. if (!celleb_dummy_page_va) {
  221. printk(KERN_ERR "Celleb: dummy read disabled. "
  222. "Alloc celleb_dummy_page_va failed\n");
  223. return 1;
  224. }
  225. list_for_each_entry(phb, &hose_list, list_node) {
  226. node = phb->dn;
  227. match = of_match_node(celleb_pci_workaround_match, node);
  228. if (match) {
  229. init_func = match->data;
  230. (*init_func)(phb);
  231. }
  232. }
  233. ppc_pci_io = celleb_pci_io;
  234. ppc_md.ioremap = celleb_ioremap;
  235. ppc_md.iounmap = celleb_iounmap;
  236. return 0;
  237. }