Kconfig 8.5 KB

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  1. menu "Platform support"
  2. choice
  3. prompt "Machine type"
  4. depends on PPC64 || 6xx
  5. default PPC_MULTIPLATFORM
  6. config PPC_MULTIPLATFORM
  7. bool "Generic desktop/server/laptop"
  8. help
  9. Select this option if configuring for an IBM pSeries or
  10. RS/6000 machine, an Apple machine, or a PReP, CHRP,
  11. Maple or Cell-based machine.
  12. config PPC_82xx
  13. bool "Freescale 82xx"
  14. depends on 6xx
  15. config PPC_83xx
  16. bool "Freescale 83xx"
  17. depends on 6xx
  18. select FSL_SOC
  19. select MPC83xx
  20. select IPIC
  21. select FSL_EMB_PERFMON
  22. config PPC_86xx
  23. bool "Freescale 86xx"
  24. depends on 6xx
  25. select FSL_SOC
  26. select ALTIVEC
  27. help
  28. The Freescale E600 SoCs have 74xx cores.
  29. endchoice
  30. config CLASSIC32
  31. def_bool y
  32. depends on 6xx && PPC_MULTIPLATFORM
  33. source "arch/powerpc/platforms/pseries/Kconfig"
  34. source "arch/powerpc/platforms/iseries/Kconfig"
  35. source "arch/powerpc/platforms/chrp/Kconfig"
  36. source "arch/powerpc/platforms/512x/Kconfig"
  37. source "arch/powerpc/platforms/52xx/Kconfig"
  38. source "arch/powerpc/platforms/powermac/Kconfig"
  39. source "arch/powerpc/platforms/prep/Kconfig"
  40. source "arch/powerpc/platforms/maple/Kconfig"
  41. source "arch/powerpc/platforms/pasemi/Kconfig"
  42. source "arch/powerpc/platforms/celleb/Kconfig"
  43. source "arch/powerpc/platforms/ps3/Kconfig"
  44. source "arch/powerpc/platforms/cell/Kconfig"
  45. source "arch/powerpc/platforms/8xx/Kconfig"
  46. source "arch/powerpc/platforms/82xx/Kconfig"
  47. source "arch/powerpc/platforms/83xx/Kconfig"
  48. source "arch/powerpc/platforms/85xx/Kconfig"
  49. source "arch/powerpc/platforms/86xx/Kconfig"
  50. source "arch/powerpc/platforms/embedded6xx/Kconfig"
  51. source "arch/powerpc/platforms/44x/Kconfig"
  52. source "arch/powerpc/platforms/40x/Kconfig"
  53. config PPC_NATIVE
  54. bool
  55. depends on PPC_MULTIPLATFORM
  56. help
  57. Support for running natively on the hardware, i.e. without
  58. a hypervisor. This option is not user-selectable but should
  59. be selected by all platforms that need it.
  60. config UDBG_RTAS_CONSOLE
  61. bool "RTAS based debug console"
  62. depends on PPC_RTAS
  63. default n
  64. config PPC_UDBG_BEAT
  65. bool "BEAT based debug console"
  66. depends on PPC_CELLEB
  67. default n
  68. config XICS
  69. depends on PPC_PSERIES
  70. bool
  71. default y
  72. config IPIC
  73. bool
  74. default n
  75. config MPIC
  76. bool
  77. default n
  78. config MPIC_WEIRD
  79. bool
  80. default n
  81. config PPC_I8259
  82. bool
  83. default n
  84. config U3_DART
  85. bool
  86. depends on PPC_MULTIPLATFORM && PPC64
  87. default n
  88. config PPC_RTAS
  89. bool
  90. default n
  91. config RTAS_ERROR_LOGGING
  92. bool
  93. depends on PPC_RTAS
  94. default n
  95. config RTAS_PROC
  96. bool "Proc interface to RTAS"
  97. depends on PPC_RTAS
  98. default y
  99. config RTAS_FLASH
  100. tristate "Firmware flash interface"
  101. depends on PPC64 && RTAS_PROC
  102. config PPC_PMI
  103. tristate "Support for PMI"
  104. depends on PPC_IBM_CELL_BLADE
  105. help
  106. PMI (Platform Management Interrupt) is a way to
  107. communicate with the BMC (Baseboard Management Controller).
  108. It is used in some IBM Cell blades.
  109. default m
  110. config MMIO_NVRAM
  111. bool
  112. default n
  113. config MPIC_U3_HT_IRQS
  114. bool
  115. depends on PPC_MAPLE
  116. default y
  117. config MPIC_BROKEN_REGREAD
  118. bool
  119. depends on MPIC
  120. help
  121. This option enables a MPIC driver workaround for some chips
  122. that have a bug that causes some interrupt source information
  123. to not read back properly. It is safe to use on other chips as
  124. well, but enabling it uses about 8KB of memory to keep copies
  125. of the register contents in software.
  126. config IBMVIO
  127. depends on PPC_PSERIES || PPC_ISERIES
  128. bool
  129. default y
  130. config IBMEBUS
  131. depends on PPC_PSERIES
  132. bool "Support for GX bus based adapters"
  133. help
  134. Bus device driver for GX bus based adapters.
  135. config PPC_MPC106
  136. bool
  137. default n
  138. config PPC_970_NAP
  139. bool
  140. default n
  141. config PPC_INDIRECT_IO
  142. bool
  143. select GENERIC_IOMAP
  144. default n
  145. config GENERIC_IOMAP
  146. bool
  147. default n
  148. source "drivers/cpufreq/Kconfig"
  149. menu "CPU Frequency drivers"
  150. depends on CPU_FREQ
  151. config CPU_FREQ_PMAC
  152. bool "Support for Apple PowerBooks"
  153. depends on ADB_PMU && PPC32
  154. select CPU_FREQ_TABLE
  155. help
  156. This adds support for frequency switching on Apple PowerBooks,
  157. this currently includes some models of iBook & Titanium
  158. PowerBook.
  159. config CPU_FREQ_PMAC64
  160. bool "Support for some Apple G5s"
  161. depends on PPC_PMAC && PPC64
  162. select CPU_FREQ_TABLE
  163. help
  164. This adds support for frequency switching on Apple iMac G5,
  165. and some of the more recent desktop G5 machines as well.
  166. config PPC_PASEMI_CPUFREQ
  167. bool "Support for PA Semi PWRficient"
  168. depends on PPC_PASEMI
  169. default y
  170. select CPU_FREQ_TABLE
  171. help
  172. This adds the support for frequency switching on PA Semi
  173. PWRficient processors.
  174. endmenu
  175. config PPC601_SYNC_FIX
  176. bool "Workarounds for PPC601 bugs"
  177. depends on 6xx && (PPC_PREP || PPC_PMAC)
  178. help
  179. Some versions of the PPC601 (the first PowerPC chip) have bugs which
  180. mean that extra synchronization instructions are required near
  181. certain instructions, typically those that make major changes to the
  182. CPU state. These extra instructions reduce performance slightly.
  183. If you say N here, these extra instructions will not be included,
  184. resulting in a kernel which will run faster but may not run at all
  185. on some systems with the PPC601 chip.
  186. If in doubt, say Y here.
  187. config TAU
  188. bool "On-chip CPU temperature sensor support"
  189. depends on CLASSIC32
  190. help
  191. G3 and G4 processors have an on-chip temperature sensor called the
  192. 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
  193. temperature within 2-4 degrees Celsius. This option shows the current
  194. on-die temperature in /proc/cpuinfo if the cpu supports it.
  195. Unfortunately, on some chip revisions, this sensor is very inaccurate
  196. and in many cases, does not work at all, so don't assume the cpu
  197. temp is actually what /proc/cpuinfo says it is.
  198. config TAU_INT
  199. bool "Interrupt driven TAU driver (DANGEROUS)"
  200. depends on TAU
  201. ---help---
  202. The TAU supports an interrupt driven mode which causes an interrupt
  203. whenever the temperature goes out of range. This is the fastest way
  204. to get notified the temp has exceeded a range. With this option off,
  205. a timer is used to re-check the temperature periodically.
  206. However, on some cpus it appears that the TAU interrupt hardware
  207. is buggy and can cause a situation which would lead unexplained hard
  208. lockups.
  209. Unless you are extending the TAU driver, or enjoy kernel/hardware
  210. debugging, leave this option off.
  211. config TAU_AVERAGE
  212. bool "Average high and low temp"
  213. depends on TAU
  214. ---help---
  215. The TAU hardware can compare the temperature to an upper and lower
  216. bound. The default behavior is to show both the upper and lower
  217. bound in /proc/cpuinfo. If the range is large, the temperature is
  218. either changing a lot, or the TAU hardware is broken (likely on some
  219. G4's). If the range is small (around 4 degrees), the temperature is
  220. relatively stable. If you say Y here, a single temperature value,
  221. halfway between the upper and lower bounds, will be reported in
  222. /proc/cpuinfo.
  223. If in doubt, say N here.
  224. config QUICC_ENGINE
  225. bool
  226. select PPC_LIB_RHEAP
  227. select CRC32
  228. help
  229. The QUICC Engine (QE) is a new generation of communications
  230. coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
  231. Selecting this option means that you wish to build a kernel
  232. for a machine with a QE coprocessor.
  233. config CPM2
  234. bool "Enable support for the CPM2 (Communications Processor Module)"
  235. depends on MPC85xx || 8260
  236. select CPM
  237. select PPC_LIB_RHEAP
  238. help
  239. The CPM2 (Communications Processor Module) is a coprocessor on
  240. embedded CPUs made by Freescale. Selecting this option means that
  241. you wish to build a kernel for a machine with a CPM2 coprocessor
  242. on it (826x, 827x, 8560).
  243. config PPC_CPM_NEW_BINDING
  244. bool
  245. depends on CPM1 || CPM2
  246. help
  247. Select this if your board has been converted to use the new
  248. device tree bindings for CPM, and no longer needs the
  249. ioport callbacks or the platform device glue code.
  250. The fs_enet and cpm_uart drivers will be built as
  251. of_platform devices.
  252. config AXON_RAM
  253. tristate "Axon DDR2 memory device driver"
  254. depends on PPC_IBM_CELL_BLADE
  255. default m
  256. help
  257. It registers one block device per Axon's DDR2 memory bank found
  258. on a system. Block devices are called axonram?, their major and
  259. minor numbers are available in /proc/devices, /proc/partitions or
  260. in /sys/block/axonram?/dev.
  261. config FSL_ULI1575
  262. bool
  263. default n
  264. select GENERIC_ISA_DMA
  265. help
  266. Supports for the ULI1575 PCIe south bridge that exists on some
  267. Freescale reference boards. The boards all use the ULI in pretty
  268. much the same way.
  269. config CPM
  270. bool
  271. config OF_RTC
  272. bool
  273. help
  274. Uses information from the OF or flattened device tree to instatiate
  275. platform devices for direct mapped RTC chips like the DS1742 or DS1743.
  276. source "arch/powerpc/sysdev/bestcomm/Kconfig"
  277. endmenu