setup-common.c 15 KB

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  1. /*
  2. * Common boot and setup code for both 32-bit and 64-bit.
  3. * Extracted from arch/powerpc/kernel/setup_64.c.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/module.h>
  14. #include <linux/string.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/reboot.h>
  19. #include <linux/delay.h>
  20. #include <linux/initrd.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/ioport.h>
  24. #include <linux/console.h>
  25. #include <linux/utsname.h>
  26. #include <linux/screen_info.h>
  27. #include <linux/root_dev.h>
  28. #include <linux/notifier.h>
  29. #include <linux/cpu.h>
  30. #include <linux/unistd.h>
  31. #include <linux/serial.h>
  32. #include <linux/serial_8250.h>
  33. #include <linux/debugfs.h>
  34. #include <linux/percpu.h>
  35. #include <asm/io.h>
  36. #include <asm/prom.h>
  37. #include <asm/processor.h>
  38. #include <asm/vdso_datapage.h>
  39. #include <asm/pgtable.h>
  40. #include <asm/smp.h>
  41. #include <asm/elf.h>
  42. #include <asm/machdep.h>
  43. #include <asm/time.h>
  44. #include <asm/cputable.h>
  45. #include <asm/sections.h>
  46. #include <asm/firmware.h>
  47. #include <asm/btext.h>
  48. #include <asm/nvram.h>
  49. #include <asm/setup.h>
  50. #include <asm/system.h>
  51. #include <asm/rtas.h>
  52. #include <asm/iommu.h>
  53. #include <asm/serial.h>
  54. #include <asm/cache.h>
  55. #include <asm/page.h>
  56. #include <asm/mmu.h>
  57. #include <asm/lmb.h>
  58. #include <asm/xmon.h>
  59. #include <asm/cputhreads.h>
  60. #include "setup.h"
  61. #ifdef DEBUG
  62. #include <asm/udbg.h>
  63. #define DBG(fmt...) udbg_printf(fmt)
  64. #else
  65. #define DBG(fmt...)
  66. #endif
  67. /* The main machine-dep calls structure
  68. */
  69. struct machdep_calls ppc_md;
  70. EXPORT_SYMBOL(ppc_md);
  71. struct machdep_calls *machine_id;
  72. EXPORT_SYMBOL(machine_id);
  73. unsigned long klimit = (unsigned long) _end;
  74. char cmd_line[COMMAND_LINE_SIZE];
  75. /*
  76. * This still seems to be needed... -- paulus
  77. */
  78. struct screen_info screen_info = {
  79. .orig_x = 0,
  80. .orig_y = 25,
  81. .orig_video_cols = 80,
  82. .orig_video_lines = 25,
  83. .orig_video_isVGA = 1,
  84. .orig_video_points = 16
  85. };
  86. #ifdef __DO_IRQ_CANON
  87. /* XXX should go elsewhere eventually */
  88. int ppc_do_canonicalize_irqs;
  89. EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
  90. #endif
  91. /* also used by kexec */
  92. void machine_shutdown(void)
  93. {
  94. if (ppc_md.machine_shutdown)
  95. ppc_md.machine_shutdown();
  96. }
  97. void machine_restart(char *cmd)
  98. {
  99. machine_shutdown();
  100. if (ppc_md.restart)
  101. ppc_md.restart(cmd);
  102. #ifdef CONFIG_SMP
  103. smp_send_stop();
  104. #endif
  105. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  106. local_irq_disable();
  107. while (1) ;
  108. }
  109. void machine_power_off(void)
  110. {
  111. machine_shutdown();
  112. if (ppc_md.power_off)
  113. ppc_md.power_off();
  114. #ifdef CONFIG_SMP
  115. smp_send_stop();
  116. #endif
  117. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  118. local_irq_disable();
  119. while (1) ;
  120. }
  121. /* Used by the G5 thermal driver */
  122. EXPORT_SYMBOL_GPL(machine_power_off);
  123. void (*pm_power_off)(void) = machine_power_off;
  124. EXPORT_SYMBOL_GPL(pm_power_off);
  125. void machine_halt(void)
  126. {
  127. machine_shutdown();
  128. if (ppc_md.halt)
  129. ppc_md.halt();
  130. #ifdef CONFIG_SMP
  131. smp_send_stop();
  132. #endif
  133. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  134. local_irq_disable();
  135. while (1) ;
  136. }
  137. #ifdef CONFIG_TAU
  138. extern u32 cpu_temp(unsigned long cpu);
  139. extern u32 cpu_temp_both(unsigned long cpu);
  140. #endif /* CONFIG_TAU */
  141. #ifdef CONFIG_SMP
  142. DEFINE_PER_CPU(unsigned int, pvr);
  143. #endif
  144. static int show_cpuinfo(struct seq_file *m, void *v)
  145. {
  146. unsigned long cpu_id = (unsigned long)v - 1;
  147. unsigned int pvr;
  148. unsigned short maj;
  149. unsigned short min;
  150. if (cpu_id == NR_CPUS) {
  151. #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
  152. unsigned long bogosum = 0;
  153. int i;
  154. for_each_online_cpu(i)
  155. bogosum += loops_per_jiffy;
  156. seq_printf(m, "total bogomips\t: %lu.%02lu\n",
  157. bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
  158. #endif /* CONFIG_SMP && CONFIG_PPC32 */
  159. seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
  160. if (ppc_md.name)
  161. seq_printf(m, "platform\t: %s\n", ppc_md.name);
  162. if (ppc_md.show_cpuinfo != NULL)
  163. ppc_md.show_cpuinfo(m);
  164. return 0;
  165. }
  166. /* We only show online cpus: disable preempt (overzealous, I
  167. * knew) to prevent cpu going down. */
  168. preempt_disable();
  169. if (!cpu_online(cpu_id)) {
  170. preempt_enable();
  171. return 0;
  172. }
  173. #ifdef CONFIG_SMP
  174. pvr = per_cpu(pvr, cpu_id);
  175. #else
  176. pvr = mfspr(SPRN_PVR);
  177. #endif
  178. maj = (pvr >> 8) & 0xFF;
  179. min = pvr & 0xFF;
  180. seq_printf(m, "processor\t: %lu\n", cpu_id);
  181. seq_printf(m, "cpu\t\t: ");
  182. if (cur_cpu_spec->pvr_mask)
  183. seq_printf(m, "%s", cur_cpu_spec->cpu_name);
  184. else
  185. seq_printf(m, "unknown (%08x)", pvr);
  186. #ifdef CONFIG_ALTIVEC
  187. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  188. seq_printf(m, ", altivec supported");
  189. #endif /* CONFIG_ALTIVEC */
  190. seq_printf(m, "\n");
  191. #ifdef CONFIG_TAU
  192. if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
  193. #ifdef CONFIG_TAU_AVERAGE
  194. /* more straightforward, but potentially misleading */
  195. seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
  196. cpu_temp(cpu_id));
  197. #else
  198. /* show the actual temp sensor range */
  199. u32 temp;
  200. temp = cpu_temp_both(cpu_id);
  201. seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
  202. temp & 0xff, temp >> 16);
  203. #endif
  204. }
  205. #endif /* CONFIG_TAU */
  206. /*
  207. * Assume here that all clock rates are the same in a
  208. * smp system. -- Cort
  209. */
  210. if (ppc_proc_freq)
  211. seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
  212. ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);
  213. if (ppc_md.show_percpuinfo != NULL)
  214. ppc_md.show_percpuinfo(m, cpu_id);
  215. /* If we are a Freescale core do a simple check so
  216. * we dont have to keep adding cases in the future */
  217. if (PVR_VER(pvr) & 0x8000) {
  218. maj = PVR_MAJ(pvr);
  219. min = PVR_MIN(pvr);
  220. } else {
  221. switch (PVR_VER(pvr)) {
  222. case 0x0020: /* 403 family */
  223. maj = PVR_MAJ(pvr) + 1;
  224. min = PVR_MIN(pvr);
  225. break;
  226. case 0x1008: /* 740P/750P ?? */
  227. maj = ((pvr >> 8) & 0xFF) - 1;
  228. min = pvr & 0xFF;
  229. break;
  230. default:
  231. maj = (pvr >> 8) & 0xFF;
  232. min = pvr & 0xFF;
  233. break;
  234. }
  235. }
  236. seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
  237. maj, min, PVR_VER(pvr), PVR_REV(pvr));
  238. #ifdef CONFIG_PPC32
  239. seq_printf(m, "bogomips\t: %lu.%02lu\n",
  240. loops_per_jiffy / (500000/HZ),
  241. (loops_per_jiffy / (5000/HZ)) % 100);
  242. #endif
  243. #ifdef CONFIG_SMP
  244. seq_printf(m, "\n");
  245. #endif
  246. preempt_enable();
  247. return 0;
  248. }
  249. static void *c_start(struct seq_file *m, loff_t *pos)
  250. {
  251. unsigned long i = *pos;
  252. return i <= NR_CPUS ? (void *)(i + 1) : NULL;
  253. }
  254. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  255. {
  256. ++*pos;
  257. return c_start(m, pos);
  258. }
  259. static void c_stop(struct seq_file *m, void *v)
  260. {
  261. }
  262. struct seq_operations cpuinfo_op = {
  263. .start =c_start,
  264. .next = c_next,
  265. .stop = c_stop,
  266. .show = show_cpuinfo,
  267. };
  268. void __init check_for_initrd(void)
  269. {
  270. #ifdef CONFIG_BLK_DEV_INITRD
  271. DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
  272. initrd_start, initrd_end);
  273. /* If we were passed an initrd, set the ROOT_DEV properly if the values
  274. * look sensible. If not, clear initrd reference.
  275. */
  276. if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
  277. initrd_end > initrd_start)
  278. ROOT_DEV = Root_RAM0;
  279. else
  280. initrd_start = initrd_end = 0;
  281. if (initrd_start)
  282. printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
  283. DBG(" <- check_for_initrd()\n");
  284. #endif /* CONFIG_BLK_DEV_INITRD */
  285. }
  286. #ifdef CONFIG_SMP
  287. int threads_per_core, threads_shift;
  288. cpumask_t threads_core_mask;
  289. static void __init cpu_init_thread_core_maps(int tpc)
  290. {
  291. int i;
  292. threads_per_core = tpc;
  293. threads_core_mask = CPU_MASK_NONE;
  294. /* This implementation only supports power of 2 number of threads
  295. * for simplicity and performance
  296. */
  297. threads_shift = ilog2(tpc);
  298. BUG_ON(tpc != (1 << threads_shift));
  299. for (i = 0; i < tpc; i++)
  300. cpu_set(i, threads_core_mask);
  301. printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
  302. tpc, tpc > 1 ? "s" : "");
  303. printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
  304. }
  305. /**
  306. * setup_cpu_maps - initialize the following cpu maps:
  307. * cpu_possible_map
  308. * cpu_present_map
  309. * cpu_sibling_map
  310. *
  311. * Having the possible map set up early allows us to restrict allocations
  312. * of things like irqstacks to num_possible_cpus() rather than NR_CPUS.
  313. *
  314. * We do not initialize the online map here; cpus set their own bits in
  315. * cpu_online_map as they come up.
  316. *
  317. * This function is valid only for Open Firmware systems. finish_device_tree
  318. * must be called before using this.
  319. *
  320. * While we're here, we may as well set the "physical" cpu ids in the paca.
  321. *
  322. * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
  323. */
  324. void __init smp_setup_cpu_maps(void)
  325. {
  326. struct device_node *dn = NULL;
  327. int cpu = 0;
  328. int nthreads = 1;
  329. DBG("smp_setup_cpu_maps()\n");
  330. while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < NR_CPUS) {
  331. const int *intserv;
  332. int j, len;
  333. DBG(" * %s...\n", dn->full_name);
  334. intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
  335. &len);
  336. if (intserv) {
  337. nthreads = len / sizeof(int);
  338. DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
  339. nthreads);
  340. } else {
  341. DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
  342. intserv = of_get_property(dn, "reg", NULL);
  343. if (!intserv)
  344. intserv = &cpu; /* assume logical == phys */
  345. }
  346. for (j = 0; j < nthreads && cpu < NR_CPUS; j++) {
  347. DBG(" thread %d -> cpu %d (hard id %d)\n",
  348. j, cpu, intserv[j]);
  349. cpu_set(cpu, cpu_present_map);
  350. set_hard_smp_processor_id(cpu, intserv[j]);
  351. cpu_set(cpu, cpu_possible_map);
  352. cpu++;
  353. }
  354. }
  355. /* If no SMT supported, nthreads is forced to 1 */
  356. if (!cpu_has_feature(CPU_FTR_SMT)) {
  357. DBG(" SMT disabled ! nthreads forced to 1\n");
  358. nthreads = 1;
  359. }
  360. #ifdef CONFIG_PPC64
  361. /*
  362. * On pSeries LPAR, we need to know how many cpus
  363. * could possibly be added to this partition.
  364. */
  365. if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
  366. (dn = of_find_node_by_path("/rtas"))) {
  367. int num_addr_cell, num_size_cell, maxcpus;
  368. const unsigned int *ireg;
  369. num_addr_cell = of_n_addr_cells(dn);
  370. num_size_cell = of_n_size_cells(dn);
  371. ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
  372. if (!ireg)
  373. goto out;
  374. maxcpus = ireg[num_addr_cell + num_size_cell];
  375. /* Double maxcpus for processors which have SMT capability */
  376. if (cpu_has_feature(CPU_FTR_SMT))
  377. maxcpus *= nthreads;
  378. if (maxcpus > NR_CPUS) {
  379. printk(KERN_WARNING
  380. "Partition configured for %d cpus, "
  381. "operating system maximum is %d.\n",
  382. maxcpus, NR_CPUS);
  383. maxcpus = NR_CPUS;
  384. } else
  385. printk(KERN_INFO "Partition configured for %d cpus.\n",
  386. maxcpus);
  387. for (cpu = 0; cpu < maxcpus; cpu++)
  388. cpu_set(cpu, cpu_possible_map);
  389. out:
  390. of_node_put(dn);
  391. }
  392. vdso_data->processorCount = num_present_cpus();
  393. #endif /* CONFIG_PPC64 */
  394. /* Initialize CPU <=> thread mapping/
  395. *
  396. * WARNING: We assume that the number of threads is the same for
  397. * every CPU in the system. If that is not the case, then some code
  398. * here will have to be reworked
  399. */
  400. cpu_init_thread_core_maps(nthreads);
  401. }
  402. /*
  403. * Being that cpu_sibling_map is now a per_cpu array, then it cannot
  404. * be initialized until the per_cpu areas have been created. This
  405. * function is now called from setup_per_cpu_areas().
  406. */
  407. void __init smp_setup_cpu_sibling_map(void)
  408. {
  409. #ifdef CONFIG_PPC64
  410. int i, cpu, base;
  411. for_each_possible_cpu(cpu) {
  412. DBG("Sibling map for CPU %d:", cpu);
  413. base = cpu_first_thread_in_core(cpu);
  414. for (i = 0; i < threads_per_core; i++) {
  415. cpu_set(base + i, per_cpu(cpu_sibling_map, cpu));
  416. DBG(" %d", base + i);
  417. }
  418. DBG("\n");
  419. }
  420. #endif /* CONFIG_PPC64 */
  421. }
  422. #endif /* CONFIG_SMP */
  423. static __init int add_pcspkr(void)
  424. {
  425. struct device_node *np;
  426. struct platform_device *pd;
  427. int ret;
  428. np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
  429. of_node_put(np);
  430. if (!np)
  431. return -ENODEV;
  432. pd = platform_device_alloc("pcspkr", -1);
  433. if (!pd)
  434. return -ENOMEM;
  435. ret = platform_device_add(pd);
  436. if (ret)
  437. platform_device_put(pd);
  438. return ret;
  439. }
  440. device_initcall(add_pcspkr);
  441. void probe_machine(void)
  442. {
  443. extern struct machdep_calls __machine_desc_start;
  444. extern struct machdep_calls __machine_desc_end;
  445. /*
  446. * Iterate all ppc_md structures until we find the proper
  447. * one for the current machine type
  448. */
  449. DBG("Probing machine type ...\n");
  450. for (machine_id = &__machine_desc_start;
  451. machine_id < &__machine_desc_end;
  452. machine_id++) {
  453. DBG(" %s ...", machine_id->name);
  454. memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
  455. if (ppc_md.probe()) {
  456. DBG(" match !\n");
  457. break;
  458. }
  459. DBG("\n");
  460. }
  461. /* What can we do if we didn't find ? */
  462. if (machine_id >= &__machine_desc_end) {
  463. DBG("No suitable machine found !\n");
  464. for (;;);
  465. }
  466. printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
  467. }
  468. /* Match a class of boards, not a specific device configuration. */
  469. int check_legacy_ioport(unsigned long base_port)
  470. {
  471. struct device_node *parent, *np = NULL;
  472. int ret = -ENODEV;
  473. switch(base_port) {
  474. case I8042_DATA_REG:
  475. if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
  476. np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
  477. if (np) {
  478. parent = of_get_parent(np);
  479. of_node_put(np);
  480. np = parent;
  481. break;
  482. }
  483. np = of_find_node_by_type(NULL, "8042");
  484. /* Pegasos has no device_type on its 8042 node, look for the
  485. * name instead */
  486. if (!np)
  487. np = of_find_node_by_name(NULL, "8042");
  488. break;
  489. case FDC_BASE: /* FDC1 */
  490. np = of_find_node_by_type(NULL, "fdc");
  491. break;
  492. #ifdef CONFIG_PPC_PREP
  493. case _PIDXR:
  494. case _PNPWRP:
  495. case PNPBIOS_BASE:
  496. /* implement me */
  497. #endif
  498. default:
  499. /* ipmi is supposed to fail here */
  500. break;
  501. }
  502. if (!np)
  503. return ret;
  504. parent = of_get_parent(np);
  505. if (parent) {
  506. if (strcmp(parent->type, "isa") == 0)
  507. ret = 0;
  508. of_node_put(parent);
  509. }
  510. of_node_put(np);
  511. return ret;
  512. }
  513. EXPORT_SYMBOL(check_legacy_ioport);
  514. static int ppc_panic_event(struct notifier_block *this,
  515. unsigned long event, void *ptr)
  516. {
  517. ppc_md.panic(ptr); /* May not return */
  518. return NOTIFY_DONE;
  519. }
  520. static struct notifier_block ppc_panic_block = {
  521. .notifier_call = ppc_panic_event,
  522. .priority = INT_MIN /* may not return; must be done last */
  523. };
  524. void __init setup_panic(void)
  525. {
  526. atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
  527. }
  528. #ifdef CONFIG_CHECK_CACHE_COHERENCY
  529. /*
  530. * For platforms that have configurable cache-coherency. This function
  531. * checks that the cache coherency setting of the kernel matches the setting
  532. * left by the firmware, as indicated in the device tree. Since a mismatch
  533. * will eventually result in DMA failures, we print * and error and call
  534. * BUG() in that case.
  535. */
  536. #ifdef CONFIG_NOT_COHERENT_CACHE
  537. #define KERNEL_COHERENCY 0
  538. #else
  539. #define KERNEL_COHERENCY 1
  540. #endif
  541. static int __init check_cache_coherency(void)
  542. {
  543. struct device_node *np;
  544. const void *prop;
  545. int devtree_coherency;
  546. np = of_find_node_by_path("/");
  547. prop = of_get_property(np, "coherency-off", NULL);
  548. of_node_put(np);
  549. devtree_coherency = prop ? 0 : 1;
  550. if (devtree_coherency != KERNEL_COHERENCY) {
  551. printk(KERN_ERR
  552. "kernel coherency:%s != device tree_coherency:%s\n",
  553. KERNEL_COHERENCY ? "on" : "off",
  554. devtree_coherency ? "on" : "off");
  555. BUG();
  556. }
  557. return 0;
  558. }
  559. late_initcall(check_cache_coherency);
  560. #endif /* CONFIG_CHECK_CACHE_COHERENCY */
  561. #ifdef CONFIG_DEBUG_FS
  562. struct dentry *powerpc_debugfs_root;
  563. static int powerpc_debugfs_init(void)
  564. {
  565. powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
  566. return powerpc_debugfs_root == NULL;
  567. }
  568. arch_initcall(powerpc_debugfs_init);
  569. #endif