tqm5200.dts 4.2 KB

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  1. /*
  2. * TQM5200 board Device Tree Source
  3. *
  4. * Copyright (C) 2007 Semihalf
  5. * Marian Balakowicz <m8@semihalf.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. */
  12. / {
  13. model = "tqc,tqm5200";
  14. compatible = "tqc,tqm5200";
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. cpus {
  18. #address-cells = <1>;
  19. #size-cells = <0>;
  20. PowerPC,5200@0 {
  21. device_type = "cpu";
  22. reg = <0>;
  23. d-cache-line-size = <20>;
  24. i-cache-line-size = <20>;
  25. d-cache-size = <4000>; // L1, 16K
  26. i-cache-size = <4000>; // L1, 16K
  27. timebase-frequency = <0>; // from bootloader
  28. bus-frequency = <0>; // from bootloader
  29. clock-frequency = <0>; // from bootloader
  30. };
  31. };
  32. memory {
  33. device_type = "memory";
  34. reg = <00000000 04000000>; // 64MB
  35. };
  36. soc5200@f0000000 {
  37. #address-cells = <1>;
  38. #size-cells = <1>;
  39. compatible = "fsl,mpc5200-immr";
  40. ranges = <0 f0000000 0000c000>;
  41. reg = <f0000000 00000100>;
  42. bus-frequency = <0>; // from bootloader
  43. system-frequency = <0>; // from bootloader
  44. cdm@200 {
  45. compatible = "fsl,mpc5200-cdm";
  46. reg = <200 38>;
  47. };
  48. mpc5200_pic: interrupt-controller@500 {
  49. // 5200 interrupts are encoded into two levels;
  50. interrupt-controller;
  51. #interrupt-cells = <3>;
  52. compatible = "fsl,mpc5200-pic";
  53. reg = <500 80>;
  54. };
  55. timer@600 { // General Purpose Timer
  56. compatible = "fsl,mpc5200-gpt";
  57. reg = <600 10>;
  58. interrupts = <1 9 0>;
  59. interrupt-parent = <&mpc5200_pic>;
  60. fsl,has-wdt;
  61. };
  62. gpio@b00 {
  63. compatible = "fsl,mpc5200-gpio";
  64. reg = <b00 40>;
  65. interrupts = <1 7 0>;
  66. interrupt-parent = <&mpc5200_pic>;
  67. };
  68. usb@1000 {
  69. compatible = "fsl,mpc5200-ohci","ohci-be";
  70. reg = <1000 ff>;
  71. interrupts = <2 6 0>;
  72. interrupt-parent = <&mpc5200_pic>;
  73. };
  74. dma-controller@1200 {
  75. compatible = "fsl,mpc5200-bestcomm";
  76. reg = <1200 80>;
  77. interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
  78. 3 4 0 3 5 0 3 6 0 3 7 0
  79. 3 8 0 3 9 0 3 a 0 3 b 0
  80. 3 c 0 3 d 0 3 e 0 3 f 0>;
  81. interrupt-parent = <&mpc5200_pic>;
  82. };
  83. xlb@1f00 {
  84. compatible = "fsl,mpc5200-xlb";
  85. reg = <1f00 100>;
  86. };
  87. serial@2000 { // PSC1
  88. device_type = "serial";
  89. compatible = "fsl,mpc5200-psc-uart";
  90. port-number = <0>; // Logical port assignment
  91. reg = <2000 100>;
  92. interrupts = <2 1 0>;
  93. interrupt-parent = <&mpc5200_pic>;
  94. };
  95. serial@2200 { // PSC2
  96. device_type = "serial";
  97. compatible = "fsl,mpc5200-psc-uart";
  98. port-number = <1>; // Logical port assignment
  99. reg = <2200 100>;
  100. interrupts = <2 2 0>;
  101. interrupt-parent = <&mpc5200_pic>;
  102. };
  103. serial@2400 { // PSC3
  104. device_type = "serial";
  105. compatible = "fsl,mpc5200-psc-uart";
  106. port-number = <2>; // Logical port assignment
  107. reg = <2400 100>;
  108. interrupts = <2 3 0>;
  109. interrupt-parent = <&mpc5200_pic>;
  110. };
  111. ethernet@3000 {
  112. device_type = "network";
  113. compatible = "fsl,mpc5200-fec";
  114. reg = <3000 800>;
  115. local-mac-address = [ 00 00 00 00 00 00 ];
  116. interrupts = <2 5 0>;
  117. interrupt-parent = <&mpc5200_pic>;
  118. };
  119. ata@3a00 {
  120. compatible = "fsl,mpc5200-ata";
  121. reg = <3a00 100>;
  122. interrupts = <2 7 0>;
  123. interrupt-parent = <&mpc5200_pic>;
  124. };
  125. i2c@3d40 {
  126. compatible = "fsl,mpc5200-i2c","fsl-i2c";
  127. reg = <3d40 40>;
  128. interrupts = <2 10 0>;
  129. interrupt-parent = <&mpc5200_pic>;
  130. fsl5200-clocking;
  131. };
  132. sram@8000 {
  133. compatible = "fsl,mpc5200-sram";
  134. reg = <8000 4000>;
  135. };
  136. };
  137. pci@f0000d00 {
  138. #interrupt-cells = <1>;
  139. #size-cells = <2>;
  140. #address-cells = <3>;
  141. device_type = "pci";
  142. compatible = "fsl,mpc5200-pci";
  143. reg = <f0000d00 100>;
  144. interrupt-map-mask = <f800 0 0 7>;
  145. interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3
  146. c000 0 0 2 &mpc5200_pic 0 0 3
  147. c000 0 0 3 &mpc5200_pic 0 0 3
  148. c000 0 0 4 &mpc5200_pic 0 0 3>;
  149. clock-frequency = <0>; // From boot loader
  150. interrupts = <2 8 0 2 9 0 2 a 0>;
  151. interrupt-parent = <&mpc5200_pic>;
  152. bus-range = <0 0>;
  153. ranges = <42000000 0 80000000 80000000 0 10000000
  154. 02000000 0 90000000 90000000 0 10000000
  155. 01000000 0 00000000 a0000000 0 01000000>;
  156. };
  157. };