realview_eb.c 10 KB

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  1. /*
  2. * linux/arch/arm/mach-realview/realview_eb.c
  3. *
  4. * Copyright (C) 2004 ARM Limited
  5. * Copyright (C) 2000 Deep Blue Solutions Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/sysdev.h>
  24. #include <linux/amba/bus.h>
  25. #include <asm/hardware.h>
  26. #include <asm/io.h>
  27. #include <asm/irq.h>
  28. #include <asm/leds.h>
  29. #include <asm/mach-types.h>
  30. #include <asm/hardware/gic.h>
  31. #include <asm/hardware/icst307.h>
  32. #include <asm/hardware/cache-l2x0.h>
  33. #include <asm/mach/arch.h>
  34. #include <asm/mach/map.h>
  35. #include <asm/mach/mmc.h>
  36. #include <asm/mach/time.h>
  37. #include <asm/arch/board-eb.h>
  38. #include <asm/arch/irqs.h>
  39. #include "core.h"
  40. #include "clock.h"
  41. static struct map_desc realview_eb_io_desc[] __initdata = {
  42. {
  43. .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
  44. .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
  45. .length = SZ_4K,
  46. .type = MT_DEVICE,
  47. }, {
  48. .virtual = IO_ADDRESS(REALVIEW_GIC_CPU_BASE),
  49. .pfn = __phys_to_pfn(REALVIEW_GIC_CPU_BASE),
  50. .length = SZ_4K,
  51. .type = MT_DEVICE,
  52. }, {
  53. .virtual = IO_ADDRESS(REALVIEW_GIC_DIST_BASE),
  54. .pfn = __phys_to_pfn(REALVIEW_GIC_DIST_BASE),
  55. .length = SZ_4K,
  56. .type = MT_DEVICE,
  57. }, {
  58. .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
  59. .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
  60. .length = SZ_4K,
  61. .type = MT_DEVICE,
  62. }, {
  63. .virtual = IO_ADDRESS(REALVIEW_TIMER0_1_BASE),
  64. .pfn = __phys_to_pfn(REALVIEW_TIMER0_1_BASE),
  65. .length = SZ_4K,
  66. .type = MT_DEVICE,
  67. }, {
  68. .virtual = IO_ADDRESS(REALVIEW_TIMER2_3_BASE),
  69. .pfn = __phys_to_pfn(REALVIEW_TIMER2_3_BASE),
  70. .length = SZ_4K,
  71. .type = MT_DEVICE,
  72. },
  73. #ifdef CONFIG_DEBUG_LL
  74. {
  75. .virtual = IO_ADDRESS(REALVIEW_UART0_BASE),
  76. .pfn = __phys_to_pfn(REALVIEW_UART0_BASE),
  77. .length = SZ_4K,
  78. .type = MT_DEVICE,
  79. }
  80. #endif
  81. };
  82. static struct map_desc realview_eb11mp_io_desc[] __initdata = {
  83. {
  84. .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
  85. .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
  86. .length = SZ_4K,
  87. .type = MT_DEVICE,
  88. }, {
  89. .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
  90. .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
  91. .length = SZ_4K,
  92. .type = MT_DEVICE,
  93. }, {
  94. .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
  95. .pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
  96. .length = SZ_8K,
  97. .type = MT_DEVICE,
  98. }
  99. };
  100. static void __init realview_eb_map_io(void)
  101. {
  102. iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
  103. if (core_tile_eb11mp())
  104. iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
  105. }
  106. /*
  107. * RealView EB AMBA devices
  108. */
  109. /*
  110. * These devices are connected via the core APB bridge
  111. */
  112. #define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ }
  113. #define GPIO2_DMA { 0, 0 }
  114. #define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ }
  115. #define GPIO3_DMA { 0, 0 }
  116. #define AACI_IRQ { IRQ_EB_AACI, NO_IRQ }
  117. #define AACI_DMA { 0x80, 0x81 }
  118. #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
  119. #define MMCI0_DMA { 0x84, 0 }
  120. #define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ }
  121. #define KMI0_DMA { 0, 0 }
  122. #define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ }
  123. #define KMI1_DMA { 0, 0 }
  124. /*
  125. * These devices are connected directly to the multi-layer AHB switch
  126. */
  127. #define SMC_IRQ { NO_IRQ, NO_IRQ }
  128. #define SMC_DMA { 0, 0 }
  129. #define MPMC_IRQ { NO_IRQ, NO_IRQ }
  130. #define MPMC_DMA { 0, 0 }
  131. #define CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ }
  132. #define CLCD_DMA { 0, 0 }
  133. #define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ }
  134. #define DMAC_DMA { 0, 0 }
  135. /*
  136. * These devices are connected via the core APB bridge
  137. */
  138. #define SCTL_IRQ { NO_IRQ, NO_IRQ }
  139. #define SCTL_DMA { 0, 0 }
  140. #define WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
  141. #define WATCHDOG_DMA { 0, 0 }
  142. #define GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ }
  143. #define GPIO0_DMA { 0, 0 }
  144. #define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ }
  145. #define GPIO1_DMA { 0, 0 }
  146. #define RTC_IRQ { IRQ_EB_RTC, NO_IRQ }
  147. #define RTC_DMA { 0, 0 }
  148. /*
  149. * These devices are connected via the DMA APB bridge
  150. */
  151. #define SCI_IRQ { IRQ_EB_SCI, NO_IRQ }
  152. #define SCI_DMA { 7, 6 }
  153. #define UART0_IRQ { IRQ_EB_UART0, NO_IRQ }
  154. #define UART0_DMA { 15, 14 }
  155. #define UART1_IRQ { IRQ_EB_UART1, NO_IRQ }
  156. #define UART1_DMA { 13, 12 }
  157. #define UART2_IRQ { IRQ_EB_UART2, NO_IRQ }
  158. #define UART2_DMA { 11, 10 }
  159. #define UART3_IRQ { IRQ_EB_UART3, NO_IRQ }
  160. #define UART3_DMA { 0x86, 0x87 }
  161. #define SSP_IRQ { IRQ_EB_SSP, NO_IRQ }
  162. #define SSP_DMA { 9, 8 }
  163. /* FPGA Primecells */
  164. AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
  165. AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
  166. AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
  167. AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
  168. AMBA_DEVICE(uart3, "fpga:09", UART3, NULL);
  169. /* DevChip Primecells */
  170. AMBA_DEVICE(smc, "dev:00", SMC, NULL);
  171. AMBA_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data);
  172. AMBA_DEVICE(dmac, "dev:30", DMAC, NULL);
  173. AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
  174. AMBA_DEVICE(wdog, "dev:e1", WATCHDOG, NULL);
  175. AMBA_DEVICE(gpio0, "dev:e4", GPIO0, NULL);
  176. AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
  177. AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
  178. AMBA_DEVICE(rtc, "dev:e8", RTC, NULL);
  179. AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
  180. AMBA_DEVICE(uart0, "dev:f1", UART0, NULL);
  181. AMBA_DEVICE(uart1, "dev:f2", UART1, NULL);
  182. AMBA_DEVICE(uart2, "dev:f3", UART2, NULL);
  183. AMBA_DEVICE(ssp0, "dev:f4", SSP, NULL);
  184. static struct amba_device *amba_devs[] __initdata = {
  185. &dmac_device,
  186. &uart0_device,
  187. &uart1_device,
  188. &uart2_device,
  189. &uart3_device,
  190. &smc_device,
  191. &clcd_device,
  192. &sctl_device,
  193. &wdog_device,
  194. &gpio0_device,
  195. &gpio1_device,
  196. &gpio2_device,
  197. &rtc_device,
  198. &sci0_device,
  199. &ssp0_device,
  200. &aaci_device,
  201. &mmc0_device,
  202. &kmi0_device,
  203. &kmi1_device,
  204. };
  205. /*
  206. * RealView EB platform devices
  207. */
  208. static struct resource realview_eb_smc91x_resources[] = {
  209. [0] = {
  210. .start = REALVIEW_ETH_BASE,
  211. .end = REALVIEW_ETH_BASE + SZ_64K - 1,
  212. .flags = IORESOURCE_MEM,
  213. },
  214. [1] = {
  215. .start = IRQ_EB_ETH,
  216. .end = IRQ_EB_ETH,
  217. .flags = IORESOURCE_IRQ,
  218. },
  219. };
  220. static struct platform_device realview_eb_smc91x_device = {
  221. .name = "smc91x",
  222. .id = 0,
  223. .num_resources = ARRAY_SIZE(realview_eb_smc91x_resources),
  224. .resource = realview_eb_smc91x_resources,
  225. };
  226. static void __init gic_init_irq(void)
  227. {
  228. if (core_tile_eb11mp()) {
  229. unsigned int pldctrl;
  230. /* new irq mode */
  231. writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
  232. pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
  233. pldctrl |= 0x00800000;
  234. writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
  235. writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
  236. /* core tile GIC, primary */
  237. gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE);
  238. gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29);
  239. gic_cpu_init(0, gic_cpu_base_addr);
  240. #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
  241. /* board GIC, secondary */
  242. gic_dist_init(1, __io_address(REALVIEW_GIC_DIST_BASE), 64);
  243. gic_cpu_init(1, __io_address(REALVIEW_GIC_CPU_BASE));
  244. gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
  245. #endif
  246. } else {
  247. /* board GIC, primary */
  248. gic_cpu_base_addr = __io_address(REALVIEW_GIC_CPU_BASE);
  249. gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
  250. gic_cpu_init(0, gic_cpu_base_addr);
  251. }
  252. }
  253. /*
  254. * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
  255. */
  256. static void realview_eb11mp_fixup(void)
  257. {
  258. /* AMBA devices */
  259. dmac_device.irq[0] = IRQ_EB11MP_DMA;
  260. uart0_device.irq[0] = IRQ_EB11MP_UART0;
  261. uart1_device.irq[0] = IRQ_EB11MP_UART1;
  262. uart2_device.irq[0] = IRQ_EB11MP_UART2;
  263. uart3_device.irq[0] = IRQ_EB11MP_UART3;
  264. clcd_device.irq[0] = IRQ_EB11MP_CLCD;
  265. wdog_device.irq[0] = IRQ_EB11MP_WDOG;
  266. gpio0_device.irq[0] = IRQ_EB11MP_GPIO0;
  267. gpio1_device.irq[0] = IRQ_EB11MP_GPIO1;
  268. gpio2_device.irq[0] = IRQ_EB11MP_GPIO2;
  269. rtc_device.irq[0] = IRQ_EB11MP_RTC;
  270. sci0_device.irq[0] = IRQ_EB11MP_SCI;
  271. ssp0_device.irq[0] = IRQ_EB11MP_SSP;
  272. aaci_device.irq[0] = IRQ_EB11MP_AACI;
  273. mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A;
  274. mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B;
  275. kmi0_device.irq[0] = IRQ_EB11MP_KMI0;
  276. kmi1_device.irq[0] = IRQ_EB11MP_KMI1;
  277. /* platform devices */
  278. realview_eb_smc91x_resources[1].start = IRQ_EB11MP_ETH;
  279. realview_eb_smc91x_resources[1].end = IRQ_EB11MP_ETH;
  280. }
  281. static void __init realview_eb_timer_init(void)
  282. {
  283. unsigned int timer_irq;
  284. if (core_tile_eb11mp()) {
  285. #ifdef CONFIG_LOCAL_TIMERS
  286. twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE);
  287. twd_size = REALVIEW_EB11MP_TWD_SIZE;
  288. #endif
  289. timer_irq = IRQ_EB11MP_TIMER0_1;
  290. } else
  291. timer_irq = IRQ_EB_TIMER0_1;
  292. realview_timer_init(timer_irq);
  293. }
  294. static struct sys_timer realview_eb_timer = {
  295. .init = realview_eb_timer_init,
  296. };
  297. static void __init realview_eb_init(void)
  298. {
  299. int i;
  300. if (core_tile_eb11mp()) {
  301. realview_eb11mp_fixup();
  302. /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
  303. * Bits: .... ...0 0111 1001 0000 .... .... .... */
  304. l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
  305. }
  306. clk_register(&realview_clcd_clk);
  307. platform_device_register(&realview_flash_device);
  308. platform_device_register(&realview_eb_smc91x_device);
  309. platform_device_register(&realview_i2c_device);
  310. for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  311. struct amba_device *d = amba_devs[i];
  312. amba_device_register(d, &iomem_resource);
  313. }
  314. #ifdef CONFIG_LEDS
  315. leds_event = realview_leds_event;
  316. #endif
  317. }
  318. MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
  319. /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
  320. .phys_io = REALVIEW_UART0_BASE,
  321. .io_pg_offst = (IO_ADDRESS(REALVIEW_UART0_BASE) >> 18) & 0xfffc,
  322. .boot_params = 0x00000100,
  323. .map_io = realview_eb_map_io,
  324. .init_irq = gic_init_irq,
  325. .timer = &realview_eb_timer,
  326. .init_machine = realview_eb_init,
  327. MACHINE_END